gas/

	* config/bfin-parse.y (asm_1): Implement HLT instruction.
	Fix comments for DBGA, DBGAH and DBGAL.
	* config/tc-bfin.c (bfin_gen_pseudodbg_assert): Change according
	to the new encoding of DBGA, DBGAH, and DBGAL.

	include/
	* opcode/bfin.h (PseudoDbg_Assert): Add bits_grp and mask_grp.
	(PseudoDbg_Assert_grp_bits, PseudoDbg_Assert_grp_mask): Define.
	(PseudoDbg_Assert_dbgop_bits, PseudoDbg_Assert_dbgop_mask,
	PseudoDbg_Assert_dontcare_bits, PseudoDbg_Assert_dontcare_mask):
	Adjust accordingly.
	(init_PseudoDbg_Assert): Add PseudoDbg_Assert_grp_bits and
	PseudoDbg_Assert_grp_mask.

	opcodes/
	* bfin-dis.c (decode_pseudodbg_assert_0): Change according
	to the new encoding of DBGA, DBGAH, and DBGAL.
	(_print_insn_bfin): Likewise.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 7ed7a3a4ea17e8cf61e2e491b9eb1838e8213bfc..a07fed573b740c98d9f34b3f9a35d0902bd54e66 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,10 @@
+2009-09-04  Jie Zhang  <jie.zhang@analog.com>
+
+       * config/bfin-parse.y (asm_1): Implement HLT instruction.
+       Fix comments for DBGA, DBGAH and DBGAL.
+       * config/tc-bfin.c (bfin_gen_pseudodbg_assert): Change according
+       to the new encoding of DBGA, DBGAH, and DBGAL.
+
 2009-09-04  Jie Zhang  <jie.zhang@analog.com>
 
        * doc/all.texi: Replace BFIN with Blackfin.

diff --git a/gas/config/bfin-parse.y b/gas/config/bfin-parse.y
index 55b688eb5d8984099d82378b6d7037c8409f832a..003e41ac77520fb720fac4f649e6112431f6065e 100644 (file)
--- a/gas/config/bfin-parse.y
+++ b/gas/config/bfin-parse.y
@@ -3588,21 +3588,27 @@ asm_1:
          $$ = bfin_gen_pseudodbg (3, 5, 0);
        }
 
+       | HLT
+       {
+         notethat ("psedoDEBUG: HLT\n");
+         $$ = bfin_gen_pseudodbg (3, 4, 0);
+       }
+
        | DBGA LPAREN HALF_REG COMMA expr RPAREN
        {
-         notethat ("pseudodbg_assert: DBGA (dregs_lo , uimm16 )\n");
+         notethat ("pseudodbg_assert: DBGA (regs_lo/hi , uimm16 )\n");
          $$ = bfin_gen_pseudodbg_assert (IS_H ($3), &$3, uimm16 ($5));
        }
-               
+
        | DBGAH LPAREN REG COMMA expr RPAREN
        {
-         notethat ("pseudodbg_assert: DBGAH (dregs , uimm16 )\n");
+         notethat ("pseudodbg_assert: DBGAH (regs , uimm16 )\n");
          $$ = bfin_gen_pseudodbg_assert (3, &$3, uimm16 ($5));
        }
 
        | DBGAL LPAREN REG COMMA expr RPAREN
        {
-         notethat ("psedodbg_assert: DBGAL (dregs , uimm16 )\n");
+         notethat ("psedodbg_assert: DBGAL (regs , uimm16 )\n");
          $$ = bfin_gen_pseudodbg_assert (2, &$3, uimm16 ($5));
        }
 

diff --git a/gas/config/tc-bfin.c b/gas/config/tc-bfin.c
index bd0c6997ff3317579ea65f595bbe4e2a2733a41c..adbc3e4b8c96e0f143c1c2036072d5e719375cc4 100644 (file)
--- a/gas/config/tc-bfin.c
+++ b/gas/config/tc-bfin.c
@@ -1791,10 +1791,13 @@ bfin_gen_pseudodbg (int fn, int reg, int grp)
 INSTR_T
 bfin_gen_pseudodbg_assert (int dbgop, REG_T regtest, int expected)
 {
+  int grp;
   INIT (PseudoDbg_Assert);
 
   ASSIGN (dbgop);
   ASSIGN_R (regtest);
+  grp = GROUP (regtest);
+  ASSIGN (grp);
   ASSIGN (expected);
 
   return GEN_OPCODE32 ();

diff --git a/include/ChangeLog b/include/ChangeLog
index b8d14ec6ee53a8b015d623f3b31b9fa7b17858fc..053591a950b2c020fe5cf222a6e7e0938ff11d21 100644 (file)
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,13 @@
+2009-09-04  Jie Zhang  <jie.zhang@analog.com>
+
+       * opcode/bfin.h (PseudoDbg_Assert): Add bits_grp and mask_grp.
+       (PseudoDbg_Assert_grp_bits, PseudoDbg_Assert_grp_mask): Define.
+       (PseudoDbg_Assert_dbgop_bits, PseudoDbg_Assert_dbgop_mask,
+       PseudoDbg_Assert_dontcare_bits, PseudoDbg_Assert_dontcare_mask):
+       Adjust accordingly.
+       (init_PseudoDbg_Assert): Add PseudoDbg_Assert_grp_bits and
+       PseudoDbg_Assert_grp_mask.
+
 2009-08-06  Michael Eager <eager@eagercon.com>
 
        * dis-asm.h: Decl print_insn_microblaze().

diff --git a/include/opcode/bfin.h b/include/opcode/bfin.h
index 4466fdce7a491eaf9d3c79a2fe077c2b6710f366..2130bc9634df2bb4f2d40dfe07b8a7af4d6b7aaf 100755 (executable)
--- a/include/opcode/bfin.h
+++ b/include/opcode/bfin.h
@@ -939,7 +939,7 @@ typedef struct
 
 /*  PseudoDbg_assert
 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
-| 1 | 1 | 1 | 1 | 0 | - | - | - | - | - |.dbgop.....|.regtest...|
+| 1 | 1 | 1 | 1 | 0 | - | - | - | dbgop |.grp.......|.regtest...|
 |.expected......................................................|
 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 */
@@ -951,6 +951,8 @@ typedef struct
   int mask_expected;
   int bits_regtest;
   int mask_regtest;
+  int bits_grp;
+  int mask_grp;
   int bits_dbgop;
   int mask_dbgop;
   int bits_dontcare;
@@ -964,10 +966,12 @@ typedef struct
 #define PseudoDbg_Assert_expected_mask 0xffff
 #define PseudoDbg_Assert_regtest_bits  16
 #define PseudoDbg_Assert_regtest_mask  0x7
-#define PseudoDbg_Assert_dbgop_bits    19
-#define PseudoDbg_Assert_dbgop_mask    0x7
-#define PseudoDbg_Assert_dontcare_bits 22
-#define PseudoDbg_Assert_dontcare_mask 0x1f
+#define PseudoDbg_Assert_grp_bits      19
+#define PseudoDbg_Assert_grp_mask      0x7
+#define PseudoDbg_Assert_dbgop_bits    22
+#define PseudoDbg_Assert_dbgop_mask    0x3
+#define PseudoDbg_Assert_dontcare_bits 24
+#define PseudoDbg_Assert_dontcare_mask 0x7
 #define PseudoDbg_Assert_code_bits     27
 #define PseudoDbg_Assert_code_mask     0x1f
 
@@ -976,6 +980,7 @@ typedef struct
   PseudoDbg_Assert_opcode,                                             \
   PseudoDbg_Assert_expected_bits,      PseudoDbg_Assert_expected_mask, \
   PseudoDbg_Assert_regtest_bits,       PseudoDbg_Assert_regtest_mask,  \
+  PseudoDbg_Assert_grp_bits,           PseudoDbg_Assert_grp_mask,      \
   PseudoDbg_Assert_dbgop_bits,                 PseudoDbg_Assert_dbgop_mask,    \
   PseudoDbg_Assert_dontcare_bits,      PseudoDbg_Assert_dontcare_mask, \
   PseudoDbg_Assert_code_bits,          PseudoDbg_Assert_code_mask      \

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index c99771436e5c07918d1faaf8d4a7e99a261ce9fb..e36675aeadce6b85fc0b67ea8a7d71a3c3876048 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,9 @@
+2009-09-04  Jie Zhang  <jie.zhang@analog.com>
+
+       * bfin-dis.c (decode_pseudodbg_assert_0): Change according
+       to the new encoding of DBGA, DBGAH, and DBGAL.
+       (_print_insn_bfin): Likewise.
+
 2009-09-03  Jie Zhang  <jie.zhang@analog.com>
 
        * bfin-dis.c (_print_insn_bfin): Don't declare.

diff --git a/opcodes/bfin-dis.c b/opcodes/bfin-dis.c
index ee845254643e4a308a555ad0ad44c210befa6f72..d526a1a61cb8bb93496522f1381d842b493cad4a 100644 (file)
--- a/opcodes/bfin-dis.c
+++ b/opcodes/bfin-dis.c
@@ -4574,17 +4574,18 @@ decode_pseudodbg_assert_0 (TIword iw0, TIword iw1, disassemble_info *outf)
 {
   /* pseudodbg_assert
      +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
-     | 1 | 1 | 1 | 1 | 0 | - | - | - | - | - |.dbgop.....|.regtest...|
+     | 1 | 1 | 1 | 1 | 0 | - | - | - | dbgop |.grp.......|.regtest...|
      |.expected......................................................|
      +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+  */
   int expected = ((iw1 >> PseudoDbg_Assert_expected_bits) & PseudoDbg_Assert_expected_mask);
   int dbgop    = ((iw0 >> (PseudoDbg_Assert_dbgop_bits - 16)) & PseudoDbg_Assert_dbgop_mask);
+  int grp      = ((iw0 >> (PseudoDbg_Assert_grp_bits - 16)) & PseudoDbg_Assert_grp_mask);
   int regtest  = ((iw0 >> (PseudoDbg_Assert_regtest_bits - 16)) & PseudoDbg_Assert_regtest_mask);
 
   if (dbgop == 0)
     {
       OUTS (outf, "DBGA (");
-      OUTS (outf, dregs_lo (regtest));
+      OUTS (outf, regs_lo (regtest, grp));
       OUTS (outf, ", ");
       OUTS (outf, uimm16 (expected));
       OUTS (outf, ")");
@@ -4592,7 +4593,7 @@ decode_pseudodbg_assert_0 (TIword iw0, TIword iw1, disassemble_info *outf)
   else if (dbgop == 1)
     {
       OUTS (outf, "DBGA (");
-      OUTS (outf, dregs_hi (regtest));
+      OUTS (outf, regs_hi (regtest, grp));
       OUTS (outf, ", ");
       OUTS (outf, uimm16 (expected));
       OUTS (outf, ")");
@@ -4600,7 +4601,7 @@ decode_pseudodbg_assert_0 (TIword iw0, TIword iw1, disassemble_info *outf)
   else if (dbgop == 2)
     {
       OUTS (outf, "DBGAL (");
-      OUTS (outf, dregs (regtest));
+      OUTS (outf, allregs (regtest, grp));
       OUTS (outf, ", ");
       OUTS (outf, uimm16 (expected));
       OUTS (outf, ")");
@@ -4608,7 +4609,7 @@ decode_pseudodbg_assert_0 (TIword iw0, TIword iw1, disassemble_info *outf)
   else if (dbgop == 3)
     {
       OUTS (outf, "DBGAH (");
-      OUTS (outf, dregs (regtest));
+      OUTS (outf, allregs (regtest, grp));
       OUTS (outf, ", ");
       OUTS (outf, uimm16 (expected));
       OUTS (outf, ")");
@@ -4712,7 +4713,7 @@ _print_insn_bfin (bfd_vma pc, disassemble_info *outf)
   else if ((iw0 & 0xFF00) == 0xF900)
     rv = decode_pseudoOChar_0 (iw0, iw1, pc, outf);
 #endif
-  else if ((iw0 & 0xFFC0) == 0xf000 && (iw1 & 0x0000) == 0x0000)
+  else if ((iw0 & 0xFF00) == 0xf000 && (iw1 & 0x0000) == 0x0000)
     rv = decode_pseudodbg_assert_0 (iw0, iw1, outf);
 
   return rv;