[ARC] Fix printing 'b' mnemonics.
authorClaudiu Zissulescu <claziss@synopsys.com>
Wed, 9 Nov 2016 14:30:35 +0000 (15:30 +0100)
committerClaudiu Zissulescu <claziss@synopsys.com>
Tue, 22 Nov 2016 11:34:51 +0000 (12:34 +0100)
gas/
2016-11-22  Claudiu Zissulescu  <claziss@synopsys.com>

* testsuite/gas/arc/b.d: Update test result.

opcode/
2016-11-22  Claudiu Zissulescu  <claziss@synopsys.com>

* arc-tbl.h: Reorder conditional flags with delay flags for 'b'
instructions.

gas/ChangeLog
gas/testsuite/gas/arc/b.d
opcodes/ChangeLog
opcodes/arc-tbl.h

index 71cc677dd715a62edff377d0955278f81a4a7be5..58142eacedbe2a8b7fdf5111dfc40901f0439018 100644 (file)
@@ -1,3 +1,7 @@
+2016-11-22  Claudiu Zissulescu  <claziss@synopsys.com>
+
+       * testsuite/gas/arc/b.d: Update test result.
+
 2016-11-22  Alan Modra  <amodra@gmail.com>
 
        PR 20744
index 87afdc043ec7db136536078c0a08d1341f2d8391..50bc30581cc6a5cec7bc47f52da7102b8cfe370b 100644 (file)
@@ -39,8 +39,8 @@ Disassembly of section .text:
   78:  0789 ffcf               b       0 <text_label>
   7c:  0785 ffef               b.d     0 <text_label>
   80:  264a 7000               mov     0,0
-  84:  077c ffe1               b.deq   -132
+  84:  077c ffe1               beq.d   -132
   88:  264a 7000               mov     0,0
   8c:  0774 ffc2               bne     -140
-  90:  0770 ffe6               b.dnc   -144
+  90:  0770 ffe6               bnc.d   -144
   94:  264a 7000               mov     0,0
index b78e70dfd0c5354668000fc695fdb3b275661e96..9cd641a963965dd49c970174b5503b3b04a29e43 100644 (file)
@@ -1,3 +1,8 @@
+2016-11-22  Claudiu Zissulescu  <claziss@synopsys.com>
+
+       * arc-tbl.h: Reorder conditional flags with delay flags for 'b'
+       instructions.
+
 2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
 
        * aarch64-tbl.h (QL_V3SAMEHSD_ROT, QL_ELEMENT_ROT): Define.
index 3246d8d0e0ac3f68174fa38e802df4582467dcba..c6e246eda71e785caf9f1e2a4bbbc16ef241adb3 100644 (file)
 { "b", 0x00010000, 0xF8010000, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, NONE, { SIMM25_A16_5 }, { C_D }},
 
 /* b<.d><cc> s21 00000ssssssssss0SSSSSSSSSSNQQQQQ.  */
-{ "b", 0x00000000, 0xF8010000, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, NONE, { SIMM21_A16_5 }, { C_D, C_CC }},
+{ "b", 0x00000000, 0xF8010000, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, NONE, { SIMM21_A16_5 }, { C_CC, C_D }},
 
 /* bbit0<.d> b,c,s9 00001bbbsssssss1SBBBCCCCCCN01110.  */
 { "bbit0", 0x0801000E, 0xF801001F, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700, BRANCH, COND, { RB, RC, SIMM9_A16_8 }, { C_D }},
This page took 0.037074 seconds and 4 git commands to generate.