KVM: MMU: split mmu_set_spte
[deliverable/linux.git] / arch / x86 / kvm / mmu.c
CommitLineData
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1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
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19
20#include "vmx.h"
1d737c8a 21#include "mmu.h"
e495606d 22
edf88417 23#include <linux/kvm_host.h>
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24#include <linux/types.h>
25#include <linux/string.h>
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26#include <linux/mm.h>
27#include <linux/highmem.h>
28#include <linux/module.h>
448353ca 29#include <linux/swap.h>
05da4558 30#include <linux/hugetlb.h>
2f333bcb 31#include <linux/compiler.h>
6aa8b732 32
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33#include <asm/page.h>
34#include <asm/cmpxchg.h>
4e542370 35#include <asm/io.h>
6aa8b732 36
18552672
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37/*
38 * When setting this variable to true it enables Two-Dimensional-Paging
39 * where the hardware walks 2 page tables:
40 * 1. the guest-virtual to guest-physical
41 * 2. while doing 1. it walks guest-physical to host-physical
42 * If the hardware supports that we don't need to do shadow paging.
43 */
2f333bcb 44bool tdp_enabled = false;
18552672 45
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46#undef MMU_DEBUG
47
48#undef AUDIT
49
50#ifdef AUDIT
51static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
52#else
53static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
54#endif
55
56#ifdef MMU_DEBUG
57
58#define pgprintk(x...) do { if (dbg) printk(x); } while (0)
59#define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
60
61#else
62
63#define pgprintk(x...) do { } while (0)
64#define rmap_printk(x...) do { } while (0)
65
66#endif
67
68#if defined(MMU_DEBUG) || defined(AUDIT)
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69static int dbg = 0;
70module_param(dbg, bool, 0644);
37a7d8b0 71#endif
6aa8b732 72
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73#ifndef MMU_DEBUG
74#define ASSERT(x) do { } while (0)
75#else
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76#define ASSERT(x) \
77 if (!(x)) { \
78 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
79 __FILE__, __LINE__, #x); \
80 }
d6c69ee9 81#endif
6aa8b732 82
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83#define PT_FIRST_AVAIL_BITS_SHIFT 9
84#define PT64_SECOND_AVAIL_BITS_SHIFT 52
85
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86#define VALID_PAGE(x) ((x) != INVALID_PAGE)
87
88#define PT64_LEVEL_BITS 9
89
90#define PT64_LEVEL_SHIFT(level) \
d77c26fc 91 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
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92
93#define PT64_LEVEL_MASK(level) \
94 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
95
96#define PT64_INDEX(address, level)\
97 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
98
99
100#define PT32_LEVEL_BITS 10
101
102#define PT32_LEVEL_SHIFT(level) \
d77c26fc 103 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
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104
105#define PT32_LEVEL_MASK(level) \
106 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
107
108#define PT32_INDEX(address, level)\
109 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
110
111
27aba766 112#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
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113#define PT64_DIR_BASE_ADDR_MASK \
114 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
115
116#define PT32_BASE_ADDR_MASK PAGE_MASK
117#define PT32_DIR_BASE_ADDR_MASK \
118 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
119
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120#define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
121 | PT64_NX_MASK)
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122
123#define PFERR_PRESENT_MASK (1U << 0)
124#define PFERR_WRITE_MASK (1U << 1)
125#define PFERR_USER_MASK (1U << 2)
73b1087e 126#define PFERR_FETCH_MASK (1U << 4)
6aa8b732 127
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128#define PT_DIRECTORY_LEVEL 2
129#define PT_PAGE_TABLE_LEVEL 1
130
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131#define RMAP_EXT 4
132
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133#define ACC_EXEC_MASK 1
134#define ACC_WRITE_MASK PT_WRITABLE_MASK
135#define ACC_USER_MASK PT_USER_MASK
136#define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
137
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138#define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
139
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140struct kvm_rmap_desc {
141 u64 *shadow_ptes[RMAP_EXT];
142 struct kvm_rmap_desc *more;
143};
144
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145struct kvm_shadow_walk {
146 int (*entry)(struct kvm_shadow_walk *walk, struct kvm_vcpu *vcpu,
d40a1ee4 147 u64 addr, u64 *spte, int level);
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148};
149
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150static struct kmem_cache *pte_chain_cache;
151static struct kmem_cache *rmap_desc_cache;
d3d25b04 152static struct kmem_cache *mmu_page_header_cache;
b5a33a75 153
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154static u64 __read_mostly shadow_trap_nonpresent_pte;
155static u64 __read_mostly shadow_notrap_nonpresent_pte;
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156static u64 __read_mostly shadow_base_present_pte;
157static u64 __read_mostly shadow_nx_mask;
158static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
159static u64 __read_mostly shadow_user_mask;
160static u64 __read_mostly shadow_accessed_mask;
161static u64 __read_mostly shadow_dirty_mask;
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162
163void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
164{
165 shadow_trap_nonpresent_pte = trap_pte;
166 shadow_notrap_nonpresent_pte = notrap_pte;
167}
168EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
169
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170void kvm_mmu_set_base_ptes(u64 base_pte)
171{
172 shadow_base_present_pte = base_pte;
173}
174EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
175
176void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
177 u64 dirty_mask, u64 nx_mask, u64 x_mask)
178{
179 shadow_user_mask = user_mask;
180 shadow_accessed_mask = accessed_mask;
181 shadow_dirty_mask = dirty_mask;
182 shadow_nx_mask = nx_mask;
183 shadow_x_mask = x_mask;
184}
185EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
186
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187static int is_write_protection(struct kvm_vcpu *vcpu)
188{
ad312c7c 189 return vcpu->arch.cr0 & X86_CR0_WP;
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190}
191
192static int is_cpuid_PSE36(void)
193{
194 return 1;
195}
196
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197static int is_nx(struct kvm_vcpu *vcpu)
198{
ad312c7c 199 return vcpu->arch.shadow_efer & EFER_NX;
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200}
201
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202static int is_present_pte(unsigned long pte)
203{
204 return pte & PT_PRESENT_MASK;
205}
206
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207static int is_shadow_present_pte(u64 pte)
208{
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209 return pte != shadow_trap_nonpresent_pte
210 && pte != shadow_notrap_nonpresent_pte;
211}
212
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213static int is_large_pte(u64 pte)
214{
215 return pte & PT_PAGE_SIZE_MASK;
216}
217
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218static int is_writeble_pte(unsigned long pte)
219{
220 return pte & PT_WRITABLE_MASK;
221}
222
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223static int is_dirty_pte(unsigned long pte)
224{
7b52345e 225 return pte & shadow_dirty_mask;
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226}
227
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228static int is_rmap_pte(u64 pte)
229{
4b1a80fa 230 return is_shadow_present_pte(pte);
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231}
232
35149e21 233static pfn_t spte_to_pfn(u64 pte)
0b49ea86 234{
35149e21 235 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
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236}
237
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238static gfn_t pse36_gfn_delta(u32 gpte)
239{
240 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
241
242 return (gpte & PT32_DIR_PSE36_MASK) << shift;
243}
244
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245static void set_shadow_pte(u64 *sptep, u64 spte)
246{
247#ifdef CONFIG_X86_64
248 set_64bit((unsigned long *)sptep, spte);
249#else
250 set_64bit((unsigned long long *)sptep, spte);
251#endif
252}
253
e2dec939 254static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
2e3e5882 255 struct kmem_cache *base_cache, int min)
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256{
257 void *obj;
258
259 if (cache->nobjs >= min)
e2dec939 260 return 0;
714b93da 261 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 262 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
714b93da 263 if (!obj)
e2dec939 264 return -ENOMEM;
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265 cache->objects[cache->nobjs++] = obj;
266 }
e2dec939 267 return 0;
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268}
269
270static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
271{
272 while (mc->nobjs)
273 kfree(mc->objects[--mc->nobjs]);
274}
275
c1158e63 276static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
2e3e5882 277 int min)
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278{
279 struct page *page;
280
281 if (cache->nobjs >= min)
282 return 0;
283 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 284 page = alloc_page(GFP_KERNEL);
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285 if (!page)
286 return -ENOMEM;
287 set_page_private(page, 0);
288 cache->objects[cache->nobjs++] = page_address(page);
289 }
290 return 0;
291}
292
293static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
294{
295 while (mc->nobjs)
c4d198d5 296 free_page((unsigned long)mc->objects[--mc->nobjs]);
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297}
298
2e3e5882 299static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
714b93da 300{
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301 int r;
302
ad312c7c 303 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
2e3e5882 304 pte_chain_cache, 4);
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305 if (r)
306 goto out;
ad312c7c 307 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
2e3e5882 308 rmap_desc_cache, 1);
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309 if (r)
310 goto out;
ad312c7c 311 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
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312 if (r)
313 goto out;
ad312c7c 314 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
2e3e5882 315 mmu_page_header_cache, 4);
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316out:
317 return r;
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318}
319
320static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
321{
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322 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
323 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
324 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
325 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
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326}
327
328static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
329 size_t size)
330{
331 void *p;
332
333 BUG_ON(!mc->nobjs);
334 p = mc->objects[--mc->nobjs];
335 memset(p, 0, size);
336 return p;
337}
338
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339static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
340{
ad312c7c 341 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
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342 sizeof(struct kvm_pte_chain));
343}
344
90cb0529 345static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
714b93da 346{
90cb0529 347 kfree(pc);
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348}
349
350static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
351{
ad312c7c 352 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
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353 sizeof(struct kvm_rmap_desc));
354}
355
90cb0529 356static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
714b93da 357{
90cb0529 358 kfree(rd);
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359}
360
05da4558
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361/*
362 * Return the pointer to the largepage write count for a given
363 * gfn, handling slots that are not large page aligned.
364 */
365static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
366{
367 unsigned long idx;
368
369 idx = (gfn / KVM_PAGES_PER_HPAGE) -
370 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
371 return &slot->lpage_info[idx].write_count;
372}
373
374static void account_shadowed(struct kvm *kvm, gfn_t gfn)
375{
376 int *write_count;
377
378 write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn));
379 *write_count += 1;
05da4558
MT
380}
381
382static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
383{
384 int *write_count;
385
386 write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn));
387 *write_count -= 1;
388 WARN_ON(*write_count < 0);
389}
390
391static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
392{
393 struct kvm_memory_slot *slot = gfn_to_memslot(kvm, gfn);
394 int *largepage_idx;
395
396 if (slot) {
397 largepage_idx = slot_largepage_idx(gfn, slot);
398 return *largepage_idx;
399 }
400
401 return 1;
402}
403
404static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
405{
406 struct vm_area_struct *vma;
407 unsigned long addr;
4c2155ce 408 int ret = 0;
05da4558
MT
409
410 addr = gfn_to_hva(kvm, gfn);
411 if (kvm_is_error_hva(addr))
4c2155ce 412 return ret;
05da4558 413
4c2155ce 414 down_read(&current->mm->mmap_sem);
05da4558
MT
415 vma = find_vma(current->mm, addr);
416 if (vma && is_vm_hugetlb_page(vma))
4c2155ce
MT
417 ret = 1;
418 up_read(&current->mm->mmap_sem);
05da4558 419
4c2155ce 420 return ret;
05da4558
MT
421}
422
423static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
424{
425 struct kvm_memory_slot *slot;
426
427 if (has_wrprotected_page(vcpu->kvm, large_gfn))
428 return 0;
429
430 if (!host_largepage_backed(vcpu->kvm, large_gfn))
431 return 0;
432
433 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
434 if (slot && slot->dirty_bitmap)
435 return 0;
436
437 return 1;
438}
439
290fc38d
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440/*
441 * Take gfn and return the reverse mapping to it.
442 * Note: gfn must be unaliased before this function get called
443 */
444
05da4558 445static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
290fc38d
IE
446{
447 struct kvm_memory_slot *slot;
05da4558 448 unsigned long idx;
290fc38d
IE
449
450 slot = gfn_to_memslot(kvm, gfn);
05da4558
MT
451 if (!lpage)
452 return &slot->rmap[gfn - slot->base_gfn];
453
454 idx = (gfn / KVM_PAGES_PER_HPAGE) -
455 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
456
457 return &slot->lpage_info[idx].rmap_pde;
290fc38d
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458}
459
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460/*
461 * Reverse mapping data structures:
462 *
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463 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
464 * that points to page_address(page).
cd4a4e53 465 *
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466 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
467 * containing more mappings.
cd4a4e53 468 */
05da4558 469static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
cd4a4e53 470{
4db35314 471 struct kvm_mmu_page *sp;
cd4a4e53 472 struct kvm_rmap_desc *desc;
290fc38d 473 unsigned long *rmapp;
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474 int i;
475
476 if (!is_rmap_pte(*spte))
477 return;
290fc38d 478 gfn = unalias_gfn(vcpu->kvm, gfn);
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479 sp = page_header(__pa(spte));
480 sp->gfns[spte - sp->spt] = gfn;
05da4558 481 rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
290fc38d 482 if (!*rmapp) {
cd4a4e53 483 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
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IE
484 *rmapp = (unsigned long)spte;
485 } else if (!(*rmapp & 1)) {
cd4a4e53 486 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
714b93da 487 desc = mmu_alloc_rmap_desc(vcpu);
290fc38d 488 desc->shadow_ptes[0] = (u64 *)*rmapp;
cd4a4e53 489 desc->shadow_ptes[1] = spte;
290fc38d 490 *rmapp = (unsigned long)desc | 1;
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491 } else {
492 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
290fc38d 493 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
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494 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
495 desc = desc->more;
496 if (desc->shadow_ptes[RMAP_EXT-1]) {
714b93da 497 desc->more = mmu_alloc_rmap_desc(vcpu);
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498 desc = desc->more;
499 }
500 for (i = 0; desc->shadow_ptes[i]; ++i)
501 ;
502 desc->shadow_ptes[i] = spte;
503 }
504}
505
290fc38d 506static void rmap_desc_remove_entry(unsigned long *rmapp,
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507 struct kvm_rmap_desc *desc,
508 int i,
509 struct kvm_rmap_desc *prev_desc)
510{
511 int j;
512
513 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
514 ;
515 desc->shadow_ptes[i] = desc->shadow_ptes[j];
11718b4d 516 desc->shadow_ptes[j] = NULL;
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517 if (j != 0)
518 return;
519 if (!prev_desc && !desc->more)
290fc38d 520 *rmapp = (unsigned long)desc->shadow_ptes[0];
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521 else
522 if (prev_desc)
523 prev_desc->more = desc->more;
524 else
290fc38d 525 *rmapp = (unsigned long)desc->more | 1;
90cb0529 526 mmu_free_rmap_desc(desc);
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527}
528
290fc38d 529static void rmap_remove(struct kvm *kvm, u64 *spte)
cd4a4e53 530{
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531 struct kvm_rmap_desc *desc;
532 struct kvm_rmap_desc *prev_desc;
4db35314 533 struct kvm_mmu_page *sp;
35149e21 534 pfn_t pfn;
290fc38d 535 unsigned long *rmapp;
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536 int i;
537
538 if (!is_rmap_pte(*spte))
539 return;
4db35314 540 sp = page_header(__pa(spte));
35149e21 541 pfn = spte_to_pfn(*spte);
7b52345e 542 if (*spte & shadow_accessed_mask)
35149e21 543 kvm_set_pfn_accessed(pfn);
b4231d61 544 if (is_writeble_pte(*spte))
35149e21 545 kvm_release_pfn_dirty(pfn);
b4231d61 546 else
35149e21 547 kvm_release_pfn_clean(pfn);
05da4558 548 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
290fc38d 549 if (!*rmapp) {
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550 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
551 BUG();
290fc38d 552 } else if (!(*rmapp & 1)) {
cd4a4e53 553 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
290fc38d 554 if ((u64 *)*rmapp != spte) {
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555 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
556 spte, *spte);
557 BUG();
558 }
290fc38d 559 *rmapp = 0;
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560 } else {
561 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
290fc38d 562 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
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563 prev_desc = NULL;
564 while (desc) {
565 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
566 if (desc->shadow_ptes[i] == spte) {
290fc38d 567 rmap_desc_remove_entry(rmapp,
714b93da 568 desc, i,
cd4a4e53
AK
569 prev_desc);
570 return;
571 }
572 prev_desc = desc;
573 desc = desc->more;
574 }
575 BUG();
576 }
577}
578
98348e95 579static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
374cbac0 580{
374cbac0 581 struct kvm_rmap_desc *desc;
98348e95
IE
582 struct kvm_rmap_desc *prev_desc;
583 u64 *prev_spte;
584 int i;
585
586 if (!*rmapp)
587 return NULL;
588 else if (!(*rmapp & 1)) {
589 if (!spte)
590 return (u64 *)*rmapp;
591 return NULL;
592 }
593 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
594 prev_desc = NULL;
595 prev_spte = NULL;
596 while (desc) {
597 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
598 if (prev_spte == spte)
599 return desc->shadow_ptes[i];
600 prev_spte = desc->shadow_ptes[i];
601 }
602 desc = desc->more;
603 }
604 return NULL;
605}
606
607static void rmap_write_protect(struct kvm *kvm, u64 gfn)
608{
290fc38d 609 unsigned long *rmapp;
374cbac0 610 u64 *spte;
caa5b8a5 611 int write_protected = 0;
374cbac0 612
4a4c9924 613 gfn = unalias_gfn(kvm, gfn);
05da4558 614 rmapp = gfn_to_rmap(kvm, gfn, 0);
374cbac0 615
98348e95
IE
616 spte = rmap_next(kvm, rmapp, NULL);
617 while (spte) {
374cbac0 618 BUG_ON(!spte);
374cbac0 619 BUG_ON(!(*spte & PT_PRESENT_MASK));
374cbac0 620 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
caa5b8a5 621 if (is_writeble_pte(*spte)) {
9647c14c 622 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
caa5b8a5
ED
623 write_protected = 1;
624 }
9647c14c 625 spte = rmap_next(kvm, rmapp, spte);
374cbac0 626 }
855149aa 627 if (write_protected) {
35149e21 628 pfn_t pfn;
855149aa
IE
629
630 spte = rmap_next(kvm, rmapp, NULL);
35149e21
AL
631 pfn = spte_to_pfn(*spte);
632 kvm_set_pfn_dirty(pfn);
855149aa
IE
633 }
634
05da4558
MT
635 /* check for huge page mappings */
636 rmapp = gfn_to_rmap(kvm, gfn, 1);
637 spte = rmap_next(kvm, rmapp, NULL);
638 while (spte) {
639 BUG_ON(!spte);
640 BUG_ON(!(*spte & PT_PRESENT_MASK));
641 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
642 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
643 if (is_writeble_pte(*spte)) {
644 rmap_remove(kvm, spte);
645 --kvm->stat.lpages;
646 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
6597ca09 647 spte = NULL;
05da4558
MT
648 write_protected = 1;
649 }
650 spte = rmap_next(kvm, rmapp, spte);
651 }
652
caa5b8a5
ED
653 if (write_protected)
654 kvm_flush_remote_tlbs(kvm);
05da4558
MT
655
656 account_shadowed(kvm, gfn);
374cbac0
AK
657}
658
e930bffe
AA
659static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
660{
661 u64 *spte;
662 int need_tlb_flush = 0;
663
664 while ((spte = rmap_next(kvm, rmapp, NULL))) {
665 BUG_ON(!(*spte & PT_PRESENT_MASK));
666 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
667 rmap_remove(kvm, spte);
668 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
669 need_tlb_flush = 1;
670 }
671 return need_tlb_flush;
672}
673
674static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
675 int (*handler)(struct kvm *kvm, unsigned long *rmapp))
676{
677 int i;
678 int retval = 0;
679
680 /*
681 * If mmap_sem isn't taken, we can look the memslots with only
682 * the mmu_lock by skipping over the slots with userspace_addr == 0.
683 */
684 for (i = 0; i < kvm->nmemslots; i++) {
685 struct kvm_memory_slot *memslot = &kvm->memslots[i];
686 unsigned long start = memslot->userspace_addr;
687 unsigned long end;
688
689 /* mmu_lock protects userspace_addr */
690 if (!start)
691 continue;
692
693 end = start + (memslot->npages << PAGE_SHIFT);
694 if (hva >= start && hva < end) {
695 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
696 retval |= handler(kvm, &memslot->rmap[gfn_offset]);
697 retval |= handler(kvm,
698 &memslot->lpage_info[
699 gfn_offset /
700 KVM_PAGES_PER_HPAGE].rmap_pde);
701 }
702 }
703
704 return retval;
705}
706
707int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
708{
709 return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
710}
711
712static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
713{
714 u64 *spte;
715 int young = 0;
716
534e38b4
SY
717 /* always return old for EPT */
718 if (!shadow_accessed_mask)
719 return 0;
720
e930bffe
AA
721 spte = rmap_next(kvm, rmapp, NULL);
722 while (spte) {
723 int _young;
724 u64 _spte = *spte;
725 BUG_ON(!(_spte & PT_PRESENT_MASK));
726 _young = _spte & PT_ACCESSED_MASK;
727 if (_young) {
728 young = 1;
729 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
730 }
731 spte = rmap_next(kvm, rmapp, spte);
732 }
733 return young;
734}
735
736int kvm_age_hva(struct kvm *kvm, unsigned long hva)
737{
738 return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
739}
740
d6c69ee9 741#ifdef MMU_DEBUG
47ad8e68 742static int is_empty_shadow_page(u64 *spt)
6aa8b732 743{
139bdb2d
AK
744 u64 *pos;
745 u64 *end;
746
47ad8e68 747 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
3c915510 748 if (is_shadow_present_pte(*pos)) {
b8688d51 749 printk(KERN_ERR "%s: %p %llx\n", __func__,
139bdb2d 750 pos, *pos);
6aa8b732 751 return 0;
139bdb2d 752 }
6aa8b732
AK
753 return 1;
754}
d6c69ee9 755#endif
6aa8b732 756
4db35314 757static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
260746c0 758{
4db35314
AK
759 ASSERT(is_empty_shadow_page(sp->spt));
760 list_del(&sp->link);
761 __free_page(virt_to_page(sp->spt));
762 __free_page(virt_to_page(sp->gfns));
763 kfree(sp);
f05e70ac 764 ++kvm->arch.n_free_mmu_pages;
260746c0
AK
765}
766
cea0f0e7
AK
767static unsigned kvm_page_table_hashfn(gfn_t gfn)
768{
1ae0a13d 769 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
cea0f0e7
AK
770}
771
25c0de2c
AK
772static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
773 u64 *parent_pte)
6aa8b732 774{
4db35314 775 struct kvm_mmu_page *sp;
6aa8b732 776
ad312c7c
ZX
777 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
778 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
779 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
4db35314 780 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
f05e70ac 781 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
4db35314
AK
782 ASSERT(is_empty_shadow_page(sp->spt));
783 sp->slot_bitmap = 0;
784 sp->multimapped = 0;
785 sp->parent_pte = parent_pte;
f05e70ac 786 --vcpu->kvm->arch.n_free_mmu_pages;
4db35314 787 return sp;
6aa8b732
AK
788}
789
714b93da 790static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
4db35314 791 struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7
AK
792{
793 struct kvm_pte_chain *pte_chain;
794 struct hlist_node *node;
795 int i;
796
797 if (!parent_pte)
798 return;
4db35314
AK
799 if (!sp->multimapped) {
800 u64 *old = sp->parent_pte;
cea0f0e7
AK
801
802 if (!old) {
4db35314 803 sp->parent_pte = parent_pte;
cea0f0e7
AK
804 return;
805 }
4db35314 806 sp->multimapped = 1;
714b93da 807 pte_chain = mmu_alloc_pte_chain(vcpu);
4db35314
AK
808 INIT_HLIST_HEAD(&sp->parent_ptes);
809 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
810 pte_chain->parent_ptes[0] = old;
811 }
4db35314 812 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
cea0f0e7
AK
813 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
814 continue;
815 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
816 if (!pte_chain->parent_ptes[i]) {
817 pte_chain->parent_ptes[i] = parent_pte;
818 return;
819 }
820 }
714b93da 821 pte_chain = mmu_alloc_pte_chain(vcpu);
cea0f0e7 822 BUG_ON(!pte_chain);
4db35314 823 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
824 pte_chain->parent_ptes[0] = parent_pte;
825}
826
4db35314 827static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
cea0f0e7
AK
828 u64 *parent_pte)
829{
830 struct kvm_pte_chain *pte_chain;
831 struct hlist_node *node;
832 int i;
833
4db35314
AK
834 if (!sp->multimapped) {
835 BUG_ON(sp->parent_pte != parent_pte);
836 sp->parent_pte = NULL;
cea0f0e7
AK
837 return;
838 }
4db35314 839 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
cea0f0e7
AK
840 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
841 if (!pte_chain->parent_ptes[i])
842 break;
843 if (pte_chain->parent_ptes[i] != parent_pte)
844 continue;
697fe2e2
AK
845 while (i + 1 < NR_PTE_CHAIN_ENTRIES
846 && pte_chain->parent_ptes[i + 1]) {
cea0f0e7
AK
847 pte_chain->parent_ptes[i]
848 = pte_chain->parent_ptes[i + 1];
849 ++i;
850 }
851 pte_chain->parent_ptes[i] = NULL;
697fe2e2
AK
852 if (i == 0) {
853 hlist_del(&pte_chain->link);
90cb0529 854 mmu_free_pte_chain(pte_chain);
4db35314
AK
855 if (hlist_empty(&sp->parent_ptes)) {
856 sp->multimapped = 0;
857 sp->parent_pte = NULL;
697fe2e2
AK
858 }
859 }
cea0f0e7
AK
860 return;
861 }
862 BUG();
863}
864
d761a501
AK
865static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
866 struct kvm_mmu_page *sp)
867{
868 int i;
869
870 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
871 sp->spt[i] = shadow_trap_nonpresent_pte;
872}
873
4db35314 874static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
cea0f0e7
AK
875{
876 unsigned index;
877 struct hlist_head *bucket;
4db35314 878 struct kvm_mmu_page *sp;
cea0f0e7
AK
879 struct hlist_node *node;
880
b8688d51 881 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1ae0a13d 882 index = kvm_page_table_hashfn(gfn);
f05e70ac 883 bucket = &kvm->arch.mmu_page_hash[index];
4db35314 884 hlist_for_each_entry(sp, node, bucket, hash_link)
2e53d63a
MT
885 if (sp->gfn == gfn && !sp->role.metaphysical
886 && !sp->role.invalid) {
cea0f0e7 887 pgprintk("%s: found role %x\n",
b8688d51 888 __func__, sp->role.word);
4db35314 889 return sp;
cea0f0e7
AK
890 }
891 return NULL;
892}
893
894static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
895 gfn_t gfn,
896 gva_t gaddr,
897 unsigned level,
898 int metaphysical,
41074d07 899 unsigned access,
f7d9c7b7 900 u64 *parent_pte)
cea0f0e7
AK
901{
902 union kvm_mmu_page_role role;
903 unsigned index;
904 unsigned quadrant;
905 struct hlist_head *bucket;
4db35314 906 struct kvm_mmu_page *sp;
cea0f0e7
AK
907 struct hlist_node *node;
908
909 role.word = 0;
ad312c7c 910 role.glevels = vcpu->arch.mmu.root_level;
cea0f0e7
AK
911 role.level = level;
912 role.metaphysical = metaphysical;
41074d07 913 role.access = access;
ad312c7c 914 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
cea0f0e7
AK
915 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
916 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
917 role.quadrant = quadrant;
918 }
b8688d51 919 pgprintk("%s: looking gfn %lx role %x\n", __func__,
cea0f0e7 920 gfn, role.word);
1ae0a13d 921 index = kvm_page_table_hashfn(gfn);
f05e70ac 922 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4db35314
AK
923 hlist_for_each_entry(sp, node, bucket, hash_link)
924 if (sp->gfn == gfn && sp->role.word == role.word) {
925 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
b8688d51 926 pgprintk("%s: found\n", __func__);
4db35314 927 return sp;
cea0f0e7 928 }
dfc5aa00 929 ++vcpu->kvm->stat.mmu_cache_miss;
4db35314
AK
930 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
931 if (!sp)
932 return sp;
b8688d51 933 pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
4db35314
AK
934 sp->gfn = gfn;
935 sp->role = role;
936 hlist_add_head(&sp->hash_link, bucket);
374cbac0 937 if (!metaphysical)
4a4c9924 938 rmap_write_protect(vcpu->kvm, gfn);
131d8279
AK
939 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
940 vcpu->arch.mmu.prefetch_page(vcpu, sp);
941 else
942 nonpaging_prefetch_page(vcpu, sp);
4db35314 943 return sp;
cea0f0e7
AK
944}
945
3d000db5 946static int walk_shadow(struct kvm_shadow_walk *walker,
d40a1ee4 947 struct kvm_vcpu *vcpu, u64 addr)
3d000db5
AK
948{
949 hpa_t shadow_addr;
950 int level;
951 int r;
952 u64 *sptep;
953 unsigned index;
954
955 shadow_addr = vcpu->arch.mmu.root_hpa;
956 level = vcpu->arch.mmu.shadow_root_level;
957 if (level == PT32E_ROOT_LEVEL) {
958 shadow_addr = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
959 shadow_addr &= PT64_BASE_ADDR_MASK;
960 --level;
961 }
962
963 while (level >= PT_PAGE_TABLE_LEVEL) {
964 index = SHADOW_PT_INDEX(addr, level);
965 sptep = ((u64 *)__va(shadow_addr)) + index;
966 r = walker->entry(walker, vcpu, addr, sptep, level);
967 if (r)
968 return r;
969 shadow_addr = *sptep & PT64_BASE_ADDR_MASK;
970 --level;
971 }
972 return 0;
973}
974
90cb0529 975static void kvm_mmu_page_unlink_children(struct kvm *kvm,
4db35314 976 struct kvm_mmu_page *sp)
a436036b 977{
697fe2e2
AK
978 unsigned i;
979 u64 *pt;
980 u64 ent;
981
4db35314 982 pt = sp->spt;
697fe2e2 983
4db35314 984 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
697fe2e2 985 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
c7addb90 986 if (is_shadow_present_pte(pt[i]))
290fc38d 987 rmap_remove(kvm, &pt[i]);
c7addb90 988 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2
AK
989 }
990 return;
991 }
992
993 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
994 ent = pt[i];
995
05da4558
MT
996 if (is_shadow_present_pte(ent)) {
997 if (!is_large_pte(ent)) {
998 ent &= PT64_BASE_ADDR_MASK;
999 mmu_page_remove_parent_pte(page_header(ent),
1000 &pt[i]);
1001 } else {
1002 --kvm->stat.lpages;
1003 rmap_remove(kvm, &pt[i]);
1004 }
1005 }
c7addb90 1006 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2 1007 }
a436036b
AK
1008}
1009
4db35314 1010static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7 1011{
4db35314 1012 mmu_page_remove_parent_pte(sp, parent_pte);
a436036b
AK
1013}
1014
12b7d28f
AK
1015static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1016{
1017 int i;
1018
1019 for (i = 0; i < KVM_MAX_VCPUS; ++i)
1020 if (kvm->vcpus[i])
ad312c7c 1021 kvm->vcpus[i]->arch.last_pte_updated = NULL;
12b7d28f
AK
1022}
1023
31aa2b44 1024static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
a436036b
AK
1025{
1026 u64 *parent_pte;
1027
4db35314
AK
1028 while (sp->multimapped || sp->parent_pte) {
1029 if (!sp->multimapped)
1030 parent_pte = sp->parent_pte;
a436036b
AK
1031 else {
1032 struct kvm_pte_chain *chain;
1033
4db35314 1034 chain = container_of(sp->parent_ptes.first,
a436036b
AK
1035 struct kvm_pte_chain, link);
1036 parent_pte = chain->parent_ptes[0];
1037 }
697fe2e2 1038 BUG_ON(!parent_pte);
4db35314 1039 kvm_mmu_put_page(sp, parent_pte);
c7addb90 1040 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
a436036b 1041 }
31aa2b44
AK
1042}
1043
1044static void kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1045{
1046 ++kvm->stat.mmu_shadow_zapped;
4db35314 1047 kvm_mmu_page_unlink_children(kvm, sp);
31aa2b44 1048 kvm_mmu_unlink_parents(kvm, sp);
5b5c6a5a
AK
1049 kvm_flush_remote_tlbs(kvm);
1050 if (!sp->role.invalid && !sp->role.metaphysical)
1051 unaccount_shadowed(kvm, sp->gfn);
4db35314
AK
1052 if (!sp->root_count) {
1053 hlist_del(&sp->hash_link);
1054 kvm_mmu_free_page(kvm, sp);
2e53d63a 1055 } else {
2e53d63a 1056 sp->role.invalid = 1;
5b5c6a5a 1057 list_move(&sp->link, &kvm->arch.active_mmu_pages);
2e53d63a
MT
1058 kvm_reload_remote_mmus(kvm);
1059 }
12b7d28f 1060 kvm_mmu_reset_last_pte_updated(kvm);
a436036b
AK
1061}
1062
82ce2c96
IE
1063/*
1064 * Changing the number of mmu pages allocated to the vm
1065 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1066 */
1067void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1068{
1069 /*
1070 * If we set the number of mmu pages to be smaller be than the
1071 * number of actived pages , we must to free some mmu pages before we
1072 * change the value
1073 */
1074
f05e70ac 1075 if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
82ce2c96 1076 kvm_nr_mmu_pages) {
f05e70ac
ZX
1077 int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
1078 - kvm->arch.n_free_mmu_pages;
82ce2c96
IE
1079
1080 while (n_used_mmu_pages > kvm_nr_mmu_pages) {
1081 struct kvm_mmu_page *page;
1082
f05e70ac 1083 page = container_of(kvm->arch.active_mmu_pages.prev,
82ce2c96
IE
1084 struct kvm_mmu_page, link);
1085 kvm_mmu_zap_page(kvm, page);
1086 n_used_mmu_pages--;
1087 }
f05e70ac 1088 kvm->arch.n_free_mmu_pages = 0;
82ce2c96
IE
1089 }
1090 else
f05e70ac
ZX
1091 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1092 - kvm->arch.n_alloc_mmu_pages;
82ce2c96 1093
f05e70ac 1094 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
82ce2c96
IE
1095}
1096
f67a46f4 1097static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
a436036b
AK
1098{
1099 unsigned index;
1100 struct hlist_head *bucket;
4db35314 1101 struct kvm_mmu_page *sp;
a436036b
AK
1102 struct hlist_node *node, *n;
1103 int r;
1104
b8688d51 1105 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
a436036b 1106 r = 0;
1ae0a13d 1107 index = kvm_page_table_hashfn(gfn);
f05e70ac 1108 bucket = &kvm->arch.mmu_page_hash[index];
4db35314
AK
1109 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1110 if (sp->gfn == gfn && !sp->role.metaphysical) {
b8688d51 1111 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
4db35314
AK
1112 sp->role.word);
1113 kvm_mmu_zap_page(kvm, sp);
a436036b
AK
1114 r = 1;
1115 }
1116 return r;
cea0f0e7
AK
1117}
1118
f67a46f4 1119static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
97a0a01e 1120{
4db35314 1121 struct kvm_mmu_page *sp;
97a0a01e 1122
4db35314 1123 while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
b8688d51 1124 pgprintk("%s: zap %lx %x\n", __func__, gfn, sp->role.word);
4db35314 1125 kvm_mmu_zap_page(kvm, sp);
97a0a01e
AK
1126 }
1127}
1128
38c335f1 1129static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
6aa8b732 1130{
38c335f1 1131 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
4db35314 1132 struct kvm_mmu_page *sp = page_header(__pa(pte));
6aa8b732 1133
4db35314 1134 __set_bit(slot, &sp->slot_bitmap);
6aa8b732
AK
1135}
1136
039576c0
AK
1137struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1138{
72dc67a6
IE
1139 struct page *page;
1140
ad312c7c 1141 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
039576c0
AK
1142
1143 if (gpa == UNMAPPED_GVA)
1144 return NULL;
72dc67a6 1145
72dc67a6 1146 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
72dc67a6
IE
1147
1148 return page;
039576c0
AK
1149}
1150
1e73f9dd
MT
1151static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1152 unsigned pte_access, int user_fault,
1153 int write_fault, int dirty, int largepage,
1154 gfn_t gfn, pfn_t pfn, bool speculative)
1c4f1fd6
AK
1155{
1156 u64 spte;
1e73f9dd 1157 int ret = 0;
1c4f1fd6
AK
1158 /*
1159 * We don't set the accessed bit, since we sometimes want to see
1160 * whether the guest actually used the pte (in order to detect
1161 * demand paging).
1162 */
7b52345e 1163 spte = shadow_base_present_pte | shadow_dirty_mask;
947da538 1164 if (!speculative)
3201b5d9 1165 spte |= shadow_accessed_mask;
1c4f1fd6
AK
1166 if (!dirty)
1167 pte_access &= ~ACC_WRITE_MASK;
7b52345e
SY
1168 if (pte_access & ACC_EXEC_MASK)
1169 spte |= shadow_x_mask;
1170 else
1171 spte |= shadow_nx_mask;
1c4f1fd6 1172 if (pte_access & ACC_USER_MASK)
7b52345e 1173 spte |= shadow_user_mask;
05da4558
MT
1174 if (largepage)
1175 spte |= PT_PAGE_SIZE_MASK;
1c4f1fd6 1176
35149e21 1177 spte |= (u64)pfn << PAGE_SHIFT;
1c4f1fd6
AK
1178
1179 if ((pte_access & ACC_WRITE_MASK)
1180 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1181 struct kvm_mmu_page *shadow;
1182
1183 spte |= PT_WRITABLE_MASK;
1c4f1fd6
AK
1184
1185 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
05da4558
MT
1186 if (shadow ||
1187 (largepage && has_wrprotected_page(vcpu->kvm, gfn))) {
1c4f1fd6 1188 pgprintk("%s: found shadow page for %lx, marking ro\n",
b8688d51 1189 __func__, gfn);
1e73f9dd 1190 ret = 1;
1c4f1fd6
AK
1191 pte_access &= ~ACC_WRITE_MASK;
1192 if (is_writeble_pte(spte)) {
1193 spte &= ~PT_WRITABLE_MASK;
1194 kvm_x86_ops->tlb_flush(vcpu);
1195 }
1c4f1fd6
AK
1196 }
1197 }
1198
1c4f1fd6
AK
1199 if (pte_access & ACC_WRITE_MASK)
1200 mark_page_dirty(vcpu->kvm, gfn);
1201
1c4f1fd6 1202 set_shadow_pte(shadow_pte, spte);
1e73f9dd
MT
1203 return ret;
1204}
1205
1206
1207static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1208 unsigned pt_access, unsigned pte_access,
1209 int user_fault, int write_fault, int dirty,
1210 int *ptwrite, int largepage, gfn_t gfn,
1211 pfn_t pfn, bool speculative)
1212{
1213 int was_rmapped = 0;
1214 int was_writeble = is_writeble_pte(*shadow_pte);
1215
1216 pgprintk("%s: spte %llx access %x write_fault %d"
1217 " user_fault %d gfn %lx\n",
1218 __func__, *shadow_pte, pt_access,
1219 write_fault, user_fault, gfn);
1220
1221 if (is_rmap_pte(*shadow_pte)) {
1222 /*
1223 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1224 * the parent of the now unreachable PTE.
1225 */
1226 if (largepage && !is_large_pte(*shadow_pte)) {
1227 struct kvm_mmu_page *child;
1228 u64 pte = *shadow_pte;
1229
1230 child = page_header(pte & PT64_BASE_ADDR_MASK);
1231 mmu_page_remove_parent_pte(child, shadow_pte);
1232 } else if (pfn != spte_to_pfn(*shadow_pte)) {
1233 pgprintk("hfn old %lx new %lx\n",
1234 spte_to_pfn(*shadow_pte), pfn);
1235 rmap_remove(vcpu->kvm, shadow_pte);
1236 } else {
1237 if (largepage)
1238 was_rmapped = is_large_pte(*shadow_pte);
1239 else
1240 was_rmapped = 1;
1241 }
1242 }
1243 if (set_spte(vcpu, shadow_pte, pte_access, user_fault, write_fault,
1244 dirty, largepage, gfn, pfn, speculative))
1245 if (write_fault)
1246 *ptwrite = 1;
1247
1248 pgprintk("%s: setting spte %llx\n", __func__, *shadow_pte);
1249 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1250 is_large_pte(*shadow_pte)? "2MB" : "4kB",
1251 is_present_pte(*shadow_pte)?"RW":"R", gfn,
1252 *shadow_pte, shadow_pte);
1253 if (!was_rmapped && is_large_pte(*shadow_pte))
05da4558
MT
1254 ++vcpu->kvm->stat.lpages;
1255
1c4f1fd6
AK
1256 page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
1257 if (!was_rmapped) {
05da4558 1258 rmap_add(vcpu, shadow_pte, gfn, largepage);
1c4f1fd6 1259 if (!is_rmap_pte(*shadow_pte))
35149e21 1260 kvm_release_pfn_clean(pfn);
75e68e60
IE
1261 } else {
1262 if (was_writeble)
35149e21 1263 kvm_release_pfn_dirty(pfn);
75e68e60 1264 else
35149e21 1265 kvm_release_pfn_clean(pfn);
1c4f1fd6 1266 }
1b7fcd32 1267 if (speculative) {
ad312c7c 1268 vcpu->arch.last_pte_updated = shadow_pte;
1b7fcd32
AK
1269 vcpu->arch.last_pte_gfn = gfn;
1270 }
1c4f1fd6
AK
1271}
1272
6aa8b732
AK
1273static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1274{
1275}
1276
140754bc
AK
1277struct direct_shadow_walk {
1278 struct kvm_shadow_walk walker;
1279 pfn_t pfn;
1280 int write;
1281 int largepage;
1282 int pt_write;
1283};
6aa8b732 1284
140754bc
AK
1285static int direct_map_entry(struct kvm_shadow_walk *_walk,
1286 struct kvm_vcpu *vcpu,
d40a1ee4 1287 u64 addr, u64 *sptep, int level)
140754bc
AK
1288{
1289 struct direct_shadow_walk *walk =
1290 container_of(_walk, struct direct_shadow_walk, walker);
1291 struct kvm_mmu_page *sp;
1292 gfn_t pseudo_gfn;
1293 gfn_t gfn = addr >> PAGE_SHIFT;
1294
1295 if (level == PT_PAGE_TABLE_LEVEL
1296 || (walk->largepage && level == PT_DIRECTORY_LEVEL)) {
1297 mmu_set_spte(vcpu, sptep, ACC_ALL, ACC_ALL,
1298 0, walk->write, 1, &walk->pt_write,
1299 walk->largepage, gfn, walk->pfn, false);
bc2d4299 1300 ++vcpu->stat.pf_fixed;
140754bc
AK
1301 return 1;
1302 }
6aa8b732 1303
140754bc
AK
1304 if (*sptep == shadow_trap_nonpresent_pte) {
1305 pseudo_gfn = (addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
d40a1ee4 1306 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, (gva_t)addr, level - 1,
140754bc
AK
1307 1, ACC_ALL, sptep);
1308 if (!sp) {
1309 pgprintk("nonpaging_map: ENOMEM\n");
1310 kvm_release_pfn_clean(walk->pfn);
1311 return -ENOMEM;
6aa8b732
AK
1312 }
1313
140754bc
AK
1314 set_shadow_pte(sptep,
1315 __pa(sp->spt)
1316 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1317 | shadow_user_mask | shadow_x_mask);
6aa8b732 1318 }
140754bc
AK
1319 return 0;
1320}
1321
1322static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1323 int largepage, gfn_t gfn, pfn_t pfn)
1324{
1325 int r;
1326 struct direct_shadow_walk walker = {
1327 .walker = { .entry = direct_map_entry, },
1328 .pfn = pfn,
1329 .largepage = largepage,
1330 .write = write,
1331 .pt_write = 0,
1332 };
1333
d40a1ee4 1334 r = walk_shadow(&walker.walker, vcpu, gfn << PAGE_SHIFT);
140754bc
AK
1335 if (r < 0)
1336 return r;
1337 return walker.pt_write;
6aa8b732
AK
1338}
1339
10589a46
MT
1340static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1341{
1342 int r;
05da4558 1343 int largepage = 0;
35149e21 1344 pfn_t pfn;
e930bffe 1345 unsigned long mmu_seq;
aaee2c94 1346
05da4558
MT
1347 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
1348 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1349 largepage = 1;
1350 }
1351
e930bffe 1352 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 1353 smp_rmb();
35149e21 1354 pfn = gfn_to_pfn(vcpu->kvm, gfn);
aaee2c94 1355
d196e343 1356 /* mmio */
35149e21
AL
1357 if (is_error_pfn(pfn)) {
1358 kvm_release_pfn_clean(pfn);
d196e343
AK
1359 return 1;
1360 }
1361
aaee2c94 1362 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA
1363 if (mmu_notifier_retry(vcpu, mmu_seq))
1364 goto out_unlock;
eb787d10 1365 kvm_mmu_free_some_pages(vcpu);
6c41f428 1366 r = __direct_map(vcpu, v, write, largepage, gfn, pfn);
aaee2c94
MT
1367 spin_unlock(&vcpu->kvm->mmu_lock);
1368
aaee2c94 1369
10589a46 1370 return r;
e930bffe
AA
1371
1372out_unlock:
1373 spin_unlock(&vcpu->kvm->mmu_lock);
1374 kvm_release_pfn_clean(pfn);
1375 return 0;
10589a46
MT
1376}
1377
1378
17ac10ad
AK
1379static void mmu_free_roots(struct kvm_vcpu *vcpu)
1380{
1381 int i;
4db35314 1382 struct kvm_mmu_page *sp;
17ac10ad 1383
ad312c7c 1384 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
7b53aa56 1385 return;
aaee2c94 1386 spin_lock(&vcpu->kvm->mmu_lock);
ad312c7c
ZX
1387 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1388 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad 1389
4db35314
AK
1390 sp = page_header(root);
1391 --sp->root_count;
2e53d63a
MT
1392 if (!sp->root_count && sp->role.invalid)
1393 kvm_mmu_zap_page(vcpu->kvm, sp);
ad312c7c 1394 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
aaee2c94 1395 spin_unlock(&vcpu->kvm->mmu_lock);
17ac10ad
AK
1396 return;
1397 }
17ac10ad 1398 for (i = 0; i < 4; ++i) {
ad312c7c 1399 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad 1400
417726a3 1401 if (root) {
417726a3 1402 root &= PT64_BASE_ADDR_MASK;
4db35314
AK
1403 sp = page_header(root);
1404 --sp->root_count;
2e53d63a
MT
1405 if (!sp->root_count && sp->role.invalid)
1406 kvm_mmu_zap_page(vcpu->kvm, sp);
417726a3 1407 }
ad312c7c 1408 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 1409 }
aaee2c94 1410 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 1411 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
17ac10ad
AK
1412}
1413
1414static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
1415{
1416 int i;
cea0f0e7 1417 gfn_t root_gfn;
4db35314 1418 struct kvm_mmu_page *sp;
fb72d167 1419 int metaphysical = 0;
3bb65a22 1420
ad312c7c 1421 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
17ac10ad 1422
ad312c7c
ZX
1423 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1424 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad
AK
1425
1426 ASSERT(!VALID_PAGE(root));
fb72d167
JR
1427 if (tdp_enabled)
1428 metaphysical = 1;
4db35314 1429 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
fb72d167
JR
1430 PT64_ROOT_LEVEL, metaphysical,
1431 ACC_ALL, NULL);
4db35314
AK
1432 root = __pa(sp->spt);
1433 ++sp->root_count;
ad312c7c 1434 vcpu->arch.mmu.root_hpa = root;
17ac10ad
AK
1435 return;
1436 }
fb72d167
JR
1437 metaphysical = !is_paging(vcpu);
1438 if (tdp_enabled)
1439 metaphysical = 1;
17ac10ad 1440 for (i = 0; i < 4; ++i) {
ad312c7c 1441 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad
AK
1442
1443 ASSERT(!VALID_PAGE(root));
ad312c7c
ZX
1444 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
1445 if (!is_present_pte(vcpu->arch.pdptrs[i])) {
1446 vcpu->arch.mmu.pae_root[i] = 0;
417726a3
AK
1447 continue;
1448 }
ad312c7c
ZX
1449 root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
1450 } else if (vcpu->arch.mmu.root_level == 0)
cea0f0e7 1451 root_gfn = 0;
4db35314 1452 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
fb72d167 1453 PT32_ROOT_LEVEL, metaphysical,
f7d9c7b7 1454 ACC_ALL, NULL);
4db35314
AK
1455 root = __pa(sp->spt);
1456 ++sp->root_count;
ad312c7c 1457 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
17ac10ad 1458 }
ad312c7c 1459 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
17ac10ad
AK
1460}
1461
6aa8b732
AK
1462static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
1463{
1464 return vaddr;
1465}
1466
1467static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
3f3e7124 1468 u32 error_code)
6aa8b732 1469{
e833240f 1470 gfn_t gfn;
e2dec939 1471 int r;
6aa8b732 1472
b8688d51 1473 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
e2dec939
AK
1474 r = mmu_topup_memory_caches(vcpu);
1475 if (r)
1476 return r;
714b93da 1477
6aa8b732 1478 ASSERT(vcpu);
ad312c7c 1479 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 1480
e833240f 1481 gfn = gva >> PAGE_SHIFT;
6aa8b732 1482
e833240f
AK
1483 return nonpaging_map(vcpu, gva & PAGE_MASK,
1484 error_code & PFERR_WRITE_MASK, gfn);
6aa8b732
AK
1485}
1486
fb72d167
JR
1487static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
1488 u32 error_code)
1489{
35149e21 1490 pfn_t pfn;
fb72d167 1491 int r;
05da4558
MT
1492 int largepage = 0;
1493 gfn_t gfn = gpa >> PAGE_SHIFT;
e930bffe 1494 unsigned long mmu_seq;
fb72d167
JR
1495
1496 ASSERT(vcpu);
1497 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
1498
1499 r = mmu_topup_memory_caches(vcpu);
1500 if (r)
1501 return r;
1502
05da4558
MT
1503 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
1504 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1505 largepage = 1;
1506 }
e930bffe 1507 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 1508 smp_rmb();
35149e21 1509 pfn = gfn_to_pfn(vcpu->kvm, gfn);
35149e21
AL
1510 if (is_error_pfn(pfn)) {
1511 kvm_release_pfn_clean(pfn);
fb72d167
JR
1512 return 1;
1513 }
1514 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA
1515 if (mmu_notifier_retry(vcpu, mmu_seq))
1516 goto out_unlock;
fb72d167
JR
1517 kvm_mmu_free_some_pages(vcpu);
1518 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
6c41f428 1519 largepage, gfn, pfn);
fb72d167 1520 spin_unlock(&vcpu->kvm->mmu_lock);
fb72d167
JR
1521
1522 return r;
e930bffe
AA
1523
1524out_unlock:
1525 spin_unlock(&vcpu->kvm->mmu_lock);
1526 kvm_release_pfn_clean(pfn);
1527 return 0;
fb72d167
JR
1528}
1529
6aa8b732
AK
1530static void nonpaging_free(struct kvm_vcpu *vcpu)
1531{
17ac10ad 1532 mmu_free_roots(vcpu);
6aa8b732
AK
1533}
1534
1535static int nonpaging_init_context(struct kvm_vcpu *vcpu)
1536{
ad312c7c 1537 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
1538
1539 context->new_cr3 = nonpaging_new_cr3;
1540 context->page_fault = nonpaging_page_fault;
6aa8b732
AK
1541 context->gva_to_gpa = nonpaging_gva_to_gpa;
1542 context->free = nonpaging_free;
c7addb90 1543 context->prefetch_page = nonpaging_prefetch_page;
cea0f0e7 1544 context->root_level = 0;
6aa8b732 1545 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 1546 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
1547 return 0;
1548}
1549
d835dfec 1550void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
6aa8b732 1551{
1165f5fe 1552 ++vcpu->stat.tlb_flush;
cbdd1bea 1553 kvm_x86_ops->tlb_flush(vcpu);
6aa8b732
AK
1554}
1555
1556static void paging_new_cr3(struct kvm_vcpu *vcpu)
1557{
b8688d51 1558 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
cea0f0e7 1559 mmu_free_roots(vcpu);
6aa8b732
AK
1560}
1561
6aa8b732
AK
1562static void inject_page_fault(struct kvm_vcpu *vcpu,
1563 u64 addr,
1564 u32 err_code)
1565{
c3c91fee 1566 kvm_inject_page_fault(vcpu, addr, err_code);
6aa8b732
AK
1567}
1568
6aa8b732
AK
1569static void paging_free(struct kvm_vcpu *vcpu)
1570{
1571 nonpaging_free(vcpu);
1572}
1573
1574#define PTTYPE 64
1575#include "paging_tmpl.h"
1576#undef PTTYPE
1577
1578#define PTTYPE 32
1579#include "paging_tmpl.h"
1580#undef PTTYPE
1581
17ac10ad 1582static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
6aa8b732 1583{
ad312c7c 1584 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
1585
1586 ASSERT(is_pae(vcpu));
1587 context->new_cr3 = paging_new_cr3;
1588 context->page_fault = paging64_page_fault;
6aa8b732 1589 context->gva_to_gpa = paging64_gva_to_gpa;
c7addb90 1590 context->prefetch_page = paging64_prefetch_page;
6aa8b732 1591 context->free = paging_free;
17ac10ad
AK
1592 context->root_level = level;
1593 context->shadow_root_level = level;
17c3ba9d 1594 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
1595 return 0;
1596}
1597
17ac10ad
AK
1598static int paging64_init_context(struct kvm_vcpu *vcpu)
1599{
1600 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
1601}
1602
6aa8b732
AK
1603static int paging32_init_context(struct kvm_vcpu *vcpu)
1604{
ad312c7c 1605 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
1606
1607 context->new_cr3 = paging_new_cr3;
1608 context->page_fault = paging32_page_fault;
6aa8b732
AK
1609 context->gva_to_gpa = paging32_gva_to_gpa;
1610 context->free = paging_free;
c7addb90 1611 context->prefetch_page = paging32_prefetch_page;
6aa8b732
AK
1612 context->root_level = PT32_ROOT_LEVEL;
1613 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 1614 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
1615 return 0;
1616}
1617
1618static int paging32E_init_context(struct kvm_vcpu *vcpu)
1619{
17ac10ad 1620 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
6aa8b732
AK
1621}
1622
fb72d167
JR
1623static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
1624{
1625 struct kvm_mmu *context = &vcpu->arch.mmu;
1626
1627 context->new_cr3 = nonpaging_new_cr3;
1628 context->page_fault = tdp_page_fault;
1629 context->free = nonpaging_free;
1630 context->prefetch_page = nonpaging_prefetch_page;
67253af5 1631 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
fb72d167
JR
1632 context->root_hpa = INVALID_PAGE;
1633
1634 if (!is_paging(vcpu)) {
1635 context->gva_to_gpa = nonpaging_gva_to_gpa;
1636 context->root_level = 0;
1637 } else if (is_long_mode(vcpu)) {
1638 context->gva_to_gpa = paging64_gva_to_gpa;
1639 context->root_level = PT64_ROOT_LEVEL;
1640 } else if (is_pae(vcpu)) {
1641 context->gva_to_gpa = paging64_gva_to_gpa;
1642 context->root_level = PT32E_ROOT_LEVEL;
1643 } else {
1644 context->gva_to_gpa = paging32_gva_to_gpa;
1645 context->root_level = PT32_ROOT_LEVEL;
1646 }
1647
1648 return 0;
1649}
1650
1651static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
6aa8b732
AK
1652{
1653 ASSERT(vcpu);
ad312c7c 1654 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732
AK
1655
1656 if (!is_paging(vcpu))
1657 return nonpaging_init_context(vcpu);
a9058ecd 1658 else if (is_long_mode(vcpu))
6aa8b732
AK
1659 return paging64_init_context(vcpu);
1660 else if (is_pae(vcpu))
1661 return paging32E_init_context(vcpu);
1662 else
1663 return paging32_init_context(vcpu);
1664}
1665
fb72d167
JR
1666static int init_kvm_mmu(struct kvm_vcpu *vcpu)
1667{
35149e21
AL
1668 vcpu->arch.update_pte.pfn = bad_pfn;
1669
fb72d167
JR
1670 if (tdp_enabled)
1671 return init_kvm_tdp_mmu(vcpu);
1672 else
1673 return init_kvm_softmmu(vcpu);
1674}
1675
6aa8b732
AK
1676static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
1677{
1678 ASSERT(vcpu);
ad312c7c
ZX
1679 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
1680 vcpu->arch.mmu.free(vcpu);
1681 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6aa8b732
AK
1682 }
1683}
1684
1685int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
17c3ba9d
AK
1686{
1687 destroy_kvm_mmu(vcpu);
1688 return init_kvm_mmu(vcpu);
1689}
8668a3c4 1690EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
17c3ba9d
AK
1691
1692int kvm_mmu_load(struct kvm_vcpu *vcpu)
6aa8b732 1693{
714b93da
AK
1694 int r;
1695
e2dec939 1696 r = mmu_topup_memory_caches(vcpu);
17c3ba9d
AK
1697 if (r)
1698 goto out;
aaee2c94 1699 spin_lock(&vcpu->kvm->mmu_lock);
eb787d10 1700 kvm_mmu_free_some_pages(vcpu);
17c3ba9d 1701 mmu_alloc_roots(vcpu);
aaee2c94 1702 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 1703 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
17c3ba9d 1704 kvm_mmu_flush_tlb(vcpu);
714b93da
AK
1705out:
1706 return r;
6aa8b732 1707}
17c3ba9d
AK
1708EXPORT_SYMBOL_GPL(kvm_mmu_load);
1709
1710void kvm_mmu_unload(struct kvm_vcpu *vcpu)
1711{
1712 mmu_free_roots(vcpu);
1713}
6aa8b732 1714
09072daf 1715static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
4db35314 1716 struct kvm_mmu_page *sp,
ac1b714e
AK
1717 u64 *spte)
1718{
1719 u64 pte;
1720 struct kvm_mmu_page *child;
1721
1722 pte = *spte;
c7addb90 1723 if (is_shadow_present_pte(pte)) {
05da4558
MT
1724 if (sp->role.level == PT_PAGE_TABLE_LEVEL ||
1725 is_large_pte(pte))
290fc38d 1726 rmap_remove(vcpu->kvm, spte);
ac1b714e
AK
1727 else {
1728 child = page_header(pte & PT64_BASE_ADDR_MASK);
90cb0529 1729 mmu_page_remove_parent_pte(child, spte);
ac1b714e
AK
1730 }
1731 }
c7addb90 1732 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
05da4558
MT
1733 if (is_large_pte(pte))
1734 --vcpu->kvm->stat.lpages;
ac1b714e
AK
1735}
1736
0028425f 1737static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
4db35314 1738 struct kvm_mmu_page *sp,
0028425f 1739 u64 *spte,
489f1d65 1740 const void *new)
0028425f 1741{
30945387
MT
1742 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
1743 if (!vcpu->arch.update_pte.largepage ||
1744 sp->role.glevels == PT32_ROOT_LEVEL) {
1745 ++vcpu->kvm->stat.mmu_pde_zapped;
1746 return;
1747 }
1748 }
0028425f 1749
4cee5764 1750 ++vcpu->kvm->stat.mmu_pte_updated;
4db35314 1751 if (sp->role.glevels == PT32_ROOT_LEVEL)
489f1d65 1752 paging32_update_pte(vcpu, sp, spte, new);
0028425f 1753 else
489f1d65 1754 paging64_update_pte(vcpu, sp, spte, new);
0028425f
AK
1755}
1756
79539cec
AK
1757static bool need_remote_flush(u64 old, u64 new)
1758{
1759 if (!is_shadow_present_pte(old))
1760 return false;
1761 if (!is_shadow_present_pte(new))
1762 return true;
1763 if ((old ^ new) & PT64_BASE_ADDR_MASK)
1764 return true;
1765 old ^= PT64_NX_MASK;
1766 new ^= PT64_NX_MASK;
1767 return (old & ~new & PT64_PERM_MASK) != 0;
1768}
1769
1770static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
1771{
1772 if (need_remote_flush(old, new))
1773 kvm_flush_remote_tlbs(vcpu->kvm);
1774 else
1775 kvm_mmu_flush_tlb(vcpu);
1776}
1777
12b7d28f
AK
1778static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
1779{
ad312c7c 1780 u64 *spte = vcpu->arch.last_pte_updated;
12b7d28f 1781
7b52345e 1782 return !!(spte && (*spte & shadow_accessed_mask));
12b7d28f
AK
1783}
1784
d7824fff
AK
1785static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
1786 const u8 *new, int bytes)
1787{
1788 gfn_t gfn;
1789 int r;
1790 u64 gpte = 0;
35149e21 1791 pfn_t pfn;
d7824fff 1792
05da4558
MT
1793 vcpu->arch.update_pte.largepage = 0;
1794
d7824fff
AK
1795 if (bytes != 4 && bytes != 8)
1796 return;
1797
1798 /*
1799 * Assume that the pte write on a page table of the same type
1800 * as the current vcpu paging mode. This is nearly always true
1801 * (might be false while changing modes). Note it is verified later
1802 * by update_pte().
1803 */
1804 if (is_pae(vcpu)) {
1805 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
1806 if ((bytes == 4) && (gpa % 4 == 0)) {
1807 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
1808 if (r)
1809 return;
1810 memcpy((void *)&gpte + (gpa % 8), new, 4);
1811 } else if ((bytes == 8) && (gpa % 8 == 0)) {
1812 memcpy((void *)&gpte, new, 8);
1813 }
1814 } else {
1815 if ((bytes == 4) && (gpa % 4 == 0))
1816 memcpy((void *)&gpte, new, 4);
1817 }
1818 if (!is_present_pte(gpte))
1819 return;
1820 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
72dc67a6 1821
05da4558
MT
1822 if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
1823 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1824 vcpu->arch.update_pte.largepage = 1;
1825 }
e930bffe 1826 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 1827 smp_rmb();
35149e21 1828 pfn = gfn_to_pfn(vcpu->kvm, gfn);
72dc67a6 1829
35149e21
AL
1830 if (is_error_pfn(pfn)) {
1831 kvm_release_pfn_clean(pfn);
d196e343
AK
1832 return;
1833 }
d7824fff 1834 vcpu->arch.update_pte.gfn = gfn;
35149e21 1835 vcpu->arch.update_pte.pfn = pfn;
d7824fff
AK
1836}
1837
1b7fcd32
AK
1838static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
1839{
1840 u64 *spte = vcpu->arch.last_pte_updated;
1841
1842 if (spte
1843 && vcpu->arch.last_pte_gfn == gfn
1844 && shadow_accessed_mask
1845 && !(*spte & shadow_accessed_mask)
1846 && is_shadow_present_pte(*spte))
1847 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
1848}
1849
09072daf 1850void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
fe551881 1851 const u8 *new, int bytes)
da4a00f0 1852{
9b7a0325 1853 gfn_t gfn = gpa >> PAGE_SHIFT;
4db35314 1854 struct kvm_mmu_page *sp;
0e7bc4b9 1855 struct hlist_node *node, *n;
9b7a0325
AK
1856 struct hlist_head *bucket;
1857 unsigned index;
489f1d65 1858 u64 entry, gentry;
9b7a0325 1859 u64 *spte;
9b7a0325 1860 unsigned offset = offset_in_page(gpa);
0e7bc4b9 1861 unsigned pte_size;
9b7a0325 1862 unsigned page_offset;
0e7bc4b9 1863 unsigned misaligned;
fce0657f 1864 unsigned quadrant;
9b7a0325 1865 int level;
86a5ba02 1866 int flooded = 0;
ac1b714e 1867 int npte;
489f1d65 1868 int r;
9b7a0325 1869
b8688d51 1870 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
d7824fff 1871 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
aaee2c94 1872 spin_lock(&vcpu->kvm->mmu_lock);
1b7fcd32 1873 kvm_mmu_access_page(vcpu, gfn);
eb787d10 1874 kvm_mmu_free_some_pages(vcpu);
4cee5764 1875 ++vcpu->kvm->stat.mmu_pte_write;
c7addb90 1876 kvm_mmu_audit(vcpu, "pre pte write");
ad312c7c 1877 if (gfn == vcpu->arch.last_pt_write_gfn
12b7d28f 1878 && !last_updated_pte_accessed(vcpu)) {
ad312c7c
ZX
1879 ++vcpu->arch.last_pt_write_count;
1880 if (vcpu->arch.last_pt_write_count >= 3)
86a5ba02
AK
1881 flooded = 1;
1882 } else {
ad312c7c
ZX
1883 vcpu->arch.last_pt_write_gfn = gfn;
1884 vcpu->arch.last_pt_write_count = 1;
1885 vcpu->arch.last_pte_updated = NULL;
86a5ba02 1886 }
1ae0a13d 1887 index = kvm_page_table_hashfn(gfn);
f05e70ac 1888 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4db35314 1889 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
5b5c6a5a 1890 if (sp->gfn != gfn || sp->role.metaphysical || sp->role.invalid)
9b7a0325 1891 continue;
4db35314 1892 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
0e7bc4b9 1893 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
e925c5ba 1894 misaligned |= bytes < 4;
86a5ba02 1895 if (misaligned || flooded) {
0e7bc4b9
AK
1896 /*
1897 * Misaligned accesses are too much trouble to fix
1898 * up; also, they usually indicate a page is not used
1899 * as a page table.
86a5ba02
AK
1900 *
1901 * If we're seeing too many writes to a page,
1902 * it may no longer be a page table, or we may be
1903 * forking, in which case it is better to unmap the
1904 * page.
0e7bc4b9
AK
1905 */
1906 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
4db35314
AK
1907 gpa, bytes, sp->role.word);
1908 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 1909 ++vcpu->kvm->stat.mmu_flooded;
0e7bc4b9
AK
1910 continue;
1911 }
9b7a0325 1912 page_offset = offset;
4db35314 1913 level = sp->role.level;
ac1b714e 1914 npte = 1;
4db35314 1915 if (sp->role.glevels == PT32_ROOT_LEVEL) {
ac1b714e
AK
1916 page_offset <<= 1; /* 32->64 */
1917 /*
1918 * A 32-bit pde maps 4MB while the shadow pdes map
1919 * only 2MB. So we need to double the offset again
1920 * and zap two pdes instead of one.
1921 */
1922 if (level == PT32_ROOT_LEVEL) {
6b8d0f9b 1923 page_offset &= ~7; /* kill rounding error */
ac1b714e
AK
1924 page_offset <<= 1;
1925 npte = 2;
1926 }
fce0657f 1927 quadrant = page_offset >> PAGE_SHIFT;
9b7a0325 1928 page_offset &= ~PAGE_MASK;
4db35314 1929 if (quadrant != sp->role.quadrant)
fce0657f 1930 continue;
9b7a0325 1931 }
4db35314 1932 spte = &sp->spt[page_offset / sizeof(*spte)];
489f1d65
DE
1933 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
1934 gentry = 0;
1935 r = kvm_read_guest_atomic(vcpu->kvm,
1936 gpa & ~(u64)(pte_size - 1),
1937 &gentry, pte_size);
1938 new = (const void *)&gentry;
1939 if (r < 0)
1940 new = NULL;
1941 }
ac1b714e 1942 while (npte--) {
79539cec 1943 entry = *spte;
4db35314 1944 mmu_pte_write_zap_pte(vcpu, sp, spte);
489f1d65
DE
1945 if (new)
1946 mmu_pte_write_new_pte(vcpu, sp, spte, new);
79539cec 1947 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
ac1b714e 1948 ++spte;
9b7a0325 1949 }
9b7a0325 1950 }
c7addb90 1951 kvm_mmu_audit(vcpu, "post pte write");
aaee2c94 1952 spin_unlock(&vcpu->kvm->mmu_lock);
35149e21
AL
1953 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
1954 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
1955 vcpu->arch.update_pte.pfn = bad_pfn;
d7824fff 1956 }
da4a00f0
AK
1957}
1958
a436036b
AK
1959int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
1960{
10589a46
MT
1961 gpa_t gpa;
1962 int r;
a436036b 1963
10589a46 1964 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
10589a46 1965
aaee2c94 1966 spin_lock(&vcpu->kvm->mmu_lock);
10589a46 1967 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
aaee2c94 1968 spin_unlock(&vcpu->kvm->mmu_lock);
10589a46 1969 return r;
a436036b 1970}
577bdc49 1971EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
a436036b 1972
22d95b12 1973void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
ebeace86 1974{
f05e70ac 1975 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
4db35314 1976 struct kvm_mmu_page *sp;
ebeace86 1977
f05e70ac 1978 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
4db35314
AK
1979 struct kvm_mmu_page, link);
1980 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 1981 ++vcpu->kvm->stat.mmu_recycled;
ebeace86
AK
1982 }
1983}
ebeace86 1984
3067714c
AK
1985int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
1986{
1987 int r;
1988 enum emulation_result er;
1989
ad312c7c 1990 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
3067714c
AK
1991 if (r < 0)
1992 goto out;
1993
1994 if (!r) {
1995 r = 1;
1996 goto out;
1997 }
1998
b733bfb5
AK
1999 r = mmu_topup_memory_caches(vcpu);
2000 if (r)
2001 goto out;
2002
3067714c 2003 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
3067714c
AK
2004
2005 switch (er) {
2006 case EMULATE_DONE:
2007 return 1;
2008 case EMULATE_DO_MMIO:
2009 ++vcpu->stat.mmio_exits;
2010 return 0;
2011 case EMULATE_FAIL:
2012 kvm_report_emulation_failure(vcpu, "pagetable");
2013 return 1;
2014 default:
2015 BUG();
2016 }
2017out:
3067714c
AK
2018 return r;
2019}
2020EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2021
18552672
JR
2022void kvm_enable_tdp(void)
2023{
2024 tdp_enabled = true;
2025}
2026EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2027
5f4cb662
JR
2028void kvm_disable_tdp(void)
2029{
2030 tdp_enabled = false;
2031}
2032EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2033
6aa8b732
AK
2034static void free_mmu_pages(struct kvm_vcpu *vcpu)
2035{
4db35314 2036 struct kvm_mmu_page *sp;
6aa8b732 2037
f05e70ac
ZX
2038 while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2039 sp = container_of(vcpu->kvm->arch.active_mmu_pages.next,
4db35314
AK
2040 struct kvm_mmu_page, link);
2041 kvm_mmu_zap_page(vcpu->kvm, sp);
8d2d73b9 2042 cond_resched();
f51234c2 2043 }
ad312c7c 2044 free_page((unsigned long)vcpu->arch.mmu.pae_root);
6aa8b732
AK
2045}
2046
2047static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2048{
17ac10ad 2049 struct page *page;
6aa8b732
AK
2050 int i;
2051
2052 ASSERT(vcpu);
2053
f05e70ac
ZX
2054 if (vcpu->kvm->arch.n_requested_mmu_pages)
2055 vcpu->kvm->arch.n_free_mmu_pages =
2056 vcpu->kvm->arch.n_requested_mmu_pages;
82ce2c96 2057 else
f05e70ac
ZX
2058 vcpu->kvm->arch.n_free_mmu_pages =
2059 vcpu->kvm->arch.n_alloc_mmu_pages;
17ac10ad
AK
2060 /*
2061 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2062 * Therefore we need to allocate shadow page tables in the first
2063 * 4GB of memory, which happens to fit the DMA32 zone.
2064 */
2065 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2066 if (!page)
2067 goto error_1;
ad312c7c 2068 vcpu->arch.mmu.pae_root = page_address(page);
17ac10ad 2069 for (i = 0; i < 4; ++i)
ad312c7c 2070 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 2071
6aa8b732
AK
2072 return 0;
2073
2074error_1:
2075 free_mmu_pages(vcpu);
2076 return -ENOMEM;
2077}
2078
8018c27b 2079int kvm_mmu_create(struct kvm_vcpu *vcpu)
6aa8b732 2080{
6aa8b732 2081 ASSERT(vcpu);
ad312c7c 2082 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 2083
8018c27b
IM
2084 return alloc_mmu_pages(vcpu);
2085}
6aa8b732 2086
8018c27b
IM
2087int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2088{
2089 ASSERT(vcpu);
ad312c7c 2090 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2c264957 2091
8018c27b 2092 return init_kvm_mmu(vcpu);
6aa8b732
AK
2093}
2094
2095void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2096{
2097 ASSERT(vcpu);
2098
2099 destroy_kvm_mmu(vcpu);
2100 free_mmu_pages(vcpu);
714b93da 2101 mmu_free_memory_caches(vcpu);
6aa8b732
AK
2102}
2103
90cb0529 2104void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
6aa8b732 2105{
4db35314 2106 struct kvm_mmu_page *sp;
6aa8b732 2107
2245a28f 2108 spin_lock(&kvm->mmu_lock);
f05e70ac 2109 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
6aa8b732
AK
2110 int i;
2111 u64 *pt;
2112
4db35314 2113 if (!test_bit(slot, &sp->slot_bitmap))
6aa8b732
AK
2114 continue;
2115
4db35314 2116 pt = sp->spt;
6aa8b732
AK
2117 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2118 /* avoid RMW */
9647c14c 2119 if (pt[i] & PT_WRITABLE_MASK)
6aa8b732 2120 pt[i] &= ~PT_WRITABLE_MASK;
6aa8b732 2121 }
171d595d 2122 kvm_flush_remote_tlbs(kvm);
2245a28f 2123 spin_unlock(&kvm->mmu_lock);
6aa8b732 2124}
37a7d8b0 2125
90cb0529 2126void kvm_mmu_zap_all(struct kvm *kvm)
e0fa826f 2127{
4db35314 2128 struct kvm_mmu_page *sp, *node;
e0fa826f 2129
aaee2c94 2130 spin_lock(&kvm->mmu_lock);
f05e70ac 2131 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
4db35314 2132 kvm_mmu_zap_page(kvm, sp);
aaee2c94 2133 spin_unlock(&kvm->mmu_lock);
e0fa826f 2134
90cb0529 2135 kvm_flush_remote_tlbs(kvm);
e0fa826f
DL
2136}
2137
8b2cf73c 2138static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
3ee16c81
IE
2139{
2140 struct kvm_mmu_page *page;
2141
2142 page = container_of(kvm->arch.active_mmu_pages.prev,
2143 struct kvm_mmu_page, link);
2144 kvm_mmu_zap_page(kvm, page);
2145}
2146
2147static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2148{
2149 struct kvm *kvm;
2150 struct kvm *kvm_freed = NULL;
2151 int cache_count = 0;
2152
2153 spin_lock(&kvm_lock);
2154
2155 list_for_each_entry(kvm, &vm_list, vm_list) {
2156 int npages;
2157
5a4c9288
MT
2158 if (!down_read_trylock(&kvm->slots_lock))
2159 continue;
3ee16c81
IE
2160 spin_lock(&kvm->mmu_lock);
2161 npages = kvm->arch.n_alloc_mmu_pages -
2162 kvm->arch.n_free_mmu_pages;
2163 cache_count += npages;
2164 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2165 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2166 cache_count--;
2167 kvm_freed = kvm;
2168 }
2169 nr_to_scan--;
2170
2171 spin_unlock(&kvm->mmu_lock);
5a4c9288 2172 up_read(&kvm->slots_lock);
3ee16c81
IE
2173 }
2174 if (kvm_freed)
2175 list_move_tail(&kvm_freed->vm_list, &vm_list);
2176
2177 spin_unlock(&kvm_lock);
2178
2179 return cache_count;
2180}
2181
2182static struct shrinker mmu_shrinker = {
2183 .shrink = mmu_shrink,
2184 .seeks = DEFAULT_SEEKS * 10,
2185};
2186
2ddfd20e 2187static void mmu_destroy_caches(void)
b5a33a75
AK
2188{
2189 if (pte_chain_cache)
2190 kmem_cache_destroy(pte_chain_cache);
2191 if (rmap_desc_cache)
2192 kmem_cache_destroy(rmap_desc_cache);
d3d25b04
AK
2193 if (mmu_page_header_cache)
2194 kmem_cache_destroy(mmu_page_header_cache);
b5a33a75
AK
2195}
2196
3ee16c81
IE
2197void kvm_mmu_module_exit(void)
2198{
2199 mmu_destroy_caches();
2200 unregister_shrinker(&mmu_shrinker);
2201}
2202
b5a33a75
AK
2203int kvm_mmu_module_init(void)
2204{
2205 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2206 sizeof(struct kvm_pte_chain),
20c2df83 2207 0, 0, NULL);
b5a33a75
AK
2208 if (!pte_chain_cache)
2209 goto nomem;
2210 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2211 sizeof(struct kvm_rmap_desc),
20c2df83 2212 0, 0, NULL);
b5a33a75
AK
2213 if (!rmap_desc_cache)
2214 goto nomem;
2215
d3d25b04
AK
2216 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2217 sizeof(struct kvm_mmu_page),
20c2df83 2218 0, 0, NULL);
d3d25b04
AK
2219 if (!mmu_page_header_cache)
2220 goto nomem;
2221
3ee16c81
IE
2222 register_shrinker(&mmu_shrinker);
2223
b5a33a75
AK
2224 return 0;
2225
2226nomem:
3ee16c81 2227 mmu_destroy_caches();
b5a33a75
AK
2228 return -ENOMEM;
2229}
2230
3ad82a7e
ZX
2231/*
2232 * Caculate mmu pages needed for kvm.
2233 */
2234unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
2235{
2236 int i;
2237 unsigned int nr_mmu_pages;
2238 unsigned int nr_pages = 0;
2239
2240 for (i = 0; i < kvm->nmemslots; i++)
2241 nr_pages += kvm->memslots[i].npages;
2242
2243 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
2244 nr_mmu_pages = max(nr_mmu_pages,
2245 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
2246
2247 return nr_mmu_pages;
2248}
2249
2f333bcb
MT
2250static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2251 unsigned len)
2252{
2253 if (len > buffer->len)
2254 return NULL;
2255 return buffer->ptr;
2256}
2257
2258static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2259 unsigned len)
2260{
2261 void *ret;
2262
2263 ret = pv_mmu_peek_buffer(buffer, len);
2264 if (!ret)
2265 return ret;
2266 buffer->ptr += len;
2267 buffer->len -= len;
2268 buffer->processed += len;
2269 return ret;
2270}
2271
2272static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
2273 gpa_t addr, gpa_t value)
2274{
2275 int bytes = 8;
2276 int r;
2277
2278 if (!is_long_mode(vcpu) && !is_pae(vcpu))
2279 bytes = 4;
2280
2281 r = mmu_topup_memory_caches(vcpu);
2282 if (r)
2283 return r;
2284
3200f405 2285 if (!emulator_write_phys(vcpu, addr, &value, bytes))
2f333bcb
MT
2286 return -EFAULT;
2287
2288 return 1;
2289}
2290
2291static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2292{
2293 kvm_x86_ops->tlb_flush(vcpu);
2294 return 1;
2295}
2296
2297static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
2298{
2299 spin_lock(&vcpu->kvm->mmu_lock);
2300 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
2301 spin_unlock(&vcpu->kvm->mmu_lock);
2302 return 1;
2303}
2304
2305static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
2306 struct kvm_pv_mmu_op_buffer *buffer)
2307{
2308 struct kvm_mmu_op_header *header;
2309
2310 header = pv_mmu_peek_buffer(buffer, sizeof *header);
2311 if (!header)
2312 return 0;
2313 switch (header->op) {
2314 case KVM_MMU_OP_WRITE_PTE: {
2315 struct kvm_mmu_op_write_pte *wpte;
2316
2317 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
2318 if (!wpte)
2319 return 0;
2320 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
2321 wpte->pte_val);
2322 }
2323 case KVM_MMU_OP_FLUSH_TLB: {
2324 struct kvm_mmu_op_flush_tlb *ftlb;
2325
2326 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
2327 if (!ftlb)
2328 return 0;
2329 return kvm_pv_mmu_flush_tlb(vcpu);
2330 }
2331 case KVM_MMU_OP_RELEASE_PT: {
2332 struct kvm_mmu_op_release_pt *rpt;
2333
2334 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
2335 if (!rpt)
2336 return 0;
2337 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
2338 }
2339 default: return 0;
2340 }
2341}
2342
2343int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
2344 gpa_t addr, unsigned long *ret)
2345{
2346 int r;
6ad18fba 2347 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
2f333bcb 2348
6ad18fba
DH
2349 buffer->ptr = buffer->buf;
2350 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
2351 buffer->processed = 0;
2f333bcb 2352
6ad18fba 2353 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
2f333bcb
MT
2354 if (r)
2355 goto out;
2356
6ad18fba
DH
2357 while (buffer->len) {
2358 r = kvm_pv_mmu_op_one(vcpu, buffer);
2f333bcb
MT
2359 if (r < 0)
2360 goto out;
2361 if (r == 0)
2362 break;
2363 }
2364
2365 r = 1;
2366out:
6ad18fba 2367 *ret = buffer->processed;
2f333bcb
MT
2368 return r;
2369}
2370
37a7d8b0
AK
2371#ifdef AUDIT
2372
2373static const char *audit_msg;
2374
2375static gva_t canonicalize(gva_t gva)
2376{
2377#ifdef CONFIG_X86_64
2378 gva = (long long)(gva << 16) >> 16;
2379#endif
2380 return gva;
2381}
2382
2383static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
2384 gva_t va, int level)
2385{
2386 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
2387 int i;
2388 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
2389
2390 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
2391 u64 ent = pt[i];
2392
c7addb90 2393 if (ent == shadow_trap_nonpresent_pte)
37a7d8b0
AK
2394 continue;
2395
2396 va = canonicalize(va);
c7addb90
AK
2397 if (level > 1) {
2398 if (ent == shadow_notrap_nonpresent_pte)
2399 printk(KERN_ERR "audit: (%s) nontrapping pte"
2400 " in nonleaf level: levels %d gva %lx"
2401 " level %d pte %llx\n", audit_msg,
ad312c7c 2402 vcpu->arch.mmu.root_level, va, level, ent);
c7addb90 2403
37a7d8b0 2404 audit_mappings_page(vcpu, ent, va, level - 1);
c7addb90 2405 } else {
ad312c7c 2406 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
35149e21 2407 hpa_t hpa = (hpa_t)gpa_to_pfn(vcpu, gpa) << PAGE_SHIFT;
37a7d8b0 2408
c7addb90 2409 if (is_shadow_present_pte(ent)
37a7d8b0 2410 && (ent & PT64_BASE_ADDR_MASK) != hpa)
c7addb90
AK
2411 printk(KERN_ERR "xx audit error: (%s) levels %d"
2412 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
ad312c7c 2413 audit_msg, vcpu->arch.mmu.root_level,
d77c26fc
MD
2414 va, gpa, hpa, ent,
2415 is_shadow_present_pte(ent));
c7addb90
AK
2416 else if (ent == shadow_notrap_nonpresent_pte
2417 && !is_error_hpa(hpa))
2418 printk(KERN_ERR "audit: (%s) notrap shadow,"
2419 " valid guest gva %lx\n", audit_msg, va);
35149e21 2420 kvm_release_pfn_clean(pfn);
c7addb90 2421
37a7d8b0
AK
2422 }
2423 }
2424}
2425
2426static void audit_mappings(struct kvm_vcpu *vcpu)
2427{
1ea252af 2428 unsigned i;
37a7d8b0 2429
ad312c7c
ZX
2430 if (vcpu->arch.mmu.root_level == 4)
2431 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
37a7d8b0
AK
2432 else
2433 for (i = 0; i < 4; ++i)
ad312c7c 2434 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
37a7d8b0 2435 audit_mappings_page(vcpu,
ad312c7c 2436 vcpu->arch.mmu.pae_root[i],
37a7d8b0
AK
2437 i << 30,
2438 2);
2439}
2440
2441static int count_rmaps(struct kvm_vcpu *vcpu)
2442{
2443 int nmaps = 0;
2444 int i, j, k;
2445
2446 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
2447 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
2448 struct kvm_rmap_desc *d;
2449
2450 for (j = 0; j < m->npages; ++j) {
290fc38d 2451 unsigned long *rmapp = &m->rmap[j];
37a7d8b0 2452
290fc38d 2453 if (!*rmapp)
37a7d8b0 2454 continue;
290fc38d 2455 if (!(*rmapp & 1)) {
37a7d8b0
AK
2456 ++nmaps;
2457 continue;
2458 }
290fc38d 2459 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
37a7d8b0
AK
2460 while (d) {
2461 for (k = 0; k < RMAP_EXT; ++k)
2462 if (d->shadow_ptes[k])
2463 ++nmaps;
2464 else
2465 break;
2466 d = d->more;
2467 }
2468 }
2469 }
2470 return nmaps;
2471}
2472
2473static int count_writable_mappings(struct kvm_vcpu *vcpu)
2474{
2475 int nmaps = 0;
4db35314 2476 struct kvm_mmu_page *sp;
37a7d8b0
AK
2477 int i;
2478
f05e70ac 2479 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 2480 u64 *pt = sp->spt;
37a7d8b0 2481
4db35314 2482 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
37a7d8b0
AK
2483 continue;
2484
2485 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
2486 u64 ent = pt[i];
2487
2488 if (!(ent & PT_PRESENT_MASK))
2489 continue;
2490 if (!(ent & PT_WRITABLE_MASK))
2491 continue;
2492 ++nmaps;
2493 }
2494 }
2495 return nmaps;
2496}
2497
2498static void audit_rmap(struct kvm_vcpu *vcpu)
2499{
2500 int n_rmap = count_rmaps(vcpu);
2501 int n_actual = count_writable_mappings(vcpu);
2502
2503 if (n_rmap != n_actual)
2504 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
b8688d51 2505 __func__, audit_msg, n_rmap, n_actual);
37a7d8b0
AK
2506}
2507
2508static void audit_write_protection(struct kvm_vcpu *vcpu)
2509{
4db35314 2510 struct kvm_mmu_page *sp;
290fc38d
IE
2511 struct kvm_memory_slot *slot;
2512 unsigned long *rmapp;
2513 gfn_t gfn;
37a7d8b0 2514
f05e70ac 2515 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 2516 if (sp->role.metaphysical)
37a7d8b0
AK
2517 continue;
2518
4db35314
AK
2519 slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
2520 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
290fc38d
IE
2521 rmapp = &slot->rmap[gfn - slot->base_gfn];
2522 if (*rmapp)
37a7d8b0
AK
2523 printk(KERN_ERR "%s: (%s) shadow page has writable"
2524 " mappings: gfn %lx role %x\n",
b8688d51 2525 __func__, audit_msg, sp->gfn,
4db35314 2526 sp->role.word);
37a7d8b0
AK
2527 }
2528}
2529
2530static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
2531{
2532 int olddbg = dbg;
2533
2534 dbg = 0;
2535 audit_msg = msg;
2536 audit_rmap(vcpu);
2537 audit_write_protection(vcpu);
2538 audit_mappings(vcpu);
2539 dbg = olddbg;
2540}
2541
2542#endif
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