81cd6c79babeb79c8d3904f12a890bfb6e99aa64
[deliverable/linux.git] / arch / powerpc / net / bpf_jit_comp.c
1 /* bpf_jit_comp.c: BPF JIT compiler for PPC64
2 *
3 * Copyright 2011 Matt Evans <matt@ozlabs.org>, IBM Corporation
4 *
5 * Based on the x86 BPF compiler, by Eric Dumazet (eric.dumazet@gmail.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
10 * of the License.
11 */
12 #include <linux/moduleloader.h>
13 #include <asm/cacheflush.h>
14 #include <linux/netdevice.h>
15 #include <linux/filter.h>
16 #include <linux/if_vlan.h>
17
18 #include "bpf_jit.h"
19
20 int bpf_jit_enable __read_mostly;
21
22 static inline void bpf_flush_icache(void *start, void *end)
23 {
24 smp_wmb();
25 flush_icache_range((unsigned long)start, (unsigned long)end);
26 }
27
28 static void bpf_jit_build_prologue(struct sk_filter *fp, u32 *image,
29 struct codegen_context *ctx)
30 {
31 int i;
32 const struct sock_filter *filter = fp->insns;
33
34 if (ctx->seen & (SEEN_MEM | SEEN_DATAREF)) {
35 /* Make stackframe */
36 if (ctx->seen & SEEN_DATAREF) {
37 /* If we call any helpers (for loads), save LR */
38 EMIT(PPC_INST_MFLR | __PPC_RT(R0));
39 PPC_STD(0, 1, 16);
40
41 /* Back up non-volatile regs. */
42 PPC_STD(r_D, 1, -(8*(32-r_D)));
43 PPC_STD(r_HL, 1, -(8*(32-r_HL)));
44 }
45 if (ctx->seen & SEEN_MEM) {
46 /*
47 * Conditionally save regs r15-r31 as some will be used
48 * for M[] data.
49 */
50 for (i = r_M; i < (r_M+16); i++) {
51 if (ctx->seen & (1 << (i-r_M)))
52 PPC_STD(i, 1, -(8*(32-i)));
53 }
54 }
55 EMIT(PPC_INST_STDU | __PPC_RS(R1) | __PPC_RA(R1) |
56 (-BPF_PPC_STACKFRAME & 0xfffc));
57 }
58
59 if (ctx->seen & SEEN_DATAREF) {
60 /*
61 * If this filter needs to access skb data,
62 * prepare r_D and r_HL:
63 * r_HL = skb->len - skb->data_len
64 * r_D = skb->data
65 */
66 PPC_LWZ_OFFS(r_scratch1, r_skb, offsetof(struct sk_buff,
67 data_len));
68 PPC_LWZ_OFFS(r_HL, r_skb, offsetof(struct sk_buff, len));
69 PPC_SUB(r_HL, r_HL, r_scratch1);
70 PPC_LD_OFFS(r_D, r_skb, offsetof(struct sk_buff, data));
71 }
72
73 if (ctx->seen & SEEN_XREG) {
74 /*
75 * TODO: Could also detect whether first instr. sets X and
76 * avoid this (as below, with A).
77 */
78 PPC_LI(r_X, 0);
79 }
80
81 switch (filter[0].code) {
82 case BPF_S_RET_K:
83 case BPF_S_LD_W_LEN:
84 case BPF_S_ANC_PROTOCOL:
85 case BPF_S_ANC_IFINDEX:
86 case BPF_S_ANC_MARK:
87 case BPF_S_ANC_RXHASH:
88 case BPF_S_ANC_VLAN_TAG:
89 case BPF_S_ANC_VLAN_TAG_PRESENT:
90 case BPF_S_ANC_CPU:
91 case BPF_S_ANC_QUEUE:
92 case BPF_S_LD_W_ABS:
93 case BPF_S_LD_H_ABS:
94 case BPF_S_LD_B_ABS:
95 /* first instruction sets A register (or is RET 'constant') */
96 break;
97 default:
98 /* make sure we dont leak kernel information to user */
99 PPC_LI(r_A, 0);
100 }
101 }
102
103 static void bpf_jit_build_epilogue(u32 *image, struct codegen_context *ctx)
104 {
105 int i;
106
107 if (ctx->seen & (SEEN_MEM | SEEN_DATAREF)) {
108 PPC_ADDI(1, 1, BPF_PPC_STACKFRAME);
109 if (ctx->seen & SEEN_DATAREF) {
110 PPC_LD(0, 1, 16);
111 PPC_MTLR(0);
112 PPC_LD(r_D, 1, -(8*(32-r_D)));
113 PPC_LD(r_HL, 1, -(8*(32-r_HL)));
114 }
115 if (ctx->seen & SEEN_MEM) {
116 /* Restore any saved non-vol registers */
117 for (i = r_M; i < (r_M+16); i++) {
118 if (ctx->seen & (1 << (i-r_M)))
119 PPC_LD(i, 1, -(8*(32-i)));
120 }
121 }
122 }
123 /* The RETs have left a return value in R3. */
124
125 PPC_BLR();
126 }
127
128 #define CHOOSE_LOAD_FUNC(K, func) \
129 ((int)K < 0 ? ((int)K >= SKF_LL_OFF ? func##_negative_offset : func) : func##_positive_offset)
130
131 /* Assemble the body code between the prologue & epilogue. */
132 static int bpf_jit_build_body(struct sk_filter *fp, u32 *image,
133 struct codegen_context *ctx,
134 unsigned int *addrs)
135 {
136 const struct sock_filter *filter = fp->insns;
137 int flen = fp->len;
138 u8 *func;
139 unsigned int true_cond;
140 int i;
141
142 /* Start of epilogue code */
143 unsigned int exit_addr = addrs[flen];
144
145 for (i = 0; i < flen; i++) {
146 unsigned int K = filter[i].k;
147
148 /*
149 * addrs[] maps a BPF bytecode address into a real offset from
150 * the start of the body code.
151 */
152 addrs[i] = ctx->idx * 4;
153
154 switch (filter[i].code) {
155 /*** ALU ops ***/
156 case BPF_S_ALU_ADD_X: /* A += X; */
157 ctx->seen |= SEEN_XREG;
158 PPC_ADD(r_A, r_A, r_X);
159 break;
160 case BPF_S_ALU_ADD_K: /* A += K; */
161 if (!K)
162 break;
163 PPC_ADDI(r_A, r_A, IMM_L(K));
164 if (K >= 32768)
165 PPC_ADDIS(r_A, r_A, IMM_HA(K));
166 break;
167 case BPF_S_ALU_SUB_X: /* A -= X; */
168 ctx->seen |= SEEN_XREG;
169 PPC_SUB(r_A, r_A, r_X);
170 break;
171 case BPF_S_ALU_SUB_K: /* A -= K */
172 if (!K)
173 break;
174 PPC_ADDI(r_A, r_A, IMM_L(-K));
175 if (K >= 32768)
176 PPC_ADDIS(r_A, r_A, IMM_HA(-K));
177 break;
178 case BPF_S_ALU_MUL_X: /* A *= X; */
179 ctx->seen |= SEEN_XREG;
180 PPC_MUL(r_A, r_A, r_X);
181 break;
182 case BPF_S_ALU_MUL_K: /* A *= K */
183 if (K < 32768)
184 PPC_MULI(r_A, r_A, K);
185 else {
186 PPC_LI32(r_scratch1, K);
187 PPC_MUL(r_A, r_A, r_scratch1);
188 }
189 break;
190 case BPF_S_ALU_DIV_X: /* A /= X; */
191 ctx->seen |= SEEN_XREG;
192 PPC_CMPWI(r_X, 0);
193 if (ctx->pc_ret0 != -1) {
194 PPC_BCC(COND_EQ, addrs[ctx->pc_ret0]);
195 } else {
196 /*
197 * Exit, returning 0; first pass hits here
198 * (longer worst-case code size).
199 */
200 PPC_BCC_SHORT(COND_NE, (ctx->idx*4)+12);
201 PPC_LI(r_ret, 0);
202 PPC_JMP(exit_addr);
203 }
204 PPC_DIVWU(r_A, r_A, r_X);
205 break;
206 case BPF_S_ALU_DIV_K: /* A = reciprocal_divide(A, K); */
207 PPC_LI32(r_scratch1, K);
208 /* Top 32 bits of 64bit result -> A */
209 PPC_MULHWU(r_A, r_A, r_scratch1);
210 break;
211 case BPF_S_ALU_AND_X:
212 ctx->seen |= SEEN_XREG;
213 PPC_AND(r_A, r_A, r_X);
214 break;
215 case BPF_S_ALU_AND_K:
216 if (!IMM_H(K))
217 PPC_ANDI(r_A, r_A, K);
218 else {
219 PPC_LI32(r_scratch1, K);
220 PPC_AND(r_A, r_A, r_scratch1);
221 }
222 break;
223 case BPF_S_ALU_OR_X:
224 ctx->seen |= SEEN_XREG;
225 PPC_OR(r_A, r_A, r_X);
226 break;
227 case BPF_S_ALU_OR_K:
228 if (IMM_L(K))
229 PPC_ORI(r_A, r_A, IMM_L(K));
230 if (K >= 65536)
231 PPC_ORIS(r_A, r_A, IMM_H(K));
232 break;
233 case BPF_S_ANC_ALU_XOR_X:
234 case BPF_S_ALU_XOR_X: /* A ^= X */
235 ctx->seen |= SEEN_XREG;
236 PPC_XOR(r_A, r_A, r_X);
237 break;
238 case BPF_S_ALU_XOR_K: /* A ^= K */
239 if (IMM_L(K))
240 PPC_XORI(r_A, r_A, IMM_L(K));
241 if (K >= 65536)
242 PPC_XORIS(r_A, r_A, IMM_H(K));
243 break;
244 case BPF_S_ALU_LSH_X: /* A <<= X; */
245 ctx->seen |= SEEN_XREG;
246 PPC_SLW(r_A, r_A, r_X);
247 break;
248 case BPF_S_ALU_LSH_K:
249 if (K == 0)
250 break;
251 else
252 PPC_SLWI(r_A, r_A, K);
253 break;
254 case BPF_S_ALU_RSH_X: /* A >>= X; */
255 ctx->seen |= SEEN_XREG;
256 PPC_SRW(r_A, r_A, r_X);
257 break;
258 case BPF_S_ALU_RSH_K: /* A >>= K; */
259 if (K == 0)
260 break;
261 else
262 PPC_SRWI(r_A, r_A, K);
263 break;
264 case BPF_S_ALU_NEG:
265 PPC_NEG(r_A, r_A);
266 break;
267 case BPF_S_RET_K:
268 PPC_LI32(r_ret, K);
269 if (!K) {
270 if (ctx->pc_ret0 == -1)
271 ctx->pc_ret0 = i;
272 }
273 /*
274 * If this isn't the very last instruction, branch to
275 * the epilogue if we've stuff to clean up. Otherwise,
276 * if there's nothing to tidy, just return. If we /are/
277 * the last instruction, we're about to fall through to
278 * the epilogue to return.
279 */
280 if (i != flen - 1) {
281 /*
282 * Note: 'seen' is properly valid only on pass
283 * #2. Both parts of this conditional are the
284 * same instruction size though, meaning the
285 * first pass will still correctly determine the
286 * code size/addresses.
287 */
288 if (ctx->seen)
289 PPC_JMP(exit_addr);
290 else
291 PPC_BLR();
292 }
293 break;
294 case BPF_S_RET_A:
295 PPC_MR(r_ret, r_A);
296 if (i != flen - 1) {
297 if (ctx->seen)
298 PPC_JMP(exit_addr);
299 else
300 PPC_BLR();
301 }
302 break;
303 case BPF_S_MISC_TAX: /* X = A */
304 PPC_MR(r_X, r_A);
305 break;
306 case BPF_S_MISC_TXA: /* A = X */
307 ctx->seen |= SEEN_XREG;
308 PPC_MR(r_A, r_X);
309 break;
310
311 /*** Constant loads/M[] access ***/
312 case BPF_S_LD_IMM: /* A = K */
313 PPC_LI32(r_A, K);
314 break;
315 case BPF_S_LDX_IMM: /* X = K */
316 PPC_LI32(r_X, K);
317 break;
318 case BPF_S_LD_MEM: /* A = mem[K] */
319 PPC_MR(r_A, r_M + (K & 0xf));
320 ctx->seen |= SEEN_MEM | (1<<(K & 0xf));
321 break;
322 case BPF_S_LDX_MEM: /* X = mem[K] */
323 PPC_MR(r_X, r_M + (K & 0xf));
324 ctx->seen |= SEEN_MEM | (1<<(K & 0xf));
325 break;
326 case BPF_S_ST: /* mem[K] = A */
327 PPC_MR(r_M + (K & 0xf), r_A);
328 ctx->seen |= SEEN_MEM | (1<<(K & 0xf));
329 break;
330 case BPF_S_STX: /* mem[K] = X */
331 PPC_MR(r_M + (K & 0xf), r_X);
332 ctx->seen |= SEEN_XREG | SEEN_MEM | (1<<(K & 0xf));
333 break;
334 case BPF_S_LD_W_LEN: /* A = skb->len; */
335 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, len) != 4);
336 PPC_LWZ_OFFS(r_A, r_skb, offsetof(struct sk_buff, len));
337 break;
338 case BPF_S_LDX_W_LEN: /* X = skb->len; */
339 PPC_LWZ_OFFS(r_X, r_skb, offsetof(struct sk_buff, len));
340 break;
341
342 /*** Ancillary info loads ***/
343 case BPF_S_ANC_PROTOCOL: /* A = ntohs(skb->protocol); */
344 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff,
345 protocol) != 2);
346 PPC_NTOHS_OFFS(r_A, r_skb, offsetof(struct sk_buff,
347 protocol));
348 break;
349 case BPF_S_ANC_IFINDEX:
350 PPC_LD_OFFS(r_scratch1, r_skb, offsetof(struct sk_buff,
351 dev));
352 PPC_CMPDI(r_scratch1, 0);
353 if (ctx->pc_ret0 != -1) {
354 PPC_BCC(COND_EQ, addrs[ctx->pc_ret0]);
355 } else {
356 /* Exit, returning 0; first pass hits here. */
357 PPC_BCC_SHORT(COND_NE, (ctx->idx*4)+12);
358 PPC_LI(r_ret, 0);
359 PPC_JMP(exit_addr);
360 }
361 BUILD_BUG_ON(FIELD_SIZEOF(struct net_device,
362 ifindex) != 4);
363 PPC_LWZ_OFFS(r_A, r_scratch1,
364 offsetof(struct net_device, ifindex));
365 break;
366 case BPF_S_ANC_MARK:
367 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, mark) != 4);
368 PPC_LWZ_OFFS(r_A, r_skb, offsetof(struct sk_buff,
369 mark));
370 break;
371 case BPF_S_ANC_RXHASH:
372 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, rxhash) != 4);
373 PPC_LWZ_OFFS(r_A, r_skb, offsetof(struct sk_buff,
374 rxhash));
375 break;
376 case BPF_S_ANC_VLAN_TAG:
377 case BPF_S_ANC_VLAN_TAG_PRESENT:
378 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, vlan_tci) != 2);
379 PPC_LHZ_OFFS(r_A, r_skb, offsetof(struct sk_buff,
380 vlan_tci));
381 if (filter[i].code == BPF_S_ANC_VLAN_TAG)
382 PPC_ANDI(r_A, r_A, VLAN_VID_MASK);
383 else
384 PPC_ANDI(r_A, r_A, VLAN_TAG_PRESENT);
385 break;
386 case BPF_S_ANC_QUEUE:
387 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff,
388 queue_mapping) != 2);
389 PPC_LHZ_OFFS(r_A, r_skb, offsetof(struct sk_buff,
390 queue_mapping));
391 break;
392 case BPF_S_ANC_CPU:
393 #ifdef CONFIG_SMP
394 /*
395 * PACA ptr is r13:
396 * raw_smp_processor_id() = local_paca->paca_index
397 */
398 BUILD_BUG_ON(FIELD_SIZEOF(struct paca_struct,
399 paca_index) != 2);
400 PPC_LHZ_OFFS(r_A, 13,
401 offsetof(struct paca_struct, paca_index));
402 #else
403 PPC_LI(r_A, 0);
404 #endif
405 break;
406
407 /*** Absolute loads from packet header/data ***/
408 case BPF_S_LD_W_ABS:
409 func = CHOOSE_LOAD_FUNC(K, sk_load_word);
410 goto common_load;
411 case BPF_S_LD_H_ABS:
412 func = CHOOSE_LOAD_FUNC(K, sk_load_half);
413 goto common_load;
414 case BPF_S_LD_B_ABS:
415 func = CHOOSE_LOAD_FUNC(K, sk_load_byte);
416 common_load:
417 /* Load from [K]. */
418 ctx->seen |= SEEN_DATAREF;
419 PPC_LI64(r_scratch1, func);
420 PPC_MTLR(r_scratch1);
421 PPC_LI32(r_addr, K);
422 PPC_BLRL();
423 /*
424 * Helper returns 'lt' condition on error, and an
425 * appropriate return value in r3
426 */
427 PPC_BCC(COND_LT, exit_addr);
428 break;
429
430 /*** Indirect loads from packet header/data ***/
431 case BPF_S_LD_W_IND:
432 func = sk_load_word;
433 goto common_load_ind;
434 case BPF_S_LD_H_IND:
435 func = sk_load_half;
436 goto common_load_ind;
437 case BPF_S_LD_B_IND:
438 func = sk_load_byte;
439 common_load_ind:
440 /*
441 * Load from [X + K]. Negative offsets are tested for
442 * in the helper functions.
443 */
444 ctx->seen |= SEEN_DATAREF | SEEN_XREG;
445 PPC_LI64(r_scratch1, func);
446 PPC_MTLR(r_scratch1);
447 PPC_ADDI(r_addr, r_X, IMM_L(K));
448 if (K >= 32768)
449 PPC_ADDIS(r_addr, r_addr, IMM_HA(K));
450 PPC_BLRL();
451 /* If error, cr0.LT set */
452 PPC_BCC(COND_LT, exit_addr);
453 break;
454
455 case BPF_S_LDX_B_MSH:
456 func = CHOOSE_LOAD_FUNC(K, sk_load_byte_msh);
457 goto common_load;
458 break;
459
460 /*** Jump and branches ***/
461 case BPF_S_JMP_JA:
462 if (K != 0)
463 PPC_JMP(addrs[i + 1 + K]);
464 break;
465
466 case BPF_S_JMP_JGT_K:
467 case BPF_S_JMP_JGT_X:
468 true_cond = COND_GT;
469 goto cond_branch;
470 case BPF_S_JMP_JGE_K:
471 case BPF_S_JMP_JGE_X:
472 true_cond = COND_GE;
473 goto cond_branch;
474 case BPF_S_JMP_JEQ_K:
475 case BPF_S_JMP_JEQ_X:
476 true_cond = COND_EQ;
477 goto cond_branch;
478 case BPF_S_JMP_JSET_K:
479 case BPF_S_JMP_JSET_X:
480 true_cond = COND_NE;
481 /* Fall through */
482 cond_branch:
483 /* same targets, can avoid doing the test :) */
484 if (filter[i].jt == filter[i].jf) {
485 if (filter[i].jt > 0)
486 PPC_JMP(addrs[i + 1 + filter[i].jt]);
487 break;
488 }
489
490 switch (filter[i].code) {
491 case BPF_S_JMP_JGT_X:
492 case BPF_S_JMP_JGE_X:
493 case BPF_S_JMP_JEQ_X:
494 ctx->seen |= SEEN_XREG;
495 PPC_CMPLW(r_A, r_X);
496 break;
497 case BPF_S_JMP_JSET_X:
498 ctx->seen |= SEEN_XREG;
499 PPC_AND_DOT(r_scratch1, r_A, r_X);
500 break;
501 case BPF_S_JMP_JEQ_K:
502 case BPF_S_JMP_JGT_K:
503 case BPF_S_JMP_JGE_K:
504 if (K < 32768)
505 PPC_CMPLWI(r_A, K);
506 else {
507 PPC_LI32(r_scratch1, K);
508 PPC_CMPLW(r_A, r_scratch1);
509 }
510 break;
511 case BPF_S_JMP_JSET_K:
512 if (K < 32768)
513 /* PPC_ANDI is /only/ dot-form */
514 PPC_ANDI(r_scratch1, r_A, K);
515 else {
516 PPC_LI32(r_scratch1, K);
517 PPC_AND_DOT(r_scratch1, r_A,
518 r_scratch1);
519 }
520 break;
521 }
522 /* Sometimes branches are constructed "backward", with
523 * the false path being the branch and true path being
524 * a fallthrough to the next instruction.
525 */
526 if (filter[i].jt == 0)
527 /* Swap the sense of the branch */
528 PPC_BCC(true_cond ^ COND_CMP_TRUE,
529 addrs[i + 1 + filter[i].jf]);
530 else {
531 PPC_BCC(true_cond, addrs[i + 1 + filter[i].jt]);
532 if (filter[i].jf != 0)
533 PPC_JMP(addrs[i + 1 + filter[i].jf]);
534 }
535 break;
536 default:
537 /* The filter contains something cruel & unusual.
538 * We don't handle it, but also there shouldn't be
539 * anything missing from our list.
540 */
541 if (printk_ratelimit())
542 pr_err("BPF filter opcode %04x (@%d) unsupported\n",
543 filter[i].code, i);
544 return -ENOTSUPP;
545 }
546
547 }
548 /* Set end-of-body-code address for exit. */
549 addrs[i] = ctx->idx * 4;
550
551 return 0;
552 }
553
554 void bpf_jit_compile(struct sk_filter *fp)
555 {
556 unsigned int proglen;
557 unsigned int alloclen;
558 u32 *image = NULL;
559 u32 *code_base;
560 unsigned int *addrs;
561 struct codegen_context cgctx;
562 int pass;
563 int flen = fp->len;
564
565 if (!bpf_jit_enable)
566 return;
567
568 addrs = kzalloc((flen+1) * sizeof(*addrs), GFP_KERNEL);
569 if (addrs == NULL)
570 return;
571
572 /*
573 * There are multiple assembly passes as the generated code will change
574 * size as it settles down, figuring out the max branch offsets/exit
575 * paths required.
576 *
577 * The range of standard conditional branches is +/- 32Kbytes. Since
578 * BPF_MAXINSNS = 4096, we can only jump from (worst case) start to
579 * finish with 8 bytes/instruction. Not feasible, so long jumps are
580 * used, distinct from short branches.
581 *
582 * Current:
583 *
584 * For now, both branch types assemble to 2 words (short branches padded
585 * with a NOP); this is less efficient, but assembly will always complete
586 * after exactly 3 passes:
587 *
588 * First pass: No code buffer; Program is "faux-generated" -- no code
589 * emitted but maximum size of output determined (and addrs[] filled
590 * in). Also, we note whether we use M[], whether we use skb data, etc.
591 * All generation choices assumed to be 'worst-case', e.g. branches all
592 * far (2 instructions), return path code reduction not available, etc.
593 *
594 * Second pass: Code buffer allocated with size determined previously.
595 * Prologue generated to support features we have seen used. Exit paths
596 * determined and addrs[] is filled in again, as code may be slightly
597 * smaller as a result.
598 *
599 * Third pass: Code generated 'for real', and branch destinations
600 * determined from now-accurate addrs[] map.
601 *
602 * Ideal:
603 *
604 * If we optimise this, near branches will be shorter. On the
605 * first assembly pass, we should err on the side of caution and
606 * generate the biggest code. On subsequent passes, branches will be
607 * generated short or long and code size will reduce. With smaller
608 * code, more branches may fall into the short category, and code will
609 * reduce more.
610 *
611 * Finally, if we see one pass generate code the same size as the
612 * previous pass we have converged and should now generate code for
613 * real. Allocating at the end will also save the memory that would
614 * otherwise be wasted by the (small) current code shrinkage.
615 * Preferably, we should do a small number of passes (e.g. 5) and if we
616 * haven't converged by then, get impatient and force code to generate
617 * as-is, even if the odd branch would be left long. The chances of a
618 * long jump are tiny with all but the most enormous of BPF filter
619 * inputs, so we should usually converge on the third pass.
620 */
621
622 cgctx.idx = 0;
623 cgctx.seen = 0;
624 cgctx.pc_ret0 = -1;
625 /* Scouting faux-generate pass 0 */
626 if (bpf_jit_build_body(fp, 0, &cgctx, addrs))
627 /* We hit something illegal or unsupported. */
628 goto out;
629
630 /*
631 * Pretend to build prologue, given the features we've seen. This will
632 * update ctgtx.idx as it pretends to output instructions, then we can
633 * calculate total size from idx.
634 */
635 bpf_jit_build_prologue(fp, 0, &cgctx);
636 bpf_jit_build_epilogue(0, &cgctx);
637
638 proglen = cgctx.idx * 4;
639 alloclen = proglen + FUNCTION_DESCR_SIZE;
640 image = module_alloc(alloclen);
641 if (!image)
642 goto out;
643
644 code_base = image + (FUNCTION_DESCR_SIZE/4);
645
646 /* Code generation passes 1-2 */
647 for (pass = 1; pass < 3; pass++) {
648 /* Now build the prologue, body code & epilogue for real. */
649 cgctx.idx = 0;
650 bpf_jit_build_prologue(fp, code_base, &cgctx);
651 bpf_jit_build_body(fp, code_base, &cgctx, addrs);
652 bpf_jit_build_epilogue(code_base, &cgctx);
653
654 if (bpf_jit_enable > 1)
655 pr_info("Pass %d: shrink = %d, seen = 0x%x\n", pass,
656 proglen - (cgctx.idx * 4), cgctx.seen);
657 }
658
659 if (bpf_jit_enable > 1)
660 /* Note that we output the base address of the code_base
661 * rather than image, since opcodes are in code_base.
662 */
663 bpf_jit_dump(flen, proglen, pass, code_base);
664
665 if (image) {
666 bpf_flush_icache(code_base, code_base + (proglen/4));
667 /* Function descriptor nastiness: Address + TOC */
668 ((u64 *)image)[0] = (u64)code_base;
669 ((u64 *)image)[1] = local_paca->kernel_toc;
670 fp->bpf_func = (void *)image;
671 }
672 out:
673 kfree(addrs);
674 return;
675 }
676
677 void bpf_jit_free(struct sk_filter *fp)
678 {
679 if (fp->bpf_func != sk_run_filter)
680 module_free(NULL, fp->bpf_func);
681 }
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