arch/sparc/kernel/vmlinux.lds.S

   1 /* ld script for sparc32/sparc64 kernel */
   2
   3 #include <asm-generic/vmlinux.lds.h>
   4
   5 #include <asm/page.h>
   6 #include <asm/thread_info.h>
   7
   8 #ifdef CONFIG_SPARC32
   9 #define INITIAL_ADDRESS  0x10000 + SIZEOF_HEADERS
  10 #define TEXTSTART       0xf0004000
  11
  12 #define SMP_CACHE_BYTES_SHIFT 5
  13
  14 #else
  15 #define SMP_CACHE_BYTES_SHIFT 6
  16 #define INITIAL_ADDRESS 0x4000
  17 #define TEXTSTART      0x0000000000404000
  18
  19 #endif
  20
  21 #define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_SHIFT)
  22
  23 #ifdef CONFIG_SPARC32
  24 OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc")
  25 OUTPUT_ARCH(sparc)
  26 ENTRY(_start)
  27 jiffies = jiffies_64 + 4;
  28 #else
  29 /* sparc64 */
  30 OUTPUT_FORMAT("elf64-sparc", "elf64-sparc", "elf64-sparc")
  31 OUTPUT_ARCH(sparc:v9a)
  32 ENTRY(_start)
  33 jiffies = jiffies_64;
  34 #endif
  35
  36 SECTIONS
  37 {
  38 #ifdef CONFIG_SPARC64
  39         swapper_pg_dir = 0x0000000000402000;
  40 #endif
  41         . = INITIAL_ADDRESS;
  42         .text TEXTSTART :
  43         {
  44                 _text = .;
  45                 HEAD_TEXT
  46                 TEXT_TEXT
  47                 SCHED_TEXT
  48                 LOCK_TEXT
  49                 KPROBES_TEXT
  50                 IRQENTRY_TEXT
  51                 SOFTIRQENTRY_TEXT
  52                 *(.gnu.warning)
  53         } = 0
  54         _etext = .;
  55
  56         RO_DATA(PAGE_SIZE)
  57
  58         /* Start of data section */
  59         _sdata = .;
  60
  61         .data1 : {
  62                 *(.data1)
  63         }
  64         RW_DATA_SECTION(SMP_CACHE_BYTES, 0, THREAD_SIZE)
  65
  66         /* End of data section */
  67         _edata = .;
  68
  69         .fixup : {
  70                 __start___fixup = .;
  71                 *(.fixup)
  72                 __stop___fixup = .;
  73         }
  74         EXCEPTION_TABLE(16)
  75         NOTES
  76
  77         . = ALIGN(PAGE_SIZE);
  78         __init_begin = ALIGN(PAGE_SIZE);
  79         INIT_TEXT_SECTION(PAGE_SIZE)
  80         __init_text_end = .;
  81         INIT_DATA_SECTION(16)
  82
  83         . = ALIGN(4);
  84         .tsb_ldquad_phys_patch : {
  85                 __tsb_ldquad_phys_patch = .;
  86                 *(.tsb_ldquad_phys_patch)
  87                 __tsb_ldquad_phys_patch_end = .;
  88         }
  89
  90         .tsb_phys_patch : {
  91                 __tsb_phys_patch = .;
  92                 *(.tsb_phys_patch)
  93                 __tsb_phys_patch_end = .;
  94         }
  95
  96         .cpuid_patch : {
  97                 __cpuid_patch = .;
  98                 *(.cpuid_patch)
  99                 __cpuid_patch_end = .;
 100         }
 101
 102         .sun4v_1insn_patch : {
 103                 __sun4v_1insn_patch = .;
 104                 *(.sun4v_1insn_patch)
 105                 __sun4v_1insn_patch_end = .;
 106         }
 107         .sun4v_2insn_patch : {
 108                 __sun4v_2insn_patch = .;
 109                 *(.sun4v_2insn_patch)
 110                 __sun4v_2insn_patch_end = .;
 111         }
 112         .leon_1insn_patch : {
 113                 __leon_1insn_patch = .;
 114                 *(.leon_1insn_patch)
 115                 __leon_1insn_patch_end = .;
 116         }
 117         .swapper_tsb_phys_patch : {
 118                 __swapper_tsb_phys_patch = .;
 119                 *(.swapper_tsb_phys_patch)
 120                 __swapper_tsb_phys_patch_end = .;
 121         }
 122         .swapper_4m_tsb_phys_patch : {
 123                 __swapper_4m_tsb_phys_patch = .;
 124                 *(.swapper_4m_tsb_phys_patch)
 125                 __swapper_4m_tsb_phys_patch_end = .;
 126         }
 127         .popc_3insn_patch : {
 128                 __popc_3insn_patch = .;
 129                 *(.popc_3insn_patch)
 130                 __popc_3insn_patch_end = .;
 131         }
 132         .popc_6insn_patch : {
 133                 __popc_6insn_patch = .;
 134                 *(.popc_6insn_patch)
 135                 __popc_6insn_patch_end = .;
 136         }
 137         .pause_3insn_patch : {
 138                 __pause_3insn_patch = .;
 139                 *(.pause_3insn_patch)
 140                 __pause_3insn_patch_end = .;
 141         }
 142         .sun_m7_2insn_patch : {
 143                 __sun_m7_2insn_patch = .;
 144                 *(.sun_m7_2insn_patch)
 145                 __sun_m7_2insn_patch_end = .;
 146         }
 147         PERCPU_SECTION(SMP_CACHE_BYTES)
 148
 149         . = ALIGN(PAGE_SIZE);
 150         __init_end = .;
 151         BSS_SECTION(0, 0, 0)
 152         _end = . ;
 153
 154         STABS_DEBUG
 155         DWARF_DEBUG
 156
 157         DISCARDS
 158 }