x86/mm/pat: Ensure cpa->pfn only contains page frame numbers
[deliverable/linux.git] / arch / x86 / mm / pageattr.c
1 /*
2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
4 */
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/sched.h>
8 #include <linux/mm.h>
9 #include <linux/interrupt.h>
10 #include <linux/seq_file.h>
11 #include <linux/debugfs.h>
12 #include <linux/pfn.h>
13 #include <linux/percpu.h>
14 #include <linux/gfp.h>
15 #include <linux/pci.h>
16 #include <linux/vmalloc.h>
17
18 #include <asm/e820.h>
19 #include <asm/processor.h>
20 #include <asm/tlbflush.h>
21 #include <asm/sections.h>
22 #include <asm/setup.h>
23 #include <asm/uaccess.h>
24 #include <asm/pgalloc.h>
25 #include <asm/proto.h>
26 #include <asm/pat.h>
27
28 /*
29 * The current flushing context - we pass it instead of 5 arguments:
30 */
31 struct cpa_data {
32 unsigned long *vaddr;
33 pgd_t *pgd;
34 pgprot_t mask_set;
35 pgprot_t mask_clr;
36 int numpages;
37 int flags;
38 unsigned long pfn;
39 unsigned force_split : 1;
40 int curpage;
41 struct page **pages;
42 };
43
44 /*
45 * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
46 * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
47 * entries change the page attribute in parallel to some other cpu
48 * splitting a large page entry along with changing the attribute.
49 */
50 static DEFINE_SPINLOCK(cpa_lock);
51
52 #define CPA_FLUSHTLB 1
53 #define CPA_ARRAY 2
54 #define CPA_PAGES_ARRAY 4
55
56 #ifdef CONFIG_PROC_FS
57 static unsigned long direct_pages_count[PG_LEVEL_NUM];
58
59 void update_page_count(int level, unsigned long pages)
60 {
61 /* Protect against CPA */
62 spin_lock(&pgd_lock);
63 direct_pages_count[level] += pages;
64 spin_unlock(&pgd_lock);
65 }
66
67 static void split_page_count(int level)
68 {
69 direct_pages_count[level]--;
70 direct_pages_count[level - 1] += PTRS_PER_PTE;
71 }
72
73 void arch_report_meminfo(struct seq_file *m)
74 {
75 seq_printf(m, "DirectMap4k: %8lu kB\n",
76 direct_pages_count[PG_LEVEL_4K] << 2);
77 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
78 seq_printf(m, "DirectMap2M: %8lu kB\n",
79 direct_pages_count[PG_LEVEL_2M] << 11);
80 #else
81 seq_printf(m, "DirectMap4M: %8lu kB\n",
82 direct_pages_count[PG_LEVEL_2M] << 12);
83 #endif
84 if (direct_gbpages)
85 seq_printf(m, "DirectMap1G: %8lu kB\n",
86 direct_pages_count[PG_LEVEL_1G] << 20);
87 }
88 #else
89 static inline void split_page_count(int level) { }
90 #endif
91
92 #ifdef CONFIG_X86_64
93
94 static inline unsigned long highmap_start_pfn(void)
95 {
96 return __pa_symbol(_text) >> PAGE_SHIFT;
97 }
98
99 static inline unsigned long highmap_end_pfn(void)
100 {
101 return __pa_symbol(roundup(_brk_end, PMD_SIZE)) >> PAGE_SHIFT;
102 }
103
104 #endif
105
106 #ifdef CONFIG_DEBUG_PAGEALLOC
107 # define debug_pagealloc 1
108 #else
109 # define debug_pagealloc 0
110 #endif
111
112 static inline int
113 within(unsigned long addr, unsigned long start, unsigned long end)
114 {
115 return addr >= start && addr < end;
116 }
117
118 /*
119 * Flushing functions
120 */
121
122 /**
123 * clflush_cache_range - flush a cache range with clflush
124 * @vaddr: virtual start address
125 * @size: number of bytes to flush
126 *
127 * clflushopt is an unordered instruction which needs fencing with mfence or
128 * sfence to avoid ordering issues.
129 */
130 void clflush_cache_range(void *vaddr, unsigned int size)
131 {
132 unsigned long clflush_mask = boot_cpu_data.x86_clflush_size - 1;
133 void *vend = vaddr + size;
134 void *p;
135
136 mb();
137
138 for (p = (void *)((unsigned long)vaddr & ~clflush_mask);
139 p < vend; p += boot_cpu_data.x86_clflush_size)
140 clflushopt(p);
141
142 mb();
143 }
144 EXPORT_SYMBOL_GPL(clflush_cache_range);
145
146 static void __cpa_flush_all(void *arg)
147 {
148 unsigned long cache = (unsigned long)arg;
149
150 /*
151 * Flush all to work around Errata in early athlons regarding
152 * large page flushing.
153 */
154 __flush_tlb_all();
155
156 if (cache && boot_cpu_data.x86 >= 4)
157 wbinvd();
158 }
159
160 static void cpa_flush_all(unsigned long cache)
161 {
162 BUG_ON(irqs_disabled());
163
164 on_each_cpu(__cpa_flush_all, (void *) cache, 1);
165 }
166
167 static void __cpa_flush_range(void *arg)
168 {
169 /*
170 * We could optimize that further and do individual per page
171 * tlb invalidates for a low number of pages. Caveat: we must
172 * flush the high aliases on 64bit as well.
173 */
174 __flush_tlb_all();
175 }
176
177 static void cpa_flush_range(unsigned long start, int numpages, int cache)
178 {
179 unsigned int i, level;
180 unsigned long addr;
181
182 BUG_ON(irqs_disabled());
183 WARN_ON(PAGE_ALIGN(start) != start);
184
185 on_each_cpu(__cpa_flush_range, NULL, 1);
186
187 if (!cache)
188 return;
189
190 /*
191 * We only need to flush on one CPU,
192 * clflush is a MESI-coherent instruction that
193 * will cause all other CPUs to flush the same
194 * cachelines:
195 */
196 for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
197 pte_t *pte = lookup_address(addr, &level);
198
199 /*
200 * Only flush present addresses:
201 */
202 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
203 clflush_cache_range((void *) addr, PAGE_SIZE);
204 }
205 }
206
207 static void cpa_flush_array(unsigned long *start, int numpages, int cache,
208 int in_flags, struct page **pages)
209 {
210 unsigned int i, level;
211 unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */
212
213 BUG_ON(irqs_disabled());
214
215 on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1);
216
217 if (!cache || do_wbinvd)
218 return;
219
220 /*
221 * We only need to flush on one CPU,
222 * clflush is a MESI-coherent instruction that
223 * will cause all other CPUs to flush the same
224 * cachelines:
225 */
226 for (i = 0; i < numpages; i++) {
227 unsigned long addr;
228 pte_t *pte;
229
230 if (in_flags & CPA_PAGES_ARRAY)
231 addr = (unsigned long)page_address(pages[i]);
232 else
233 addr = start[i];
234
235 pte = lookup_address(addr, &level);
236
237 /*
238 * Only flush present addresses:
239 */
240 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
241 clflush_cache_range((void *)addr, PAGE_SIZE);
242 }
243 }
244
245 /*
246 * Certain areas of memory on x86 require very specific protection flags,
247 * for example the BIOS area or kernel text. Callers don't always get this
248 * right (again, ioremap() on BIOS memory is not uncommon) so this function
249 * checks and fixes these known static required protection bits.
250 */
251 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
252 unsigned long pfn)
253 {
254 pgprot_t forbidden = __pgprot(0);
255
256 /*
257 * The BIOS area between 640k and 1Mb needs to be executable for
258 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
259 */
260 #ifdef CONFIG_PCI_BIOS
261 if (pcibios_enabled && within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
262 pgprot_val(forbidden) |= _PAGE_NX;
263 #endif
264
265 /*
266 * The kernel text needs to be executable for obvious reasons
267 * Does not cover __inittext since that is gone later on. On
268 * 64bit we do not enforce !NX on the low mapping
269 */
270 if (within(address, (unsigned long)_text, (unsigned long)_etext))
271 pgprot_val(forbidden) |= _PAGE_NX;
272
273 /*
274 * The .rodata section needs to be read-only. Using the pfn
275 * catches all aliases.
276 */
277 if (within(pfn, __pa_symbol(__start_rodata) >> PAGE_SHIFT,
278 __pa_symbol(__end_rodata) >> PAGE_SHIFT))
279 pgprot_val(forbidden) |= _PAGE_RW;
280
281 #if defined(CONFIG_X86_64) && defined(CONFIG_DEBUG_RODATA)
282 /*
283 * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
284 * kernel text mappings for the large page aligned text, rodata sections
285 * will be always read-only. For the kernel identity mappings covering
286 * the holes caused by this alignment can be anything that user asks.
287 *
288 * This will preserve the large page mappings for kernel text/data
289 * at no extra cost.
290 */
291 if (kernel_set_to_readonly &&
292 within(address, (unsigned long)_text,
293 (unsigned long)__end_rodata_hpage_align)) {
294 unsigned int level;
295
296 /*
297 * Don't enforce the !RW mapping for the kernel text mapping,
298 * if the current mapping is already using small page mapping.
299 * No need to work hard to preserve large page mappings in this
300 * case.
301 *
302 * This also fixes the Linux Xen paravirt guest boot failure
303 * (because of unexpected read-only mappings for kernel identity
304 * mappings). In this paravirt guest case, the kernel text
305 * mapping and the kernel identity mapping share the same
306 * page-table pages. Thus we can't really use different
307 * protections for the kernel text and identity mappings. Also,
308 * these shared mappings are made of small page mappings.
309 * Thus this don't enforce !RW mapping for small page kernel
310 * text mapping logic will help Linux Xen parvirt guest boot
311 * as well.
312 */
313 if (lookup_address(address, &level) && (level != PG_LEVEL_4K))
314 pgprot_val(forbidden) |= _PAGE_RW;
315 }
316 #endif
317
318 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
319
320 return prot;
321 }
322
323 /*
324 * Lookup the page table entry for a virtual address in a specific pgd.
325 * Return a pointer to the entry and the level of the mapping.
326 */
327 pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
328 unsigned int *level)
329 {
330 pud_t *pud;
331 pmd_t *pmd;
332
333 *level = PG_LEVEL_NONE;
334
335 if (pgd_none(*pgd))
336 return NULL;
337
338 pud = pud_offset(pgd, address);
339 if (pud_none(*pud))
340 return NULL;
341
342 *level = PG_LEVEL_1G;
343 if (pud_large(*pud) || !pud_present(*pud))
344 return (pte_t *)pud;
345
346 pmd = pmd_offset(pud, address);
347 if (pmd_none(*pmd))
348 return NULL;
349
350 *level = PG_LEVEL_2M;
351 if (pmd_large(*pmd) || !pmd_present(*pmd))
352 return (pte_t *)pmd;
353
354 *level = PG_LEVEL_4K;
355
356 return pte_offset_kernel(pmd, address);
357 }
358
359 /*
360 * Lookup the page table entry for a virtual address. Return a pointer
361 * to the entry and the level of the mapping.
362 *
363 * Note: We return pud and pmd either when the entry is marked large
364 * or when the present bit is not set. Otherwise we would return a
365 * pointer to a nonexisting mapping.
366 */
367 pte_t *lookup_address(unsigned long address, unsigned int *level)
368 {
369 return lookup_address_in_pgd(pgd_offset_k(address), address, level);
370 }
371 EXPORT_SYMBOL_GPL(lookup_address);
372
373 static pte_t *_lookup_address_cpa(struct cpa_data *cpa, unsigned long address,
374 unsigned int *level)
375 {
376 if (cpa->pgd)
377 return lookup_address_in_pgd(cpa->pgd + pgd_index(address),
378 address, level);
379
380 return lookup_address(address, level);
381 }
382
383 /*
384 * Lookup the PMD entry for a virtual address. Return a pointer to the entry
385 * or NULL if not present.
386 */
387 pmd_t *lookup_pmd_address(unsigned long address)
388 {
389 pgd_t *pgd;
390 pud_t *pud;
391
392 pgd = pgd_offset_k(address);
393 if (pgd_none(*pgd))
394 return NULL;
395
396 pud = pud_offset(pgd, address);
397 if (pud_none(*pud) || pud_large(*pud) || !pud_present(*pud))
398 return NULL;
399
400 return pmd_offset(pud, address);
401 }
402
403 /*
404 * This is necessary because __pa() does not work on some
405 * kinds of memory, like vmalloc() or the alloc_remap()
406 * areas on 32-bit NUMA systems. The percpu areas can
407 * end up in this kind of memory, for instance.
408 *
409 * This could be optimized, but it is only intended to be
410 * used at inititalization time, and keeping it
411 * unoptimized should increase the testing coverage for
412 * the more obscure platforms.
413 */
414 phys_addr_t slow_virt_to_phys(void *__virt_addr)
415 {
416 unsigned long virt_addr = (unsigned long)__virt_addr;
417 unsigned long phys_addr, offset;
418 enum pg_level level;
419 pte_t *pte;
420
421 pte = lookup_address(virt_addr, &level);
422 BUG_ON(!pte);
423
424 switch (level) {
425 case PG_LEVEL_1G:
426 phys_addr = pud_pfn(*(pud_t *)pte) << PAGE_SHIFT;
427 offset = virt_addr & ~PUD_PAGE_MASK;
428 break;
429 case PG_LEVEL_2M:
430 phys_addr = pmd_pfn(*(pmd_t *)pte) << PAGE_SHIFT;
431 offset = virt_addr & ~PMD_PAGE_MASK;
432 break;
433 default:
434 phys_addr = pte_pfn(*pte) << PAGE_SHIFT;
435 offset = virt_addr & ~PAGE_MASK;
436 }
437
438 return (phys_addr_t)(phys_addr | offset);
439 }
440 EXPORT_SYMBOL_GPL(slow_virt_to_phys);
441
442 /*
443 * Set the new pmd in all the pgds we know about:
444 */
445 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
446 {
447 /* change init_mm */
448 set_pte_atomic(kpte, pte);
449 #ifdef CONFIG_X86_32
450 if (!SHARED_KERNEL_PMD) {
451 struct page *page;
452
453 list_for_each_entry(page, &pgd_list, lru) {
454 pgd_t *pgd;
455 pud_t *pud;
456 pmd_t *pmd;
457
458 pgd = (pgd_t *)page_address(page) + pgd_index(address);
459 pud = pud_offset(pgd, address);
460 pmd = pmd_offset(pud, address);
461 set_pte_atomic((pte_t *)pmd, pte);
462 }
463 }
464 #endif
465 }
466
467 static int
468 try_preserve_large_page(pte_t *kpte, unsigned long address,
469 struct cpa_data *cpa)
470 {
471 unsigned long nextpage_addr, numpages, pmask, psize, addr, pfn, old_pfn;
472 pte_t new_pte, old_pte, *tmp;
473 pgprot_t old_prot, new_prot, req_prot;
474 int i, do_split = 1;
475 enum pg_level level;
476
477 if (cpa->force_split)
478 return 1;
479
480 spin_lock(&pgd_lock);
481 /*
482 * Check for races, another CPU might have split this page
483 * up already:
484 */
485 tmp = _lookup_address_cpa(cpa, address, &level);
486 if (tmp != kpte)
487 goto out_unlock;
488
489 switch (level) {
490 case PG_LEVEL_2M:
491 old_prot = pmd_pgprot(*(pmd_t *)kpte);
492 old_pfn = pmd_pfn(*(pmd_t *)kpte);
493 break;
494 case PG_LEVEL_1G:
495 old_prot = pud_pgprot(*(pud_t *)kpte);
496 old_pfn = pud_pfn(*(pud_t *)kpte);
497 break;
498 default:
499 do_split = -EINVAL;
500 goto out_unlock;
501 }
502
503 psize = page_level_size(level);
504 pmask = page_level_mask(level);
505
506 /*
507 * Calculate the number of pages, which fit into this large
508 * page starting at address:
509 */
510 nextpage_addr = (address + psize) & pmask;
511 numpages = (nextpage_addr - address) >> PAGE_SHIFT;
512 if (numpages < cpa->numpages)
513 cpa->numpages = numpages;
514
515 /*
516 * We are safe now. Check whether the new pgprot is the same:
517 * Convert protection attributes to 4k-format, as cpa->mask* are set
518 * up accordingly.
519 */
520 old_pte = *kpte;
521 req_prot = pgprot_large_2_4k(old_prot);
522
523 pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr);
524 pgprot_val(req_prot) |= pgprot_val(cpa->mask_set);
525
526 /*
527 * req_prot is in format of 4k pages. It must be converted to large
528 * page format: the caching mode includes the PAT bit located at
529 * different bit positions in the two formats.
530 */
531 req_prot = pgprot_4k_2_large(req_prot);
532
533 /*
534 * Set the PSE and GLOBAL flags only if the PRESENT flag is
535 * set otherwise pmd_present/pmd_huge will return true even on
536 * a non present pmd. The canon_pgprot will clear _PAGE_GLOBAL
537 * for the ancient hardware that doesn't support it.
538 */
539 if (pgprot_val(req_prot) & _PAGE_PRESENT)
540 pgprot_val(req_prot) |= _PAGE_PSE | _PAGE_GLOBAL;
541 else
542 pgprot_val(req_prot) &= ~(_PAGE_PSE | _PAGE_GLOBAL);
543
544 req_prot = canon_pgprot(req_prot);
545
546 /*
547 * old_pfn points to the large page base pfn. So we need
548 * to add the offset of the virtual address:
549 */
550 pfn = old_pfn + ((address & (psize - 1)) >> PAGE_SHIFT);
551 cpa->pfn = pfn;
552
553 new_prot = static_protections(req_prot, address, pfn);
554
555 /*
556 * We need to check the full range, whether
557 * static_protection() requires a different pgprot for one of
558 * the pages in the range we try to preserve:
559 */
560 addr = address & pmask;
561 pfn = old_pfn;
562 for (i = 0; i < (psize >> PAGE_SHIFT); i++, addr += PAGE_SIZE, pfn++) {
563 pgprot_t chk_prot = static_protections(req_prot, addr, pfn);
564
565 if (pgprot_val(chk_prot) != pgprot_val(new_prot))
566 goto out_unlock;
567 }
568
569 /*
570 * If there are no changes, return. maxpages has been updated
571 * above:
572 */
573 if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
574 do_split = 0;
575 goto out_unlock;
576 }
577
578 /*
579 * We need to change the attributes. Check, whether we can
580 * change the large page in one go. We request a split, when
581 * the address is not aligned and the number of pages is
582 * smaller than the number of pages in the large page. Note
583 * that we limited the number of possible pages already to
584 * the number of pages in the large page.
585 */
586 if (address == (address & pmask) && cpa->numpages == (psize >> PAGE_SHIFT)) {
587 /*
588 * The address is aligned and the number of pages
589 * covers the full page.
590 */
591 new_pte = pfn_pte(old_pfn, new_prot);
592 __set_pmd_pte(kpte, address, new_pte);
593 cpa->flags |= CPA_FLUSHTLB;
594 do_split = 0;
595 }
596
597 out_unlock:
598 spin_unlock(&pgd_lock);
599
600 return do_split;
601 }
602
603 static int
604 __split_large_page(struct cpa_data *cpa, pte_t *kpte, unsigned long address,
605 struct page *base)
606 {
607 pte_t *pbase = (pte_t *)page_address(base);
608 unsigned long ref_pfn, pfn, pfninc = 1;
609 unsigned int i, level;
610 pte_t *tmp;
611 pgprot_t ref_prot;
612
613 spin_lock(&pgd_lock);
614 /*
615 * Check for races, another CPU might have split this page
616 * up for us already:
617 */
618 tmp = _lookup_address_cpa(cpa, address, &level);
619 if (tmp != kpte) {
620 spin_unlock(&pgd_lock);
621 return 1;
622 }
623
624 paravirt_alloc_pte(&init_mm, page_to_pfn(base));
625
626 switch (level) {
627 case PG_LEVEL_2M:
628 ref_prot = pmd_pgprot(*(pmd_t *)kpte);
629 /* clear PSE and promote PAT bit to correct position */
630 ref_prot = pgprot_large_2_4k(ref_prot);
631 ref_pfn = pmd_pfn(*(pmd_t *)kpte);
632 break;
633
634 case PG_LEVEL_1G:
635 ref_prot = pud_pgprot(*(pud_t *)kpte);
636 ref_pfn = pud_pfn(*(pud_t *)kpte);
637 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
638
639 /*
640 * Clear the PSE flags if the PRESENT flag is not set
641 * otherwise pmd_present/pmd_huge will return true
642 * even on a non present pmd.
643 */
644 if (!(pgprot_val(ref_prot) & _PAGE_PRESENT))
645 pgprot_val(ref_prot) &= ~_PAGE_PSE;
646 break;
647
648 default:
649 spin_unlock(&pgd_lock);
650 return 1;
651 }
652
653 /*
654 * Set the GLOBAL flags only if the PRESENT flag is set
655 * otherwise pmd/pte_present will return true even on a non
656 * present pmd/pte. The canon_pgprot will clear _PAGE_GLOBAL
657 * for the ancient hardware that doesn't support it.
658 */
659 if (pgprot_val(ref_prot) & _PAGE_PRESENT)
660 pgprot_val(ref_prot) |= _PAGE_GLOBAL;
661 else
662 pgprot_val(ref_prot) &= ~_PAGE_GLOBAL;
663
664 /*
665 * Get the target pfn from the original entry:
666 */
667 pfn = ref_pfn;
668 for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
669 set_pte(&pbase[i], pfn_pte(pfn, canon_pgprot(ref_prot)));
670
671 if (virt_addr_valid(address)) {
672 unsigned long pfn = PFN_DOWN(__pa(address));
673
674 if (pfn_range_is_mapped(pfn, pfn + 1))
675 split_page_count(level);
676 }
677
678 /*
679 * Install the new, split up pagetable.
680 *
681 * We use the standard kernel pagetable protections for the new
682 * pagetable protections, the actual ptes set above control the
683 * primary protection behavior:
684 */
685 __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
686
687 /*
688 * Intel Atom errata AAH41 workaround.
689 *
690 * The real fix should be in hw or in a microcode update, but
691 * we also probabilistically try to reduce the window of having
692 * a large TLB mixed with 4K TLBs while instruction fetches are
693 * going on.
694 */
695 __flush_tlb_all();
696 spin_unlock(&pgd_lock);
697
698 return 0;
699 }
700
701 static int split_large_page(struct cpa_data *cpa, pte_t *kpte,
702 unsigned long address)
703 {
704 struct page *base;
705
706 if (!debug_pagealloc)
707 spin_unlock(&cpa_lock);
708 base = alloc_pages(GFP_KERNEL | __GFP_NOTRACK, 0);
709 if (!debug_pagealloc)
710 spin_lock(&cpa_lock);
711 if (!base)
712 return -ENOMEM;
713
714 if (__split_large_page(cpa, kpte, address, base))
715 __free_page(base);
716
717 return 0;
718 }
719
720 static bool try_to_free_pte_page(pte_t *pte)
721 {
722 int i;
723
724 for (i = 0; i < PTRS_PER_PTE; i++)
725 if (!pte_none(pte[i]))
726 return false;
727
728 free_page((unsigned long)pte);
729 return true;
730 }
731
732 static bool try_to_free_pmd_page(pmd_t *pmd)
733 {
734 int i;
735
736 for (i = 0; i < PTRS_PER_PMD; i++)
737 if (!pmd_none(pmd[i]))
738 return false;
739
740 free_page((unsigned long)pmd);
741 return true;
742 }
743
744 static bool try_to_free_pud_page(pud_t *pud)
745 {
746 int i;
747
748 for (i = 0; i < PTRS_PER_PUD; i++)
749 if (!pud_none(pud[i]))
750 return false;
751
752 free_page((unsigned long)pud);
753 return true;
754 }
755
756 static bool unmap_pte_range(pmd_t *pmd, unsigned long start, unsigned long end)
757 {
758 pte_t *pte = pte_offset_kernel(pmd, start);
759
760 while (start < end) {
761 set_pte(pte, __pte(0));
762
763 start += PAGE_SIZE;
764 pte++;
765 }
766
767 if (try_to_free_pte_page((pte_t *)pmd_page_vaddr(*pmd))) {
768 pmd_clear(pmd);
769 return true;
770 }
771 return false;
772 }
773
774 static void __unmap_pmd_range(pud_t *pud, pmd_t *pmd,
775 unsigned long start, unsigned long end)
776 {
777 if (unmap_pte_range(pmd, start, end))
778 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
779 pud_clear(pud);
780 }
781
782 static void unmap_pmd_range(pud_t *pud, unsigned long start, unsigned long end)
783 {
784 pmd_t *pmd = pmd_offset(pud, start);
785
786 /*
787 * Not on a 2MB page boundary?
788 */
789 if (start & (PMD_SIZE - 1)) {
790 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
791 unsigned long pre_end = min_t(unsigned long, end, next_page);
792
793 __unmap_pmd_range(pud, pmd, start, pre_end);
794
795 start = pre_end;
796 pmd++;
797 }
798
799 /*
800 * Try to unmap in 2M chunks.
801 */
802 while (end - start >= PMD_SIZE) {
803 if (pmd_large(*pmd))
804 pmd_clear(pmd);
805 else
806 __unmap_pmd_range(pud, pmd, start, start + PMD_SIZE);
807
808 start += PMD_SIZE;
809 pmd++;
810 }
811
812 /*
813 * 4K leftovers?
814 */
815 if (start < end)
816 return __unmap_pmd_range(pud, pmd, start, end);
817
818 /*
819 * Try again to free the PMD page if haven't succeeded above.
820 */
821 if (!pud_none(*pud))
822 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
823 pud_clear(pud);
824 }
825
826 static void unmap_pud_range(pgd_t *pgd, unsigned long start, unsigned long end)
827 {
828 pud_t *pud = pud_offset(pgd, start);
829
830 /*
831 * Not on a GB page boundary?
832 */
833 if (start & (PUD_SIZE - 1)) {
834 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
835 unsigned long pre_end = min_t(unsigned long, end, next_page);
836
837 unmap_pmd_range(pud, start, pre_end);
838
839 start = pre_end;
840 pud++;
841 }
842
843 /*
844 * Try to unmap in 1G chunks?
845 */
846 while (end - start >= PUD_SIZE) {
847
848 if (pud_large(*pud))
849 pud_clear(pud);
850 else
851 unmap_pmd_range(pud, start, start + PUD_SIZE);
852
853 start += PUD_SIZE;
854 pud++;
855 }
856
857 /*
858 * 2M leftovers?
859 */
860 if (start < end)
861 unmap_pmd_range(pud, start, end);
862
863 /*
864 * No need to try to free the PUD page because we'll free it in
865 * populate_pgd's error path
866 */
867 }
868
869 static void unmap_pgd_range(pgd_t *root, unsigned long addr, unsigned long end)
870 {
871 pgd_t *pgd_entry = root + pgd_index(addr);
872
873 unmap_pud_range(pgd_entry, addr, end);
874
875 if (try_to_free_pud_page((pud_t *)pgd_page_vaddr(*pgd_entry)))
876 pgd_clear(pgd_entry);
877 }
878
879 static int alloc_pte_page(pmd_t *pmd)
880 {
881 pte_t *pte = (pte_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
882 if (!pte)
883 return -1;
884
885 set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE));
886 return 0;
887 }
888
889 static int alloc_pmd_page(pud_t *pud)
890 {
891 pmd_t *pmd = (pmd_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
892 if (!pmd)
893 return -1;
894
895 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
896 return 0;
897 }
898
899 static void populate_pte(struct cpa_data *cpa,
900 unsigned long start, unsigned long end,
901 unsigned num_pages, pmd_t *pmd, pgprot_t pgprot)
902 {
903 pte_t *pte;
904
905 pte = pte_offset_kernel(pmd, start);
906
907 while (num_pages-- && start < end) {
908 set_pte(pte, pfn_pte(cpa->pfn, pgprot));
909
910 start += PAGE_SIZE;
911 cpa->pfn++;
912 pte++;
913 }
914 }
915
916 static int populate_pmd(struct cpa_data *cpa,
917 unsigned long start, unsigned long end,
918 unsigned num_pages, pud_t *pud, pgprot_t pgprot)
919 {
920 unsigned int cur_pages = 0;
921 pmd_t *pmd;
922 pgprot_t pmd_pgprot;
923
924 /*
925 * Not on a 2M boundary?
926 */
927 if (start & (PMD_SIZE - 1)) {
928 unsigned long pre_end = start + (num_pages << PAGE_SHIFT);
929 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
930
931 pre_end = min_t(unsigned long, pre_end, next_page);
932 cur_pages = (pre_end - start) >> PAGE_SHIFT;
933 cur_pages = min_t(unsigned int, num_pages, cur_pages);
934
935 /*
936 * Need a PTE page?
937 */
938 pmd = pmd_offset(pud, start);
939 if (pmd_none(*pmd))
940 if (alloc_pte_page(pmd))
941 return -1;
942
943 populate_pte(cpa, start, pre_end, cur_pages, pmd, pgprot);
944
945 start = pre_end;
946 }
947
948 /*
949 * We mapped them all?
950 */
951 if (num_pages == cur_pages)
952 return cur_pages;
953
954 pmd_pgprot = pgprot_4k_2_large(pgprot);
955
956 while (end - start >= PMD_SIZE) {
957
958 /*
959 * We cannot use a 1G page so allocate a PMD page if needed.
960 */
961 if (pud_none(*pud))
962 if (alloc_pmd_page(pud))
963 return -1;
964
965 pmd = pmd_offset(pud, start);
966
967 set_pmd(pmd, __pmd(cpa->pfn << PAGE_SHIFT | _PAGE_PSE |
968 massage_pgprot(pmd_pgprot)));
969
970 start += PMD_SIZE;
971 cpa->pfn += PMD_SIZE >> PAGE_SHIFT;
972 cur_pages += PMD_SIZE >> PAGE_SHIFT;
973 }
974
975 /*
976 * Map trailing 4K pages.
977 */
978 if (start < end) {
979 pmd = pmd_offset(pud, start);
980 if (pmd_none(*pmd))
981 if (alloc_pte_page(pmd))
982 return -1;
983
984 populate_pte(cpa, start, end, num_pages - cur_pages,
985 pmd, pgprot);
986 }
987 return num_pages;
988 }
989
990 static int populate_pud(struct cpa_data *cpa, unsigned long start, pgd_t *pgd,
991 pgprot_t pgprot)
992 {
993 pud_t *pud;
994 unsigned long end;
995 int cur_pages = 0;
996 pgprot_t pud_pgprot;
997
998 end = start + (cpa->numpages << PAGE_SHIFT);
999
1000 /*
1001 * Not on a Gb page boundary? => map everything up to it with
1002 * smaller pages.
1003 */
1004 if (start & (PUD_SIZE - 1)) {
1005 unsigned long pre_end;
1006 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
1007
1008 pre_end = min_t(unsigned long, end, next_page);
1009 cur_pages = (pre_end - start) >> PAGE_SHIFT;
1010 cur_pages = min_t(int, (int)cpa->numpages, cur_pages);
1011
1012 pud = pud_offset(pgd, start);
1013
1014 /*
1015 * Need a PMD page?
1016 */
1017 if (pud_none(*pud))
1018 if (alloc_pmd_page(pud))
1019 return -1;
1020
1021 cur_pages = populate_pmd(cpa, start, pre_end, cur_pages,
1022 pud, pgprot);
1023 if (cur_pages < 0)
1024 return cur_pages;
1025
1026 start = pre_end;
1027 }
1028
1029 /* We mapped them all? */
1030 if (cpa->numpages == cur_pages)
1031 return cur_pages;
1032
1033 pud = pud_offset(pgd, start);
1034 pud_pgprot = pgprot_4k_2_large(pgprot);
1035
1036 /*
1037 * Map everything starting from the Gb boundary, possibly with 1G pages
1038 */
1039 while (end - start >= PUD_SIZE) {
1040 set_pud(pud, __pud(cpa->pfn << PAGE_SHIFT | _PAGE_PSE |
1041 massage_pgprot(pud_pgprot)));
1042
1043 start += PUD_SIZE;
1044 cpa->pfn += PUD_SIZE >> PAGE_SHIFT;
1045 cur_pages += PUD_SIZE >> PAGE_SHIFT;
1046 pud++;
1047 }
1048
1049 /* Map trailing leftover */
1050 if (start < end) {
1051 int tmp;
1052
1053 pud = pud_offset(pgd, start);
1054 if (pud_none(*pud))
1055 if (alloc_pmd_page(pud))
1056 return -1;
1057
1058 tmp = populate_pmd(cpa, start, end, cpa->numpages - cur_pages,
1059 pud, pgprot);
1060 if (tmp < 0)
1061 return cur_pages;
1062
1063 cur_pages += tmp;
1064 }
1065 return cur_pages;
1066 }
1067
1068 /*
1069 * Restrictions for kernel page table do not necessarily apply when mapping in
1070 * an alternate PGD.
1071 */
1072 static int populate_pgd(struct cpa_data *cpa, unsigned long addr)
1073 {
1074 pgprot_t pgprot = __pgprot(_KERNPG_TABLE);
1075 pud_t *pud = NULL; /* shut up gcc */
1076 pgd_t *pgd_entry;
1077 int ret;
1078
1079 pgd_entry = cpa->pgd + pgd_index(addr);
1080
1081 /*
1082 * Allocate a PUD page and hand it down for mapping.
1083 */
1084 if (pgd_none(*pgd_entry)) {
1085 pud = (pud_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
1086 if (!pud)
1087 return -1;
1088
1089 set_pgd(pgd_entry, __pgd(__pa(pud) | _KERNPG_TABLE));
1090 }
1091
1092 pgprot_val(pgprot) &= ~pgprot_val(cpa->mask_clr);
1093 pgprot_val(pgprot) |= pgprot_val(cpa->mask_set);
1094
1095 ret = populate_pud(cpa, addr, pgd_entry, pgprot);
1096 if (ret < 0) {
1097 unmap_pgd_range(cpa->pgd, addr,
1098 addr + (cpa->numpages << PAGE_SHIFT));
1099 return ret;
1100 }
1101
1102 cpa->numpages = ret;
1103 return 0;
1104 }
1105
1106 static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
1107 int primary)
1108 {
1109 if (cpa->pgd)
1110 return populate_pgd(cpa, vaddr);
1111
1112 /*
1113 * Ignore all non primary paths.
1114 */
1115 if (!primary)
1116 return 0;
1117
1118 /*
1119 * Ignore the NULL PTE for kernel identity mapping, as it is expected
1120 * to have holes.
1121 * Also set numpages to '1' indicating that we processed cpa req for
1122 * one virtual address page and its pfn. TBD: numpages can be set based
1123 * on the initial value and the level returned by lookup_address().
1124 */
1125 if (within(vaddr, PAGE_OFFSET,
1126 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
1127 cpa->numpages = 1;
1128 cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
1129 return 0;
1130 } else {
1131 WARN(1, KERN_WARNING "CPA: called for zero pte. "
1132 "vaddr = %lx cpa->vaddr = %lx\n", vaddr,
1133 *cpa->vaddr);
1134
1135 return -EFAULT;
1136 }
1137 }
1138
1139 static int __change_page_attr(struct cpa_data *cpa, int primary)
1140 {
1141 unsigned long address;
1142 int do_split, err;
1143 unsigned int level;
1144 pte_t *kpte, old_pte;
1145
1146 if (cpa->flags & CPA_PAGES_ARRAY) {
1147 struct page *page = cpa->pages[cpa->curpage];
1148 if (unlikely(PageHighMem(page)))
1149 return 0;
1150 address = (unsigned long)page_address(page);
1151 } else if (cpa->flags & CPA_ARRAY)
1152 address = cpa->vaddr[cpa->curpage];
1153 else
1154 address = *cpa->vaddr;
1155 repeat:
1156 kpte = _lookup_address_cpa(cpa, address, &level);
1157 if (!kpte)
1158 return __cpa_process_fault(cpa, address, primary);
1159
1160 old_pte = *kpte;
1161 if (!pte_val(old_pte))
1162 return __cpa_process_fault(cpa, address, primary);
1163
1164 if (level == PG_LEVEL_4K) {
1165 pte_t new_pte;
1166 pgprot_t new_prot = pte_pgprot(old_pte);
1167 unsigned long pfn = pte_pfn(old_pte);
1168
1169 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
1170 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
1171
1172 new_prot = static_protections(new_prot, address, pfn);
1173
1174 /*
1175 * Set the GLOBAL flags only if the PRESENT flag is
1176 * set otherwise pte_present will return true even on
1177 * a non present pte. The canon_pgprot will clear
1178 * _PAGE_GLOBAL for the ancient hardware that doesn't
1179 * support it.
1180 */
1181 if (pgprot_val(new_prot) & _PAGE_PRESENT)
1182 pgprot_val(new_prot) |= _PAGE_GLOBAL;
1183 else
1184 pgprot_val(new_prot) &= ~_PAGE_GLOBAL;
1185
1186 /*
1187 * We need to keep the pfn from the existing PTE,
1188 * after all we're only going to change it's attributes
1189 * not the memory it points to
1190 */
1191 new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
1192 cpa->pfn = pfn;
1193 /*
1194 * Do we really change anything ?
1195 */
1196 if (pte_val(old_pte) != pte_val(new_pte)) {
1197 set_pte_atomic(kpte, new_pte);
1198 cpa->flags |= CPA_FLUSHTLB;
1199 }
1200 cpa->numpages = 1;
1201 return 0;
1202 }
1203
1204 /*
1205 * Check, whether we can keep the large page intact
1206 * and just change the pte:
1207 */
1208 do_split = try_preserve_large_page(kpte, address, cpa);
1209 /*
1210 * When the range fits into the existing large page,
1211 * return. cp->numpages and cpa->tlbflush have been updated in
1212 * try_large_page:
1213 */
1214 if (do_split <= 0)
1215 return do_split;
1216
1217 /*
1218 * We have to split the large page:
1219 */
1220 err = split_large_page(cpa, kpte, address);
1221 if (!err) {
1222 /*
1223 * Do a global flush tlb after splitting the large page
1224 * and before we do the actual change page attribute in the PTE.
1225 *
1226 * With out this, we violate the TLB application note, that says
1227 * "The TLBs may contain both ordinary and large-page
1228 * translations for a 4-KByte range of linear addresses. This
1229 * may occur if software modifies the paging structures so that
1230 * the page size used for the address range changes. If the two
1231 * translations differ with respect to page frame or attributes
1232 * (e.g., permissions), processor behavior is undefined and may
1233 * be implementation-specific."
1234 *
1235 * We do this global tlb flush inside the cpa_lock, so that we
1236 * don't allow any other cpu, with stale tlb entries change the
1237 * page attribute in parallel, that also falls into the
1238 * just split large page entry.
1239 */
1240 flush_tlb_all();
1241 goto repeat;
1242 }
1243
1244 return err;
1245 }
1246
1247 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
1248
1249 static int cpa_process_alias(struct cpa_data *cpa)
1250 {
1251 struct cpa_data alias_cpa;
1252 unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT);
1253 unsigned long vaddr;
1254 int ret;
1255
1256 if (!pfn_range_is_mapped(cpa->pfn, cpa->pfn + 1))
1257 return 0;
1258
1259 /*
1260 * No need to redo, when the primary call touched the direct
1261 * mapping already:
1262 */
1263 if (cpa->flags & CPA_PAGES_ARRAY) {
1264 struct page *page = cpa->pages[cpa->curpage];
1265 if (unlikely(PageHighMem(page)))
1266 return 0;
1267 vaddr = (unsigned long)page_address(page);
1268 } else if (cpa->flags & CPA_ARRAY)
1269 vaddr = cpa->vaddr[cpa->curpage];
1270 else
1271 vaddr = *cpa->vaddr;
1272
1273 if (!(within(vaddr, PAGE_OFFSET,
1274 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
1275
1276 alias_cpa = *cpa;
1277 alias_cpa.vaddr = &laddr;
1278 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1279
1280 ret = __change_page_attr_set_clr(&alias_cpa, 0);
1281 if (ret)
1282 return ret;
1283 }
1284
1285 #ifdef CONFIG_X86_64
1286 /*
1287 * If the primary call didn't touch the high mapping already
1288 * and the physical address is inside the kernel map, we need
1289 * to touch the high mapped kernel as well:
1290 */
1291 if (!within(vaddr, (unsigned long)_text, _brk_end) &&
1292 within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn())) {
1293 unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) +
1294 __START_KERNEL_map - phys_base;
1295 alias_cpa = *cpa;
1296 alias_cpa.vaddr = &temp_cpa_vaddr;
1297 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1298
1299 /*
1300 * The high mapping range is imprecise, so ignore the
1301 * return value.
1302 */
1303 __change_page_attr_set_clr(&alias_cpa, 0);
1304 }
1305 #endif
1306
1307 return 0;
1308 }
1309
1310 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
1311 {
1312 int ret, numpages = cpa->numpages;
1313
1314 while (numpages) {
1315 /*
1316 * Store the remaining nr of pages for the large page
1317 * preservation check.
1318 */
1319 cpa->numpages = numpages;
1320 /* for array changes, we can't use large page */
1321 if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
1322 cpa->numpages = 1;
1323
1324 if (!debug_pagealloc)
1325 spin_lock(&cpa_lock);
1326 ret = __change_page_attr(cpa, checkalias);
1327 if (!debug_pagealloc)
1328 spin_unlock(&cpa_lock);
1329 if (ret)
1330 return ret;
1331
1332 if (checkalias) {
1333 ret = cpa_process_alias(cpa);
1334 if (ret)
1335 return ret;
1336 }
1337
1338 /*
1339 * Adjust the number of pages with the result of the
1340 * CPA operation. Either a large page has been
1341 * preserved or a single page update happened.
1342 */
1343 BUG_ON(cpa->numpages > numpages);
1344 numpages -= cpa->numpages;
1345 if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
1346 cpa->curpage++;
1347 else
1348 *cpa->vaddr += cpa->numpages * PAGE_SIZE;
1349
1350 }
1351 return 0;
1352 }
1353
1354 static int change_page_attr_set_clr(unsigned long *addr, int numpages,
1355 pgprot_t mask_set, pgprot_t mask_clr,
1356 int force_split, int in_flag,
1357 struct page **pages)
1358 {
1359 struct cpa_data cpa;
1360 int ret, cache, checkalias;
1361 unsigned long baddr = 0;
1362
1363 memset(&cpa, 0, sizeof(cpa));
1364
1365 /*
1366 * Check, if we are requested to change a not supported
1367 * feature:
1368 */
1369 mask_set = canon_pgprot(mask_set);
1370 mask_clr = canon_pgprot(mask_clr);
1371 if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
1372 return 0;
1373
1374 /* Ensure we are PAGE_SIZE aligned */
1375 if (in_flag & CPA_ARRAY) {
1376 int i;
1377 for (i = 0; i < numpages; i++) {
1378 if (addr[i] & ~PAGE_MASK) {
1379 addr[i] &= PAGE_MASK;
1380 WARN_ON_ONCE(1);
1381 }
1382 }
1383 } else if (!(in_flag & CPA_PAGES_ARRAY)) {
1384 /*
1385 * in_flag of CPA_PAGES_ARRAY implies it is aligned.
1386 * No need to cehck in that case
1387 */
1388 if (*addr & ~PAGE_MASK) {
1389 *addr &= PAGE_MASK;
1390 /*
1391 * People should not be passing in unaligned addresses:
1392 */
1393 WARN_ON_ONCE(1);
1394 }
1395 /*
1396 * Save address for cache flush. *addr is modified in the call
1397 * to __change_page_attr_set_clr() below.
1398 */
1399 baddr = *addr;
1400 }
1401
1402 /* Must avoid aliasing mappings in the highmem code */
1403 kmap_flush_unused();
1404
1405 vm_unmap_aliases();
1406
1407 cpa.vaddr = addr;
1408 cpa.pages = pages;
1409 cpa.numpages = numpages;
1410 cpa.mask_set = mask_set;
1411 cpa.mask_clr = mask_clr;
1412 cpa.flags = 0;
1413 cpa.curpage = 0;
1414 cpa.force_split = force_split;
1415
1416 if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY))
1417 cpa.flags |= in_flag;
1418
1419 /* No alias checking for _NX bit modifications */
1420 checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
1421
1422 ret = __change_page_attr_set_clr(&cpa, checkalias);
1423
1424 /*
1425 * Check whether we really changed something:
1426 */
1427 if (!(cpa.flags & CPA_FLUSHTLB))
1428 goto out;
1429
1430 /*
1431 * No need to flush, when we did not set any of the caching
1432 * attributes:
1433 */
1434 cache = !!pgprot2cachemode(mask_set);
1435
1436 /*
1437 * On success we use CLFLUSH, when the CPU supports it to
1438 * avoid the WBINVD. If the CPU does not support it and in the
1439 * error case we fall back to cpa_flush_all (which uses
1440 * WBINVD):
1441 */
1442 if (!ret && cpu_has_clflush) {
1443 if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
1444 cpa_flush_array(addr, numpages, cache,
1445 cpa.flags, pages);
1446 } else
1447 cpa_flush_range(baddr, numpages, cache);
1448 } else
1449 cpa_flush_all(cache);
1450
1451 out:
1452 return ret;
1453 }
1454
1455 static inline int change_page_attr_set(unsigned long *addr, int numpages,
1456 pgprot_t mask, int array)
1457 {
1458 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
1459 (array ? CPA_ARRAY : 0), NULL);
1460 }
1461
1462 static inline int change_page_attr_clear(unsigned long *addr, int numpages,
1463 pgprot_t mask, int array)
1464 {
1465 return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
1466 (array ? CPA_ARRAY : 0), NULL);
1467 }
1468
1469 static inline int cpa_set_pages_array(struct page **pages, int numpages,
1470 pgprot_t mask)
1471 {
1472 return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
1473 CPA_PAGES_ARRAY, pages);
1474 }
1475
1476 static inline int cpa_clear_pages_array(struct page **pages, int numpages,
1477 pgprot_t mask)
1478 {
1479 return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
1480 CPA_PAGES_ARRAY, pages);
1481 }
1482
1483 int _set_memory_uc(unsigned long addr, int numpages)
1484 {
1485 /*
1486 * for now UC MINUS. see comments in ioremap_nocache()
1487 * If you really need strong UC use ioremap_uc(), but note
1488 * that you cannot override IO areas with set_memory_*() as
1489 * these helpers cannot work with IO memory.
1490 */
1491 return change_page_attr_set(&addr, numpages,
1492 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1493 0);
1494 }
1495
1496 int set_memory_uc(unsigned long addr, int numpages)
1497 {
1498 int ret;
1499
1500 /*
1501 * for now UC MINUS. see comments in ioremap_nocache()
1502 */
1503 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1504 _PAGE_CACHE_MODE_UC_MINUS, NULL);
1505 if (ret)
1506 goto out_err;
1507
1508 ret = _set_memory_uc(addr, numpages);
1509 if (ret)
1510 goto out_free;
1511
1512 return 0;
1513
1514 out_free:
1515 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1516 out_err:
1517 return ret;
1518 }
1519 EXPORT_SYMBOL(set_memory_uc);
1520
1521 static int _set_memory_array(unsigned long *addr, int addrinarray,
1522 enum page_cache_mode new_type)
1523 {
1524 enum page_cache_mode set_type;
1525 int i, j;
1526 int ret;
1527
1528 for (i = 0; i < addrinarray; i++) {
1529 ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
1530 new_type, NULL);
1531 if (ret)
1532 goto out_free;
1533 }
1534
1535 /* If WC, set to UC- first and then WC */
1536 set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1537 _PAGE_CACHE_MODE_UC_MINUS : new_type;
1538
1539 ret = change_page_attr_set(addr, addrinarray,
1540 cachemode2pgprot(set_type), 1);
1541
1542 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
1543 ret = change_page_attr_set_clr(addr, addrinarray,
1544 cachemode2pgprot(
1545 _PAGE_CACHE_MODE_WC),
1546 __pgprot(_PAGE_CACHE_MASK),
1547 0, CPA_ARRAY, NULL);
1548 if (ret)
1549 goto out_free;
1550
1551 return 0;
1552
1553 out_free:
1554 for (j = 0; j < i; j++)
1555 free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE);
1556
1557 return ret;
1558 }
1559
1560 int set_memory_array_uc(unsigned long *addr, int addrinarray)
1561 {
1562 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
1563 }
1564 EXPORT_SYMBOL(set_memory_array_uc);
1565
1566 int set_memory_array_wc(unsigned long *addr, int addrinarray)
1567 {
1568 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WC);
1569 }
1570 EXPORT_SYMBOL(set_memory_array_wc);
1571
1572 int set_memory_array_wt(unsigned long *addr, int addrinarray)
1573 {
1574 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WT);
1575 }
1576 EXPORT_SYMBOL_GPL(set_memory_array_wt);
1577
1578 int _set_memory_wc(unsigned long addr, int numpages)
1579 {
1580 int ret;
1581 unsigned long addr_copy = addr;
1582
1583 ret = change_page_attr_set(&addr, numpages,
1584 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1585 0);
1586 if (!ret) {
1587 ret = change_page_attr_set_clr(&addr_copy, numpages,
1588 cachemode2pgprot(
1589 _PAGE_CACHE_MODE_WC),
1590 __pgprot(_PAGE_CACHE_MASK),
1591 0, 0, NULL);
1592 }
1593 return ret;
1594 }
1595
1596 int set_memory_wc(unsigned long addr, int numpages)
1597 {
1598 int ret;
1599
1600 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1601 _PAGE_CACHE_MODE_WC, NULL);
1602 if (ret)
1603 return ret;
1604
1605 ret = _set_memory_wc(addr, numpages);
1606 if (ret)
1607 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1608
1609 return ret;
1610 }
1611 EXPORT_SYMBOL(set_memory_wc);
1612
1613 int _set_memory_wt(unsigned long addr, int numpages)
1614 {
1615 return change_page_attr_set(&addr, numpages,
1616 cachemode2pgprot(_PAGE_CACHE_MODE_WT), 0);
1617 }
1618
1619 int set_memory_wt(unsigned long addr, int numpages)
1620 {
1621 int ret;
1622
1623 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1624 _PAGE_CACHE_MODE_WT, NULL);
1625 if (ret)
1626 return ret;
1627
1628 ret = _set_memory_wt(addr, numpages);
1629 if (ret)
1630 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1631
1632 return ret;
1633 }
1634 EXPORT_SYMBOL_GPL(set_memory_wt);
1635
1636 int _set_memory_wb(unsigned long addr, int numpages)
1637 {
1638 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1639 return change_page_attr_clear(&addr, numpages,
1640 __pgprot(_PAGE_CACHE_MASK), 0);
1641 }
1642
1643 int set_memory_wb(unsigned long addr, int numpages)
1644 {
1645 int ret;
1646
1647 ret = _set_memory_wb(addr, numpages);
1648 if (ret)
1649 return ret;
1650
1651 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1652 return 0;
1653 }
1654 EXPORT_SYMBOL(set_memory_wb);
1655
1656 int set_memory_array_wb(unsigned long *addr, int addrinarray)
1657 {
1658 int i;
1659 int ret;
1660
1661 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1662 ret = change_page_attr_clear(addr, addrinarray,
1663 __pgprot(_PAGE_CACHE_MASK), 1);
1664 if (ret)
1665 return ret;
1666
1667 for (i = 0; i < addrinarray; i++)
1668 free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE);
1669
1670 return 0;
1671 }
1672 EXPORT_SYMBOL(set_memory_array_wb);
1673
1674 int set_memory_x(unsigned long addr, int numpages)
1675 {
1676 if (!(__supported_pte_mask & _PAGE_NX))
1677 return 0;
1678
1679 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
1680 }
1681 EXPORT_SYMBOL(set_memory_x);
1682
1683 int set_memory_nx(unsigned long addr, int numpages)
1684 {
1685 if (!(__supported_pte_mask & _PAGE_NX))
1686 return 0;
1687
1688 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
1689 }
1690 EXPORT_SYMBOL(set_memory_nx);
1691
1692 int set_memory_ro(unsigned long addr, int numpages)
1693 {
1694 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
1695 }
1696
1697 int set_memory_rw(unsigned long addr, int numpages)
1698 {
1699 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
1700 }
1701
1702 int set_memory_np(unsigned long addr, int numpages)
1703 {
1704 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
1705 }
1706
1707 int set_memory_4k(unsigned long addr, int numpages)
1708 {
1709 return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
1710 __pgprot(0), 1, 0, NULL);
1711 }
1712
1713 int set_pages_uc(struct page *page, int numpages)
1714 {
1715 unsigned long addr = (unsigned long)page_address(page);
1716
1717 return set_memory_uc(addr, numpages);
1718 }
1719 EXPORT_SYMBOL(set_pages_uc);
1720
1721 static int _set_pages_array(struct page **pages, int addrinarray,
1722 enum page_cache_mode new_type)
1723 {
1724 unsigned long start;
1725 unsigned long end;
1726 enum page_cache_mode set_type;
1727 int i;
1728 int free_idx;
1729 int ret;
1730
1731 for (i = 0; i < addrinarray; i++) {
1732 if (PageHighMem(pages[i]))
1733 continue;
1734 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1735 end = start + PAGE_SIZE;
1736 if (reserve_memtype(start, end, new_type, NULL))
1737 goto err_out;
1738 }
1739
1740 /* If WC, set to UC- first and then WC */
1741 set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1742 _PAGE_CACHE_MODE_UC_MINUS : new_type;
1743
1744 ret = cpa_set_pages_array(pages, addrinarray,
1745 cachemode2pgprot(set_type));
1746 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
1747 ret = change_page_attr_set_clr(NULL, addrinarray,
1748 cachemode2pgprot(
1749 _PAGE_CACHE_MODE_WC),
1750 __pgprot(_PAGE_CACHE_MASK),
1751 0, CPA_PAGES_ARRAY, pages);
1752 if (ret)
1753 goto err_out;
1754 return 0; /* Success */
1755 err_out:
1756 free_idx = i;
1757 for (i = 0; i < free_idx; i++) {
1758 if (PageHighMem(pages[i]))
1759 continue;
1760 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1761 end = start + PAGE_SIZE;
1762 free_memtype(start, end);
1763 }
1764 return -EINVAL;
1765 }
1766
1767 int set_pages_array_uc(struct page **pages, int addrinarray)
1768 {
1769 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
1770 }
1771 EXPORT_SYMBOL(set_pages_array_uc);
1772
1773 int set_pages_array_wc(struct page **pages, int addrinarray)
1774 {
1775 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WC);
1776 }
1777 EXPORT_SYMBOL(set_pages_array_wc);
1778
1779 int set_pages_array_wt(struct page **pages, int addrinarray)
1780 {
1781 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WT);
1782 }
1783 EXPORT_SYMBOL_GPL(set_pages_array_wt);
1784
1785 int set_pages_wb(struct page *page, int numpages)
1786 {
1787 unsigned long addr = (unsigned long)page_address(page);
1788
1789 return set_memory_wb(addr, numpages);
1790 }
1791 EXPORT_SYMBOL(set_pages_wb);
1792
1793 int set_pages_array_wb(struct page **pages, int addrinarray)
1794 {
1795 int retval;
1796 unsigned long start;
1797 unsigned long end;
1798 int i;
1799
1800 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1801 retval = cpa_clear_pages_array(pages, addrinarray,
1802 __pgprot(_PAGE_CACHE_MASK));
1803 if (retval)
1804 return retval;
1805
1806 for (i = 0; i < addrinarray; i++) {
1807 if (PageHighMem(pages[i]))
1808 continue;
1809 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1810 end = start + PAGE_SIZE;
1811 free_memtype(start, end);
1812 }
1813
1814 return 0;
1815 }
1816 EXPORT_SYMBOL(set_pages_array_wb);
1817
1818 int set_pages_x(struct page *page, int numpages)
1819 {
1820 unsigned long addr = (unsigned long)page_address(page);
1821
1822 return set_memory_x(addr, numpages);
1823 }
1824 EXPORT_SYMBOL(set_pages_x);
1825
1826 int set_pages_nx(struct page *page, int numpages)
1827 {
1828 unsigned long addr = (unsigned long)page_address(page);
1829
1830 return set_memory_nx(addr, numpages);
1831 }
1832 EXPORT_SYMBOL(set_pages_nx);
1833
1834 int set_pages_ro(struct page *page, int numpages)
1835 {
1836 unsigned long addr = (unsigned long)page_address(page);
1837
1838 return set_memory_ro(addr, numpages);
1839 }
1840
1841 int set_pages_rw(struct page *page, int numpages)
1842 {
1843 unsigned long addr = (unsigned long)page_address(page);
1844
1845 return set_memory_rw(addr, numpages);
1846 }
1847
1848 #ifdef CONFIG_DEBUG_PAGEALLOC
1849
1850 static int __set_pages_p(struct page *page, int numpages)
1851 {
1852 unsigned long tempaddr = (unsigned long) page_address(page);
1853 struct cpa_data cpa = { .vaddr = &tempaddr,
1854 .pgd = NULL,
1855 .numpages = numpages,
1856 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1857 .mask_clr = __pgprot(0),
1858 .flags = 0};
1859
1860 /*
1861 * No alias checking needed for setting present flag. otherwise,
1862 * we may need to break large pages for 64-bit kernel text
1863 * mappings (this adds to complexity if we want to do this from
1864 * atomic context especially). Let's keep it simple!
1865 */
1866 return __change_page_attr_set_clr(&cpa, 0);
1867 }
1868
1869 static int __set_pages_np(struct page *page, int numpages)
1870 {
1871 unsigned long tempaddr = (unsigned long) page_address(page);
1872 struct cpa_data cpa = { .vaddr = &tempaddr,
1873 .pgd = NULL,
1874 .numpages = numpages,
1875 .mask_set = __pgprot(0),
1876 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1877 .flags = 0};
1878
1879 /*
1880 * No alias checking needed for setting not present flag. otherwise,
1881 * we may need to break large pages for 64-bit kernel text
1882 * mappings (this adds to complexity if we want to do this from
1883 * atomic context especially). Let's keep it simple!
1884 */
1885 return __change_page_attr_set_clr(&cpa, 0);
1886 }
1887
1888 void __kernel_map_pages(struct page *page, int numpages, int enable)
1889 {
1890 if (PageHighMem(page))
1891 return;
1892 if (!enable) {
1893 debug_check_no_locks_freed(page_address(page),
1894 numpages * PAGE_SIZE);
1895 }
1896
1897 /*
1898 * The return value is ignored as the calls cannot fail.
1899 * Large pages for identity mappings are not used at boot time
1900 * and hence no memory allocations during large page split.
1901 */
1902 if (enable)
1903 __set_pages_p(page, numpages);
1904 else
1905 __set_pages_np(page, numpages);
1906
1907 /*
1908 * We should perform an IPI and flush all tlbs,
1909 * but that can deadlock->flush only current cpu:
1910 */
1911 __flush_tlb_all();
1912
1913 arch_flush_lazy_mmu_mode();
1914 }
1915
1916 #ifdef CONFIG_HIBERNATION
1917
1918 bool kernel_page_present(struct page *page)
1919 {
1920 unsigned int level;
1921 pte_t *pte;
1922
1923 if (PageHighMem(page))
1924 return false;
1925
1926 pte = lookup_address((unsigned long)page_address(page), &level);
1927 return (pte_val(*pte) & _PAGE_PRESENT);
1928 }
1929
1930 #endif /* CONFIG_HIBERNATION */
1931
1932 #endif /* CONFIG_DEBUG_PAGEALLOC */
1933
1934 int kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, unsigned long address,
1935 unsigned numpages, unsigned long page_flags)
1936 {
1937 int retval = -EINVAL;
1938
1939 struct cpa_data cpa = {
1940 .vaddr = &address,
1941 .pfn = pfn,
1942 .pgd = pgd,
1943 .numpages = numpages,
1944 .mask_set = __pgprot(0),
1945 .mask_clr = __pgprot(0),
1946 .flags = 0,
1947 };
1948
1949 if (!(__supported_pte_mask & _PAGE_NX))
1950 goto out;
1951
1952 if (!(page_flags & _PAGE_NX))
1953 cpa.mask_clr = __pgprot(_PAGE_NX);
1954
1955 cpa.mask_set = __pgprot(_PAGE_PRESENT | page_flags);
1956
1957 retval = __change_page_attr_set_clr(&cpa, 0);
1958 __flush_tlb_all();
1959
1960 out:
1961 return retval;
1962 }
1963
1964 void kernel_unmap_pages_in_pgd(pgd_t *root, unsigned long address,
1965 unsigned numpages)
1966 {
1967 unmap_pgd_range(root, address, address + (numpages << PAGE_SHIFT));
1968 }
1969
1970 /*
1971 * The testcases use internal knowledge of the implementation that shouldn't
1972 * be exposed to the rest of the kernel. Include these directly here.
1973 */
1974 #ifdef CONFIG_CPA_DEBUG
1975 #include "pageattr-test.c"
1976 #endif
This page took 0.071115 seconds and 5 git commands to generate.