drivers/iio/imu/inv_mpu6050/inv_mpu_core.c

   1 /*
   2 * Copyright (C) 2012 Invensense, Inc.
   3 *
   4 * This software is licensed under the terms of the GNU General Public
   5 * License version 2, as published by the Free Software Foundation, and
   6 * may be copied, distributed, and modified under those terms.
   7 *
   8 * This program is distributed in the hope that it will be useful,
   9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11 * GNU General Public License for more details.
  12 */
  13
  14 #include <linux/module.h>
  15 #include <linux/slab.h>
  16 #include <linux/i2c.h>
  17 #include <linux/err.h>
  18 #include <linux/delay.h>
  19 #include <linux/sysfs.h>
  20 #include <linux/jiffies.h>
  21 #include <linux/irq.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/kfifo.h>
  24 #include <linux/spinlock.h>
  25 #include <linux/iio/iio.h>
  26 #include <linux/i2c-mux.h>
  27 #include <linux/acpi.h>
  28 #include "inv_mpu_iio.h"
  29
  30 /*
  31  * this is the gyro scale translated from dynamic range plus/minus
  32  * {250, 500, 1000, 2000} to rad/s
  33  */
  34 static const int gyro_scale_6050[] = {133090, 266181, 532362, 1064724};
  35
  36 /*
  37  * this is the accel scale translated from dynamic range plus/minus
  38  * {2, 4, 8, 16} to m/s^2
  39  */
  40 static const int accel_scale[] = {598, 1196, 2392, 4785};
  41
  42 static const struct inv_mpu6050_reg_map reg_set_6050 = {
  43         .sample_rate_div        = INV_MPU6050_REG_SAMPLE_RATE_DIV,
  44         .lpf                    = INV_MPU6050_REG_CONFIG,
  45         .user_ctrl              = INV_MPU6050_REG_USER_CTRL,
  46         .fifo_en                = INV_MPU6050_REG_FIFO_EN,
  47         .gyro_config            = INV_MPU6050_REG_GYRO_CONFIG,
  48         .accl_config            = INV_MPU6050_REG_ACCEL_CONFIG,
  49         .fifo_count_h           = INV_MPU6050_REG_FIFO_COUNT_H,
  50         .fifo_r_w               = INV_MPU6050_REG_FIFO_R_W,
  51         .raw_gyro               = INV_MPU6050_REG_RAW_GYRO,
  52         .raw_accl               = INV_MPU6050_REG_RAW_ACCEL,
  53         .temperature            = INV_MPU6050_REG_TEMPERATURE,
  54         .int_enable             = INV_MPU6050_REG_INT_ENABLE,
  55         .pwr_mgmt_1             = INV_MPU6050_REG_PWR_MGMT_1,
  56         .pwr_mgmt_2             = INV_MPU6050_REG_PWR_MGMT_2,
  57         .int_pin_cfg            = INV_MPU6050_REG_INT_PIN_CFG,
  58 };
  59
  60 static const struct inv_mpu6050_chip_config chip_config_6050 = {
  61         .fsr = INV_MPU6050_FSR_2000DPS,
  62         .lpf = INV_MPU6050_FILTER_20HZ,
  63         .fifo_rate = INV_MPU6050_INIT_FIFO_RATE,
  64         .gyro_fifo_enable = false,
  65         .accl_fifo_enable = false,
  66         .accl_fs = INV_MPU6050_FS_02G,
  67 };
  68
  69 static const struct inv_mpu6050_hw hw_info[INV_NUM_PARTS] = {
  70         {
  71                 .num_reg = 117,
  72                 .name = "MPU6050",
  73                 .reg = &reg_set_6050,
  74                 .config = &chip_config_6050,
  75         },
  76 };
  77
  78 int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en, u32 mask)
  79 {
  80         unsigned int d, mgmt_1;
  81         int result;
  82         /*
  83          * switch clock needs to be careful. Only when gyro is on, can
  84          * clock source be switched to gyro. Otherwise, it must be set to
  85          * internal clock
  86          */
  87         if (mask == INV_MPU6050_BIT_PWR_GYRO_STBY) {
  88                 result = regmap_read(st->map, st->reg->pwr_mgmt_1, &mgmt_1);
  89                 if (result)
  90                         return result;
  91
  92                 mgmt_1 &= ~INV_MPU6050_BIT_CLK_MASK;
  93         }
  94
  95         if ((mask == INV_MPU6050_BIT_PWR_GYRO_STBY) && (!en)) {
  96                 /*
  97                  * turning off gyro requires switch to internal clock first.
  98                  * Then turn off gyro engine
  99                  */
 100                 mgmt_1 |= INV_CLK_INTERNAL;
 101                 result = regmap_write(st->map, st->reg->pwr_mgmt_1, mgmt_1);
 102                 if (result)
 103                         return result;
 104         }
 105
 106         result = regmap_read(st->map, st->reg->pwr_mgmt_2, &d);
 107         if (result)
 108                 return result;
 109         if (en)
 110                 d &= ~mask;
 111         else
 112                 d |= mask;
 113         result = regmap_write(st->map, st->reg->pwr_mgmt_2, d);
 114         if (result)
 115                 return result;
 116
 117         if (en) {
 118                 /* Wait for output stabilize */
 119                 msleep(INV_MPU6050_TEMP_UP_TIME);
 120                 if (mask == INV_MPU6050_BIT_PWR_GYRO_STBY) {
 121                         /* switch internal clock to PLL */
 122                         mgmt_1 |= INV_CLK_PLL;
 123                         result = regmap_write(st->map,
 124                                               st->reg->pwr_mgmt_1, mgmt_1);
 125                         if (result)
 126                                 return result;
 127                 }
 128         }
 129
 130         return 0;
 131 }
 132
 133 int inv_mpu6050_set_power_itg(struct inv_mpu6050_state *st, bool power_on)
 134 {
 135         int result = 0;
 136
 137         if (power_on) {
 138                 /* Already under indio-dev->mlock mutex */
 139                 if (!st->powerup_count)
 140                         result = regmap_write(st->map, st->reg->pwr_mgmt_1, 0);
 141                 if (!result)
 142                         st->powerup_count++;
 143         } else {
 144                 st->powerup_count--;
 145                 if (!st->powerup_count)
 146                         result = regmap_write(st->map, st->reg->pwr_mgmt_1,
 147                                               INV_MPU6050_BIT_SLEEP);
 148         }
 149
 150         if (result)
 151                 return result;
 152
 153         if (power_on)
 154                 msleep(INV_MPU6050_REG_UP_TIME);
 155
 156         return 0;
 157 }
 158 EXPORT_SYMBOL_GPL(inv_mpu6050_set_power_itg);
 159
 160 /**
 161  *  inv_mpu6050_init_config() - Initialize hardware, disable FIFO.
 162  *
 163  *  Initial configuration:
 164  *  FSR: ± 2000DPS
 165  *  DLPF: 20Hz
 166  *  FIFO rate: 50Hz
 167  *  Clock source: Gyro PLL
 168  */
 169 static int inv_mpu6050_init_config(struct iio_dev *indio_dev)
 170 {
 171         int result;
 172         u8 d;
 173         struct inv_mpu6050_state *st = iio_priv(indio_dev);
 174
 175         result = inv_mpu6050_set_power_itg(st, true);
 176         if (result)
 177                 return result;
 178         d = (INV_MPU6050_FSR_2000DPS << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT);
 179         result = regmap_write(st->map, st->reg->gyro_config, d);
 180         if (result)
 181                 return result;
 182
 183         d = INV_MPU6050_FILTER_20HZ;
 184         result = regmap_write(st->map, st->reg->lpf, d);
 185         if (result)
 186                 return result;
 187
 188         d = INV_MPU6050_ONE_K_HZ / INV_MPU6050_INIT_FIFO_RATE - 1;
 189         result = regmap_write(st->map, st->reg->sample_rate_div, d);
 190         if (result)
 191                 return result;
 192
 193         d = (INV_MPU6050_FS_02G << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
 194         result = regmap_write(st->map, st->reg->accl_config, d);
 195         if (result)
 196                 return result;
 197
 198         memcpy(&st->chip_config, hw_info[st->chip_type].config,
 199                sizeof(struct inv_mpu6050_chip_config));
 200         result = inv_mpu6050_set_power_itg(st, false);
 201
 202         return result;
 203 }
 204
 205 static int inv_mpu6050_sensor_show(struct inv_mpu6050_state  *st, int reg,
 206                                    int axis, int *val)
 207 {
 208         int ind, result;
 209         __be16 d;
 210
 211         ind = (axis - IIO_MOD_X) * 2;
 212         result = regmap_bulk_read(st->map, reg + ind, (u8 *)&d, 2);
 213         if (result)
 214                 return -EINVAL;
 215         *val = (short)be16_to_cpup(&d);
 216
 217         return IIO_VAL_INT;
 218 }
 219
 220 static int
 221 inv_mpu6050_read_raw(struct iio_dev *indio_dev,
 222                      struct iio_chan_spec const *chan,
 223                      int *val, int *val2, long mask)
 224 {
 225         struct inv_mpu6050_state  *st = iio_priv(indio_dev);
 226
 227         switch (mask) {
 228         case IIO_CHAN_INFO_RAW:
 229         {
 230                 int ret, result;
 231
 232                 ret = IIO_VAL_INT;
 233                 result = 0;
 234                 mutex_lock(&indio_dev->mlock);
 235                 if (!st->chip_config.enable) {
 236                         result = inv_mpu6050_set_power_itg(st, true);
 237                         if (result)
 238                                 goto error_read_raw;
 239                 }
 240                 /* when enable is on, power is already on */
 241                 switch (chan->type) {
 242                 case IIO_ANGL_VEL:
 243                         if (!st->chip_config.gyro_fifo_enable ||
 244                             !st->chip_config.enable) {
 245                                 result = inv_mpu6050_switch_engine(st, true,
 246                                                 INV_MPU6050_BIT_PWR_GYRO_STBY);
 247                                 if (result)
 248                                         goto error_read_raw;
 249                         }
 250                         ret = inv_mpu6050_sensor_show(st, st->reg->raw_gyro,
 251                                                       chan->channel2, val);
 252                         if (!st->chip_config.gyro_fifo_enable ||
 253                             !st->chip_config.enable) {
 254                                 result = inv_mpu6050_switch_engine(st, false,
 255                                                 INV_MPU6050_BIT_PWR_GYRO_STBY);
 256                                 if (result)
 257                                         goto error_read_raw;
 258                         }
 259                         break;
 260                 case IIO_ACCEL:
 261                         if (!st->chip_config.accl_fifo_enable ||
 262                             !st->chip_config.enable) {
 263                                 result = inv_mpu6050_switch_engine(st, true,
 264                                                 INV_MPU6050_BIT_PWR_ACCL_STBY);
 265                                 if (result)
 266                                         goto error_read_raw;
 267                         }
 268                         ret = inv_mpu6050_sensor_show(st, st->reg->raw_accl,
 269                                                       chan->channel2, val);
 270                         if (!st->chip_config.accl_fifo_enable ||
 271                             !st->chip_config.enable) {
 272                                 result = inv_mpu6050_switch_engine(st, false,
 273                                                 INV_MPU6050_BIT_PWR_ACCL_STBY);
 274                                 if (result)
 275                                         goto error_read_raw;
 276                         }
 277                         break;
 278                 case IIO_TEMP:
 279                         /* wait for stablization */
 280                         msleep(INV_MPU6050_SENSOR_UP_TIME);
 281                         ret = inv_mpu6050_sensor_show(st, st->reg->temperature,
 282                                                 IIO_MOD_X, val);
 283                         break;
 284                 default:
 285                         ret = -EINVAL;
 286                         break;
 287                 }
 288 error_read_raw:
 289                 if (!st->chip_config.enable)
 290                         result |= inv_mpu6050_set_power_itg(st, false);
 291                 mutex_unlock(&indio_dev->mlock);
 292                 if (result)
 293                         return result;
 294
 295                 return ret;
 296         }
 297         case IIO_CHAN_INFO_SCALE:
 298                 switch (chan->type) {
 299                 case IIO_ANGL_VEL:
 300                         *val  = 0;
 301                         *val2 = gyro_scale_6050[st->chip_config.fsr];
 302
 303                         return IIO_VAL_INT_PLUS_NANO;
 304                 case IIO_ACCEL:
 305                         *val = 0;
 306                         *val2 = accel_scale[st->chip_config.accl_fs];
 307
 308                         return IIO_VAL_INT_PLUS_MICRO;
 309                 case IIO_TEMP:
 310                         *val = 0;
 311                         *val2 = INV_MPU6050_TEMP_SCALE;
 312
 313                         return IIO_VAL_INT_PLUS_MICRO;
 314                 default:
 315                         return -EINVAL;
 316                 }
 317         case IIO_CHAN_INFO_OFFSET:
 318                 switch (chan->type) {
 319                 case IIO_TEMP:
 320                         *val = INV_MPU6050_TEMP_OFFSET;
 321
 322                         return IIO_VAL_INT;
 323                 default:
 324                         return -EINVAL;
 325                 }
 326         default:
 327                 return -EINVAL;
 328         }
 329 }
 330
 331 static int inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state *st, int val)
 332 {
 333         int result, i;
 334         u8 d;
 335
 336         for (i = 0; i < ARRAY_SIZE(gyro_scale_6050); ++i) {
 337                 if (gyro_scale_6050[i] == val) {
 338                         d = (i << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT);
 339                         result = regmap_write(st->map, st->reg->gyro_config, d);
 340                         if (result)
 341                                 return result;
 342
 343                         st->chip_config.fsr = i;
 344                         return 0;
 345                 }
 346         }
 347
 348         return -EINVAL;
 349 }
 350
 351 static int inv_write_raw_get_fmt(struct iio_dev *indio_dev,
 352                                  struct iio_chan_spec const *chan, long mask)
 353 {
 354         switch (mask) {
 355         case IIO_CHAN_INFO_SCALE:
 356                 switch (chan->type) {
 357                 case IIO_ANGL_VEL:
 358                         return IIO_VAL_INT_PLUS_NANO;
 359                 default:
 360                         return IIO_VAL_INT_PLUS_MICRO;
 361                 }
 362         default:
 363                 return IIO_VAL_INT_PLUS_MICRO;
 364         }
 365
 366         return -EINVAL;
 367 }
 368
 369 static int inv_mpu6050_write_accel_scale(struct inv_mpu6050_state *st, int val)
 370 {
 371         int result, i;
 372         u8 d;
 373
 374         for (i = 0; i < ARRAY_SIZE(accel_scale); ++i) {
 375                 if (accel_scale[i] == val) {
 376                         d = (i << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
 377                         result = regmap_write(st->map, st->reg->accl_config, d);
 378                         if (result)
 379                                 return result;
 380
 381                         st->chip_config.accl_fs = i;
 382                         return 0;
 383                 }
 384         }
 385
 386         return -EINVAL;
 387 }
 388
 389 static int inv_mpu6050_write_raw(struct iio_dev *indio_dev,
 390                                  struct iio_chan_spec const *chan,
 391                                  int val, int val2, long mask)
 392 {
 393         struct inv_mpu6050_state  *st = iio_priv(indio_dev);
 394         int result;
 395
 396         mutex_lock(&indio_dev->mlock);
 397         /*
 398          * we should only update scale when the chip is disabled, i.e.
 399          * not running
 400          */
 401         if (st->chip_config.enable) {
 402                 result = -EBUSY;
 403                 goto error_write_raw;
 404         }
 405         result = inv_mpu6050_set_power_itg(st, true);
 406         if (result)
 407                 goto error_write_raw;
 408
 409         switch (mask) {
 410         case IIO_CHAN_INFO_SCALE:
 411                 switch (chan->type) {
 412                 case IIO_ANGL_VEL:
 413                         result = inv_mpu6050_write_gyro_scale(st, val2);
 414                         break;
 415                 case IIO_ACCEL:
 416                         result = inv_mpu6050_write_accel_scale(st, val2);
 417                         break;
 418                 default:
 419                         result = -EINVAL;
 420                         break;
 421                 }
 422                 break;
 423         default:
 424                 result = -EINVAL;
 425                 break;
 426         }
 427
 428 error_write_raw:
 429         result |= inv_mpu6050_set_power_itg(st, false);
 430         mutex_unlock(&indio_dev->mlock);
 431
 432         return result;
 433 }
 434
 435 /**
 436  *  inv_mpu6050_set_lpf() - set low pass filer based on fifo rate.
 437  *
 438  *                  Based on the Nyquist principle, the sampling rate must
 439  *                  exceed twice of the bandwidth of the signal, or there
 440  *                  would be alising. This function basically search for the
 441  *                  correct low pass parameters based on the fifo rate, e.g,
 442  *                  sampling frequency.
 443  */
 444 static int inv_mpu6050_set_lpf(struct inv_mpu6050_state *st, int rate)
 445 {
 446         const int hz[] = {188, 98, 42, 20, 10, 5};
 447         const int d[] = {INV_MPU6050_FILTER_188HZ, INV_MPU6050_FILTER_98HZ,
 448                         INV_MPU6050_FILTER_42HZ, INV_MPU6050_FILTER_20HZ,
 449                         INV_MPU6050_FILTER_10HZ, INV_MPU6050_FILTER_5HZ};
 450         int i, h, result;
 451         u8 data;
 452
 453         h = (rate >> 1);
 454         i = 0;
 455         while ((h < hz[i]) && (i < ARRAY_SIZE(d) - 1))
 456                 i++;
 457         data = d[i];
 458         result = regmap_write(st->map, st->reg->lpf, data);
 459         if (result)
 460                 return result;
 461         st->chip_config.lpf = data;
 462
 463         return 0;
 464 }
 465
 466 /**
 467  * inv_mpu6050_fifo_rate_store() - Set fifo rate.
 468  */
 469 static ssize_t
 470 inv_mpu6050_fifo_rate_store(struct device *dev, struct device_attribute *attr,
 471                             const char *buf, size_t count)
 472 {
 473         s32 fifo_rate;
 474         u8 d;
 475         int result;
 476         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 477         struct inv_mpu6050_state *st = iio_priv(indio_dev);
 478
 479         if (kstrtoint(buf, 10, &fifo_rate))
 480                 return -EINVAL;
 481         if (fifo_rate < INV_MPU6050_MIN_FIFO_RATE ||
 482             fifo_rate > INV_MPU6050_MAX_FIFO_RATE)
 483                 return -EINVAL;
 484         if (fifo_rate == st->chip_config.fifo_rate)
 485                 return count;
 486
 487         mutex_lock(&indio_dev->mlock);
 488         if (st->chip_config.enable) {
 489                 result = -EBUSY;
 490                 goto fifo_rate_fail;
 491         }
 492         result = inv_mpu6050_set_power_itg(st, true);
 493         if (result)
 494                 goto fifo_rate_fail;
 495
 496         d = INV_MPU6050_ONE_K_HZ / fifo_rate - 1;
 497         result = regmap_write(st->map, st->reg->sample_rate_div, d);
 498         if (result)
 499                 goto fifo_rate_fail;
 500         st->chip_config.fifo_rate = fifo_rate;
 501
 502         result = inv_mpu6050_set_lpf(st, fifo_rate);
 503         if (result)
 504                 goto fifo_rate_fail;
 505
 506 fifo_rate_fail:
 507         result |= inv_mpu6050_set_power_itg(st, false);
 508         mutex_unlock(&indio_dev->mlock);
 509         if (result)
 510                 return result;
 511
 512         return count;
 513 }
 514
 515 /**
 516  * inv_fifo_rate_show() - Get the current sampling rate.
 517  */
 518 static ssize_t
 519 inv_fifo_rate_show(struct device *dev, struct device_attribute *attr,
 520                    char *buf)
 521 {
 522         struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
 523
 524         return sprintf(buf, "%d\n", st->chip_config.fifo_rate);
 525 }
 526
 527 /**
 528  * inv_attr_show() - calling this function will show current
 529  *                    parameters.
 530  */
 531 static ssize_t inv_attr_show(struct device *dev, struct device_attribute *attr,
 532                              char *buf)
 533 {
 534         struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
 535         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 536         s8 *m;
 537
 538         switch (this_attr->address) {
 539         /*
 540          * In MPU6050, the two matrix are the same because gyro and accel
 541          * are integrated in one chip
 542          */
 543         case ATTR_GYRO_MATRIX:
 544         case ATTR_ACCL_MATRIX:
 545                 m = st->plat_data.orientation;
 546
 547                 return sprintf(buf, "%d, %d, %d; %d, %d, %d; %d, %d, %d\n",
 548                         m[0], m[1], m[2], m[3], m[4], m[5], m[6], m[7], m[8]);
 549         default:
 550                 return -EINVAL;
 551         }
 552 }
 553
 554 /**
 555  * inv_mpu6050_validate_trigger() - validate_trigger callback for invensense
 556  *                                  MPU6050 device.
 557  * @indio_dev: The IIO device
 558  * @trig: The new trigger
 559  *
 560  * Returns: 0 if the 'trig' matches the trigger registered by the MPU6050
 561  * device, -EINVAL otherwise.
 562  */
 563 static int inv_mpu6050_validate_trigger(struct iio_dev *indio_dev,
 564                                         struct iio_trigger *trig)
 565 {
 566         struct inv_mpu6050_state *st = iio_priv(indio_dev);
 567
 568         if (st->trig != trig)
 569                 return -EINVAL;
 570
 571         return 0;
 572 }
 573
 574 #define INV_MPU6050_CHAN(_type, _channel2, _index)                    \
 575         {                                                             \
 576                 .type = _type,                                        \
 577                 .modified = 1,                                        \
 578                 .channel2 = _channel2,                                \
 579                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
 580                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),         \
 581                 .scan_index = _index,                                 \
 582                 .scan_type = {                                        \
 583                                 .sign = 's',                          \
 584                                 .realbits = 16,                       \
 585                                 .storagebits = 16,                    \
 586                                 .shift = 0,                           \
 587                                 .endianness = IIO_BE,                 \
 588                              },                                       \
 589         }
 590
 591 static const struct iio_chan_spec inv_mpu_channels[] = {
 592         IIO_CHAN_SOFT_TIMESTAMP(INV_MPU6050_SCAN_TIMESTAMP),
 593         /*
 594          * Note that temperature should only be via polled reading only,
 595          * not the final scan elements output.
 596          */
 597         {
 598                 .type = IIO_TEMP,
 599                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW)
 600                                 | BIT(IIO_CHAN_INFO_OFFSET)
 601                                 | BIT(IIO_CHAN_INFO_SCALE),
 602                 .scan_index = -1,
 603         },
 604         INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
 605         INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
 606         INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
 607
 608         INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
 609         INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
 610         INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
 611 };
 612
 613 /* constant IIO attribute */
 614 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("10 20 50 100 200 500");
 615 static IIO_CONST_ATTR(in_anglvel_scale_available,
 616                                           "0.000133090 0.000266181 0.000532362 0.001064724");
 617 static IIO_CONST_ATTR(in_accel_scale_available,
 618                                           "0.000598 0.001196 0.002392 0.004785");
 619 static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR, inv_fifo_rate_show,
 620         inv_mpu6050_fifo_rate_store);
 621 static IIO_DEVICE_ATTR(in_gyro_matrix, S_IRUGO, inv_attr_show, NULL,
 622         ATTR_GYRO_MATRIX);
 623 static IIO_DEVICE_ATTR(in_accel_matrix, S_IRUGO, inv_attr_show, NULL,
 624         ATTR_ACCL_MATRIX);
 625
 626 static struct attribute *inv_attributes[] = {
 627         &iio_dev_attr_in_gyro_matrix.dev_attr.attr,
 628         &iio_dev_attr_in_accel_matrix.dev_attr.attr,
 629         &iio_dev_attr_sampling_frequency.dev_attr.attr,
 630         &iio_const_attr_sampling_frequency_available.dev_attr.attr,
 631         &iio_const_attr_in_accel_scale_available.dev_attr.attr,
 632         &iio_const_attr_in_anglvel_scale_available.dev_attr.attr,
 633         NULL,
 634 };
 635
 636 static const struct attribute_group inv_attribute_group = {
 637         .attrs = inv_attributes
 638 };
 639
 640 static const struct iio_info mpu_info = {
 641         .driver_module = THIS_MODULE,
 642         .read_raw = &inv_mpu6050_read_raw,
 643         .write_raw = &inv_mpu6050_write_raw,
 644         .write_raw_get_fmt = &inv_write_raw_get_fmt,
 645         .attrs = &inv_attribute_group,
 646         .validate_trigger = inv_mpu6050_validate_trigger,
 647 };
 648
 649 /**
 650  *  inv_check_and_setup_chip() - check and setup chip.
 651  */
 652 static int inv_check_and_setup_chip(struct inv_mpu6050_state *st)
 653 {
 654         int result;
 655
 656         st->chip_type = INV_MPU6050;
 657         st->hw  = &hw_info[st->chip_type];
 658         st->reg = hw_info[st->chip_type].reg;
 659
 660         /* reset to make sure previous state are not there */
 661         result = regmap_write(st->map, st->reg->pwr_mgmt_1,
 662                               INV_MPU6050_BIT_H_RESET);
 663         if (result)
 664                 return result;
 665         msleep(INV_MPU6050_POWER_UP_TIME);
 666         /*
 667          * toggle power state. After reset, the sleep bit could be on
 668          * or off depending on the OTP settings. Toggling power would
 669          * make it in a definite state as well as making the hardware
 670          * state align with the software state
 671          */
 672         result = inv_mpu6050_set_power_itg(st, false);
 673         if (result)
 674                 return result;
 675         result = inv_mpu6050_set_power_itg(st, true);
 676         if (result)
 677                 return result;
 678
 679         result = inv_mpu6050_switch_engine(st, false,
 680                                            INV_MPU6050_BIT_PWR_ACCL_STBY);
 681         if (result)
 682                 return result;
 683         result = inv_mpu6050_switch_engine(st, false,
 684                                            INV_MPU6050_BIT_PWR_GYRO_STBY);
 685         if (result)
 686                 return result;
 687
 688         return 0;
 689 }
 690
 691 int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name,
 692                        int (*inv_mpu_bus_setup)(struct iio_dev *))
 693 {
 694         struct inv_mpu6050_state *st;
 695         struct iio_dev *indio_dev;
 696         struct inv_mpu6050_platform_data *pdata;
 697         struct device *dev = regmap_get_device(regmap);
 698         int result;
 699
 700         indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
 701         if (!indio_dev)
 702                 return -ENOMEM;
 703
 704         st = iio_priv(indio_dev);
 705         st->powerup_count = 0;
 706         st->irq = irq;
 707         st->map = regmap;
 708         pdata = dev_get_platdata(dev);
 709         if (pdata)
 710                 st->plat_data = *pdata;
 711         /* power is turned on inside check chip type*/
 712         result = inv_check_and_setup_chip(st);
 713         if (result)
 714                 return result;
 715
 716         if (inv_mpu_bus_setup)
 717                 inv_mpu_bus_setup(indio_dev);
 718
 719         result = inv_mpu6050_init_config(indio_dev);
 720         if (result) {
 721                 dev_err(dev, "Could not initialize device.\n");
 722                 return result;
 723         }
 724
 725         dev_set_drvdata(dev, indio_dev);
 726         indio_dev->dev.parent = dev;
 727         /* name will be NULL when enumerated via ACPI */
 728         if (name)
 729                 indio_dev->name = name;
 730         else
 731                 indio_dev->name = dev_name(dev);
 732         indio_dev->channels = inv_mpu_channels;
 733         indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels);
 734
 735         indio_dev->info = &mpu_info;
 736         indio_dev->modes = INDIO_BUFFER_TRIGGERED;
 737
 738         result = iio_triggered_buffer_setup(indio_dev,
 739                                             inv_mpu6050_irq_handler,
 740                                             inv_mpu6050_read_fifo,
 741                                             NULL);
 742         if (result) {
 743                 dev_err(dev, "configure buffer fail %d\n", result);
 744                 return result;
 745         }
 746         result = inv_mpu6050_probe_trigger(indio_dev);
 747         if (result) {
 748                 dev_err(dev, "trigger probe fail %d\n", result);
 749                 goto out_unreg_ring;
 750         }
 751
 752         INIT_KFIFO(st->timestamps);
 753         spin_lock_init(&st->time_stamp_lock);
 754         result = iio_device_register(indio_dev);
 755         if (result) {
 756                 dev_err(dev, "IIO register fail %d\n", result);
 757                 goto out_remove_trigger;
 758         }
 759
 760         return 0;
 761
 762 out_remove_trigger:
 763         inv_mpu6050_remove_trigger(st);
 764 out_unreg_ring:
 765         iio_triggered_buffer_cleanup(indio_dev);
 766         return result;
 767 }
 768 EXPORT_SYMBOL_GPL(inv_mpu_core_probe);
 769
 770 int inv_mpu_core_remove(struct device  *dev)
 771 {
 772         struct iio_dev *indio_dev = dev_get_drvdata(dev);
 773
 774         iio_device_unregister(indio_dev);
 775         inv_mpu6050_remove_trigger(iio_priv(indio_dev));
 776         iio_triggered_buffer_cleanup(indio_dev);
 777
 778         return 0;
 779 }
 780 EXPORT_SYMBOL_GPL(inv_mpu_core_remove);
 781
 782 #ifdef CONFIG_PM_SLEEP
 783
 784 static int inv_mpu_resume(struct device *dev)
 785 {
 786         return inv_mpu6050_set_power_itg(iio_priv(dev_get_drvdata(dev)), true);
 787 }
 788
 789 static int inv_mpu_suspend(struct device *dev)
 790 {
 791         return inv_mpu6050_set_power_itg(iio_priv(dev_get_drvdata(dev)), false);
 792 }
 793 #endif /* CONFIG_PM_SLEEP */
 794
 795 SIMPLE_DEV_PM_OPS(inv_mpu_pmops, inv_mpu_suspend, inv_mpu_resume);
 796 EXPORT_SYMBOL_GPL(inv_mpu_pmops);
 797
 798 MODULE_AUTHOR("Invensense Corporation");
 799 MODULE_DESCRIPTION("Invensense device MPU6050 driver");
 800 MODULE_LICENSE("GPL");