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97d6878f993828085a0f26f941572674ce68b967
[deliverable/linux.git] / drivers / infiniband / hw / mlx4 / main.c
1 /*
2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
33
34 #include <linux/module.h>
35 #include <linux/init.h>
36 #include <linux/slab.h>
37 #include <linux/errno.h>
38 #include <linux/netdevice.h>
39 #include <linux/inetdevice.h>
40 #include <linux/rtnetlink.h>
41 #include <linux/if_vlan.h>
42 #include <net/ipv6.h>
43 #include <net/addrconf.h>
44
45 #include <rdma/ib_smi.h>
46 #include <rdma/ib_user_verbs.h>
47 #include <rdma/ib_addr.h>
48 #include <rdma/ib_cache.h>
49
50 #include <net/bonding.h>
51
52 #include <linux/mlx4/driver.h>
53 #include <linux/mlx4/cmd.h>
54 #include <linux/mlx4/qp.h>
55
56 #include "mlx4_ib.h"
57 #include "user.h"
58
59 #define DRV_NAME MLX4_IB_DRV_NAME
60 #define DRV_VERSION "2.2-1"
61 #define DRV_RELDATE "Feb 2014"
62
63 #define MLX4_IB_FLOW_MAX_PRIO 0xFFF
64 #define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF
65 #define MLX4_IB_CARD_REV_A0 0xA0
66
67 MODULE_AUTHOR("Roland Dreier");
68 MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver");
69 MODULE_LICENSE("Dual BSD/GPL");
70 MODULE_VERSION(DRV_VERSION);
71
72 int mlx4_ib_sm_guid_assign = 0;
73 module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444);
74 MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 0)");
75
76 static const char mlx4_ib_version[] =
77 DRV_NAME ": Mellanox ConnectX InfiniBand driver v"
78 DRV_VERSION " (" DRV_RELDATE ")\n";
79
80 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init);
81
82 static struct workqueue_struct *wq;
83
84 static void init_query_mad(struct ib_smp *mad)
85 {
86 mad->base_version = 1;
87 mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
88 mad->class_version = 1;
89 mad->method = IB_MGMT_METHOD_GET;
90 }
91
92 static int check_flow_steering_support(struct mlx4_dev *dev)
93 {
94 int eth_num_ports = 0;
95 int ib_num_ports = 0;
96
97 int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED;
98
99 if (dmfs) {
100 int i;
101 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH)
102 eth_num_ports++;
103 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
104 ib_num_ports++;
105 dmfs &= (!ib_num_ports ||
106 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) &&
107 (!eth_num_ports ||
108 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN));
109 if (ib_num_ports && mlx4_is_mfunc(dev)) {
110 pr_warn("Device managed flow steering is unavailable for IB port in multifunction env.\n");
111 dmfs = 0;
112 }
113 }
114 return dmfs;
115 }
116
117 static int num_ib_ports(struct mlx4_dev *dev)
118 {
119 int ib_ports = 0;
120 int i;
121
122 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
123 ib_ports++;
124
125 return ib_ports;
126 }
127
128 static struct net_device *mlx4_ib_get_netdev(struct ib_device *device, u8 port_num)
129 {
130 struct mlx4_ib_dev *ibdev = to_mdev(device);
131 struct net_device *dev;
132
133 rcu_read_lock();
134 dev = mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port_num);
135
136 if (dev) {
137 if (mlx4_is_bonded(ibdev->dev)) {
138 struct net_device *upper = NULL;
139
140 upper = netdev_master_upper_dev_get_rcu(dev);
141 if (upper) {
142 struct net_device *active;
143
144 active = bond_option_active_slave_get_rcu(netdev_priv(upper));
145 if (active)
146 dev = active;
147 }
148 }
149 }
150 if (dev)
151 dev_hold(dev);
152
153 rcu_read_unlock();
154 return dev;
155 }
156
157 static int mlx4_ib_update_gids(struct gid_entry *gids,
158 struct mlx4_ib_dev *ibdev,
159 u8 port_num)
160 {
161 struct mlx4_cmd_mailbox *mailbox;
162 int err;
163 struct mlx4_dev *dev = ibdev->dev;
164 int i;
165 union ib_gid *gid_tbl;
166
167 mailbox = mlx4_alloc_cmd_mailbox(dev);
168 if (IS_ERR(mailbox))
169 return -ENOMEM;
170
171 gid_tbl = mailbox->buf;
172
173 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i)
174 memcpy(&gid_tbl[i], &gids[i].gid, sizeof(union ib_gid));
175
176 err = mlx4_cmd(dev, mailbox->dma,
177 MLX4_SET_PORT_GID_TABLE << 8 | port_num,
178 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
179 MLX4_CMD_WRAPPED);
180 if (mlx4_is_bonded(dev))
181 err += mlx4_cmd(dev, mailbox->dma,
182 MLX4_SET_PORT_GID_TABLE << 8 | 2,
183 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
184 MLX4_CMD_WRAPPED);
185
186 mlx4_free_cmd_mailbox(dev, mailbox);
187 return err;
188 }
189
190 static int mlx4_ib_add_gid(struct ib_device *device,
191 u8 port_num,
192 unsigned int index,
193 const union ib_gid *gid,
194 const struct ib_gid_attr *attr,
195 void **context)
196 {
197 struct mlx4_ib_dev *ibdev = to_mdev(device);
198 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
199 struct mlx4_port_gid_table *port_gid_table;
200 int free = -1, found = -1;
201 int ret = 0;
202 int hw_update = 0;
203 int i;
204 struct gid_entry *gids = NULL;
205
206 if (!rdma_cap_roce_gid_table(device, port_num))
207 return -EINVAL;
208
209 if (port_num > MLX4_MAX_PORTS)
210 return -EINVAL;
211
212 if (!context)
213 return -EINVAL;
214
215 port_gid_table = &iboe->gids[port_num - 1];
216 spin_lock_bh(&iboe->lock);
217 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) {
218 if (!memcmp(&port_gid_table->gids[i].gid, gid, sizeof(*gid))) {
219 found = i;
220 break;
221 }
222 if (free < 0 && !memcmp(&port_gid_table->gids[i].gid, &zgid, sizeof(*gid)))
223 free = i; /* HW has space */
224 }
225
226 if (found < 0) {
227 if (free < 0) {
228 ret = -ENOSPC;
229 } else {
230 port_gid_table->gids[free].ctx = kmalloc(sizeof(*port_gid_table->gids[free].ctx), GFP_ATOMIC);
231 if (!port_gid_table->gids[free].ctx) {
232 ret = -ENOMEM;
233 } else {
234 *context = port_gid_table->gids[free].ctx;
235 memcpy(&port_gid_table->gids[free].gid, gid, sizeof(*gid));
236 port_gid_table->gids[free].ctx->real_index = free;
237 port_gid_table->gids[free].ctx->refcount = 1;
238 hw_update = 1;
239 }
240 }
241 } else {
242 struct gid_cache_context *ctx = port_gid_table->gids[found].ctx;
243 *context = ctx;
244 ctx->refcount++;
245 }
246 if (!ret && hw_update) {
247 gids = kmalloc(sizeof(*gids) * MLX4_MAX_PORT_GIDS, GFP_ATOMIC);
248 if (!gids) {
249 ret = -ENOMEM;
250 } else {
251 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++)
252 memcpy(&gids[i].gid, &port_gid_table->gids[i].gid, sizeof(union ib_gid));
253 }
254 }
255 spin_unlock_bh(&iboe->lock);
256
257 if (!ret && hw_update) {
258 ret = mlx4_ib_update_gids(gids, ibdev, port_num);
259 kfree(gids);
260 }
261
262 return ret;
263 }
264
265 static int mlx4_ib_del_gid(struct ib_device *device,
266 u8 port_num,
267 unsigned int index,
268 void **context)
269 {
270 struct gid_cache_context *ctx = *context;
271 struct mlx4_ib_dev *ibdev = to_mdev(device);
272 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
273 struct mlx4_port_gid_table *port_gid_table;
274 int ret = 0;
275 int hw_update = 0;
276 struct gid_entry *gids = NULL;
277
278 if (!rdma_cap_roce_gid_table(device, port_num))
279 return -EINVAL;
280
281 if (port_num > MLX4_MAX_PORTS)
282 return -EINVAL;
283
284 port_gid_table = &iboe->gids[port_num - 1];
285 spin_lock_bh(&iboe->lock);
286 if (ctx) {
287 ctx->refcount--;
288 if (!ctx->refcount) {
289 unsigned int real_index = ctx->real_index;
290
291 memcpy(&port_gid_table->gids[real_index].gid, &zgid, sizeof(zgid));
292 kfree(port_gid_table->gids[real_index].ctx);
293 port_gid_table->gids[real_index].ctx = NULL;
294 hw_update = 1;
295 }
296 }
297 if (!ret && hw_update) {
298 int i;
299
300 gids = kmalloc(sizeof(*gids) * MLX4_MAX_PORT_GIDS, GFP_ATOMIC);
301 if (!gids) {
302 ret = -ENOMEM;
303 } else {
304 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++)
305 memcpy(&gids[i].gid, &port_gid_table->gids[i].gid, sizeof(union ib_gid));
306 }
307 }
308 spin_unlock_bh(&iboe->lock);
309
310 if (!ret && hw_update) {
311 ret = mlx4_ib_update_gids(gids, ibdev, port_num);
312 kfree(gids);
313 }
314 return ret;
315 }
316
317 int mlx4_ib_gid_index_to_real_index(struct mlx4_ib_dev *ibdev,
318 u8 port_num, int index)
319 {
320 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
321 struct gid_cache_context *ctx = NULL;
322 union ib_gid gid;
323 struct mlx4_port_gid_table *port_gid_table;
324 int real_index = -EINVAL;
325 int i;
326 int ret;
327 unsigned long flags;
328
329 if (port_num > MLX4_MAX_PORTS)
330 return -EINVAL;
331
332 if (mlx4_is_bonded(ibdev->dev))
333 port_num = 1;
334
335 if (!rdma_cap_roce_gid_table(&ibdev->ib_dev, port_num))
336 return index;
337
338 ret = ib_get_cached_gid(&ibdev->ib_dev, port_num, index, &gid, NULL);
339 if (ret)
340 return ret;
341
342 if (!memcmp(&gid, &zgid, sizeof(gid)))
343 return -EINVAL;
344
345 spin_lock_irqsave(&iboe->lock, flags);
346 port_gid_table = &iboe->gids[port_num - 1];
347
348 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i)
349 if (!memcmp(&port_gid_table->gids[i].gid, &gid, sizeof(gid))) {
350 ctx = port_gid_table->gids[i].ctx;
351 break;
352 }
353 if (ctx)
354 real_index = ctx->real_index;
355 spin_unlock_irqrestore(&iboe->lock, flags);
356 return real_index;
357 }
358
359 static int mlx4_ib_query_device(struct ib_device *ibdev,
360 struct ib_device_attr *props,
361 struct ib_udata *uhw)
362 {
363 struct mlx4_ib_dev *dev = to_mdev(ibdev);
364 struct ib_smp *in_mad = NULL;
365 struct ib_smp *out_mad = NULL;
366 int err = -ENOMEM;
367 int have_ib_ports;
368 struct mlx4_uverbs_ex_query_device cmd;
369 struct mlx4_uverbs_ex_query_device_resp resp = {.comp_mask = 0};
370 struct mlx4_clock_params clock_params;
371
372 if (uhw->inlen) {
373 if (uhw->inlen < sizeof(cmd))
374 return -EINVAL;
375
376 err = ib_copy_from_udata(&cmd, uhw, sizeof(cmd));
377 if (err)
378 return err;
379
380 if (cmd.comp_mask)
381 return -EINVAL;
382
383 if (cmd.reserved)
384 return -EINVAL;
385 }
386
387 resp.response_length = offsetof(typeof(resp), response_length) +
388 sizeof(resp.response_length);
389 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
390 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
391 if (!in_mad || !out_mad)
392 goto out;
393
394 init_query_mad(in_mad);
395 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
396
397 err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS,
398 1, NULL, NULL, in_mad, out_mad);
399 if (err)
400 goto out;
401
402 memset(props, 0, sizeof *props);
403
404 have_ib_ports = num_ib_ports(dev->dev);
405
406 props->fw_ver = dev->dev->caps.fw_ver;
407 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
408 IB_DEVICE_PORT_ACTIVE_EVENT |
409 IB_DEVICE_SYS_IMAGE_GUID |
410 IB_DEVICE_RC_RNR_NAK_GEN |
411 IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
412 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR)
413 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
414 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR)
415 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
416 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM && have_ib_ports)
417 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
418 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT)
419 props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
420 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM)
421 props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
422 if (dev->dev->caps.max_gso_sz &&
423 (dev->dev->rev_id != MLX4_IB_CARD_REV_A0) &&
424 (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH))
425 props->device_cap_flags |= IB_DEVICE_UD_TSO;
426 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY)
427 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
428 if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) &&
429 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) &&
430 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR))
431 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
432 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)
433 props->device_cap_flags |= IB_DEVICE_XRC;
434 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW)
435 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW;
436 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
437 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B)
438 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B;
439 else
440 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A;
441 if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
442 props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING;
443 }
444
445 props->device_cap_flags |= IB_DEVICE_RAW_IP_CSUM;
446
447 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
448 0xffffff;
449 props->vendor_part_id = dev->dev->persist->pdev->device;
450 props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
451 memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
452
453 props->max_mr_size = ~0ull;
454 props->page_size_cap = dev->dev->caps.page_size_cap;
455 props->max_qp = dev->dev->quotas.qp;
456 props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE;
457 props->max_sge = min(dev->dev->caps.max_sq_sg,
458 dev->dev->caps.max_rq_sg);
459 props->max_sge_rd = MLX4_MAX_SGE_RD;
460 props->max_cq = dev->dev->quotas.cq;
461 props->max_cqe = dev->dev->caps.max_cqes;
462 props->max_mr = dev->dev->quotas.mpt;
463 props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds;
464 props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma;
465 props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma;
466 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
467 props->max_srq = dev->dev->quotas.srq;
468 props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1;
469 props->max_srq_sge = dev->dev->caps.max_srq_sge;
470 props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES;
471 props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay;
472 props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ?
473 IB_ATOMIC_HCA : IB_ATOMIC_NONE;
474 props->masked_atomic_cap = props->atomic_cap;
475 props->max_pkeys = dev->dev->caps.pkey_table_len[1];
476 props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms;
477 props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm;
478 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
479 props->max_mcast_grp;
480 props->max_map_per_fmr = dev->dev->caps.max_fmr_maps;
481 props->hca_core_clock = dev->dev->caps.hca_core_clock * 1000UL;
482 props->timestamp_mask = 0xFFFFFFFFFFFFULL;
483
484 if (!mlx4_is_slave(dev->dev))
485 err = mlx4_get_internal_clock_params(dev->dev, &clock_params);
486
487 if (uhw->outlen >= resp.response_length + sizeof(resp.hca_core_clock_offset)) {
488 resp.response_length += sizeof(resp.hca_core_clock_offset);
489 if (!err && !mlx4_is_slave(dev->dev)) {
490 resp.comp_mask |= QUERY_DEVICE_RESP_MASK_TIMESTAMP;
491 resp.hca_core_clock_offset = clock_params.offset % PAGE_SIZE;
492 }
493 }
494
495 if (uhw->outlen) {
496 err = ib_copy_to_udata(uhw, &resp, resp.response_length);
497 if (err)
498 goto out;
499 }
500 out:
501 kfree(in_mad);
502 kfree(out_mad);
503
504 return err;
505 }
506
507 static enum rdma_link_layer
508 mlx4_ib_port_link_layer(struct ib_device *device, u8 port_num)
509 {
510 struct mlx4_dev *dev = to_mdev(device)->dev;
511
512 return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ?
513 IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET;
514 }
515
516 static int ib_link_query_port(struct ib_device *ibdev, u8 port,
517 struct ib_port_attr *props, int netw_view)
518 {
519 struct ib_smp *in_mad = NULL;
520 struct ib_smp *out_mad = NULL;
521 int ext_active_speed;
522 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
523 int err = -ENOMEM;
524
525 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
526 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
527 if (!in_mad || !out_mad)
528 goto out;
529
530 init_query_mad(in_mad);
531 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
532 in_mad->attr_mod = cpu_to_be32(port);
533
534 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
535 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
536
537 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
538 in_mad, out_mad);
539 if (err)
540 goto out;
541
542
543 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
544 props->lmc = out_mad->data[34] & 0x7;
545 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
546 props->sm_sl = out_mad->data[36] & 0xf;
547 props->state = out_mad->data[32] & 0xf;
548 props->phys_state = out_mad->data[33] >> 4;
549 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
550 if (netw_view)
551 props->gid_tbl_len = out_mad->data[50];
552 else
553 props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port];
554 props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz;
555 props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port];
556 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
557 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
558 props->active_width = out_mad->data[31] & 0xf;
559 props->active_speed = out_mad->data[35] >> 4;
560 props->max_mtu = out_mad->data[41] & 0xf;
561 props->active_mtu = out_mad->data[36] >> 4;
562 props->subnet_timeout = out_mad->data[51] & 0x1f;
563 props->max_vl_num = out_mad->data[37] >> 4;
564 props->init_type_reply = out_mad->data[41] >> 4;
565
566 /* Check if extended speeds (EDR/FDR/...) are supported */
567 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
568 ext_active_speed = out_mad->data[62] >> 4;
569
570 switch (ext_active_speed) {
571 case 1:
572 props->active_speed = IB_SPEED_FDR;
573 break;
574 case 2:
575 props->active_speed = IB_SPEED_EDR;
576 break;
577 }
578 }
579
580 /* If reported active speed is QDR, check if is FDR-10 */
581 if (props->active_speed == IB_SPEED_QDR) {
582 init_query_mad(in_mad);
583 in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO;
584 in_mad->attr_mod = cpu_to_be32(port);
585
586 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port,
587 NULL, NULL, in_mad, out_mad);
588 if (err)
589 goto out;
590
591 /* Checking LinkSpeedActive for FDR-10 */
592 if (out_mad->data[15] & 0x1)
593 props->active_speed = IB_SPEED_FDR10;
594 }
595
596 /* Avoid wrong speed value returned by FW if the IB link is down. */
597 if (props->state == IB_PORT_DOWN)
598 props->active_speed = IB_SPEED_SDR;
599
600 out:
601 kfree(in_mad);
602 kfree(out_mad);
603 return err;
604 }
605
606 static u8 state_to_phys_state(enum ib_port_state state)
607 {
608 return state == IB_PORT_ACTIVE ? 5 : 3;
609 }
610
611 static int eth_link_query_port(struct ib_device *ibdev, u8 port,
612 struct ib_port_attr *props, int netw_view)
613 {
614
615 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
616 struct mlx4_ib_iboe *iboe = &mdev->iboe;
617 struct net_device *ndev;
618 enum ib_mtu tmp;
619 struct mlx4_cmd_mailbox *mailbox;
620 int err = 0;
621 int is_bonded = mlx4_is_bonded(mdev->dev);
622
623 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
624 if (IS_ERR(mailbox))
625 return PTR_ERR(mailbox);
626
627 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0,
628 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
629 MLX4_CMD_WRAPPED);
630 if (err)
631 goto out;
632
633 props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) ?
634 IB_WIDTH_4X : IB_WIDTH_1X;
635 props->active_speed = IB_SPEED_QDR;
636 props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_IP_BASED_GIDS;
637 props->gid_tbl_len = mdev->dev->caps.gid_table_len[port];
638 props->max_msg_sz = mdev->dev->caps.max_msg_sz;
639 props->pkey_tbl_len = 1;
640 props->max_mtu = IB_MTU_4096;
641 props->max_vl_num = 2;
642 props->state = IB_PORT_DOWN;
643 props->phys_state = state_to_phys_state(props->state);
644 props->active_mtu = IB_MTU_256;
645 spin_lock_bh(&iboe->lock);
646 ndev = iboe->netdevs[port - 1];
647 if (ndev && is_bonded) {
648 rcu_read_lock(); /* required to get upper dev */
649 ndev = netdev_master_upper_dev_get_rcu(ndev);
650 rcu_read_unlock();
651 }
652 if (!ndev)
653 goto out_unlock;
654
655 tmp = iboe_get_mtu(ndev->mtu);
656 props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256;
657
658 props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ?
659 IB_PORT_ACTIVE : IB_PORT_DOWN;
660 props->phys_state = state_to_phys_state(props->state);
661 out_unlock:
662 spin_unlock_bh(&iboe->lock);
663 out:
664 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
665 return err;
666 }
667
668 int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
669 struct ib_port_attr *props, int netw_view)
670 {
671 int err;
672
673 memset(props, 0, sizeof *props);
674
675 err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ?
676 ib_link_query_port(ibdev, port, props, netw_view) :
677 eth_link_query_port(ibdev, port, props, netw_view);
678
679 return err;
680 }
681
682 static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
683 struct ib_port_attr *props)
684 {
685 /* returns host view */
686 return __mlx4_ib_query_port(ibdev, port, props, 0);
687 }
688
689 int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
690 union ib_gid *gid, int netw_view)
691 {
692 struct ib_smp *in_mad = NULL;
693 struct ib_smp *out_mad = NULL;
694 int err = -ENOMEM;
695 struct mlx4_ib_dev *dev = to_mdev(ibdev);
696 int clear = 0;
697 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
698
699 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
700 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
701 if (!in_mad || !out_mad)
702 goto out;
703
704 init_query_mad(in_mad);
705 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
706 in_mad->attr_mod = cpu_to_be32(port);
707
708 if (mlx4_is_mfunc(dev->dev) && netw_view)
709 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
710
711 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad);
712 if (err)
713 goto out;
714
715 memcpy(gid->raw, out_mad->data + 8, 8);
716
717 if (mlx4_is_mfunc(dev->dev) && !netw_view) {
718 if (index) {
719 /* For any index > 0, return the null guid */
720 err = 0;
721 clear = 1;
722 goto out;
723 }
724 }
725
726 init_query_mad(in_mad);
727 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
728 in_mad->attr_mod = cpu_to_be32(index / 8);
729
730 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port,
731 NULL, NULL, in_mad, out_mad);
732 if (err)
733 goto out;
734
735 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
736
737 out:
738 if (clear)
739 memset(gid->raw + 8, 0, 8);
740 kfree(in_mad);
741 kfree(out_mad);
742 return err;
743 }
744
745 static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
746 union ib_gid *gid)
747 {
748 int ret;
749
750 if (rdma_protocol_ib(ibdev, port))
751 return __mlx4_ib_query_gid(ibdev, port, index, gid, 0);
752
753 if (!rdma_protocol_roce(ibdev, port))
754 return -ENODEV;
755
756 if (!rdma_cap_roce_gid_table(ibdev, port))
757 return -ENODEV;
758
759 ret = ib_get_cached_gid(ibdev, port, index, gid, NULL);
760 if (ret == -EAGAIN) {
761 memcpy(gid, &zgid, sizeof(*gid));
762 return 0;
763 }
764
765 return ret;
766 }
767
768 int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
769 u16 *pkey, int netw_view)
770 {
771 struct ib_smp *in_mad = NULL;
772 struct ib_smp *out_mad = NULL;
773 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
774 int err = -ENOMEM;
775
776 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
777 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
778 if (!in_mad || !out_mad)
779 goto out;
780
781 init_query_mad(in_mad);
782 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
783 in_mad->attr_mod = cpu_to_be32(index / 32);
784
785 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
786 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
787
788 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
789 in_mad, out_mad);
790 if (err)
791 goto out;
792
793 *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
794
795 out:
796 kfree(in_mad);
797 kfree(out_mad);
798 return err;
799 }
800
801 static int mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
802 {
803 return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0);
804 }
805
806 static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask,
807 struct ib_device_modify *props)
808 {
809 struct mlx4_cmd_mailbox *mailbox;
810 unsigned long flags;
811
812 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
813 return -EOPNOTSUPP;
814
815 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC))
816 return 0;
817
818 if (mlx4_is_slave(to_mdev(ibdev)->dev))
819 return -EOPNOTSUPP;
820
821 spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags);
822 memcpy(ibdev->node_desc, props->node_desc, 64);
823 spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags);
824
825 /*
826 * If possible, pass node desc to FW, so it can generate
827 * a 144 trap. If cmd fails, just ignore.
828 */
829 mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev);
830 if (IS_ERR(mailbox))
831 return 0;
832
833 memcpy(mailbox->buf, props->node_desc, 64);
834 mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0,
835 MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
836
837 mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox);
838
839 return 0;
840 }
841
842 static int mlx4_ib_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols,
843 u32 cap_mask)
844 {
845 struct mlx4_cmd_mailbox *mailbox;
846 int err;
847
848 mailbox = mlx4_alloc_cmd_mailbox(dev->dev);
849 if (IS_ERR(mailbox))
850 return PTR_ERR(mailbox);
851
852 if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
853 *(u8 *) mailbox->buf = !!reset_qkey_viols << 6;
854 ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask);
855 } else {
856 ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols;
857 ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask);
858 }
859
860 err = mlx4_cmd(dev->dev, mailbox->dma, port, MLX4_SET_PORT_IB_OPCODE,
861 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
862 MLX4_CMD_WRAPPED);
863
864 mlx4_free_cmd_mailbox(dev->dev, mailbox);
865 return err;
866 }
867
868 static int mlx4_ib_modify_port(struct ib_device *ibdev, u8 port, int mask,
869 struct ib_port_modify *props)
870 {
871 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
872 u8 is_eth = mdev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
873 struct ib_port_attr attr;
874 u32 cap_mask;
875 int err;
876
877 /* return OK if this is RoCE. CM calls ib_modify_port() regardless
878 * of whether port link layer is ETH or IB. For ETH ports, qkey
879 * violations and port capabilities are not meaningful.
880 */
881 if (is_eth)
882 return 0;
883
884 mutex_lock(&mdev->cap_mask_mutex);
885
886 err = mlx4_ib_query_port(ibdev, port, &attr);
887 if (err)
888 goto out;
889
890 cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
891 ~props->clr_port_cap_mask;
892
893 err = mlx4_ib_SET_PORT(mdev, port,
894 !!(mask & IB_PORT_RESET_QKEY_CNTR),
895 cap_mask);
896
897 out:
898 mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex);
899 return err;
900 }
901
902 static struct ib_ucontext *mlx4_ib_alloc_ucontext(struct ib_device *ibdev,
903 struct ib_udata *udata)
904 {
905 struct mlx4_ib_dev *dev = to_mdev(ibdev);
906 struct mlx4_ib_ucontext *context;
907 struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3;
908 struct mlx4_ib_alloc_ucontext_resp resp;
909 int err;
910
911 if (!dev->ib_active)
912 return ERR_PTR(-EAGAIN);
913
914 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) {
915 resp_v3.qp_tab_size = dev->dev->caps.num_qps;
916 resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size;
917 resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
918 } else {
919 resp.dev_caps = dev->dev->caps.userspace_caps;
920 resp.qp_tab_size = dev->dev->caps.num_qps;
921 resp.bf_reg_size = dev->dev->caps.bf_reg_size;
922 resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
923 resp.cqe_size = dev->dev->caps.cqe_size;
924 }
925
926 context = kzalloc(sizeof(*context), GFP_KERNEL);
927 if (!context)
928 return ERR_PTR(-ENOMEM);
929
930 err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar);
931 if (err) {
932 kfree(context);
933 return ERR_PTR(err);
934 }
935
936 INIT_LIST_HEAD(&context->db_page_list);
937 mutex_init(&context->db_page_mutex);
938
939 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION)
940 err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3));
941 else
942 err = ib_copy_to_udata(udata, &resp, sizeof(resp));
943
944 if (err) {
945 mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar);
946 kfree(context);
947 return ERR_PTR(-EFAULT);
948 }
949
950 return &context->ibucontext;
951 }
952
953 static int mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
954 {
955 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext);
956
957 mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar);
958 kfree(context);
959
960 return 0;
961 }
962
963 static void mlx4_ib_vma_open(struct vm_area_struct *area)
964 {
965 /* vma_open is called when a new VMA is created on top of our VMA.
966 * This is done through either mremap flow or split_vma (usually due
967 * to mlock, madvise, munmap, etc.). We do not support a clone of the
968 * vma, as this VMA is strongly hardware related. Therefore we set the
969 * vm_ops of the newly created/cloned VMA to NULL, to prevent it from
970 * calling us again and trying to do incorrect actions. We assume that
971 * the original vma size is exactly a single page that there will be no
972 * "splitting" operations on.
973 */
974 area->vm_ops = NULL;
975 }
976
977 static void mlx4_ib_vma_close(struct vm_area_struct *area)
978 {
979 struct mlx4_ib_vma_private_data *mlx4_ib_vma_priv_data;
980
981 /* It's guaranteed that all VMAs opened on a FD are closed before the
982 * file itself is closed, therefore no sync is needed with the regular
983 * closing flow. (e.g. mlx4_ib_dealloc_ucontext) However need a sync
984 * with accessing the vma as part of mlx4_ib_disassociate_ucontext.
985 * The close operation is usually called under mm->mmap_sem except when
986 * process is exiting. The exiting case is handled explicitly as part
987 * of mlx4_ib_disassociate_ucontext.
988 */
989 mlx4_ib_vma_priv_data = (struct mlx4_ib_vma_private_data *)
990 area->vm_private_data;
991
992 /* set the vma context pointer to null in the mlx4_ib driver's private
993 * data to protect against a race condition in mlx4_ib_dissassociate_ucontext().
994 */
995 mlx4_ib_vma_priv_data->vma = NULL;
996 }
997
998 static const struct vm_operations_struct mlx4_ib_vm_ops = {
999 .open = mlx4_ib_vma_open,
1000 .close = mlx4_ib_vma_close
1001 };
1002
1003 static void mlx4_ib_disassociate_ucontext(struct ib_ucontext *ibcontext)
1004 {
1005 int i;
1006 int ret = 0;
1007 struct vm_area_struct *vma;
1008 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext);
1009 struct task_struct *owning_process = NULL;
1010 struct mm_struct *owning_mm = NULL;
1011
1012 owning_process = get_pid_task(ibcontext->tgid, PIDTYPE_PID);
1013 if (!owning_process)
1014 return;
1015
1016 owning_mm = get_task_mm(owning_process);
1017 if (!owning_mm) {
1018 pr_info("no mm, disassociate ucontext is pending task termination\n");
1019 while (1) {
1020 /* make sure that task is dead before returning, it may
1021 * prevent a rare case of module down in parallel to a
1022 * call to mlx4_ib_vma_close.
1023 */
1024 put_task_struct(owning_process);
1025 msleep(1);
1026 owning_process = get_pid_task(ibcontext->tgid,
1027 PIDTYPE_PID);
1028 if (!owning_process ||
1029 owning_process->state == TASK_DEAD) {
1030 pr_info("disassociate ucontext done, task was terminated\n");
1031 /* in case task was dead need to release the task struct */
1032 if (owning_process)
1033 put_task_struct(owning_process);
1034 return;
1035 }
1036 }
1037 }
1038
1039 /* need to protect from a race on closing the vma as part of
1040 * mlx4_ib_vma_close().
1041 */
1042 down_read(&owning_mm->mmap_sem);
1043 for (i = 0; i < HW_BAR_COUNT; i++) {
1044 vma = context->hw_bar_info[i].vma;
1045 if (!vma)
1046 continue;
1047
1048 ret = zap_vma_ptes(context->hw_bar_info[i].vma,
1049 context->hw_bar_info[i].vma->vm_start,
1050 PAGE_SIZE);
1051 if (ret) {
1052 pr_err("Error: zap_vma_ptes failed for index=%d, ret=%d\n", i, ret);
1053 BUG_ON(1);
1054 }
1055
1056 /* context going to be destroyed, should not access ops any more */
1057 context->hw_bar_info[i].vma->vm_ops = NULL;
1058 }
1059
1060 up_read(&owning_mm->mmap_sem);
1061 mmput(owning_mm);
1062 put_task_struct(owning_process);
1063 }
1064
1065 static void mlx4_ib_set_vma_data(struct vm_area_struct *vma,
1066 struct mlx4_ib_vma_private_data *vma_private_data)
1067 {
1068 vma_private_data->vma = vma;
1069 vma->vm_private_data = vma_private_data;
1070 vma->vm_ops = &mlx4_ib_vm_ops;
1071 }
1072
1073 static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
1074 {
1075 struct mlx4_ib_dev *dev = to_mdev(context->device);
1076 struct mlx4_ib_ucontext *mucontext = to_mucontext(context);
1077
1078 if (vma->vm_end - vma->vm_start != PAGE_SIZE)
1079 return -EINVAL;
1080
1081 if (vma->vm_pgoff == 0) {
1082 /* We prevent double mmaping on same context */
1083 if (mucontext->hw_bar_info[HW_BAR_DB].vma)
1084 return -EINVAL;
1085
1086 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
1087
1088 if (io_remap_pfn_range(vma, vma->vm_start,
1089 to_mucontext(context)->uar.pfn,
1090 PAGE_SIZE, vma->vm_page_prot))
1091 return -EAGAIN;
1092
1093 mlx4_ib_set_vma_data(vma, &mucontext->hw_bar_info[HW_BAR_DB]);
1094
1095 } else if (vma->vm_pgoff == 1 && dev->dev->caps.bf_reg_size != 0) {
1096 /* We prevent double mmaping on same context */
1097 if (mucontext->hw_bar_info[HW_BAR_BF].vma)
1098 return -EINVAL;
1099
1100 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
1101
1102 if (io_remap_pfn_range(vma, vma->vm_start,
1103 to_mucontext(context)->uar.pfn +
1104 dev->dev->caps.num_uars,
1105 PAGE_SIZE, vma->vm_page_prot))
1106 return -EAGAIN;
1107
1108 mlx4_ib_set_vma_data(vma, &mucontext->hw_bar_info[HW_BAR_BF]);
1109
1110 } else if (vma->vm_pgoff == 3) {
1111 struct mlx4_clock_params params;
1112 int ret;
1113
1114 /* We prevent double mmaping on same context */
1115 if (mucontext->hw_bar_info[HW_BAR_CLOCK].vma)
1116 return -EINVAL;
1117
1118 ret = mlx4_get_internal_clock_params(dev->dev, &params);
1119
1120 if (ret)
1121 return ret;
1122
1123 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
1124 if (io_remap_pfn_range(vma, vma->vm_start,
1125 (pci_resource_start(dev->dev->persist->pdev,
1126 params.bar) +
1127 params.offset)
1128 >> PAGE_SHIFT,
1129 PAGE_SIZE, vma->vm_page_prot))
1130 return -EAGAIN;
1131
1132 mlx4_ib_set_vma_data(vma,
1133 &mucontext->hw_bar_info[HW_BAR_CLOCK]);
1134 } else {
1135 return -EINVAL;
1136 }
1137
1138 return 0;
1139 }
1140
1141 static struct ib_pd *mlx4_ib_alloc_pd(struct ib_device *ibdev,
1142 struct ib_ucontext *context,
1143 struct ib_udata *udata)
1144 {
1145 struct mlx4_ib_pd *pd;
1146 int err;
1147
1148 pd = kmalloc(sizeof *pd, GFP_KERNEL);
1149 if (!pd)
1150 return ERR_PTR(-ENOMEM);
1151
1152 err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn);
1153 if (err) {
1154 kfree(pd);
1155 return ERR_PTR(err);
1156 }
1157
1158 if (context)
1159 if (ib_copy_to_udata(udata, &pd->pdn, sizeof (__u32))) {
1160 mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn);
1161 kfree(pd);
1162 return ERR_PTR(-EFAULT);
1163 }
1164
1165 return &pd->ibpd;
1166 }
1167
1168 static int mlx4_ib_dealloc_pd(struct ib_pd *pd)
1169 {
1170 mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn);
1171 kfree(pd);
1172
1173 return 0;
1174 }
1175
1176 static struct ib_xrcd *mlx4_ib_alloc_xrcd(struct ib_device *ibdev,
1177 struct ib_ucontext *context,
1178 struct ib_udata *udata)
1179 {
1180 struct mlx4_ib_xrcd *xrcd;
1181 struct ib_cq_init_attr cq_attr = {};
1182 int err;
1183
1184 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC))
1185 return ERR_PTR(-ENOSYS);
1186
1187 xrcd = kmalloc(sizeof *xrcd, GFP_KERNEL);
1188 if (!xrcd)
1189 return ERR_PTR(-ENOMEM);
1190
1191 err = mlx4_xrcd_alloc(to_mdev(ibdev)->dev, &xrcd->xrcdn);
1192 if (err)
1193 goto err1;
1194
1195 xrcd->pd = ib_alloc_pd(ibdev);
1196 if (IS_ERR(xrcd->pd)) {
1197 err = PTR_ERR(xrcd->pd);
1198 goto err2;
1199 }
1200
1201 cq_attr.cqe = 1;
1202 xrcd->cq = ib_create_cq(ibdev, NULL, NULL, xrcd, &cq_attr);
1203 if (IS_ERR(xrcd->cq)) {
1204 err = PTR_ERR(xrcd->cq);
1205 goto err3;
1206 }
1207
1208 return &xrcd->ibxrcd;
1209
1210 err3:
1211 ib_dealloc_pd(xrcd->pd);
1212 err2:
1213 mlx4_xrcd_free(to_mdev(ibdev)->dev, xrcd->xrcdn);
1214 err1:
1215 kfree(xrcd);
1216 return ERR_PTR(err);
1217 }
1218
1219 static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd)
1220 {
1221 ib_destroy_cq(to_mxrcd(xrcd)->cq);
1222 ib_dealloc_pd(to_mxrcd(xrcd)->pd);
1223 mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn);
1224 kfree(xrcd);
1225
1226 return 0;
1227 }
1228
1229 static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid)
1230 {
1231 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1232 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1233 struct mlx4_ib_gid_entry *ge;
1234
1235 ge = kzalloc(sizeof *ge, GFP_KERNEL);
1236 if (!ge)
1237 return -ENOMEM;
1238
1239 ge->gid = *gid;
1240 if (mlx4_ib_add_mc(mdev, mqp, gid)) {
1241 ge->port = mqp->port;
1242 ge->added = 1;
1243 }
1244
1245 mutex_lock(&mqp->mutex);
1246 list_add_tail(&ge->list, &mqp->gid_list);
1247 mutex_unlock(&mqp->mutex);
1248
1249 return 0;
1250 }
1251
1252 static void mlx4_ib_delete_counters_table(struct mlx4_ib_dev *ibdev,
1253 struct mlx4_ib_counters *ctr_table)
1254 {
1255 struct counter_index *counter, *tmp_count;
1256
1257 mutex_lock(&ctr_table->mutex);
1258 list_for_each_entry_safe(counter, tmp_count, &ctr_table->counters_list,
1259 list) {
1260 if (counter->allocated)
1261 mlx4_counter_free(ibdev->dev, counter->index);
1262 list_del(&counter->list);
1263 kfree(counter);
1264 }
1265 mutex_unlock(&ctr_table->mutex);
1266 }
1267
1268 int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
1269 union ib_gid *gid)
1270 {
1271 struct net_device *ndev;
1272 int ret = 0;
1273
1274 if (!mqp->port)
1275 return 0;
1276
1277 spin_lock_bh(&mdev->iboe.lock);
1278 ndev = mdev->iboe.netdevs[mqp->port - 1];
1279 if (ndev)
1280 dev_hold(ndev);
1281 spin_unlock_bh(&mdev->iboe.lock);
1282
1283 if (ndev) {
1284 ret = 1;
1285 dev_put(ndev);
1286 }
1287
1288 return ret;
1289 }
1290
1291 struct mlx4_ib_steering {
1292 struct list_head list;
1293 struct mlx4_flow_reg_id reg_id;
1294 union ib_gid gid;
1295 };
1296
1297 static int parse_flow_attr(struct mlx4_dev *dev,
1298 u32 qp_num,
1299 union ib_flow_spec *ib_spec,
1300 struct _rule_hw *mlx4_spec)
1301 {
1302 enum mlx4_net_trans_rule_id type;
1303
1304 switch (ib_spec->type) {
1305 case IB_FLOW_SPEC_ETH:
1306 type = MLX4_NET_TRANS_RULE_ID_ETH;
1307 memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac,
1308 ETH_ALEN);
1309 memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac,
1310 ETH_ALEN);
1311 mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag;
1312 mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag;
1313 break;
1314 case IB_FLOW_SPEC_IB:
1315 type = MLX4_NET_TRANS_RULE_ID_IB;
1316 mlx4_spec->ib.l3_qpn =
1317 cpu_to_be32(qp_num);
1318 mlx4_spec->ib.qpn_mask =
1319 cpu_to_be32(MLX4_IB_FLOW_QPN_MASK);
1320 break;
1321
1322
1323 case IB_FLOW_SPEC_IPV4:
1324 type = MLX4_NET_TRANS_RULE_ID_IPV4;
1325 mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip;
1326 mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip;
1327 mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip;
1328 mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip;
1329 break;
1330
1331 case IB_FLOW_SPEC_TCP:
1332 case IB_FLOW_SPEC_UDP:
1333 type = ib_spec->type == IB_FLOW_SPEC_TCP ?
1334 MLX4_NET_TRANS_RULE_ID_TCP :
1335 MLX4_NET_TRANS_RULE_ID_UDP;
1336 mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port;
1337 mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port;
1338 mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port;
1339 mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port;
1340 break;
1341
1342 default:
1343 return -EINVAL;
1344 }
1345 if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 ||
1346 mlx4_hw_rule_sz(dev, type) < 0)
1347 return -EINVAL;
1348 mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type));
1349 mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2;
1350 return mlx4_hw_rule_sz(dev, type);
1351 }
1352
1353 struct default_rules {
1354 __u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
1355 __u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
1356 __u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS];
1357 __u8 link_layer;
1358 };
1359 static const struct default_rules default_table[] = {
1360 {
1361 .mandatory_fields = {IB_FLOW_SPEC_IPV4},
1362 .mandatory_not_fields = {IB_FLOW_SPEC_ETH},
1363 .rules_create_list = {IB_FLOW_SPEC_IB},
1364 .link_layer = IB_LINK_LAYER_INFINIBAND
1365 }
1366 };
1367
1368 static int __mlx4_ib_default_rules_match(struct ib_qp *qp,
1369 struct ib_flow_attr *flow_attr)
1370 {
1371 int i, j, k;
1372 void *ib_flow;
1373 const struct default_rules *pdefault_rules = default_table;
1374 u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port);
1375
1376 for (i = 0; i < ARRAY_SIZE(default_table); i++, pdefault_rules++) {
1377 __u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS];
1378 memset(&field_types, 0, sizeof(field_types));
1379
1380 if (link_layer != pdefault_rules->link_layer)
1381 continue;
1382
1383 ib_flow = flow_attr + 1;
1384 /* we assume the specs are sorted */
1385 for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS &&
1386 j < flow_attr->num_of_specs; k++) {
1387 union ib_flow_spec *current_flow =
1388 (union ib_flow_spec *)ib_flow;
1389
1390 /* same layer but different type */
1391 if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) ==
1392 (pdefault_rules->mandatory_fields[k] &
1393 IB_FLOW_SPEC_LAYER_MASK)) &&
1394 (current_flow->type !=
1395 pdefault_rules->mandatory_fields[k]))
1396 goto out;
1397
1398 /* same layer, try match next one */
1399 if (current_flow->type ==
1400 pdefault_rules->mandatory_fields[k]) {
1401 j++;
1402 ib_flow +=
1403 ((union ib_flow_spec *)ib_flow)->size;
1404 }
1405 }
1406
1407 ib_flow = flow_attr + 1;
1408 for (j = 0; j < flow_attr->num_of_specs;
1409 j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size)
1410 for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++)
1411 /* same layer and same type */
1412 if (((union ib_flow_spec *)ib_flow)->type ==
1413 pdefault_rules->mandatory_not_fields[k])
1414 goto out;
1415
1416 return i;
1417 }
1418 out:
1419 return -1;
1420 }
1421
1422 static int __mlx4_ib_create_default_rules(
1423 struct mlx4_ib_dev *mdev,
1424 struct ib_qp *qp,
1425 const struct default_rules *pdefault_rules,
1426 struct _rule_hw *mlx4_spec) {
1427 int size = 0;
1428 int i;
1429
1430 for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) {
1431 int ret;
1432 union ib_flow_spec ib_spec;
1433 switch (pdefault_rules->rules_create_list[i]) {
1434 case 0:
1435 /* no rule */
1436 continue;
1437 case IB_FLOW_SPEC_IB:
1438 ib_spec.type = IB_FLOW_SPEC_IB;
1439 ib_spec.size = sizeof(struct ib_flow_spec_ib);
1440
1441 break;
1442 default:
1443 /* invalid rule */
1444 return -EINVAL;
1445 }
1446 /* We must put empty rule, qpn is being ignored */
1447 ret = parse_flow_attr(mdev->dev, 0, &ib_spec,
1448 mlx4_spec);
1449 if (ret < 0) {
1450 pr_info("invalid parsing\n");
1451 return -EINVAL;
1452 }
1453
1454 mlx4_spec = (void *)mlx4_spec + ret;
1455 size += ret;
1456 }
1457 return size;
1458 }
1459
1460 static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1461 int domain,
1462 enum mlx4_net_trans_promisc_mode flow_type,
1463 u64 *reg_id)
1464 {
1465 int ret, i;
1466 int size = 0;
1467 void *ib_flow;
1468 struct mlx4_ib_dev *mdev = to_mdev(qp->device);
1469 struct mlx4_cmd_mailbox *mailbox;
1470 struct mlx4_net_trans_rule_hw_ctrl *ctrl;
1471 int default_flow;
1472
1473 static const u16 __mlx4_domain[] = {
1474 [IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS,
1475 [IB_FLOW_DOMAIN_ETHTOOL] = MLX4_DOMAIN_ETHTOOL,
1476 [IB_FLOW_DOMAIN_RFS] = MLX4_DOMAIN_RFS,
1477 [IB_FLOW_DOMAIN_NIC] = MLX4_DOMAIN_NIC,
1478 };
1479
1480 if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) {
1481 pr_err("Invalid priority value %d\n", flow_attr->priority);
1482 return -EINVAL;
1483 }
1484
1485 if (domain >= IB_FLOW_DOMAIN_NUM) {
1486 pr_err("Invalid domain value %d\n", domain);
1487 return -EINVAL;
1488 }
1489
1490 if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0)
1491 return -EINVAL;
1492
1493 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
1494 if (IS_ERR(mailbox))
1495 return PTR_ERR(mailbox);
1496 ctrl = mailbox->buf;
1497
1498 ctrl->prio = cpu_to_be16(__mlx4_domain[domain] |
1499 flow_attr->priority);
1500 ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type);
1501 ctrl->port = flow_attr->port;
1502 ctrl->qpn = cpu_to_be32(qp->qp_num);
1503
1504 ib_flow = flow_attr + 1;
1505 size += sizeof(struct mlx4_net_trans_rule_hw_ctrl);
1506 /* Add default flows */
1507 default_flow = __mlx4_ib_default_rules_match(qp, flow_attr);
1508 if (default_flow >= 0) {
1509 ret = __mlx4_ib_create_default_rules(
1510 mdev, qp, default_table + default_flow,
1511 mailbox->buf + size);
1512 if (ret < 0) {
1513 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1514 return -EINVAL;
1515 }
1516 size += ret;
1517 }
1518 for (i = 0; i < flow_attr->num_of_specs; i++) {
1519 ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow,
1520 mailbox->buf + size);
1521 if (ret < 0) {
1522 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1523 return -EINVAL;
1524 }
1525 ib_flow += ((union ib_flow_spec *) ib_flow)->size;
1526 size += ret;
1527 }
1528
1529 ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0,
1530 MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A,
1531 MLX4_CMD_WRAPPED);
1532 if (ret == -ENOMEM)
1533 pr_err("mcg table is full. Fail to register network rule.\n");
1534 else if (ret == -ENXIO)
1535 pr_err("Device managed flow steering is disabled. Fail to register network rule.\n");
1536 else if (ret)
1537 pr_err("Invalid argumant. Fail to register network rule.\n");
1538
1539 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1540 return ret;
1541 }
1542
1543 static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id)
1544 {
1545 int err;
1546 err = mlx4_cmd(dev, reg_id, 0, 0,
1547 MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A,
1548 MLX4_CMD_WRAPPED);
1549 if (err)
1550 pr_err("Fail to detach network rule. registration id = 0x%llx\n",
1551 reg_id);
1552 return err;
1553 }
1554
1555 static int mlx4_ib_tunnel_steer_add(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1556 u64 *reg_id)
1557 {
1558 void *ib_flow;
1559 union ib_flow_spec *ib_spec;
1560 struct mlx4_dev *dev = to_mdev(qp->device)->dev;
1561 int err = 0;
1562
1563 if (dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN ||
1564 dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC)
1565 return 0; /* do nothing */
1566
1567 ib_flow = flow_attr + 1;
1568 ib_spec = (union ib_flow_spec *)ib_flow;
1569
1570 if (ib_spec->type != IB_FLOW_SPEC_ETH || flow_attr->num_of_specs != 1)
1571 return 0; /* do nothing */
1572
1573 err = mlx4_tunnel_steer_add(to_mdev(qp->device)->dev, ib_spec->eth.val.dst_mac,
1574 flow_attr->port, qp->qp_num,
1575 MLX4_DOMAIN_UVERBS | (flow_attr->priority & 0xff),
1576 reg_id);
1577 return err;
1578 }
1579
1580 static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp,
1581 struct ib_flow_attr *flow_attr,
1582 int domain)
1583 {
1584 int err = 0, i = 0, j = 0;
1585 struct mlx4_ib_flow *mflow;
1586 enum mlx4_net_trans_promisc_mode type[2];
1587 struct mlx4_dev *dev = (to_mdev(qp->device))->dev;
1588 int is_bonded = mlx4_is_bonded(dev);
1589
1590 memset(type, 0, sizeof(type));
1591
1592 mflow = kzalloc(sizeof(*mflow), GFP_KERNEL);
1593 if (!mflow) {
1594 err = -ENOMEM;
1595 goto err_free;
1596 }
1597
1598 switch (flow_attr->type) {
1599 case IB_FLOW_ATTR_NORMAL:
1600 type[0] = MLX4_FS_REGULAR;
1601 break;
1602
1603 case IB_FLOW_ATTR_ALL_DEFAULT:
1604 type[0] = MLX4_FS_ALL_DEFAULT;
1605 break;
1606
1607 case IB_FLOW_ATTR_MC_DEFAULT:
1608 type[0] = MLX4_FS_MC_DEFAULT;
1609 break;
1610
1611 case IB_FLOW_ATTR_SNIFFER:
1612 type[0] = MLX4_FS_UC_SNIFFER;
1613 type[1] = MLX4_FS_MC_SNIFFER;
1614 break;
1615
1616 default:
1617 err = -EINVAL;
1618 goto err_free;
1619 }
1620
1621 while (i < ARRAY_SIZE(type) && type[i]) {
1622 err = __mlx4_ib_create_flow(qp, flow_attr, domain, type[i],
1623 &mflow->reg_id[i].id);
1624 if (err)
1625 goto err_create_flow;
1626 if (is_bonded) {
1627 /* Application always sees one port so the mirror rule
1628 * must be on port #2
1629 */
1630 flow_attr->port = 2;
1631 err = __mlx4_ib_create_flow(qp, flow_attr,
1632 domain, type[j],
1633 &mflow->reg_id[j].mirror);
1634 flow_attr->port = 1;
1635 if (err)
1636 goto err_create_flow;
1637 j++;
1638 }
1639
1640 i++;
1641 }
1642
1643 if (i < ARRAY_SIZE(type) && flow_attr->type == IB_FLOW_ATTR_NORMAL) {
1644 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1645 &mflow->reg_id[i].id);
1646 if (err)
1647 goto err_create_flow;
1648
1649 if (is_bonded) {
1650 flow_attr->port = 2;
1651 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1652 &mflow->reg_id[j].mirror);
1653 flow_attr->port = 1;
1654 if (err)
1655 goto err_create_flow;
1656 j++;
1657 }
1658 /* function to create mirror rule */
1659 i++;
1660 }
1661
1662 return &mflow->ibflow;
1663
1664 err_create_flow:
1665 while (i) {
1666 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1667 mflow->reg_id[i].id);
1668 i--;
1669 }
1670
1671 while (j) {
1672 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1673 mflow->reg_id[j].mirror);
1674 j--;
1675 }
1676 err_free:
1677 kfree(mflow);
1678 return ERR_PTR(err);
1679 }
1680
1681 static int mlx4_ib_destroy_flow(struct ib_flow *flow_id)
1682 {
1683 int err, ret = 0;
1684 int i = 0;
1685 struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device);
1686 struct mlx4_ib_flow *mflow = to_mflow(flow_id);
1687
1688 while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i].id) {
1689 err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i].id);
1690 if (err)
1691 ret = err;
1692 if (mflow->reg_id[i].mirror) {
1693 err = __mlx4_ib_destroy_flow(mdev->dev,
1694 mflow->reg_id[i].mirror);
1695 if (err)
1696 ret = err;
1697 }
1698 i++;
1699 }
1700
1701 kfree(mflow);
1702 return ret;
1703 }
1704
1705 static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1706 {
1707 int err;
1708 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1709 struct mlx4_dev *dev = mdev->dev;
1710 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1711 struct mlx4_ib_steering *ib_steering = NULL;
1712 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
1713 struct mlx4_flow_reg_id reg_id;
1714
1715 if (mdev->dev->caps.steering_mode ==
1716 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1717 ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL);
1718 if (!ib_steering)
1719 return -ENOMEM;
1720 }
1721
1722 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port,
1723 !!(mqp->flags &
1724 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
1725 prot, &reg_id.id);
1726 if (err) {
1727 pr_err("multicast attach op failed, err %d\n", err);
1728 goto err_malloc;
1729 }
1730
1731 reg_id.mirror = 0;
1732 if (mlx4_is_bonded(dev)) {
1733 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw,
1734 (mqp->port == 1) ? 2 : 1,
1735 !!(mqp->flags &
1736 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
1737 prot, &reg_id.mirror);
1738 if (err)
1739 goto err_add;
1740 }
1741
1742 err = add_gid_entry(ibqp, gid);
1743 if (err)
1744 goto err_add;
1745
1746 if (ib_steering) {
1747 memcpy(ib_steering->gid.raw, gid->raw, 16);
1748 ib_steering->reg_id = reg_id;
1749 mutex_lock(&mqp->mutex);
1750 list_add(&ib_steering->list, &mqp->steering_rules);
1751 mutex_unlock(&mqp->mutex);
1752 }
1753 return 0;
1754
1755 err_add:
1756 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1757 prot, reg_id.id);
1758 if (reg_id.mirror)
1759 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1760 prot, reg_id.mirror);
1761 err_malloc:
1762 kfree(ib_steering);
1763
1764 return err;
1765 }
1766
1767 static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw)
1768 {
1769 struct mlx4_ib_gid_entry *ge;
1770 struct mlx4_ib_gid_entry *tmp;
1771 struct mlx4_ib_gid_entry *ret = NULL;
1772
1773 list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) {
1774 if (!memcmp(raw, ge->gid.raw, 16)) {
1775 ret = ge;
1776 break;
1777 }
1778 }
1779
1780 return ret;
1781 }
1782
1783 static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1784 {
1785 int err;
1786 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1787 struct mlx4_dev *dev = mdev->dev;
1788 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1789 struct net_device *ndev;
1790 struct mlx4_ib_gid_entry *ge;
1791 struct mlx4_flow_reg_id reg_id = {0, 0};
1792 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
1793
1794 if (mdev->dev->caps.steering_mode ==
1795 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1796 struct mlx4_ib_steering *ib_steering;
1797
1798 mutex_lock(&mqp->mutex);
1799 list_for_each_entry(ib_steering, &mqp->steering_rules, list) {
1800 if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) {
1801 list_del(&ib_steering->list);
1802 break;
1803 }
1804 }
1805 mutex_unlock(&mqp->mutex);
1806 if (&ib_steering->list == &mqp->steering_rules) {
1807 pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n");
1808 return -EINVAL;
1809 }
1810 reg_id = ib_steering->reg_id;
1811 kfree(ib_steering);
1812 }
1813
1814 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1815 prot, reg_id.id);
1816 if (err)
1817 return err;
1818
1819 if (mlx4_is_bonded(dev)) {
1820 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1821 prot, reg_id.mirror);
1822 if (err)
1823 return err;
1824 }
1825
1826 mutex_lock(&mqp->mutex);
1827 ge = find_gid_entry(mqp, gid->raw);
1828 if (ge) {
1829 spin_lock_bh(&mdev->iboe.lock);
1830 ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL;
1831 if (ndev)
1832 dev_hold(ndev);
1833 spin_unlock_bh(&mdev->iboe.lock);
1834 if (ndev)
1835 dev_put(ndev);
1836 list_del(&ge->list);
1837 kfree(ge);
1838 } else
1839 pr_warn("could not find mgid entry\n");
1840
1841 mutex_unlock(&mqp->mutex);
1842
1843 return 0;
1844 }
1845
1846 static int init_node_data(struct mlx4_ib_dev *dev)
1847 {
1848 struct ib_smp *in_mad = NULL;
1849 struct ib_smp *out_mad = NULL;
1850 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
1851 int err = -ENOMEM;
1852
1853 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
1854 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
1855 if (!in_mad || !out_mad)
1856 goto out;
1857
1858 init_query_mad(in_mad);
1859 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
1860 if (mlx4_is_master(dev->dev))
1861 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
1862
1863 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
1864 if (err)
1865 goto out;
1866
1867 memcpy(dev->ib_dev.node_desc, out_mad->data, 64);
1868
1869 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
1870
1871 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
1872 if (err)
1873 goto out;
1874
1875 dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32));
1876 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
1877
1878 out:
1879 kfree(in_mad);
1880 kfree(out_mad);
1881 return err;
1882 }
1883
1884 static ssize_t show_hca(struct device *device, struct device_attribute *attr,
1885 char *buf)
1886 {
1887 struct mlx4_ib_dev *dev =
1888 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
1889 return sprintf(buf, "MT%d\n", dev->dev->persist->pdev->device);
1890 }
1891
1892 static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr,
1893 char *buf)
1894 {
1895 struct mlx4_ib_dev *dev =
1896 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
1897 return sprintf(buf, "%d.%d.%d\n", (int) (dev->dev->caps.fw_ver >> 32),
1898 (int) (dev->dev->caps.fw_ver >> 16) & 0xffff,
1899 (int) dev->dev->caps.fw_ver & 0xffff);
1900 }
1901
1902 static ssize_t show_rev(struct device *device, struct device_attribute *attr,
1903 char *buf)
1904 {
1905 struct mlx4_ib_dev *dev =
1906 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
1907 return sprintf(buf, "%x\n", dev->dev->rev_id);
1908 }
1909
1910 static ssize_t show_board(struct device *device, struct device_attribute *attr,
1911 char *buf)
1912 {
1913 struct mlx4_ib_dev *dev =
1914 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
1915 return sprintf(buf, "%.*s\n", MLX4_BOARD_ID_LEN,
1916 dev->dev->board_id);
1917 }
1918
1919 static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
1920 static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
1921 static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
1922 static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
1923
1924 static struct device_attribute *mlx4_class_attributes[] = {
1925 &dev_attr_hw_rev,
1926 &dev_attr_fw_ver,
1927 &dev_attr_hca_type,
1928 &dev_attr_board_id
1929 };
1930
1931 #define MLX4_IB_INVALID_MAC ((u64)-1)
1932 static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev,
1933 struct net_device *dev,
1934 int port)
1935 {
1936 u64 new_smac = 0;
1937 u64 release_mac = MLX4_IB_INVALID_MAC;
1938 struct mlx4_ib_qp *qp;
1939
1940 read_lock(&dev_base_lock);
1941 new_smac = mlx4_mac_to_u64(dev->dev_addr);
1942 read_unlock(&dev_base_lock);
1943
1944 atomic64_set(&ibdev->iboe.mac[port - 1], new_smac);
1945
1946 /* no need for update QP1 and mac registration in non-SRIOV */
1947 if (!mlx4_is_mfunc(ibdev->dev))
1948 return;
1949
1950 mutex_lock(&ibdev->qp1_proxy_lock[port - 1]);
1951 qp = ibdev->qp1_proxy[port - 1];
1952 if (qp) {
1953 int new_smac_index;
1954 u64 old_smac;
1955 struct mlx4_update_qp_params update_params;
1956
1957 mutex_lock(&qp->mutex);
1958 old_smac = qp->pri.smac;
1959 if (new_smac == old_smac)
1960 goto unlock;
1961
1962 new_smac_index = mlx4_register_mac(ibdev->dev, port, new_smac);
1963
1964 if (new_smac_index < 0)
1965 goto unlock;
1966
1967 update_params.smac_index = new_smac_index;
1968 if (mlx4_update_qp(ibdev->dev, qp->mqp.qpn, MLX4_UPDATE_QP_SMAC,
1969 &update_params)) {
1970 release_mac = new_smac;
1971 goto unlock;
1972 }
1973 /* if old port was zero, no mac was yet registered for this QP */
1974 if (qp->pri.smac_port)
1975 release_mac = old_smac;
1976 qp->pri.smac = new_smac;
1977 qp->pri.smac_port = port;
1978 qp->pri.smac_index = new_smac_index;
1979 }
1980
1981 unlock:
1982 if (release_mac != MLX4_IB_INVALID_MAC)
1983 mlx4_unregister_mac(ibdev->dev, port, release_mac);
1984 if (qp)
1985 mutex_unlock(&qp->mutex);
1986 mutex_unlock(&ibdev->qp1_proxy_lock[port - 1]);
1987 }
1988
1989 static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev,
1990 struct net_device *dev,
1991 unsigned long event)
1992
1993 {
1994 struct mlx4_ib_iboe *iboe;
1995 int update_qps_port = -1;
1996 int port;
1997
1998 ASSERT_RTNL();
1999
2000 iboe = &ibdev->iboe;
2001
2002 spin_lock_bh(&iboe->lock);
2003 mlx4_foreach_ib_transport_port(port, ibdev->dev) {
2004
2005 iboe->netdevs[port - 1] =
2006 mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port);
2007
2008 if (dev == iboe->netdevs[port - 1] &&
2009 (event == NETDEV_CHANGEADDR || event == NETDEV_REGISTER ||
2010 event == NETDEV_UP || event == NETDEV_CHANGE))
2011 update_qps_port = port;
2012
2013 }
2014 spin_unlock_bh(&iboe->lock);
2015
2016 if (update_qps_port > 0)
2017 mlx4_ib_update_qps(ibdev, dev, update_qps_port);
2018 }
2019
2020 static int mlx4_ib_netdev_event(struct notifier_block *this,
2021 unsigned long event, void *ptr)
2022 {
2023 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
2024 struct mlx4_ib_dev *ibdev;
2025
2026 if (!net_eq(dev_net(dev), &init_net))
2027 return NOTIFY_DONE;
2028
2029 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb);
2030 mlx4_ib_scan_netdevs(ibdev, dev, event);
2031
2032 return NOTIFY_DONE;
2033 }
2034
2035 static void init_pkeys(struct mlx4_ib_dev *ibdev)
2036 {
2037 int port;
2038 int slave;
2039 int i;
2040
2041 if (mlx4_is_master(ibdev->dev)) {
2042 for (slave = 0; slave <= ibdev->dev->persist->num_vfs;
2043 ++slave) {
2044 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2045 for (i = 0;
2046 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2047 ++i) {
2048 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] =
2049 /* master has the identity virt2phys pkey mapping */
2050 (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i :
2051 ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1;
2052 mlx4_sync_pkey_table(ibdev->dev, slave, port, i,
2053 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]);
2054 }
2055 }
2056 }
2057 /* initialize pkey cache */
2058 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2059 for (i = 0;
2060 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2061 ++i)
2062 ibdev->pkeys.phys_pkey_cache[port-1][i] =
2063 (i) ? 0 : 0xFFFF;
2064 }
2065 }
2066 }
2067
2068 static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2069 {
2070 int i, j, eq = 0, total_eqs = 0;
2071
2072 ibdev->eq_table = kcalloc(dev->caps.num_comp_vectors,
2073 sizeof(ibdev->eq_table[0]), GFP_KERNEL);
2074 if (!ibdev->eq_table)
2075 return;
2076
2077 for (i = 1; i <= dev->caps.num_ports; i++) {
2078 for (j = 0; j < mlx4_get_eqs_per_port(dev, i);
2079 j++, total_eqs++) {
2080 if (i > 1 && mlx4_is_eq_shared(dev, total_eqs))
2081 continue;
2082 ibdev->eq_table[eq] = total_eqs;
2083 if (!mlx4_assign_eq(dev, i,
2084 &ibdev->eq_table[eq]))
2085 eq++;
2086 else
2087 ibdev->eq_table[eq] = -1;
2088 }
2089 }
2090
2091 for (i = eq; i < dev->caps.num_comp_vectors;
2092 ibdev->eq_table[i++] = -1)
2093 ;
2094
2095 /* Advertise the new number of EQs to clients */
2096 ibdev->ib_dev.num_comp_vectors = eq;
2097 }
2098
2099 static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2100 {
2101 int i;
2102 int total_eqs = ibdev->ib_dev.num_comp_vectors;
2103
2104 /* no eqs were allocated */
2105 if (!ibdev->eq_table)
2106 return;
2107
2108 /* Reset the advertised EQ number */
2109 ibdev->ib_dev.num_comp_vectors = 0;
2110
2111 for (i = 0; i < total_eqs; i++)
2112 mlx4_release_eq(dev, ibdev->eq_table[i]);
2113
2114 kfree(ibdev->eq_table);
2115 ibdev->eq_table = NULL;
2116 }
2117
2118 static int mlx4_port_immutable(struct ib_device *ibdev, u8 port_num,
2119 struct ib_port_immutable *immutable)
2120 {
2121 struct ib_port_attr attr;
2122 int err;
2123
2124 err = mlx4_ib_query_port(ibdev, port_num, &attr);
2125 if (err)
2126 return err;
2127
2128 immutable->pkey_tbl_len = attr.pkey_tbl_len;
2129 immutable->gid_tbl_len = attr.gid_tbl_len;
2130
2131 if (mlx4_ib_port_link_layer(ibdev, port_num) == IB_LINK_LAYER_INFINIBAND)
2132 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_IB;
2133 else
2134 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE;
2135
2136 immutable->max_mad_size = IB_MGMT_MAD_SIZE;
2137
2138 return 0;
2139 }
2140
2141 static void *mlx4_ib_add(struct mlx4_dev *dev)
2142 {
2143 struct mlx4_ib_dev *ibdev;
2144 int num_ports = 0;
2145 int i, j;
2146 int err;
2147 struct mlx4_ib_iboe *iboe;
2148 int ib_num_ports = 0;
2149 int num_req_counters;
2150 int allocated;
2151 u32 counter_index;
2152 struct counter_index *new_counter_index = NULL;
2153
2154 pr_info_once("%s", mlx4_ib_version);
2155
2156 num_ports = 0;
2157 mlx4_foreach_ib_transport_port(i, dev)
2158 num_ports++;
2159
2160 /* No point in registering a device with no ports... */
2161 if (num_ports == 0)
2162 return NULL;
2163
2164 ibdev = (struct mlx4_ib_dev *) ib_alloc_device(sizeof *ibdev);
2165 if (!ibdev) {
2166 dev_err(&dev->persist->pdev->dev,
2167 "Device struct alloc failed\n");
2168 return NULL;
2169 }
2170
2171 iboe = &ibdev->iboe;
2172
2173 if (mlx4_pd_alloc(dev, &ibdev->priv_pdn))
2174 goto err_dealloc;
2175
2176 if (mlx4_uar_alloc(dev, &ibdev->priv_uar))
2177 goto err_pd;
2178
2179 ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT,
2180 PAGE_SIZE);
2181 if (!ibdev->uar_map)
2182 goto err_uar;
2183 MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock);
2184
2185 ibdev->dev = dev;
2186 ibdev->bond_next_port = 0;
2187
2188 strlcpy(ibdev->ib_dev.name, "mlx4_%d", IB_DEVICE_NAME_MAX);
2189 ibdev->ib_dev.owner = THIS_MODULE;
2190 ibdev->ib_dev.node_type = RDMA_NODE_IB_CA;
2191 ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey;
2192 ibdev->num_ports = num_ports;
2193 ibdev->ib_dev.phys_port_cnt = mlx4_is_bonded(dev) ?
2194 1 : ibdev->num_ports;
2195 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
2196 ibdev->ib_dev.dma_device = &dev->persist->pdev->dev;
2197 ibdev->ib_dev.get_netdev = mlx4_ib_get_netdev;
2198 ibdev->ib_dev.add_gid = mlx4_ib_add_gid;
2199 ibdev->ib_dev.del_gid = mlx4_ib_del_gid;
2200
2201 if (dev->caps.userspace_caps)
2202 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION;
2203 else
2204 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION;
2205
2206 ibdev->ib_dev.uverbs_cmd_mask =
2207 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
2208 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
2209 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
2210 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
2211 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
2212 (1ull << IB_USER_VERBS_CMD_REG_MR) |
2213 (1ull << IB_USER_VERBS_CMD_REREG_MR) |
2214 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
2215 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
2216 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
2217 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
2218 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
2219 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
2220 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
2221 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
2222 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
2223 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
2224 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
2225 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
2226 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
2227 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
2228 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
2229 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) |
2230 (1ull << IB_USER_VERBS_CMD_OPEN_QP);
2231
2232 ibdev->ib_dev.query_device = mlx4_ib_query_device;
2233 ibdev->ib_dev.query_port = mlx4_ib_query_port;
2234 ibdev->ib_dev.get_link_layer = mlx4_ib_port_link_layer;
2235 ibdev->ib_dev.query_gid = mlx4_ib_query_gid;
2236 ibdev->ib_dev.query_pkey = mlx4_ib_query_pkey;
2237 ibdev->ib_dev.modify_device = mlx4_ib_modify_device;
2238 ibdev->ib_dev.modify_port = mlx4_ib_modify_port;
2239 ibdev->ib_dev.alloc_ucontext = mlx4_ib_alloc_ucontext;
2240 ibdev->ib_dev.dealloc_ucontext = mlx4_ib_dealloc_ucontext;
2241 ibdev->ib_dev.mmap = mlx4_ib_mmap;
2242 ibdev->ib_dev.alloc_pd = mlx4_ib_alloc_pd;
2243 ibdev->ib_dev.dealloc_pd = mlx4_ib_dealloc_pd;
2244 ibdev->ib_dev.create_ah = mlx4_ib_create_ah;
2245 ibdev->ib_dev.query_ah = mlx4_ib_query_ah;
2246 ibdev->ib_dev.destroy_ah = mlx4_ib_destroy_ah;
2247 ibdev->ib_dev.create_srq = mlx4_ib_create_srq;
2248 ibdev->ib_dev.modify_srq = mlx4_ib_modify_srq;
2249 ibdev->ib_dev.query_srq = mlx4_ib_query_srq;
2250 ibdev->ib_dev.destroy_srq = mlx4_ib_destroy_srq;
2251 ibdev->ib_dev.post_srq_recv = mlx4_ib_post_srq_recv;
2252 ibdev->ib_dev.create_qp = mlx4_ib_create_qp;
2253 ibdev->ib_dev.modify_qp = mlx4_ib_modify_qp;
2254 ibdev->ib_dev.query_qp = mlx4_ib_query_qp;
2255 ibdev->ib_dev.destroy_qp = mlx4_ib_destroy_qp;
2256 ibdev->ib_dev.post_send = mlx4_ib_post_send;
2257 ibdev->ib_dev.post_recv = mlx4_ib_post_recv;
2258 ibdev->ib_dev.create_cq = mlx4_ib_create_cq;
2259 ibdev->ib_dev.modify_cq = mlx4_ib_modify_cq;
2260 ibdev->ib_dev.resize_cq = mlx4_ib_resize_cq;
2261 ibdev->ib_dev.destroy_cq = mlx4_ib_destroy_cq;
2262 ibdev->ib_dev.poll_cq = mlx4_ib_poll_cq;
2263 ibdev->ib_dev.req_notify_cq = mlx4_ib_arm_cq;
2264 ibdev->ib_dev.get_dma_mr = mlx4_ib_get_dma_mr;
2265 ibdev->ib_dev.reg_user_mr = mlx4_ib_reg_user_mr;
2266 ibdev->ib_dev.rereg_user_mr = mlx4_ib_rereg_user_mr;
2267 ibdev->ib_dev.dereg_mr = mlx4_ib_dereg_mr;
2268 ibdev->ib_dev.alloc_mr = mlx4_ib_alloc_mr;
2269 ibdev->ib_dev.map_mr_sg = mlx4_ib_map_mr_sg;
2270 ibdev->ib_dev.attach_mcast = mlx4_ib_mcg_attach;
2271 ibdev->ib_dev.detach_mcast = mlx4_ib_mcg_detach;
2272 ibdev->ib_dev.process_mad = mlx4_ib_process_mad;
2273 ibdev->ib_dev.get_port_immutable = mlx4_port_immutable;
2274 ibdev->ib_dev.disassociate_ucontext = mlx4_ib_disassociate_ucontext;
2275
2276 if (!mlx4_is_slave(ibdev->dev)) {
2277 ibdev->ib_dev.alloc_fmr = mlx4_ib_fmr_alloc;
2278 ibdev->ib_dev.map_phys_fmr = mlx4_ib_map_phys_fmr;
2279 ibdev->ib_dev.unmap_fmr = mlx4_ib_unmap_fmr;
2280 ibdev->ib_dev.dealloc_fmr = mlx4_ib_fmr_dealloc;
2281 }
2282
2283 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW ||
2284 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
2285 ibdev->ib_dev.alloc_mw = mlx4_ib_alloc_mw;
2286 ibdev->ib_dev.bind_mw = mlx4_ib_bind_mw;
2287 ibdev->ib_dev.dealloc_mw = mlx4_ib_dealloc_mw;
2288
2289 ibdev->ib_dev.uverbs_cmd_mask |=
2290 (1ull << IB_USER_VERBS_CMD_ALLOC_MW) |
2291 (1ull << IB_USER_VERBS_CMD_DEALLOC_MW);
2292 }
2293
2294 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) {
2295 ibdev->ib_dev.alloc_xrcd = mlx4_ib_alloc_xrcd;
2296 ibdev->ib_dev.dealloc_xrcd = mlx4_ib_dealloc_xrcd;
2297 ibdev->ib_dev.uverbs_cmd_mask |=
2298 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) |
2299 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
2300 }
2301
2302 if (check_flow_steering_support(dev)) {
2303 ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED;
2304 ibdev->ib_dev.create_flow = mlx4_ib_create_flow;
2305 ibdev->ib_dev.destroy_flow = mlx4_ib_destroy_flow;
2306
2307 ibdev->ib_dev.uverbs_ex_cmd_mask |=
2308 (1ull << IB_USER_VERBS_EX_CMD_CREATE_FLOW) |
2309 (1ull << IB_USER_VERBS_EX_CMD_DESTROY_FLOW);
2310 }
2311
2312 ibdev->ib_dev.uverbs_ex_cmd_mask |=
2313 (1ull << IB_USER_VERBS_EX_CMD_QUERY_DEVICE) |
2314 (1ull << IB_USER_VERBS_EX_CMD_CREATE_CQ) |
2315 (1ull << IB_USER_VERBS_EX_CMD_CREATE_QP);
2316
2317 mlx4_ib_alloc_eqs(dev, ibdev);
2318
2319 spin_lock_init(&iboe->lock);
2320
2321 if (init_node_data(ibdev))
2322 goto err_map;
2323
2324 for (i = 0; i < ibdev->num_ports; ++i) {
2325 mutex_init(&ibdev->counters_table[i].mutex);
2326 INIT_LIST_HEAD(&ibdev->counters_table[i].counters_list);
2327 }
2328
2329 num_req_counters = mlx4_is_bonded(dev) ? 1 : ibdev->num_ports;
2330 for (i = 0; i < num_req_counters; ++i) {
2331 mutex_init(&ibdev->qp1_proxy_lock[i]);
2332 allocated = 0;
2333 if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) ==
2334 IB_LINK_LAYER_ETHERNET) {
2335 err = mlx4_counter_alloc(ibdev->dev, &counter_index);
2336 /* if failed to allocate a new counter, use default */
2337 if (err)
2338 counter_index =
2339 mlx4_get_default_counter_index(dev,
2340 i + 1);
2341 else
2342 allocated = 1;
2343 } else { /* IB_LINK_LAYER_INFINIBAND use the default counter */
2344 counter_index = mlx4_get_default_counter_index(dev,
2345 i + 1);
2346 }
2347 new_counter_index = kmalloc(sizeof(*new_counter_index),
2348 GFP_KERNEL);
2349 if (!new_counter_index) {
2350 if (allocated)
2351 mlx4_counter_free(ibdev->dev, counter_index);
2352 goto err_counter;
2353 }
2354 new_counter_index->index = counter_index;
2355 new_counter_index->allocated = allocated;
2356 list_add_tail(&new_counter_index->list,
2357 &ibdev->counters_table[i].counters_list);
2358 ibdev->counters_table[i].default_counter = counter_index;
2359 pr_info("counter index %d for port %d allocated %d\n",
2360 counter_index, i + 1, allocated);
2361 }
2362 if (mlx4_is_bonded(dev))
2363 for (i = 1; i < ibdev->num_ports ; ++i) {
2364 new_counter_index =
2365 kmalloc(sizeof(struct counter_index),
2366 GFP_KERNEL);
2367 if (!new_counter_index)
2368 goto err_counter;
2369 new_counter_index->index = counter_index;
2370 new_counter_index->allocated = 0;
2371 list_add_tail(&new_counter_index->list,
2372 &ibdev->counters_table[i].counters_list);
2373 ibdev->counters_table[i].default_counter =
2374 counter_index;
2375 }
2376
2377 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2378 ib_num_ports++;
2379
2380 spin_lock_init(&ibdev->sm_lock);
2381 mutex_init(&ibdev->cap_mask_mutex);
2382 INIT_LIST_HEAD(&ibdev->qp_list);
2383 spin_lock_init(&ibdev->reset_flow_resource_lock);
2384
2385 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED &&
2386 ib_num_ports) {
2387 ibdev->steer_qpn_count = MLX4_IB_UC_MAX_NUM_QPS;
2388 err = mlx4_qp_reserve_range(dev, ibdev->steer_qpn_count,
2389 MLX4_IB_UC_STEER_QPN_ALIGN,
2390 &ibdev->steer_qpn_base, 0);
2391 if (err)
2392 goto err_counter;
2393
2394 ibdev->ib_uc_qpns_bitmap =
2395 kmalloc(BITS_TO_LONGS(ibdev->steer_qpn_count) *
2396 sizeof(long),
2397 GFP_KERNEL);
2398 if (!ibdev->ib_uc_qpns_bitmap) {
2399 dev_err(&dev->persist->pdev->dev,
2400 "bit map alloc failed\n");
2401 goto err_steer_qp_release;
2402 }
2403
2404 bitmap_zero(ibdev->ib_uc_qpns_bitmap, ibdev->steer_qpn_count);
2405
2406 err = mlx4_FLOW_STEERING_IB_UC_QP_RANGE(
2407 dev, ibdev->steer_qpn_base,
2408 ibdev->steer_qpn_base +
2409 ibdev->steer_qpn_count - 1);
2410 if (err)
2411 goto err_steer_free_bitmap;
2412 }
2413
2414 for (j = 1; j <= ibdev->dev->caps.num_ports; j++)
2415 atomic64_set(&iboe->mac[j - 1], ibdev->dev->caps.def_mac[j]);
2416
2417 if (ib_register_device(&ibdev->ib_dev, NULL))
2418 goto err_steer_free_bitmap;
2419
2420 if (mlx4_ib_mad_init(ibdev))
2421 goto err_reg;
2422
2423 if (mlx4_ib_init_sriov(ibdev))
2424 goto err_mad;
2425
2426 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE) {
2427 if (!iboe->nb.notifier_call) {
2428 iboe->nb.notifier_call = mlx4_ib_netdev_event;
2429 err = register_netdevice_notifier(&iboe->nb);
2430 if (err) {
2431 iboe->nb.notifier_call = NULL;
2432 goto err_notif;
2433 }
2434 }
2435 }
2436
2437 for (j = 0; j < ARRAY_SIZE(mlx4_class_attributes); ++j) {
2438 if (device_create_file(&ibdev->ib_dev.dev,
2439 mlx4_class_attributes[j]))
2440 goto err_notif;
2441 }
2442
2443 ibdev->ib_active = true;
2444
2445 if (mlx4_is_mfunc(ibdev->dev))
2446 init_pkeys(ibdev);
2447
2448 /* create paravirt contexts for any VFs which are active */
2449 if (mlx4_is_master(ibdev->dev)) {
2450 for (j = 0; j < MLX4_MFUNC_MAX; j++) {
2451 if (j == mlx4_master_func_num(ibdev->dev))
2452 continue;
2453 if (mlx4_is_slave_active(ibdev->dev, j))
2454 do_slave_init(ibdev, j, 1);
2455 }
2456 }
2457 return ibdev;
2458
2459 err_notif:
2460 if (ibdev->iboe.nb.notifier_call) {
2461 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
2462 pr_warn("failure unregistering notifier\n");
2463 ibdev->iboe.nb.notifier_call = NULL;
2464 }
2465 flush_workqueue(wq);
2466
2467 mlx4_ib_close_sriov(ibdev);
2468
2469 err_mad:
2470 mlx4_ib_mad_cleanup(ibdev);
2471
2472 err_reg:
2473 ib_unregister_device(&ibdev->ib_dev);
2474
2475 err_steer_free_bitmap:
2476 kfree(ibdev->ib_uc_qpns_bitmap);
2477
2478 err_steer_qp_release:
2479 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
2480 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2481 ibdev->steer_qpn_count);
2482 err_counter:
2483 for (i = 0; i < ibdev->num_ports; ++i)
2484 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[i]);
2485
2486 err_map:
2487 iounmap(ibdev->uar_map);
2488
2489 err_uar:
2490 mlx4_uar_free(dev, &ibdev->priv_uar);
2491
2492 err_pd:
2493 mlx4_pd_free(dev, ibdev->priv_pdn);
2494
2495 err_dealloc:
2496 ib_dealloc_device(&ibdev->ib_dev);
2497
2498 return NULL;
2499 }
2500
2501 int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn)
2502 {
2503 int offset;
2504
2505 WARN_ON(!dev->ib_uc_qpns_bitmap);
2506
2507 offset = bitmap_find_free_region(dev->ib_uc_qpns_bitmap,
2508 dev->steer_qpn_count,
2509 get_count_order(count));
2510 if (offset < 0)
2511 return offset;
2512
2513 *qpn = dev->steer_qpn_base + offset;
2514 return 0;
2515 }
2516
2517 void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count)
2518 {
2519 if (!qpn ||
2520 dev->steering_support != MLX4_STEERING_MODE_DEVICE_MANAGED)
2521 return;
2522
2523 BUG_ON(qpn < dev->steer_qpn_base);
2524
2525 bitmap_release_region(dev->ib_uc_qpns_bitmap,
2526 qpn - dev->steer_qpn_base,
2527 get_count_order(count));
2528 }
2529
2530 int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
2531 int is_attach)
2532 {
2533 int err;
2534 size_t flow_size;
2535 struct ib_flow_attr *flow = NULL;
2536 struct ib_flow_spec_ib *ib_spec;
2537
2538 if (is_attach) {
2539 flow_size = sizeof(struct ib_flow_attr) +
2540 sizeof(struct ib_flow_spec_ib);
2541 flow = kzalloc(flow_size, GFP_KERNEL);
2542 if (!flow)
2543 return -ENOMEM;
2544 flow->port = mqp->port;
2545 flow->num_of_specs = 1;
2546 flow->size = flow_size;
2547 ib_spec = (struct ib_flow_spec_ib *)(flow + 1);
2548 ib_spec->type = IB_FLOW_SPEC_IB;
2549 ib_spec->size = sizeof(struct ib_flow_spec_ib);
2550 /* Add an empty rule for IB L2 */
2551 memset(&ib_spec->mask, 0, sizeof(ib_spec->mask));
2552
2553 err = __mlx4_ib_create_flow(&mqp->ibqp, flow,
2554 IB_FLOW_DOMAIN_NIC,
2555 MLX4_FS_REGULAR,
2556 &mqp->reg_id);
2557 } else {
2558 err = __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id);
2559 }
2560 kfree(flow);
2561 return err;
2562 }
2563
2564 static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr)
2565 {
2566 struct mlx4_ib_dev *ibdev = ibdev_ptr;
2567 int p;
2568
2569 ibdev->ib_active = false;
2570 flush_workqueue(wq);
2571
2572 mlx4_ib_close_sriov(ibdev);
2573 mlx4_ib_mad_cleanup(ibdev);
2574 ib_unregister_device(&ibdev->ib_dev);
2575 if (ibdev->iboe.nb.notifier_call) {
2576 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
2577 pr_warn("failure unregistering notifier\n");
2578 ibdev->iboe.nb.notifier_call = NULL;
2579 }
2580
2581 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) {
2582 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2583 ibdev->steer_qpn_count);
2584 kfree(ibdev->ib_uc_qpns_bitmap);
2585 }
2586
2587 iounmap(ibdev->uar_map);
2588 for (p = 0; p < ibdev->num_ports; ++p)
2589 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[p]);
2590
2591 mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB)
2592 mlx4_CLOSE_PORT(dev, p);
2593
2594 mlx4_ib_free_eqs(dev, ibdev);
2595
2596 mlx4_uar_free(dev, &ibdev->priv_uar);
2597 mlx4_pd_free(dev, ibdev->priv_pdn);
2598 ib_dealloc_device(&ibdev->ib_dev);
2599 }
2600
2601 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init)
2602 {
2603 struct mlx4_ib_demux_work **dm = NULL;
2604 struct mlx4_dev *dev = ibdev->dev;
2605 int i;
2606 unsigned long flags;
2607 struct mlx4_active_ports actv_ports;
2608 unsigned int ports;
2609 unsigned int first_port;
2610
2611 if (!mlx4_is_master(dev))
2612 return;
2613
2614 actv_ports = mlx4_get_active_ports(dev, slave);
2615 ports = bitmap_weight(actv_ports.ports, dev->caps.num_ports);
2616 first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports);
2617
2618 dm = kcalloc(ports, sizeof(*dm), GFP_ATOMIC);
2619 if (!dm) {
2620 pr_err("failed to allocate memory for tunneling qp update\n");
2621 return;
2622 }
2623
2624 for (i = 0; i < ports; i++) {
2625 dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC);
2626 if (!dm[i]) {
2627 pr_err("failed to allocate memory for tunneling qp update work struct\n");
2628 while (--i >= 0)
2629 kfree(dm[i]);
2630 goto out;
2631 }
2632 INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work);
2633 dm[i]->port = first_port + i + 1;
2634 dm[i]->slave = slave;
2635 dm[i]->do_init = do_init;
2636 dm[i]->dev = ibdev;
2637 }
2638 /* initialize or tear down tunnel QPs for the slave */
2639 spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags);
2640 if (!ibdev->sriov.is_going_down) {
2641 for (i = 0; i < ports; i++)
2642 queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work);
2643 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
2644 } else {
2645 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
2646 for (i = 0; i < ports; i++)
2647 kfree(dm[i]);
2648 }
2649 out:
2650 kfree(dm);
2651 return;
2652 }
2653
2654 static void mlx4_ib_handle_catas_error(struct mlx4_ib_dev *ibdev)
2655 {
2656 struct mlx4_ib_qp *mqp;
2657 unsigned long flags_qp;
2658 unsigned long flags_cq;
2659 struct mlx4_ib_cq *send_mcq, *recv_mcq;
2660 struct list_head cq_notify_list;
2661 struct mlx4_cq *mcq;
2662 unsigned long flags;
2663
2664 pr_warn("mlx4_ib_handle_catas_error was started\n");
2665 INIT_LIST_HEAD(&cq_notify_list);
2666
2667 /* Go over qp list reside on that ibdev, sync with create/destroy qp.*/
2668 spin_lock_irqsave(&ibdev->reset_flow_resource_lock, flags);
2669
2670 list_for_each_entry(mqp, &ibdev->qp_list, qps_list) {
2671 spin_lock_irqsave(&mqp->sq.lock, flags_qp);
2672 if (mqp->sq.tail != mqp->sq.head) {
2673 send_mcq = to_mcq(mqp->ibqp.send_cq);
2674 spin_lock_irqsave(&send_mcq->lock, flags_cq);
2675 if (send_mcq->mcq.comp &&
2676 mqp->ibqp.send_cq->comp_handler) {
2677 if (!send_mcq->mcq.reset_notify_added) {
2678 send_mcq->mcq.reset_notify_added = 1;
2679 list_add_tail(&send_mcq->mcq.reset_notify,
2680 &cq_notify_list);
2681 }
2682 }
2683 spin_unlock_irqrestore(&send_mcq->lock, flags_cq);
2684 }
2685 spin_unlock_irqrestore(&mqp->sq.lock, flags_qp);
2686 /* Now, handle the QP's receive queue */
2687 spin_lock_irqsave(&mqp->rq.lock, flags_qp);
2688 /* no handling is needed for SRQ */
2689 if (!mqp->ibqp.srq) {
2690 if (mqp->rq.tail != mqp->rq.head) {
2691 recv_mcq = to_mcq(mqp->ibqp.recv_cq);
2692 spin_lock_irqsave(&recv_mcq->lock, flags_cq);
2693 if (recv_mcq->mcq.comp &&
2694 mqp->ibqp.recv_cq->comp_handler) {
2695 if (!recv_mcq->mcq.reset_notify_added) {
2696 recv_mcq->mcq.reset_notify_added = 1;
2697 list_add_tail(&recv_mcq->mcq.reset_notify,
2698 &cq_notify_list);
2699 }
2700 }
2701 spin_unlock_irqrestore(&recv_mcq->lock,
2702 flags_cq);
2703 }
2704 }
2705 spin_unlock_irqrestore(&mqp->rq.lock, flags_qp);
2706 }
2707
2708 list_for_each_entry(mcq, &cq_notify_list, reset_notify) {
2709 mcq->comp(mcq);
2710 }
2711 spin_unlock_irqrestore(&ibdev->reset_flow_resource_lock, flags);
2712 pr_warn("mlx4_ib_handle_catas_error ended\n");
2713 }
2714
2715 static void handle_bonded_port_state_event(struct work_struct *work)
2716 {
2717 struct ib_event_work *ew =
2718 container_of(work, struct ib_event_work, work);
2719 struct mlx4_ib_dev *ibdev = ew->ib_dev;
2720 enum ib_port_state bonded_port_state = IB_PORT_NOP;
2721 int i;
2722 struct ib_event ibev;
2723
2724 kfree(ew);
2725 spin_lock_bh(&ibdev->iboe.lock);
2726 for (i = 0; i < MLX4_MAX_PORTS; ++i) {
2727 struct net_device *curr_netdev = ibdev->iboe.netdevs[i];
2728 enum ib_port_state curr_port_state;
2729
2730 if (!curr_netdev)
2731 continue;
2732
2733 curr_port_state =
2734 (netif_running(curr_netdev) &&
2735 netif_carrier_ok(curr_netdev)) ?
2736 IB_PORT_ACTIVE : IB_PORT_DOWN;
2737
2738 bonded_port_state = (bonded_port_state != IB_PORT_ACTIVE) ?
2739 curr_port_state : IB_PORT_ACTIVE;
2740 }
2741 spin_unlock_bh(&ibdev->iboe.lock);
2742
2743 ibev.device = &ibdev->ib_dev;
2744 ibev.element.port_num = 1;
2745 ibev.event = (bonded_port_state == IB_PORT_ACTIVE) ?
2746 IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
2747
2748 ib_dispatch_event(&ibev);
2749 }
2750
2751 static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr,
2752 enum mlx4_dev_event event, unsigned long param)
2753 {
2754 struct ib_event ibev;
2755 struct mlx4_ib_dev *ibdev = to_mdev((struct ib_device *) ibdev_ptr);
2756 struct mlx4_eqe *eqe = NULL;
2757 struct ib_event_work *ew;
2758 int p = 0;
2759
2760 if (mlx4_is_bonded(dev) &&
2761 ((event == MLX4_DEV_EVENT_PORT_UP) ||
2762 (event == MLX4_DEV_EVENT_PORT_DOWN))) {
2763 ew = kmalloc(sizeof(*ew), GFP_ATOMIC);
2764 if (!ew)
2765 return;
2766 INIT_WORK(&ew->work, handle_bonded_port_state_event);
2767 ew->ib_dev = ibdev;
2768 queue_work(wq, &ew->work);
2769 return;
2770 }
2771
2772 if (event == MLX4_DEV_EVENT_PORT_MGMT_CHANGE)
2773 eqe = (struct mlx4_eqe *)param;
2774 else
2775 p = (int) param;
2776
2777 switch (event) {
2778 case MLX4_DEV_EVENT_PORT_UP:
2779 if (p > ibdev->num_ports)
2780 return;
2781 if (mlx4_is_master(dev) &&
2782 rdma_port_get_link_layer(&ibdev->ib_dev, p) ==
2783 IB_LINK_LAYER_INFINIBAND) {
2784 mlx4_ib_invalidate_all_guid_record(ibdev, p);
2785 }
2786 ibev.event = IB_EVENT_PORT_ACTIVE;
2787 break;
2788
2789 case MLX4_DEV_EVENT_PORT_DOWN:
2790 if (p > ibdev->num_ports)
2791 return;
2792 ibev.event = IB_EVENT_PORT_ERR;
2793 break;
2794
2795 case MLX4_DEV_EVENT_CATASTROPHIC_ERROR:
2796 ibdev->ib_active = false;
2797 ibev.event = IB_EVENT_DEVICE_FATAL;
2798 mlx4_ib_handle_catas_error(ibdev);
2799 break;
2800
2801 case MLX4_DEV_EVENT_PORT_MGMT_CHANGE:
2802 ew = kmalloc(sizeof *ew, GFP_ATOMIC);
2803 if (!ew) {
2804 pr_err("failed to allocate memory for events work\n");
2805 break;
2806 }
2807
2808 INIT_WORK(&ew->work, handle_port_mgmt_change_event);
2809 memcpy(&ew->ib_eqe, eqe, sizeof *eqe);
2810 ew->ib_dev = ibdev;
2811 /* need to queue only for port owner, which uses GEN_EQE */
2812 if (mlx4_is_master(dev))
2813 queue_work(wq, &ew->work);
2814 else
2815 handle_port_mgmt_change_event(&ew->work);
2816 return;
2817
2818 case MLX4_DEV_EVENT_SLAVE_INIT:
2819 /* here, p is the slave id */
2820 do_slave_init(ibdev, p, 1);
2821 if (mlx4_is_master(dev)) {
2822 int i;
2823
2824 for (i = 1; i <= ibdev->num_ports; i++) {
2825 if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
2826 == IB_LINK_LAYER_INFINIBAND)
2827 mlx4_ib_slave_alias_guid_event(ibdev,
2828 p, i,
2829 1);
2830 }
2831 }
2832 return;
2833
2834 case MLX4_DEV_EVENT_SLAVE_SHUTDOWN:
2835 if (mlx4_is_master(dev)) {
2836 int i;
2837
2838 for (i = 1; i <= ibdev->num_ports; i++) {
2839 if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
2840 == IB_LINK_LAYER_INFINIBAND)
2841 mlx4_ib_slave_alias_guid_event(ibdev,
2842 p, i,
2843 0);
2844 }
2845 }
2846 /* here, p is the slave id */
2847 do_slave_init(ibdev, p, 0);
2848 return;
2849
2850 default:
2851 return;
2852 }
2853
2854 ibev.device = ibdev_ptr;
2855 ibev.element.port_num = mlx4_is_bonded(ibdev->dev) ? 1 : (u8)p;
2856
2857 ib_dispatch_event(&ibev);
2858 }
2859
2860 static struct mlx4_interface mlx4_ib_interface = {
2861 .add = mlx4_ib_add,
2862 .remove = mlx4_ib_remove,
2863 .event = mlx4_ib_event,
2864 .protocol = MLX4_PROT_IB_IPV6,
2865 .flags = MLX4_INTFF_BONDING
2866 };
2867
2868 static int __init mlx4_ib_init(void)
2869 {
2870 int err;
2871
2872 wq = create_singlethread_workqueue("mlx4_ib");
2873 if (!wq)
2874 return -ENOMEM;
2875
2876 err = mlx4_ib_mcg_init();
2877 if (err)
2878 goto clean_wq;
2879
2880 err = mlx4_register_interface(&mlx4_ib_interface);
2881 if (err)
2882 goto clean_mcg;
2883
2884 return 0;
2885
2886 clean_mcg:
2887 mlx4_ib_mcg_destroy();
2888
2889 clean_wq:
2890 destroy_workqueue(wq);
2891 return err;
2892 }
2893
2894 static void __exit mlx4_ib_cleanup(void)
2895 {
2896 mlx4_unregister_interface(&mlx4_ib_interface);
2897 mlx4_ib_mcg_destroy();
2898 destroy_workqueue(wq);
2899 }
2900
2901 module_init(mlx4_ib_init);
2902 module_exit(mlx4_ib_cleanup);
Linux kernel - Deliverables
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