2 * NVM Express device driver
3 * Copyright (c) 2011-2014, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 #include <linux/bitops.h>
16 #include <linux/blkdev.h>
17 #include <linux/blk-mq.h>
18 #include <linux/cpu.h>
19 #include <linux/delay.h>
20 #include <linux/errno.h>
22 #include <linux/genhd.h>
23 #include <linux/hdreg.h>
24 #include <linux/idr.h>
25 #include <linux/init.h>
26 #include <linux/interrupt.h>
28 #include <linux/kdev_t.h>
29 #include <linux/kthread.h>
30 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/moduleparam.h>
34 #include <linux/mutex.h>
35 #include <linux/pci.h>
36 #include <linux/poison.h>
37 #include <linux/ptrace.h>
38 #include <linux/sched.h>
39 #include <linux/slab.h>
40 #include <linux/t10-pi.h>
41 #include <linux/types.h>
42 #include <linux/io-64-nonatomic-lo-hi.h>
43 #include <asm/unaligned.h>
47 #define NVME_Q_DEPTH 1024
48 #define NVME_AQ_DEPTH 256
49 #define SQ_SIZE(depth) (depth * sizeof(struct nvme_command))
50 #define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion))
53 * We handle AEN commands ourselves and don't even let the
54 * block layer know about them.
56 #define NVME_NR_AEN_COMMANDS 1
57 #define NVME_AQ_BLKMQ_DEPTH (NVME_AQ_DEPTH - NVME_NR_AEN_COMMANDS)
59 unsigned char admin_timeout
= 60;
60 module_param(admin_timeout
, byte
, 0644);
61 MODULE_PARM_DESC(admin_timeout
, "timeout in seconds for admin commands");
63 unsigned char nvme_io_timeout
= 30;
64 module_param_named(io_timeout
, nvme_io_timeout
, byte
, 0644);
65 MODULE_PARM_DESC(io_timeout
, "timeout in seconds for I/O");
67 unsigned char shutdown_timeout
= 5;
68 module_param(shutdown_timeout
, byte
, 0644);
69 MODULE_PARM_DESC(shutdown_timeout
, "timeout in seconds for controller shutdown");
71 static int use_threaded_interrupts
;
72 module_param(use_threaded_interrupts
, int, 0);
74 static bool use_cmb_sqes
= true;
75 module_param(use_cmb_sqes
, bool, 0644);
76 MODULE_PARM_DESC(use_cmb_sqes
, "use controller's memory buffer for I/O SQes");
78 static LIST_HEAD(dev_list
);
79 static struct task_struct
*nvme_thread
;
80 static struct workqueue_struct
*nvme_workq
;
81 static wait_queue_head_t nvme_kthread_wait
;
87 static int nvme_reset(struct nvme_dev
*dev
);
88 static void nvme_process_cq(struct nvme_queue
*nvmeq
);
89 static void nvme_unmap_data(struct nvme_dev
*dev
, struct nvme_iod
*iod
);
90 static void nvme_remove_dead_ctrl(struct nvme_dev
*dev
);
91 static void nvme_dev_shutdown(struct nvme_dev
*dev
);
93 struct async_cmd_info
{
94 struct kthread_work work
;
95 struct kthread_worker
*worker
;
101 * Represents an NVM Express device. Each nvme_dev is a PCI function.
104 struct list_head node
;
105 struct nvme_queue
**queues
;
106 struct blk_mq_tag_set tagset
;
107 struct blk_mq_tag_set admin_tagset
;
110 struct dma_pool
*prp_page_pool
;
111 struct dma_pool
*prp_small_pool
;
112 unsigned queue_count
;
113 unsigned online_queues
;
117 struct msix_entry
*entry
;
119 struct work_struct reset_work
;
120 struct work_struct scan_work
;
121 struct work_struct remove_work
;
122 struct mutex shutdown_lock
;
125 dma_addr_t cmb_dma_addr
;
129 #define NVME_CTRL_RESETTING 0
131 struct nvme_ctrl ctrl
;
134 static inline struct nvme_dev
*to_nvme_dev(struct nvme_ctrl
*ctrl
)
136 return container_of(ctrl
, struct nvme_dev
, ctrl
);
140 * An NVM Express queue. Each device has at least two (one for admin
141 * commands and one for I/O commands).
144 struct device
*q_dmadev
;
145 struct nvme_dev
*dev
;
146 char irqname
[24]; /* nvme4294967295-65535\0 */
148 struct nvme_command
*sq_cmds
;
149 struct nvme_command __iomem
*sq_cmds_io
;
150 volatile struct nvme_completion
*cqes
;
151 struct blk_mq_tags
**tags
;
152 dma_addr_t sq_dma_addr
;
153 dma_addr_t cq_dma_addr
;
163 struct async_cmd_info cmdinfo
;
167 * The nvme_iod describes the data in an I/O, including the list of PRP
168 * entries. You can't see it in this data structure because C doesn't let
169 * me express that. Use nvme_alloc_iod to ensure there's enough space
170 * allocated to store the PRP list.
173 unsigned long private; /* For the use of the submitter of the I/O */
174 int npages
; /* In the PRP list. 0 means small pool in use */
175 int offset
; /* Of PRP list */
176 int nents
; /* Used in scatterlist */
177 int length
; /* Of data, in bytes */
178 dma_addr_t first_dma
;
179 struct scatterlist meta_sg
[1]; /* metadata requires single contiguous buffer */
180 struct scatterlist sg
[0];
184 * Check we didin't inadvertently grow the command struct
186 static inline void _nvme_check_size(void)
188 BUILD_BUG_ON(sizeof(struct nvme_rw_command
) != 64);
189 BUILD_BUG_ON(sizeof(struct nvme_create_cq
) != 64);
190 BUILD_BUG_ON(sizeof(struct nvme_create_sq
) != 64);
191 BUILD_BUG_ON(sizeof(struct nvme_delete_queue
) != 64);
192 BUILD_BUG_ON(sizeof(struct nvme_features
) != 64);
193 BUILD_BUG_ON(sizeof(struct nvme_format_cmd
) != 64);
194 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd
) != 64);
195 BUILD_BUG_ON(sizeof(struct nvme_command
) != 64);
196 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl
) != 4096);
197 BUILD_BUG_ON(sizeof(struct nvme_id_ns
) != 4096);
198 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type
) != 64);
199 BUILD_BUG_ON(sizeof(struct nvme_smart_log
) != 512);
202 typedef void (*nvme_completion_fn
)(struct nvme_queue
*, void *,
203 struct nvme_completion
*);
205 struct nvme_cmd_info
{
206 nvme_completion_fn fn
;
209 struct nvme_queue
*nvmeq
;
210 struct nvme_iod iod
[0];
214 * Max size of iod being embedded in the request payload
216 #define NVME_INT_PAGES 2
217 #define NVME_INT_BYTES(dev) (NVME_INT_PAGES * (dev)->ctrl.page_size)
218 #define NVME_INT_MASK 0x01
221 * Will slightly overestimate the number of pages needed. This is OK
222 * as it only leads to a small amount of wasted memory for the lifetime of
225 static int nvme_npages(unsigned size
, struct nvme_dev
*dev
)
227 unsigned nprps
= DIV_ROUND_UP(size
+ dev
->ctrl
.page_size
,
228 dev
->ctrl
.page_size
);
229 return DIV_ROUND_UP(8 * nprps
, PAGE_SIZE
- 8);
232 static unsigned int nvme_cmd_size(struct nvme_dev
*dev
)
234 unsigned int ret
= sizeof(struct nvme_cmd_info
);
236 ret
+= sizeof(struct nvme_iod
);
237 ret
+= sizeof(__le64
*) * nvme_npages(NVME_INT_BYTES(dev
), dev
);
238 ret
+= sizeof(struct scatterlist
) * NVME_INT_PAGES
;
243 static int nvme_admin_init_hctx(struct blk_mq_hw_ctx
*hctx
, void *data
,
244 unsigned int hctx_idx
)
246 struct nvme_dev
*dev
= data
;
247 struct nvme_queue
*nvmeq
= dev
->queues
[0];
249 WARN_ON(hctx_idx
!= 0);
250 WARN_ON(dev
->admin_tagset
.tags
[0] != hctx
->tags
);
251 WARN_ON(nvmeq
->tags
);
253 hctx
->driver_data
= nvmeq
;
254 nvmeq
->tags
= &dev
->admin_tagset
.tags
[0];
258 static void nvme_admin_exit_hctx(struct blk_mq_hw_ctx
*hctx
, unsigned int hctx_idx
)
260 struct nvme_queue
*nvmeq
= hctx
->driver_data
;
265 static int nvme_admin_init_request(void *data
, struct request
*req
,
266 unsigned int hctx_idx
, unsigned int rq_idx
,
267 unsigned int numa_node
)
269 struct nvme_dev
*dev
= data
;
270 struct nvme_cmd_info
*cmd
= blk_mq_rq_to_pdu(req
);
271 struct nvme_queue
*nvmeq
= dev
->queues
[0];
278 static int nvme_init_hctx(struct blk_mq_hw_ctx
*hctx
, void *data
,
279 unsigned int hctx_idx
)
281 struct nvme_dev
*dev
= data
;
282 struct nvme_queue
*nvmeq
= dev
->queues
[hctx_idx
+ 1];
285 nvmeq
->tags
= &dev
->tagset
.tags
[hctx_idx
];
287 WARN_ON(dev
->tagset
.tags
[hctx_idx
] != hctx
->tags
);
288 hctx
->driver_data
= nvmeq
;
292 static int nvme_init_request(void *data
, struct request
*req
,
293 unsigned int hctx_idx
, unsigned int rq_idx
,
294 unsigned int numa_node
)
296 struct nvme_dev
*dev
= data
;
297 struct nvme_cmd_info
*cmd
= blk_mq_rq_to_pdu(req
);
298 struct nvme_queue
*nvmeq
= dev
->queues
[hctx_idx
+ 1];
305 static void nvme_set_info(struct nvme_cmd_info
*cmd
, void *ctx
,
306 nvme_completion_fn handler
)
311 blk_mq_start_request(blk_mq_rq_from_pdu(cmd
));
314 static void *iod_get_private(struct nvme_iod
*iod
)
316 return (void *) (iod
->private & ~0x1UL
);
320 * If bit 0 is set, the iod is embedded in the request payload.
322 static bool iod_should_kfree(struct nvme_iod
*iod
)
324 return (iod
->private & NVME_INT_MASK
) == 0;
327 /* Special values must be less than 0x1000 */
328 #define CMD_CTX_BASE ((void *)POISON_POINTER_DELTA)
329 #define CMD_CTX_CANCELLED (0x30C + CMD_CTX_BASE)
330 #define CMD_CTX_COMPLETED (0x310 + CMD_CTX_BASE)
331 #define CMD_CTX_INVALID (0x314 + CMD_CTX_BASE)
333 static void special_completion(struct nvme_queue
*nvmeq
, void *ctx
,
334 struct nvme_completion
*cqe
)
336 if (ctx
== CMD_CTX_CANCELLED
)
338 if (ctx
== CMD_CTX_COMPLETED
) {
339 dev_warn(nvmeq
->q_dmadev
,
340 "completed id %d twice on queue %d\n",
341 cqe
->command_id
, le16_to_cpup(&cqe
->sq_id
));
344 if (ctx
== CMD_CTX_INVALID
) {
345 dev_warn(nvmeq
->q_dmadev
,
346 "invalid id %d completed on queue %d\n",
347 cqe
->command_id
, le16_to_cpup(&cqe
->sq_id
));
350 dev_warn(nvmeq
->q_dmadev
, "Unknown special completion %p\n", ctx
);
353 static void *cancel_cmd_info(struct nvme_cmd_info
*cmd
, nvme_completion_fn
*fn
)
360 cmd
->fn
= special_completion
;
361 cmd
->ctx
= CMD_CTX_CANCELLED
;
365 static void nvme_complete_async_event(struct nvme_dev
*dev
,
366 struct nvme_completion
*cqe
)
368 u16 status
= le16_to_cpu(cqe
->status
) >> 1;
369 u32 result
= le32_to_cpu(cqe
->result
);
371 if (status
== NVME_SC_SUCCESS
|| status
== NVME_SC_ABORT_REQ
)
372 ++dev
->ctrl
.event_limit
;
373 if (status
!= NVME_SC_SUCCESS
)
376 switch (result
& 0xff07) {
377 case NVME_AER_NOTICE_NS_CHANGED
:
378 dev_info(dev
->dev
, "rescanning\n");
379 queue_work(nvme_workq
, &dev
->scan_work
);
381 dev_warn(dev
->dev
, "async event result %08x\n", result
);
385 static inline struct nvme_cmd_info
*get_cmd_from_tag(struct nvme_queue
*nvmeq
,
388 struct request
*req
= blk_mq_tag_to_rq(*nvmeq
->tags
, tag
);
390 return blk_mq_rq_to_pdu(req
);
394 * Called with local interrupts disabled and the q_lock held. May not sleep.
396 static void *nvme_finish_cmd(struct nvme_queue
*nvmeq
, int tag
,
397 nvme_completion_fn
*fn
)
399 struct nvme_cmd_info
*cmd
= get_cmd_from_tag(nvmeq
, tag
);
401 if (tag
>= nvmeq
->q_depth
) {
402 *fn
= special_completion
;
403 return CMD_CTX_INVALID
;
408 cmd
->fn
= special_completion
;
409 cmd
->ctx
= CMD_CTX_COMPLETED
;
414 * __nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
415 * @nvmeq: The queue to use
416 * @cmd: The command to send
418 * Safe to use from interrupt context
420 static void __nvme_submit_cmd(struct nvme_queue
*nvmeq
,
421 struct nvme_command
*cmd
)
423 u16 tail
= nvmeq
->sq_tail
;
425 if (nvmeq
->sq_cmds_io
)
426 memcpy_toio(&nvmeq
->sq_cmds_io
[tail
], cmd
, sizeof(*cmd
));
428 memcpy(&nvmeq
->sq_cmds
[tail
], cmd
, sizeof(*cmd
));
430 if (++tail
== nvmeq
->q_depth
)
432 writel(tail
, nvmeq
->q_db
);
433 nvmeq
->sq_tail
= tail
;
436 static __le64
**iod_list(struct nvme_iod
*iod
)
438 return ((void *)iod
) + iod
->offset
;
441 static inline void iod_init(struct nvme_iod
*iod
, unsigned nbytes
,
442 unsigned nseg
, unsigned long private)
444 iod
->private = private;
445 iod
->offset
= offsetof(struct nvme_iod
, sg
[nseg
]);
447 iod
->length
= nbytes
;
451 static struct nvme_iod
*
452 __nvme_alloc_iod(unsigned nseg
, unsigned bytes
, struct nvme_dev
*dev
,
453 unsigned long priv
, gfp_t gfp
)
455 struct nvme_iod
*iod
= kmalloc(sizeof(struct nvme_iod
) +
456 sizeof(__le64
*) * nvme_npages(bytes
, dev
) +
457 sizeof(struct scatterlist
) * nseg
, gfp
);
460 iod_init(iod
, bytes
, nseg
, priv
);
465 static struct nvme_iod
*nvme_alloc_iod(struct request
*rq
, struct nvme_dev
*dev
,
468 unsigned size
= !(rq
->cmd_flags
& REQ_DISCARD
) ? blk_rq_bytes(rq
) :
469 sizeof(struct nvme_dsm_range
);
470 struct nvme_iod
*iod
;
472 if (rq
->nr_phys_segments
<= NVME_INT_PAGES
&&
473 size
<= NVME_INT_BYTES(dev
)) {
474 struct nvme_cmd_info
*cmd
= blk_mq_rq_to_pdu(rq
);
477 iod_init(iod
, size
, rq
->nr_phys_segments
,
478 (unsigned long) rq
| NVME_INT_MASK
);
482 return __nvme_alloc_iod(rq
->nr_phys_segments
, size
, dev
,
483 (unsigned long) rq
, gfp
);
486 static void nvme_free_iod(struct nvme_dev
*dev
, struct nvme_iod
*iod
)
488 const int last_prp
= dev
->ctrl
.page_size
/ 8 - 1;
490 __le64
**list
= iod_list(iod
);
491 dma_addr_t prp_dma
= iod
->first_dma
;
493 if (iod
->npages
== 0)
494 dma_pool_free(dev
->prp_small_pool
, list
[0], prp_dma
);
495 for (i
= 0; i
< iod
->npages
; i
++) {
496 __le64
*prp_list
= list
[i
];
497 dma_addr_t next_prp_dma
= le64_to_cpu(prp_list
[last_prp
]);
498 dma_pool_free(dev
->prp_page_pool
, prp_list
, prp_dma
);
499 prp_dma
= next_prp_dma
;
502 if (iod_should_kfree(iod
))
506 #ifdef CONFIG_BLK_DEV_INTEGRITY
507 static void nvme_dif_prep(u32 p
, u32 v
, struct t10_pi_tuple
*pi
)
509 if (be32_to_cpu(pi
->ref_tag
) == v
)
510 pi
->ref_tag
= cpu_to_be32(p
);
513 static void nvme_dif_complete(u32 p
, u32 v
, struct t10_pi_tuple
*pi
)
515 if (be32_to_cpu(pi
->ref_tag
) == p
)
516 pi
->ref_tag
= cpu_to_be32(v
);
520 * nvme_dif_remap - remaps ref tags to bip seed and physical lba
522 * The virtual start sector is the one that was originally submitted by the
523 * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical
524 * start sector may be different. Remap protection information to match the
525 * physical LBA on writes, and back to the original seed on reads.
527 * Type 0 and 3 do not have a ref tag, so no remapping required.
529 static void nvme_dif_remap(struct request
*req
,
530 void (*dif_swap
)(u32 p
, u32 v
, struct t10_pi_tuple
*pi
))
532 struct nvme_ns
*ns
= req
->rq_disk
->private_data
;
533 struct bio_integrity_payload
*bip
;
534 struct t10_pi_tuple
*pi
;
536 u32 i
, nlb
, ts
, phys
, virt
;
538 if (!ns
->pi_type
|| ns
->pi_type
== NVME_NS_DPS_PI_TYPE3
)
541 bip
= bio_integrity(req
->bio
);
545 pmap
= kmap_atomic(bip
->bip_vec
->bv_page
) + bip
->bip_vec
->bv_offset
;
548 virt
= bip_get_seed(bip
);
549 phys
= nvme_block_nr(ns
, blk_rq_pos(req
));
550 nlb
= (blk_rq_bytes(req
) >> ns
->lba_shift
);
551 ts
= ns
->disk
->queue
->integrity
.tuple_size
;
553 for (i
= 0; i
< nlb
; i
++, virt
++, phys
++) {
554 pi
= (struct t10_pi_tuple
*)p
;
555 dif_swap(phys
, virt
, pi
);
560 #else /* CONFIG_BLK_DEV_INTEGRITY */
561 static void nvme_dif_remap(struct request
*req
,
562 void (*dif_swap
)(u32 p
, u32 v
, struct t10_pi_tuple
*pi
))
565 static void nvme_dif_prep(u32 p
, u32 v
, struct t10_pi_tuple
*pi
)
568 static void nvme_dif_complete(u32 p
, u32 v
, struct t10_pi_tuple
*pi
)
573 static void req_completion(struct nvme_queue
*nvmeq
, void *ctx
,
574 struct nvme_completion
*cqe
)
576 struct nvme_iod
*iod
= ctx
;
577 struct request
*req
= iod_get_private(iod
);
578 struct nvme_cmd_info
*cmd_rq
= blk_mq_rq_to_pdu(req
);
579 u16 status
= le16_to_cpup(&cqe
->status
) >> 1;
582 if (unlikely(status
)) {
583 if (nvme_req_needs_retry(req
, status
)) {
584 nvme_unmap_data(nvmeq
->dev
, iod
);
585 nvme_requeue_req(req
);
589 if (req
->cmd_type
== REQ_TYPE_DRV_PRIV
) {
590 if (cmd_rq
->ctx
== CMD_CTX_CANCELLED
)
591 error
= NVME_SC_CANCELLED
;
595 error
= nvme_error_status(status
);
599 if (req
->cmd_type
== REQ_TYPE_DRV_PRIV
) {
600 u32 result
= le32_to_cpup(&cqe
->result
);
601 req
->special
= (void *)(uintptr_t)result
;
605 dev_warn(nvmeq
->dev
->dev
,
606 "completing aborted command with status:%04x\n",
609 nvme_unmap_data(nvmeq
->dev
, iod
);
610 blk_mq_complete_request(req
, error
);
613 static bool nvme_setup_prps(struct nvme_dev
*dev
, struct nvme_iod
*iod
,
616 struct dma_pool
*pool
;
617 int length
= total_len
;
618 struct scatterlist
*sg
= iod
->sg
;
619 int dma_len
= sg_dma_len(sg
);
620 u64 dma_addr
= sg_dma_address(sg
);
621 u32 page_size
= dev
->ctrl
.page_size
;
622 int offset
= dma_addr
& (page_size
- 1);
624 __le64
**list
= iod_list(iod
);
628 length
-= (page_size
- offset
);
632 dma_len
-= (page_size
- offset
);
634 dma_addr
+= (page_size
- offset
);
637 dma_addr
= sg_dma_address(sg
);
638 dma_len
= sg_dma_len(sg
);
641 if (length
<= page_size
) {
642 iod
->first_dma
= dma_addr
;
646 nprps
= DIV_ROUND_UP(length
, page_size
);
647 if (nprps
<= (256 / 8)) {
648 pool
= dev
->prp_small_pool
;
651 pool
= dev
->prp_page_pool
;
655 prp_list
= dma_pool_alloc(pool
, GFP_ATOMIC
, &prp_dma
);
657 iod
->first_dma
= dma_addr
;
662 iod
->first_dma
= prp_dma
;
665 if (i
== page_size
>> 3) {
666 __le64
*old_prp_list
= prp_list
;
667 prp_list
= dma_pool_alloc(pool
, GFP_ATOMIC
, &prp_dma
);
670 list
[iod
->npages
++] = prp_list
;
671 prp_list
[0] = old_prp_list
[i
- 1];
672 old_prp_list
[i
- 1] = cpu_to_le64(prp_dma
);
675 prp_list
[i
++] = cpu_to_le64(dma_addr
);
676 dma_len
-= page_size
;
677 dma_addr
+= page_size
;
685 dma_addr
= sg_dma_address(sg
);
686 dma_len
= sg_dma_len(sg
);
692 static int nvme_map_data(struct nvme_dev
*dev
, struct nvme_iod
*iod
,
693 struct nvme_command
*cmnd
)
695 struct request
*req
= iod_get_private(iod
);
696 struct request_queue
*q
= req
->q
;
697 enum dma_data_direction dma_dir
= rq_data_dir(req
) ?
698 DMA_TO_DEVICE
: DMA_FROM_DEVICE
;
699 int ret
= BLK_MQ_RQ_QUEUE_ERROR
;
701 sg_init_table(iod
->sg
, req
->nr_phys_segments
);
702 iod
->nents
= blk_rq_map_sg(q
, req
, iod
->sg
);
706 ret
= BLK_MQ_RQ_QUEUE_BUSY
;
707 if (!dma_map_sg(dev
->dev
, iod
->sg
, iod
->nents
, dma_dir
))
710 if (!nvme_setup_prps(dev
, iod
, blk_rq_bytes(req
)))
713 ret
= BLK_MQ_RQ_QUEUE_ERROR
;
714 if (blk_integrity_rq(req
)) {
715 if (blk_rq_count_integrity_sg(q
, req
->bio
) != 1)
718 sg_init_table(iod
->meta_sg
, 1);
719 if (blk_rq_map_integrity_sg(q
, req
->bio
, iod
->meta_sg
) != 1)
722 if (rq_data_dir(req
))
723 nvme_dif_remap(req
, nvme_dif_prep
);
725 if (!dma_map_sg(dev
->dev
, iod
->meta_sg
, 1, dma_dir
))
729 cmnd
->rw
.prp1
= cpu_to_le64(sg_dma_address(iod
->sg
));
730 cmnd
->rw
.prp2
= cpu_to_le64(iod
->first_dma
);
731 if (blk_integrity_rq(req
))
732 cmnd
->rw
.metadata
= cpu_to_le64(sg_dma_address(iod
->meta_sg
));
733 return BLK_MQ_RQ_QUEUE_OK
;
736 dma_unmap_sg(dev
->dev
, iod
->sg
, iod
->nents
, dma_dir
);
741 static void nvme_unmap_data(struct nvme_dev
*dev
, struct nvme_iod
*iod
)
743 struct request
*req
= iod_get_private(iod
);
744 enum dma_data_direction dma_dir
= rq_data_dir(req
) ?
745 DMA_TO_DEVICE
: DMA_FROM_DEVICE
;
748 dma_unmap_sg(dev
->dev
, iod
->sg
, iod
->nents
, dma_dir
);
749 if (blk_integrity_rq(req
)) {
750 if (!rq_data_dir(req
))
751 nvme_dif_remap(req
, nvme_dif_complete
);
752 dma_unmap_sg(dev
->dev
, iod
->meta_sg
, 1, dma_dir
);
756 nvme_free_iod(dev
, iod
);
760 * We reuse the small pool to allocate the 16-byte range here as it is not
761 * worth having a special pool for these or additional cases to handle freeing
764 static int nvme_setup_discard(struct nvme_queue
*nvmeq
, struct nvme_ns
*ns
,
765 struct nvme_iod
*iod
, struct nvme_command
*cmnd
)
767 struct request
*req
= iod_get_private(iod
);
768 struct nvme_dsm_range
*range
;
770 range
= dma_pool_alloc(nvmeq
->dev
->prp_small_pool
, GFP_ATOMIC
,
773 return BLK_MQ_RQ_QUEUE_BUSY
;
774 iod_list(iod
)[0] = (__le64
*)range
;
777 range
->cattr
= cpu_to_le32(0);
778 range
->nlb
= cpu_to_le32(blk_rq_bytes(req
) >> ns
->lba_shift
);
779 range
->slba
= cpu_to_le64(nvme_block_nr(ns
, blk_rq_pos(req
)));
781 memset(cmnd
, 0, sizeof(*cmnd
));
782 cmnd
->dsm
.opcode
= nvme_cmd_dsm
;
783 cmnd
->dsm
.nsid
= cpu_to_le32(ns
->ns_id
);
784 cmnd
->dsm
.prp1
= cpu_to_le64(iod
->first_dma
);
786 cmnd
->dsm
.attributes
= cpu_to_le32(NVME_DSMGMT_AD
);
787 return BLK_MQ_RQ_QUEUE_OK
;
791 * NOTE: ns is NULL when called on the admin queue.
793 static int nvme_queue_rq(struct blk_mq_hw_ctx
*hctx
,
794 const struct blk_mq_queue_data
*bd
)
796 struct nvme_ns
*ns
= hctx
->queue
->queuedata
;
797 struct nvme_queue
*nvmeq
= hctx
->driver_data
;
798 struct nvme_dev
*dev
= nvmeq
->dev
;
799 struct request
*req
= bd
->rq
;
800 struct nvme_cmd_info
*cmd
= blk_mq_rq_to_pdu(req
);
801 struct nvme_iod
*iod
;
802 struct nvme_command cmnd
;
803 int ret
= BLK_MQ_RQ_QUEUE_OK
;
806 * If formated with metadata, require the block layer provide a buffer
807 * unless this namespace is formated such that the metadata can be
808 * stripped/generated by the controller with PRACT=1.
810 if (ns
&& ns
->ms
&& !blk_integrity_rq(req
)) {
811 if (!(ns
->pi_type
&& ns
->ms
== 8) &&
812 req
->cmd_type
!= REQ_TYPE_DRV_PRIV
) {
813 blk_mq_complete_request(req
, -EFAULT
);
814 return BLK_MQ_RQ_QUEUE_OK
;
818 iod
= nvme_alloc_iod(req
, dev
, GFP_ATOMIC
);
820 return BLK_MQ_RQ_QUEUE_BUSY
;
822 if (req
->cmd_flags
& REQ_DISCARD
) {
823 ret
= nvme_setup_discard(nvmeq
, ns
, iod
, &cmnd
);
825 if (req
->cmd_type
== REQ_TYPE_DRV_PRIV
)
826 memcpy(&cmnd
, req
->cmd
, sizeof(cmnd
));
827 else if (req
->cmd_flags
& REQ_FLUSH
)
828 nvme_setup_flush(ns
, &cmnd
);
830 nvme_setup_rw(ns
, req
, &cmnd
);
832 if (req
->nr_phys_segments
)
833 ret
= nvme_map_data(dev
, iod
, &cmnd
);
839 cmnd
.common
.command_id
= req
->tag
;
840 nvme_set_info(cmd
, iod
, req_completion
);
842 spin_lock_irq(&nvmeq
->q_lock
);
843 __nvme_submit_cmd(nvmeq
, &cmnd
);
844 nvme_process_cq(nvmeq
);
845 spin_unlock_irq(&nvmeq
->q_lock
);
846 return BLK_MQ_RQ_QUEUE_OK
;
848 nvme_free_iod(dev
, iod
);
852 static void __nvme_process_cq(struct nvme_queue
*nvmeq
, unsigned int *tag
)
856 head
= nvmeq
->cq_head
;
857 phase
= nvmeq
->cq_phase
;
861 nvme_completion_fn fn
;
862 struct nvme_completion cqe
= nvmeq
->cqes
[head
];
863 u16 status
= le16_to_cpu(cqe
.status
);
865 if ((status
& 1) != phase
)
867 nvmeq
->sq_head
= le16_to_cpu(cqe
.sq_head
);
868 if (++head
== nvmeq
->q_depth
) {
873 if (tag
&& *tag
== cqe
.command_id
)
877 * AEN requests are special as they don't time out and can
878 * survive any kind of queue freeze and often don't respond to
879 * aborts. We don't even bother to allocate a struct request
880 * for them but rather special case them here.
882 if (unlikely(nvmeq
->qid
== 0 &&
883 cqe
.command_id
>= NVME_AQ_BLKMQ_DEPTH
)) {
884 nvme_complete_async_event(nvmeq
->dev
, &cqe
);
888 ctx
= nvme_finish_cmd(nvmeq
, cqe
.command_id
, &fn
);
889 fn(nvmeq
, ctx
, &cqe
);
892 /* If the controller ignores the cq head doorbell and continuously
893 * writes to the queue, it is theoretically possible to wrap around
894 * the queue twice and mistakenly return IRQ_NONE. Linux only
895 * requires that 0.1% of your interrupts are handled, so this isn't
898 if (head
== nvmeq
->cq_head
&& phase
== nvmeq
->cq_phase
)
901 if (likely(nvmeq
->cq_vector
>= 0))
902 writel(head
, nvmeq
->q_db
+ nvmeq
->dev
->db_stride
);
903 nvmeq
->cq_head
= head
;
904 nvmeq
->cq_phase
= phase
;
909 static void nvme_process_cq(struct nvme_queue
*nvmeq
)
911 __nvme_process_cq(nvmeq
, NULL
);
914 static irqreturn_t
nvme_irq(int irq
, void *data
)
917 struct nvme_queue
*nvmeq
= data
;
918 spin_lock(&nvmeq
->q_lock
);
919 nvme_process_cq(nvmeq
);
920 result
= nvmeq
->cqe_seen
? IRQ_HANDLED
: IRQ_NONE
;
922 spin_unlock(&nvmeq
->q_lock
);
926 static irqreturn_t
nvme_irq_check(int irq
, void *data
)
928 struct nvme_queue
*nvmeq
= data
;
929 struct nvme_completion cqe
= nvmeq
->cqes
[nvmeq
->cq_head
];
930 if ((le16_to_cpu(cqe
.status
) & 1) != nvmeq
->cq_phase
)
932 return IRQ_WAKE_THREAD
;
935 static int nvme_poll(struct blk_mq_hw_ctx
*hctx
, unsigned int tag
)
937 struct nvme_queue
*nvmeq
= hctx
->driver_data
;
939 if ((le16_to_cpu(nvmeq
->cqes
[nvmeq
->cq_head
].status
) & 1) ==
941 spin_lock_irq(&nvmeq
->q_lock
);
942 __nvme_process_cq(nvmeq
, &tag
);
943 spin_unlock_irq(&nvmeq
->q_lock
);
952 static void nvme_submit_async_event(struct nvme_dev
*dev
)
954 struct nvme_command c
;
956 memset(&c
, 0, sizeof(c
));
957 c
.common
.opcode
= nvme_admin_async_event
;
958 c
.common
.command_id
= NVME_AQ_BLKMQ_DEPTH
+ --dev
->ctrl
.event_limit
;
960 __nvme_submit_cmd(dev
->queues
[0], &c
);
963 static void async_cmd_info_endio(struct request
*req
, int error
)
965 struct async_cmd_info
*cmdinfo
= req
->end_io_data
;
967 cmdinfo
->status
= req
->errors
;
968 queue_kthread_work(cmdinfo
->worker
, &cmdinfo
->work
);
969 blk_mq_free_request(req
);
972 static int adapter_delete_queue(struct nvme_dev
*dev
, u8 opcode
, u16 id
)
974 struct nvme_command c
;
976 memset(&c
, 0, sizeof(c
));
977 c
.delete_queue
.opcode
= opcode
;
978 c
.delete_queue
.qid
= cpu_to_le16(id
);
980 return nvme_submit_sync_cmd(dev
->ctrl
.admin_q
, &c
, NULL
, 0);
983 static int adapter_alloc_cq(struct nvme_dev
*dev
, u16 qid
,
984 struct nvme_queue
*nvmeq
)
986 struct nvme_command c
;
987 int flags
= NVME_QUEUE_PHYS_CONTIG
| NVME_CQ_IRQ_ENABLED
;
990 * Note: we (ab)use the fact the the prp fields survive if no data
991 * is attached to the request.
993 memset(&c
, 0, sizeof(c
));
994 c
.create_cq
.opcode
= nvme_admin_create_cq
;
995 c
.create_cq
.prp1
= cpu_to_le64(nvmeq
->cq_dma_addr
);
996 c
.create_cq
.cqid
= cpu_to_le16(qid
);
997 c
.create_cq
.qsize
= cpu_to_le16(nvmeq
->q_depth
- 1);
998 c
.create_cq
.cq_flags
= cpu_to_le16(flags
);
999 c
.create_cq
.irq_vector
= cpu_to_le16(nvmeq
->cq_vector
);
1001 return nvme_submit_sync_cmd(dev
->ctrl
.admin_q
, &c
, NULL
, 0);
1004 static int adapter_alloc_sq(struct nvme_dev
*dev
, u16 qid
,
1005 struct nvme_queue
*nvmeq
)
1007 struct nvme_command c
;
1008 int flags
= NVME_QUEUE_PHYS_CONTIG
| NVME_SQ_PRIO_MEDIUM
;
1011 * Note: we (ab)use the fact the the prp fields survive if no data
1012 * is attached to the request.
1014 memset(&c
, 0, sizeof(c
));
1015 c
.create_sq
.opcode
= nvme_admin_create_sq
;
1016 c
.create_sq
.prp1
= cpu_to_le64(nvmeq
->sq_dma_addr
);
1017 c
.create_sq
.sqid
= cpu_to_le16(qid
);
1018 c
.create_sq
.qsize
= cpu_to_le16(nvmeq
->q_depth
- 1);
1019 c
.create_sq
.sq_flags
= cpu_to_le16(flags
);
1020 c
.create_sq
.cqid
= cpu_to_le16(qid
);
1022 return nvme_submit_sync_cmd(dev
->ctrl
.admin_q
, &c
, NULL
, 0);
1025 static int adapter_delete_cq(struct nvme_dev
*dev
, u16 cqid
)
1027 return adapter_delete_queue(dev
, nvme_admin_delete_cq
, cqid
);
1030 static int adapter_delete_sq(struct nvme_dev
*dev
, u16 sqid
)
1032 return adapter_delete_queue(dev
, nvme_admin_delete_sq
, sqid
);
1035 static void abort_endio(struct request
*req
, int error
)
1037 struct nvme_cmd_info
*cmd
= blk_mq_rq_to_pdu(req
);
1038 struct nvme_queue
*nvmeq
= cmd
->nvmeq
;
1039 u32 result
= (u32
)(uintptr_t)req
->special
;
1040 u16 status
= req
->errors
;
1042 dev_warn(nvmeq
->q_dmadev
, "Abort status:%x result:%x", status
, result
);
1043 atomic_inc(&nvmeq
->dev
->ctrl
.abort_limit
);
1045 blk_mq_free_request(req
);
1048 static enum blk_eh_timer_return
nvme_timeout(struct request
*req
, bool reserved
)
1050 struct nvme_cmd_info
*cmd_rq
= blk_mq_rq_to_pdu(req
);
1051 struct nvme_queue
*nvmeq
= cmd_rq
->nvmeq
;
1052 struct nvme_dev
*dev
= nvmeq
->dev
;
1053 struct request
*abort_req
;
1054 struct nvme_command cmd
;
1057 * Shutdown immediately if controller times out while starting. The
1058 * reset work will see the pci device disabled when it gets the forced
1059 * cancellation error. All outstanding requests are completed on
1060 * shutdown, so we return BLK_EH_HANDLED.
1062 if (test_bit(NVME_CTRL_RESETTING
, &dev
->flags
)) {
1064 "I/O %d QID %d timeout, disable controller\n",
1065 req
->tag
, nvmeq
->qid
);
1066 nvme_dev_shutdown(dev
);
1067 req
->errors
= NVME_SC_CANCELLED
;
1068 return BLK_EH_HANDLED
;
1072 * Shutdown the controller immediately and schedule a reset if the
1073 * command was already aborted once before and still hasn't been
1074 * returned to the driver, or if this is the admin queue.
1076 if (!nvmeq
->qid
|| cmd_rq
->aborted
) {
1078 "I/O %d QID %d timeout, reset controller\n",
1079 req
->tag
, nvmeq
->qid
);
1080 nvme_dev_shutdown(dev
);
1081 queue_work(nvme_workq
, &dev
->reset_work
);
1084 * Mark the request as handled, since the inline shutdown
1085 * forces all outstanding requests to complete.
1087 req
->errors
= NVME_SC_CANCELLED
;
1088 return BLK_EH_HANDLED
;
1091 cmd_rq
->aborted
= 1;
1093 if (atomic_dec_return(&dev
->ctrl
.abort_limit
) < 0) {
1094 atomic_inc(&dev
->ctrl
.abort_limit
);
1095 return BLK_EH_RESET_TIMER
;
1098 memset(&cmd
, 0, sizeof(cmd
));
1099 cmd
.abort
.opcode
= nvme_admin_abort_cmd
;
1100 cmd
.abort
.cid
= req
->tag
;
1101 cmd
.abort
.sqid
= cpu_to_le16(nvmeq
->qid
);
1103 dev_warn(nvmeq
->q_dmadev
, "I/O %d QID %d timeout, aborting\n",
1104 req
->tag
, nvmeq
->qid
);
1106 abort_req
= nvme_alloc_request(dev
->ctrl
.admin_q
, &cmd
,
1108 if (IS_ERR(abort_req
)) {
1109 atomic_inc(&dev
->ctrl
.abort_limit
);
1110 return BLK_EH_RESET_TIMER
;
1113 abort_req
->timeout
= ADMIN_TIMEOUT
;
1114 abort_req
->end_io_data
= NULL
;
1115 blk_execute_rq_nowait(abort_req
->q
, NULL
, abort_req
, 0, abort_endio
);
1118 * The aborted req will be completed on receiving the abort req.
1119 * We enable the timer again. If hit twice, it'll cause a device reset,
1120 * as the device then is in a faulty state.
1122 return BLK_EH_RESET_TIMER
;
1125 static void nvme_cancel_queue_ios(struct request
*req
, void *data
, bool reserved
)
1127 struct nvme_queue
*nvmeq
= data
;
1129 nvme_completion_fn fn
;
1130 struct nvme_cmd_info
*cmd
;
1131 struct nvme_completion cqe
;
1133 if (!blk_mq_request_started(req
))
1136 cmd
= blk_mq_rq_to_pdu(req
);
1138 if (cmd
->ctx
== CMD_CTX_CANCELLED
)
1141 if (blk_queue_dying(req
->q
))
1142 cqe
.status
= cpu_to_le16((NVME_SC_ABORT_REQ
| NVME_SC_DNR
) << 1);
1144 cqe
.status
= cpu_to_le16(NVME_SC_ABORT_REQ
<< 1);
1147 dev_warn(nvmeq
->q_dmadev
, "Cancelling I/O %d QID %d\n",
1148 req
->tag
, nvmeq
->qid
);
1149 ctx
= cancel_cmd_info(cmd
, &fn
);
1150 fn(nvmeq
, ctx
, &cqe
);
1153 static void nvme_free_queue(struct nvme_queue
*nvmeq
)
1155 dma_free_coherent(nvmeq
->q_dmadev
, CQ_SIZE(nvmeq
->q_depth
),
1156 (void *)nvmeq
->cqes
, nvmeq
->cq_dma_addr
);
1158 dma_free_coherent(nvmeq
->q_dmadev
, SQ_SIZE(nvmeq
->q_depth
),
1159 nvmeq
->sq_cmds
, nvmeq
->sq_dma_addr
);
1163 static void nvme_free_queues(struct nvme_dev
*dev
, int lowest
)
1167 for (i
= dev
->queue_count
- 1; i
>= lowest
; i
--) {
1168 struct nvme_queue
*nvmeq
= dev
->queues
[i
];
1170 dev
->queues
[i
] = NULL
;
1171 nvme_free_queue(nvmeq
);
1176 * nvme_suspend_queue - put queue into suspended state
1177 * @nvmeq - queue to suspend
1179 static int nvme_suspend_queue(struct nvme_queue
*nvmeq
)
1183 spin_lock_irq(&nvmeq
->q_lock
);
1184 if (nvmeq
->cq_vector
== -1) {
1185 spin_unlock_irq(&nvmeq
->q_lock
);
1188 vector
= nvmeq
->dev
->entry
[nvmeq
->cq_vector
].vector
;
1189 nvmeq
->dev
->online_queues
--;
1190 nvmeq
->cq_vector
= -1;
1191 spin_unlock_irq(&nvmeq
->q_lock
);
1193 if (!nvmeq
->qid
&& nvmeq
->dev
->ctrl
.admin_q
)
1194 blk_mq_freeze_queue_start(nvmeq
->dev
->ctrl
.admin_q
);
1196 irq_set_affinity_hint(vector
, NULL
);
1197 free_irq(vector
, nvmeq
);
1202 static void nvme_clear_queue(struct nvme_queue
*nvmeq
)
1204 spin_lock_irq(&nvmeq
->q_lock
);
1205 if (nvmeq
->tags
&& *nvmeq
->tags
)
1206 blk_mq_all_tag_busy_iter(*nvmeq
->tags
, nvme_cancel_queue_ios
, nvmeq
);
1207 spin_unlock_irq(&nvmeq
->q_lock
);
1210 static void nvme_disable_queue(struct nvme_dev
*dev
, int qid
)
1212 struct nvme_queue
*nvmeq
= dev
->queues
[qid
];
1216 if (nvme_suspend_queue(nvmeq
))
1219 /* Don't tell the adapter to delete the admin queue.
1220 * Don't tell a removed adapter to delete IO queues. */
1221 if (qid
&& readl(dev
->bar
+ NVME_REG_CSTS
) != -1) {
1222 adapter_delete_sq(dev
, qid
);
1223 adapter_delete_cq(dev
, qid
);
1226 spin_lock_irq(&nvmeq
->q_lock
);
1227 nvme_process_cq(nvmeq
);
1228 spin_unlock_irq(&nvmeq
->q_lock
);
1231 static int nvme_cmb_qdepth(struct nvme_dev
*dev
, int nr_io_queues
,
1234 int q_depth
= dev
->q_depth
;
1235 unsigned q_size_aligned
= roundup(q_depth
* entry_size
,
1236 dev
->ctrl
.page_size
);
1238 if (q_size_aligned
* nr_io_queues
> dev
->cmb_size
) {
1239 u64 mem_per_q
= div_u64(dev
->cmb_size
, nr_io_queues
);
1240 mem_per_q
= round_down(mem_per_q
, dev
->ctrl
.page_size
);
1241 q_depth
= div_u64(mem_per_q
, entry_size
);
1244 * Ensure the reduced q_depth is above some threshold where it
1245 * would be better to map queues in system memory with the
1255 static int nvme_alloc_sq_cmds(struct nvme_dev
*dev
, struct nvme_queue
*nvmeq
,
1258 if (qid
&& dev
->cmb
&& use_cmb_sqes
&& NVME_CMB_SQS(dev
->cmbsz
)) {
1259 unsigned offset
= (qid
- 1) * roundup(SQ_SIZE(depth
),
1260 dev
->ctrl
.page_size
);
1261 nvmeq
->sq_dma_addr
= dev
->cmb_dma_addr
+ offset
;
1262 nvmeq
->sq_cmds_io
= dev
->cmb
+ offset
;
1264 nvmeq
->sq_cmds
= dma_alloc_coherent(dev
->dev
, SQ_SIZE(depth
),
1265 &nvmeq
->sq_dma_addr
, GFP_KERNEL
);
1266 if (!nvmeq
->sq_cmds
)
1273 static struct nvme_queue
*nvme_alloc_queue(struct nvme_dev
*dev
, int qid
,
1276 struct nvme_queue
*nvmeq
= kzalloc(sizeof(*nvmeq
), GFP_KERNEL
);
1280 nvmeq
->cqes
= dma_zalloc_coherent(dev
->dev
, CQ_SIZE(depth
),
1281 &nvmeq
->cq_dma_addr
, GFP_KERNEL
);
1285 if (nvme_alloc_sq_cmds(dev
, nvmeq
, qid
, depth
))
1288 nvmeq
->q_dmadev
= dev
->dev
;
1290 snprintf(nvmeq
->irqname
, sizeof(nvmeq
->irqname
), "nvme%dq%d",
1291 dev
->ctrl
.instance
, qid
);
1292 spin_lock_init(&nvmeq
->q_lock
);
1294 nvmeq
->cq_phase
= 1;
1295 nvmeq
->q_db
= &dev
->dbs
[qid
* 2 * dev
->db_stride
];
1296 nvmeq
->q_depth
= depth
;
1298 nvmeq
->cq_vector
= -1;
1299 dev
->queues
[qid
] = nvmeq
;
1301 /* make sure queue descriptor is set before queue count, for kthread */
1308 dma_free_coherent(dev
->dev
, CQ_SIZE(depth
), (void *)nvmeq
->cqes
,
1309 nvmeq
->cq_dma_addr
);
1315 static int queue_request_irq(struct nvme_dev
*dev
, struct nvme_queue
*nvmeq
,
1318 if (use_threaded_interrupts
)
1319 return request_threaded_irq(dev
->entry
[nvmeq
->cq_vector
].vector
,
1320 nvme_irq_check
, nvme_irq
, IRQF_SHARED
,
1322 return request_irq(dev
->entry
[nvmeq
->cq_vector
].vector
, nvme_irq
,
1323 IRQF_SHARED
, name
, nvmeq
);
1326 static void nvme_init_queue(struct nvme_queue
*nvmeq
, u16 qid
)
1328 struct nvme_dev
*dev
= nvmeq
->dev
;
1330 spin_lock_irq(&nvmeq
->q_lock
);
1333 nvmeq
->cq_phase
= 1;
1334 nvmeq
->q_db
= &dev
->dbs
[qid
* 2 * dev
->db_stride
];
1335 memset((void *)nvmeq
->cqes
, 0, CQ_SIZE(nvmeq
->q_depth
));
1336 dev
->online_queues
++;
1337 spin_unlock_irq(&nvmeq
->q_lock
);
1340 static int nvme_create_queue(struct nvme_queue
*nvmeq
, int qid
)
1342 struct nvme_dev
*dev
= nvmeq
->dev
;
1345 nvmeq
->cq_vector
= qid
- 1;
1346 result
= adapter_alloc_cq(dev
, qid
, nvmeq
);
1350 result
= adapter_alloc_sq(dev
, qid
, nvmeq
);
1354 result
= queue_request_irq(dev
, nvmeq
, nvmeq
->irqname
);
1358 nvme_init_queue(nvmeq
, qid
);
1362 adapter_delete_sq(dev
, qid
);
1364 adapter_delete_cq(dev
, qid
);
1368 static struct blk_mq_ops nvme_mq_admin_ops
= {
1369 .queue_rq
= nvme_queue_rq
,
1370 .map_queue
= blk_mq_map_queue
,
1371 .init_hctx
= nvme_admin_init_hctx
,
1372 .exit_hctx
= nvme_admin_exit_hctx
,
1373 .init_request
= nvme_admin_init_request
,
1374 .timeout
= nvme_timeout
,
1377 static struct blk_mq_ops nvme_mq_ops
= {
1378 .queue_rq
= nvme_queue_rq
,
1379 .map_queue
= blk_mq_map_queue
,
1380 .init_hctx
= nvme_init_hctx
,
1381 .init_request
= nvme_init_request
,
1382 .timeout
= nvme_timeout
,
1386 static void nvme_dev_remove_admin(struct nvme_dev
*dev
)
1388 if (dev
->ctrl
.admin_q
&& !blk_queue_dying(dev
->ctrl
.admin_q
)) {
1389 blk_cleanup_queue(dev
->ctrl
.admin_q
);
1390 blk_mq_free_tag_set(&dev
->admin_tagset
);
1394 static int nvme_alloc_admin_tags(struct nvme_dev
*dev
)
1396 if (!dev
->ctrl
.admin_q
) {
1397 dev
->admin_tagset
.ops
= &nvme_mq_admin_ops
;
1398 dev
->admin_tagset
.nr_hw_queues
= 1;
1399 dev
->admin_tagset
.queue_depth
= NVME_AQ_BLKMQ_DEPTH
;
1400 dev
->admin_tagset
.timeout
= ADMIN_TIMEOUT
;
1401 dev
->admin_tagset
.numa_node
= dev_to_node(dev
->dev
);
1402 dev
->admin_tagset
.cmd_size
= nvme_cmd_size(dev
);
1403 dev
->admin_tagset
.driver_data
= dev
;
1405 if (blk_mq_alloc_tag_set(&dev
->admin_tagset
))
1408 dev
->ctrl
.admin_q
= blk_mq_init_queue(&dev
->admin_tagset
);
1409 if (IS_ERR(dev
->ctrl
.admin_q
)) {
1410 blk_mq_free_tag_set(&dev
->admin_tagset
);
1413 if (!blk_get_queue(dev
->ctrl
.admin_q
)) {
1414 nvme_dev_remove_admin(dev
);
1415 dev
->ctrl
.admin_q
= NULL
;
1419 blk_mq_unfreeze_queue(dev
->ctrl
.admin_q
);
1424 static int nvme_configure_admin_queue(struct nvme_dev
*dev
)
1428 u64 cap
= lo_hi_readq(dev
->bar
+ NVME_REG_CAP
);
1429 struct nvme_queue
*nvmeq
;
1431 dev
->subsystem
= readl(dev
->bar
+ NVME_REG_VS
) >= NVME_VS(1, 1) ?
1432 NVME_CAP_NSSRC(cap
) : 0;
1434 if (dev
->subsystem
&&
1435 (readl(dev
->bar
+ NVME_REG_CSTS
) & NVME_CSTS_NSSRO
))
1436 writel(NVME_CSTS_NSSRO
, dev
->bar
+ NVME_REG_CSTS
);
1438 result
= nvme_disable_ctrl(&dev
->ctrl
, cap
);
1442 nvmeq
= dev
->queues
[0];
1444 nvmeq
= nvme_alloc_queue(dev
, 0, NVME_AQ_DEPTH
);
1449 aqa
= nvmeq
->q_depth
- 1;
1452 writel(aqa
, dev
->bar
+ NVME_REG_AQA
);
1453 lo_hi_writeq(nvmeq
->sq_dma_addr
, dev
->bar
+ NVME_REG_ASQ
);
1454 lo_hi_writeq(nvmeq
->cq_dma_addr
, dev
->bar
+ NVME_REG_ACQ
);
1456 result
= nvme_enable_ctrl(&dev
->ctrl
, cap
);
1460 nvmeq
->cq_vector
= 0;
1461 result
= queue_request_irq(dev
, nvmeq
, nvmeq
->irqname
);
1463 nvmeq
->cq_vector
= -1;
1470 nvme_free_queues(dev
, 0);
1474 static int nvme_kthread(void *data
)
1476 struct nvme_dev
*dev
, *next
;
1478 while (!kthread_should_stop()) {
1479 set_current_state(TASK_INTERRUPTIBLE
);
1480 spin_lock(&dev_list_lock
);
1481 list_for_each_entry_safe(dev
, next
, &dev_list
, node
) {
1483 u32 csts
= readl(dev
->bar
+ NVME_REG_CSTS
);
1486 * Skip controllers currently under reset.
1488 if (work_pending(&dev
->reset_work
) || work_busy(&dev
->reset_work
))
1491 if ((dev
->subsystem
&& (csts
& NVME_CSTS_NSSRO
)) ||
1492 csts
& NVME_CSTS_CFS
) {
1493 if (queue_work(nvme_workq
, &dev
->reset_work
)) {
1495 "Failed status: %x, reset controller\n",
1496 readl(dev
->bar
+ NVME_REG_CSTS
));
1500 for (i
= 0; i
< dev
->queue_count
; i
++) {
1501 struct nvme_queue
*nvmeq
= dev
->queues
[i
];
1504 spin_lock_irq(&nvmeq
->q_lock
);
1505 nvme_process_cq(nvmeq
);
1507 while (i
== 0 && dev
->ctrl
.event_limit
> 0)
1508 nvme_submit_async_event(dev
);
1509 spin_unlock_irq(&nvmeq
->q_lock
);
1512 spin_unlock(&dev_list_lock
);
1513 schedule_timeout(round_jiffies_relative(HZ
));
1518 static int nvme_create_io_queues(struct nvme_dev
*dev
)
1523 for (i
= dev
->queue_count
; i
<= dev
->max_qid
; i
++) {
1524 if (!nvme_alloc_queue(dev
, i
, dev
->q_depth
)) {
1530 for (i
= dev
->online_queues
; i
<= dev
->queue_count
- 1; i
++) {
1531 ret
= nvme_create_queue(dev
->queues
[i
], i
);
1533 nvme_free_queues(dev
, i
);
1539 * Ignore failing Create SQ/CQ commands, we can continue with less
1540 * than the desired aount of queues, and even a controller without
1541 * I/O queues an still be used to issue admin commands. This might
1542 * be useful to upgrade a buggy firmware for example.
1544 return ret
>= 0 ? 0 : ret
;
1547 static void __iomem
*nvme_map_cmb(struct nvme_dev
*dev
)
1549 u64 szu
, size
, offset
;
1551 resource_size_t bar_size
;
1552 struct pci_dev
*pdev
= to_pci_dev(dev
->dev
);
1554 dma_addr_t dma_addr
;
1559 dev
->cmbsz
= readl(dev
->bar
+ NVME_REG_CMBSZ
);
1560 if (!(NVME_CMB_SZ(dev
->cmbsz
)))
1563 cmbloc
= readl(dev
->bar
+ NVME_REG_CMBLOC
);
1565 szu
= (u64
)1 << (12 + 4 * NVME_CMB_SZU(dev
->cmbsz
));
1566 size
= szu
* NVME_CMB_SZ(dev
->cmbsz
);
1567 offset
= szu
* NVME_CMB_OFST(cmbloc
);
1568 bar_size
= pci_resource_len(pdev
, NVME_CMB_BIR(cmbloc
));
1570 if (offset
> bar_size
)
1574 * Controllers may support a CMB size larger than their BAR,
1575 * for example, due to being behind a bridge. Reduce the CMB to
1576 * the reported size of the BAR
1578 if (size
> bar_size
- offset
)
1579 size
= bar_size
- offset
;
1581 dma_addr
= pci_resource_start(pdev
, NVME_CMB_BIR(cmbloc
)) + offset
;
1582 cmb
= ioremap_wc(dma_addr
, size
);
1586 dev
->cmb_dma_addr
= dma_addr
;
1587 dev
->cmb_size
= size
;
1591 static inline void nvme_release_cmb(struct nvme_dev
*dev
)
1599 static size_t db_bar_size(struct nvme_dev
*dev
, unsigned nr_io_queues
)
1601 return 4096 + ((nr_io_queues
+ 1) * 8 * dev
->db_stride
);
1604 static int nvme_setup_io_queues(struct nvme_dev
*dev
)
1606 struct nvme_queue
*adminq
= dev
->queues
[0];
1607 struct pci_dev
*pdev
= to_pci_dev(dev
->dev
);
1608 int result
, i
, vecs
, nr_io_queues
, size
;
1610 nr_io_queues
= num_possible_cpus();
1611 result
= nvme_set_queue_count(&dev
->ctrl
, &nr_io_queues
);
1616 * Degraded controllers might return an error when setting the queue
1617 * count. We still want to be able to bring them online and offer
1618 * access to the admin queue, as that might be only way to fix them up.
1621 dev_err(dev
->dev
, "Could not set queue count (%d)\n", result
);
1626 if (dev
->cmb
&& NVME_CMB_SQS(dev
->cmbsz
)) {
1627 result
= nvme_cmb_qdepth(dev
, nr_io_queues
,
1628 sizeof(struct nvme_command
));
1630 dev
->q_depth
= result
;
1632 nvme_release_cmb(dev
);
1635 size
= db_bar_size(dev
, nr_io_queues
);
1639 dev
->bar
= ioremap(pci_resource_start(pdev
, 0), size
);
1642 if (!--nr_io_queues
)
1644 size
= db_bar_size(dev
, nr_io_queues
);
1646 dev
->dbs
= dev
->bar
+ 4096;
1647 adminq
->q_db
= dev
->dbs
;
1650 /* Deregister the admin queue's interrupt */
1651 free_irq(dev
->entry
[0].vector
, adminq
);
1654 * If we enable msix early due to not intx, disable it again before
1655 * setting up the full range we need.
1658 pci_disable_msix(pdev
);
1660 for (i
= 0; i
< nr_io_queues
; i
++)
1661 dev
->entry
[i
].entry
= i
;
1662 vecs
= pci_enable_msix_range(pdev
, dev
->entry
, 1, nr_io_queues
);
1664 vecs
= pci_enable_msi_range(pdev
, 1, min(nr_io_queues
, 32));
1668 for (i
= 0; i
< vecs
; i
++)
1669 dev
->entry
[i
].vector
= i
+ pdev
->irq
;
1674 * Should investigate if there's a performance win from allocating
1675 * more queues than interrupt vectors; it might allow the submission
1676 * path to scale better, even if the receive path is limited by the
1677 * number of interrupts.
1679 nr_io_queues
= vecs
;
1680 dev
->max_qid
= nr_io_queues
;
1682 result
= queue_request_irq(dev
, adminq
, adminq
->irqname
);
1684 adminq
->cq_vector
= -1;
1688 /* Free previously allocated queues that are no longer usable */
1689 nvme_free_queues(dev
, nr_io_queues
+ 1);
1690 return nvme_create_io_queues(dev
);
1693 nvme_free_queues(dev
, 1);
1697 static void nvme_set_irq_hints(struct nvme_dev
*dev
)
1699 struct nvme_queue
*nvmeq
;
1702 for (i
= 0; i
< dev
->online_queues
; i
++) {
1703 nvmeq
= dev
->queues
[i
];
1705 if (!nvmeq
->tags
|| !(*nvmeq
->tags
))
1708 irq_set_affinity_hint(dev
->entry
[nvmeq
->cq_vector
].vector
,
1709 blk_mq_tags_cpumask(*nvmeq
->tags
));
1713 static void nvme_dev_scan(struct work_struct
*work
)
1715 struct nvme_dev
*dev
= container_of(work
, struct nvme_dev
, scan_work
);
1717 if (!dev
->tagset
.tags
)
1719 nvme_scan_namespaces(&dev
->ctrl
);
1720 nvme_set_irq_hints(dev
);
1724 * Return: error value if an error occurred setting up the queues or calling
1725 * Identify Device. 0 if these succeeded, even if adding some of the
1726 * namespaces failed. At the moment, these failures are silent. TBD which
1727 * failures should be reported.
1729 static int nvme_dev_add(struct nvme_dev
*dev
)
1731 if (!dev
->ctrl
.tagset
) {
1732 dev
->tagset
.ops
= &nvme_mq_ops
;
1733 dev
->tagset
.nr_hw_queues
= dev
->online_queues
- 1;
1734 dev
->tagset
.timeout
= NVME_IO_TIMEOUT
;
1735 dev
->tagset
.numa_node
= dev_to_node(dev
->dev
);
1736 dev
->tagset
.queue_depth
=
1737 min_t(int, dev
->q_depth
, BLK_MQ_MAX_DEPTH
) - 1;
1738 dev
->tagset
.cmd_size
= nvme_cmd_size(dev
);
1739 dev
->tagset
.flags
= BLK_MQ_F_SHOULD_MERGE
;
1740 dev
->tagset
.driver_data
= dev
;
1742 if (blk_mq_alloc_tag_set(&dev
->tagset
))
1744 dev
->ctrl
.tagset
= &dev
->tagset
;
1746 queue_work(nvme_workq
, &dev
->scan_work
);
1750 static int nvme_dev_map(struct nvme_dev
*dev
)
1753 int bars
, result
= -ENOMEM
;
1754 struct pci_dev
*pdev
= to_pci_dev(dev
->dev
);
1756 if (pci_enable_device_mem(pdev
))
1759 dev
->entry
[0].vector
= pdev
->irq
;
1760 pci_set_master(pdev
);
1761 bars
= pci_select_bars(pdev
, IORESOURCE_MEM
);
1765 if (pci_request_selected_regions(pdev
, bars
, "nvme"))
1768 if (dma_set_mask_and_coherent(dev
->dev
, DMA_BIT_MASK(64)) &&
1769 dma_set_mask_and_coherent(dev
->dev
, DMA_BIT_MASK(32)))
1772 dev
->bar
= ioremap(pci_resource_start(pdev
, 0), 8192);
1776 if (readl(dev
->bar
+ NVME_REG_CSTS
) == -1) {
1782 * Some devices don't advertse INTx interrupts, pre-enable a single
1783 * MSIX vec for setup. We'll adjust this later.
1786 result
= pci_enable_msix(pdev
, dev
->entry
, 1);
1791 cap
= lo_hi_readq(dev
->bar
+ NVME_REG_CAP
);
1793 dev
->q_depth
= min_t(int, NVME_CAP_MQES(cap
) + 1, NVME_Q_DEPTH
);
1794 dev
->db_stride
= 1 << NVME_CAP_STRIDE(cap
);
1795 dev
->dbs
= dev
->bar
+ 4096;
1796 if (readl(dev
->bar
+ NVME_REG_VS
) >= NVME_VS(1, 2))
1797 dev
->cmb
= nvme_map_cmb(dev
);
1805 pci_release_regions(pdev
);
1807 pci_disable_device(pdev
);
1811 static void nvme_dev_unmap(struct nvme_dev
*dev
)
1813 struct pci_dev
*pdev
= to_pci_dev(dev
->dev
);
1815 if (pdev
->msi_enabled
)
1816 pci_disable_msi(pdev
);
1817 else if (pdev
->msix_enabled
)
1818 pci_disable_msix(pdev
);
1823 pci_release_regions(pdev
);
1826 if (pci_is_enabled(pdev
))
1827 pci_disable_device(pdev
);
1830 struct nvme_delq_ctx
{
1831 struct task_struct
*waiter
;
1832 struct kthread_worker
*worker
;
1836 static void nvme_wait_dq(struct nvme_delq_ctx
*dq
, struct nvme_dev
*dev
)
1838 dq
->waiter
= current
;
1842 set_current_state(TASK_KILLABLE
);
1843 if (!atomic_read(&dq
->refcount
))
1845 if (!schedule_timeout(ADMIN_TIMEOUT
) ||
1846 fatal_signal_pending(current
)) {
1848 * Disable the controller first since we can't trust it
1849 * at this point, but leave the admin queue enabled
1850 * until all queue deletion requests are flushed.
1851 * FIXME: This may take a while if there are more h/w
1852 * queues than admin tags.
1854 set_current_state(TASK_RUNNING
);
1855 nvme_disable_ctrl(&dev
->ctrl
,
1856 lo_hi_readq(dev
->bar
+ NVME_REG_CAP
));
1857 nvme_clear_queue(dev
->queues
[0]);
1858 flush_kthread_worker(dq
->worker
);
1859 nvme_disable_queue(dev
, 0);
1863 set_current_state(TASK_RUNNING
);
1866 static void nvme_put_dq(struct nvme_delq_ctx
*dq
)
1868 atomic_dec(&dq
->refcount
);
1870 wake_up_process(dq
->waiter
);
1873 static struct nvme_delq_ctx
*nvme_get_dq(struct nvme_delq_ctx
*dq
)
1875 atomic_inc(&dq
->refcount
);
1879 static void nvme_del_queue_end(struct nvme_queue
*nvmeq
)
1881 struct nvme_delq_ctx
*dq
= nvmeq
->cmdinfo
.ctx
;
1884 spin_lock_irq(&nvmeq
->q_lock
);
1885 nvme_process_cq(nvmeq
);
1886 spin_unlock_irq(&nvmeq
->q_lock
);
1889 static int adapter_async_del_queue(struct nvme_queue
*nvmeq
, u8 opcode
,
1890 kthread_work_func_t fn
)
1892 struct request
*req
;
1893 struct nvme_command c
;
1895 memset(&c
, 0, sizeof(c
));
1896 c
.delete_queue
.opcode
= opcode
;
1897 c
.delete_queue
.qid
= cpu_to_le16(nvmeq
->qid
);
1899 init_kthread_work(&nvmeq
->cmdinfo
.work
, fn
);
1901 req
= nvme_alloc_request(nvmeq
->dev
->ctrl
.admin_q
, &c
, 0);
1903 return PTR_ERR(req
);
1905 req
->timeout
= ADMIN_TIMEOUT
;
1906 req
->end_io_data
= &nvmeq
->cmdinfo
;
1907 blk_execute_rq_nowait(req
->q
, NULL
, req
, 0, async_cmd_info_endio
);
1911 static void nvme_del_cq_work_handler(struct kthread_work
*work
)
1913 struct nvme_queue
*nvmeq
= container_of(work
, struct nvme_queue
,
1915 nvme_del_queue_end(nvmeq
);
1918 static int nvme_delete_cq(struct nvme_queue
*nvmeq
)
1920 return adapter_async_del_queue(nvmeq
, nvme_admin_delete_cq
,
1921 nvme_del_cq_work_handler
);
1924 static void nvme_del_sq_work_handler(struct kthread_work
*work
)
1926 struct nvme_queue
*nvmeq
= container_of(work
, struct nvme_queue
,
1928 int status
= nvmeq
->cmdinfo
.status
;
1931 status
= nvme_delete_cq(nvmeq
);
1933 nvme_del_queue_end(nvmeq
);
1936 static int nvme_delete_sq(struct nvme_queue
*nvmeq
)
1938 return adapter_async_del_queue(nvmeq
, nvme_admin_delete_sq
,
1939 nvme_del_sq_work_handler
);
1942 static void nvme_del_queue_start(struct kthread_work
*work
)
1944 struct nvme_queue
*nvmeq
= container_of(work
, struct nvme_queue
,
1946 if (nvme_delete_sq(nvmeq
))
1947 nvme_del_queue_end(nvmeq
);
1950 static void nvme_disable_io_queues(struct nvme_dev
*dev
)
1953 DEFINE_KTHREAD_WORKER_ONSTACK(worker
);
1954 struct nvme_delq_ctx dq
;
1955 struct task_struct
*kworker_task
= kthread_run(kthread_worker_fn
,
1956 &worker
, "nvme%d", dev
->ctrl
.instance
);
1958 if (IS_ERR(kworker_task
)) {
1960 "Failed to create queue del task\n");
1961 for (i
= dev
->queue_count
- 1; i
> 0; i
--)
1962 nvme_disable_queue(dev
, i
);
1967 atomic_set(&dq
.refcount
, 0);
1968 dq
.worker
= &worker
;
1969 for (i
= dev
->queue_count
- 1; i
> 0; i
--) {
1970 struct nvme_queue
*nvmeq
= dev
->queues
[i
];
1972 if (nvme_suspend_queue(nvmeq
))
1974 nvmeq
->cmdinfo
.ctx
= nvme_get_dq(&dq
);
1975 nvmeq
->cmdinfo
.worker
= dq
.worker
;
1976 init_kthread_work(&nvmeq
->cmdinfo
.work
, nvme_del_queue_start
);
1977 queue_kthread_work(dq
.worker
, &nvmeq
->cmdinfo
.work
);
1979 nvme_wait_dq(&dq
, dev
);
1980 kthread_stop(kworker_task
);
1983 static int nvme_dev_list_add(struct nvme_dev
*dev
)
1985 bool start_thread
= false;
1987 spin_lock(&dev_list_lock
);
1988 if (list_empty(&dev_list
) && IS_ERR_OR_NULL(nvme_thread
)) {
1989 start_thread
= true;
1992 list_add(&dev
->node
, &dev_list
);
1993 spin_unlock(&dev_list_lock
);
1996 nvme_thread
= kthread_run(nvme_kthread
, NULL
, "nvme");
1997 wake_up_all(&nvme_kthread_wait
);
1999 wait_event_killable(nvme_kthread_wait
, nvme_thread
);
2001 if (IS_ERR_OR_NULL(nvme_thread
))
2002 return nvme_thread
? PTR_ERR(nvme_thread
) : -EINTR
;
2008 * Remove the node from the device list and check
2009 * for whether or not we need to stop the nvme_thread.
2011 static void nvme_dev_list_remove(struct nvme_dev
*dev
)
2013 struct task_struct
*tmp
= NULL
;
2015 spin_lock(&dev_list_lock
);
2016 list_del_init(&dev
->node
);
2017 if (list_empty(&dev_list
) && !IS_ERR_OR_NULL(nvme_thread
)) {
2021 spin_unlock(&dev_list_lock
);
2027 static void nvme_freeze_queues(struct nvme_dev
*dev
)
2031 list_for_each_entry(ns
, &dev
->ctrl
.namespaces
, list
) {
2032 blk_mq_freeze_queue_start(ns
->queue
);
2034 spin_lock_irq(ns
->queue
->queue_lock
);
2035 queue_flag_set(QUEUE_FLAG_STOPPED
, ns
->queue
);
2036 spin_unlock_irq(ns
->queue
->queue_lock
);
2038 blk_mq_cancel_requeue_work(ns
->queue
);
2039 blk_mq_stop_hw_queues(ns
->queue
);
2043 static void nvme_unfreeze_queues(struct nvme_dev
*dev
)
2047 list_for_each_entry(ns
, &dev
->ctrl
.namespaces
, list
) {
2048 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED
, ns
->queue
);
2049 blk_mq_unfreeze_queue(ns
->queue
);
2050 blk_mq_start_stopped_hw_queues(ns
->queue
, true);
2051 blk_mq_kick_requeue_list(ns
->queue
);
2055 static void nvme_dev_shutdown(struct nvme_dev
*dev
)
2060 nvme_dev_list_remove(dev
);
2062 mutex_lock(&dev
->shutdown_lock
);
2064 nvme_freeze_queues(dev
);
2065 csts
= readl(dev
->bar
+ NVME_REG_CSTS
);
2067 if (csts
& NVME_CSTS_CFS
|| !(csts
& NVME_CSTS_RDY
)) {
2068 for (i
= dev
->queue_count
- 1; i
>= 0; i
--) {
2069 struct nvme_queue
*nvmeq
= dev
->queues
[i
];
2070 nvme_suspend_queue(nvmeq
);
2073 nvme_disable_io_queues(dev
);
2074 nvme_shutdown_ctrl(&dev
->ctrl
);
2075 nvme_disable_queue(dev
, 0);
2077 nvme_dev_unmap(dev
);
2079 for (i
= dev
->queue_count
- 1; i
>= 0; i
--)
2080 nvme_clear_queue(dev
->queues
[i
]);
2081 mutex_unlock(&dev
->shutdown_lock
);
2084 static int nvme_setup_prp_pools(struct nvme_dev
*dev
)
2086 dev
->prp_page_pool
= dma_pool_create("prp list page", dev
->dev
,
2087 PAGE_SIZE
, PAGE_SIZE
, 0);
2088 if (!dev
->prp_page_pool
)
2091 /* Optimisation for I/Os between 4k and 128k */
2092 dev
->prp_small_pool
= dma_pool_create("prp list 256", dev
->dev
,
2094 if (!dev
->prp_small_pool
) {
2095 dma_pool_destroy(dev
->prp_page_pool
);
2101 static void nvme_release_prp_pools(struct nvme_dev
*dev
)
2103 dma_pool_destroy(dev
->prp_page_pool
);
2104 dma_pool_destroy(dev
->prp_small_pool
);
2107 static void nvme_pci_free_ctrl(struct nvme_ctrl
*ctrl
)
2109 struct nvme_dev
*dev
= to_nvme_dev(ctrl
);
2111 put_device(dev
->dev
);
2112 if (dev
->tagset
.tags
)
2113 blk_mq_free_tag_set(&dev
->tagset
);
2114 if (dev
->ctrl
.admin_q
)
2115 blk_put_queue(dev
->ctrl
.admin_q
);
2121 static void nvme_reset_work(struct work_struct
*work
)
2123 struct nvme_dev
*dev
= container_of(work
, struct nvme_dev
, reset_work
);
2126 if (WARN_ON(test_bit(NVME_CTRL_RESETTING
, &dev
->flags
)))
2130 * If we're called to reset a live controller first shut it down before
2134 nvme_dev_shutdown(dev
);
2136 set_bit(NVME_CTRL_RESETTING
, &dev
->flags
);
2138 result
= nvme_dev_map(dev
);
2142 result
= nvme_configure_admin_queue(dev
);
2146 nvme_init_queue(dev
->queues
[0], 0);
2147 result
= nvme_alloc_admin_tags(dev
);
2151 result
= nvme_init_identify(&dev
->ctrl
);
2155 result
= nvme_setup_io_queues(dev
);
2159 dev
->ctrl
.event_limit
= NVME_NR_AEN_COMMANDS
;
2161 result
= nvme_dev_list_add(dev
);
2166 * Keep the controller around but remove all namespaces if we don't have
2167 * any working I/O queue.
2169 if (dev
->online_queues
< 2) {
2170 dev_warn(dev
->dev
, "IO queues not created\n");
2171 nvme_remove_namespaces(&dev
->ctrl
);
2173 nvme_unfreeze_queues(dev
);
2177 clear_bit(NVME_CTRL_RESETTING
, &dev
->flags
);
2181 nvme_dev_list_remove(dev
);
2183 nvme_dev_remove_admin(dev
);
2184 blk_put_queue(dev
->ctrl
.admin_q
);
2185 dev
->ctrl
.admin_q
= NULL
;
2186 dev
->queues
[0]->tags
= NULL
;
2188 nvme_disable_queue(dev
, 0);
2190 nvme_dev_unmap(dev
);
2192 nvme_remove_dead_ctrl(dev
);
2195 static void nvme_remove_dead_ctrl_work(struct work_struct
*work
)
2197 struct nvme_dev
*dev
= container_of(work
, struct nvme_dev
, remove_work
);
2198 struct pci_dev
*pdev
= to_pci_dev(dev
->dev
);
2200 if (pci_get_drvdata(pdev
))
2201 pci_stop_and_remove_bus_device_locked(pdev
);
2202 nvme_put_ctrl(&dev
->ctrl
);
2205 static void nvme_remove_dead_ctrl(struct nvme_dev
*dev
)
2207 dev_warn(dev
->dev
, "Removing after probe failure\n");
2208 kref_get(&dev
->ctrl
.kref
);
2209 if (!schedule_work(&dev
->remove_work
))
2210 nvme_put_ctrl(&dev
->ctrl
);
2213 static int nvme_reset(struct nvme_dev
*dev
)
2215 if (!dev
->ctrl
.admin_q
|| blk_queue_dying(dev
->ctrl
.admin_q
))
2218 if (!queue_work(nvme_workq
, &dev
->reset_work
))
2221 flush_work(&dev
->reset_work
);
2225 static int nvme_pci_reg_read32(struct nvme_ctrl
*ctrl
, u32 off
, u32
*val
)
2227 *val
= readl(to_nvme_dev(ctrl
)->bar
+ off
);
2231 static int nvme_pci_reg_write32(struct nvme_ctrl
*ctrl
, u32 off
, u32 val
)
2233 writel(val
, to_nvme_dev(ctrl
)->bar
+ off
);
2237 static int nvme_pci_reg_read64(struct nvme_ctrl
*ctrl
, u32 off
, u64
*val
)
2239 *val
= readq(to_nvme_dev(ctrl
)->bar
+ off
);
2243 static bool nvme_pci_io_incapable(struct nvme_ctrl
*ctrl
)
2245 struct nvme_dev
*dev
= to_nvme_dev(ctrl
);
2247 return !dev
->bar
|| dev
->online_queues
< 2;
2250 static int nvme_pci_reset_ctrl(struct nvme_ctrl
*ctrl
)
2252 return nvme_reset(to_nvme_dev(ctrl
));
2255 static const struct nvme_ctrl_ops nvme_pci_ctrl_ops
= {
2256 .reg_read32
= nvme_pci_reg_read32
,
2257 .reg_write32
= nvme_pci_reg_write32
,
2258 .reg_read64
= nvme_pci_reg_read64
,
2259 .io_incapable
= nvme_pci_io_incapable
,
2260 .reset_ctrl
= nvme_pci_reset_ctrl
,
2261 .free_ctrl
= nvme_pci_free_ctrl
,
2264 static int nvme_probe(struct pci_dev
*pdev
, const struct pci_device_id
*id
)
2266 int node
, result
= -ENOMEM
;
2267 struct nvme_dev
*dev
;
2269 node
= dev_to_node(&pdev
->dev
);
2270 if (node
== NUMA_NO_NODE
)
2271 set_dev_node(&pdev
->dev
, 0);
2273 dev
= kzalloc_node(sizeof(*dev
), GFP_KERNEL
, node
);
2276 dev
->entry
= kzalloc_node(num_possible_cpus() * sizeof(*dev
->entry
),
2280 dev
->queues
= kzalloc_node((num_possible_cpus() + 1) * sizeof(void *),
2285 dev
->dev
= get_device(&pdev
->dev
);
2286 pci_set_drvdata(pdev
, dev
);
2288 INIT_LIST_HEAD(&dev
->node
);
2289 INIT_WORK(&dev
->scan_work
, nvme_dev_scan
);
2290 INIT_WORK(&dev
->reset_work
, nvme_reset_work
);
2291 INIT_WORK(&dev
->remove_work
, nvme_remove_dead_ctrl_work
);
2292 mutex_init(&dev
->shutdown_lock
);
2294 result
= nvme_setup_prp_pools(dev
);
2298 result
= nvme_init_ctrl(&dev
->ctrl
, &pdev
->dev
, &nvme_pci_ctrl_ops
,
2303 queue_work(nvme_workq
, &dev
->reset_work
);
2307 nvme_release_prp_pools(dev
);
2309 put_device(dev
->dev
);
2317 static void nvme_reset_notify(struct pci_dev
*pdev
, bool prepare
)
2319 struct nvme_dev
*dev
= pci_get_drvdata(pdev
);
2322 nvme_dev_shutdown(dev
);
2324 queue_work(nvme_workq
, &dev
->reset_work
);
2327 static void nvme_shutdown(struct pci_dev
*pdev
)
2329 struct nvme_dev
*dev
= pci_get_drvdata(pdev
);
2330 nvme_dev_shutdown(dev
);
2333 static void nvme_remove(struct pci_dev
*pdev
)
2335 struct nvme_dev
*dev
= pci_get_drvdata(pdev
);
2337 spin_lock(&dev_list_lock
);
2338 list_del_init(&dev
->node
);
2339 spin_unlock(&dev_list_lock
);
2341 pci_set_drvdata(pdev
, NULL
);
2342 flush_work(&dev
->reset_work
);
2343 flush_work(&dev
->scan_work
);
2344 nvme_remove_namespaces(&dev
->ctrl
);
2345 nvme_uninit_ctrl(&dev
->ctrl
);
2346 nvme_dev_shutdown(dev
);
2347 nvme_dev_remove_admin(dev
);
2348 nvme_free_queues(dev
, 0);
2349 nvme_release_cmb(dev
);
2350 nvme_release_prp_pools(dev
);
2351 nvme_put_ctrl(&dev
->ctrl
);
2354 /* These functions are yet to be implemented */
2355 #define nvme_error_detected NULL
2356 #define nvme_dump_registers NULL
2357 #define nvme_link_reset NULL
2358 #define nvme_slot_reset NULL
2359 #define nvme_error_resume NULL
2361 #ifdef CONFIG_PM_SLEEP
2362 static int nvme_suspend(struct device
*dev
)
2364 struct pci_dev
*pdev
= to_pci_dev(dev
);
2365 struct nvme_dev
*ndev
= pci_get_drvdata(pdev
);
2367 nvme_dev_shutdown(ndev
);
2371 static int nvme_resume(struct device
*dev
)
2373 struct pci_dev
*pdev
= to_pci_dev(dev
);
2374 struct nvme_dev
*ndev
= pci_get_drvdata(pdev
);
2376 queue_work(nvme_workq
, &ndev
->reset_work
);
2381 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops
, nvme_suspend
, nvme_resume
);
2383 static const struct pci_error_handlers nvme_err_handler
= {
2384 .error_detected
= nvme_error_detected
,
2385 .mmio_enabled
= nvme_dump_registers
,
2386 .link_reset
= nvme_link_reset
,
2387 .slot_reset
= nvme_slot_reset
,
2388 .resume
= nvme_error_resume
,
2389 .reset_notify
= nvme_reset_notify
,
2392 /* Move to pci_ids.h later */
2393 #define PCI_CLASS_STORAGE_EXPRESS 0x010802
2395 static const struct pci_device_id nvme_id_table
[] = {
2396 { PCI_VDEVICE(INTEL
, 0x0953),
2397 .driver_data
= NVME_QUIRK_STRIPE_SIZE
, },
2398 { PCI_VDEVICE(INTEL
, 0x5845), /* Qemu emulated controller */
2399 .driver_data
= NVME_QUIRK_IDENTIFY_CNS
, },
2400 { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS
, 0xffffff) },
2401 { PCI_DEVICE(PCI_VENDOR_ID_APPLE
, 0x2001) },
2404 MODULE_DEVICE_TABLE(pci
, nvme_id_table
);
2406 static struct pci_driver nvme_driver
= {
2408 .id_table
= nvme_id_table
,
2409 .probe
= nvme_probe
,
2410 .remove
= nvme_remove
,
2411 .shutdown
= nvme_shutdown
,
2413 .pm
= &nvme_dev_pm_ops
,
2415 .err_handler
= &nvme_err_handler
,
2418 static int __init
nvme_init(void)
2422 init_waitqueue_head(&nvme_kthread_wait
);
2424 nvme_workq
= alloc_workqueue("nvme", WQ_UNBOUND
| WQ_MEM_RECLAIM
, 0);
2428 result
= nvme_core_init();
2432 result
= pci_register_driver(&nvme_driver
);
2440 destroy_workqueue(nvme_workq
);
2444 static void __exit
nvme_exit(void)
2446 pci_unregister_driver(&nvme_driver
);
2448 destroy_workqueue(nvme_workq
);
2449 BUG_ON(nvme_thread
&& !IS_ERR(nvme_thread
));
2453 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
2454 MODULE_LICENSE("GPL");
2455 MODULE_VERSION("1.0");
2456 module_init(nvme_init
);
2457 module_exit(nvme_exit
);