2 * Copyright (C) 2011 Google, Inc.
3 * Copyright (C) 2012 Intel, Inc.
4 * Copyright (C) 2013 Intel, Inc.
5 * Copyright (C) 2014 Linaro Limited
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
18 /* This source file contains the implementation of a special device driver
19 * that intends to provide a *very* fast communication channel between the
20 * guest system and the QEMU emulator.
22 * Usage from the guest is simply the following (error handling simplified):
24 * int fd = open("/dev/qemu_pipe",O_RDWR);
25 * .... write() or read() through the pipe.
27 * This driver doesn't deal with the exact protocol used during the session.
28 * It is intended to be as simple as something like:
30 * // do this _just_ after opening the fd to connect to a specific
31 * // emulator service.
32 * const char* msg = "<pipename>";
33 * if (write(fd, msg, strlen(msg)+1) < 0) {
34 * ... could not connect to <pipename> service
38 * // after this, simply read() and write() to communicate with the
39 * // service. Exact protocol details left as an exercise to the reader.
41 * This driver is very fast because it doesn't copy any data through
42 * intermediate buffers, since the emulator is capable of translating
43 * guest user addresses into host ones.
45 * Note that we must however ensure that each user page involved in the
46 * exchange is properly mapped during a transfer.
49 #include <linux/module.h>
50 #include <linux/interrupt.h>
51 #include <linux/kernel.h>
52 #include <linux/spinlock.h>
53 #include <linux/miscdevice.h>
54 #include <linux/platform_device.h>
55 #include <linux/poll.h>
56 #include <linux/sched.h>
57 #include <linux/bitops.h>
58 #include <linux/slab.h>
60 #include <linux/goldfish.h>
61 #include <linux/dma-mapping.h>
63 #include <linux/acpi.h>
66 * IMPORTANT: The following constants must match the ones used and defined
67 * in external/qemu/hw/goldfish_pipe.c in the Android source tree.
70 /* pipe device registers */
71 #define PIPE_REG_COMMAND 0x00 /* write: value = command */
72 #define PIPE_REG_STATUS 0x04 /* read */
73 #define PIPE_REG_CHANNEL 0x08 /* read/write: channel id */
74 #define PIPE_REG_CHANNEL_HIGH 0x30 /* read/write: channel id */
75 #define PIPE_REG_SIZE 0x0c /* read/write: buffer size */
76 #define PIPE_REG_ADDRESS 0x10 /* write: physical address */
77 #define PIPE_REG_ADDRESS_HIGH 0x34 /* write: physical address */
78 #define PIPE_REG_WAKES 0x14 /* read: wake flags */
79 #define PIPE_REG_PARAMS_ADDR_LOW 0x18 /* read/write: batch data address */
80 #define PIPE_REG_PARAMS_ADDR_HIGH 0x1c /* read/write: batch data address */
81 #define PIPE_REG_ACCESS_PARAMS 0x20 /* write: batch access */
82 #define PIPE_REG_VERSION 0x24 /* read: device version */
84 /* list of commands for PIPE_REG_COMMAND */
85 #define CMD_OPEN 1 /* open new channel */
86 #define CMD_CLOSE 2 /* close channel (from guest) */
87 #define CMD_POLL 3 /* poll read/write status */
89 /* List of bitflags returned in status of CMD_POLL command */
90 #define PIPE_POLL_IN (1 << 0)
91 #define PIPE_POLL_OUT (1 << 1)
92 #define PIPE_POLL_HUP (1 << 2)
94 /* The following commands are related to write operations */
95 #define CMD_WRITE_BUFFER 4 /* send a user buffer to the emulator */
96 #define CMD_WAKE_ON_WRITE 5 /* tell the emulator to wake us when writing
98 #define CMD_READ_BUFFER 6 /* receive a user buffer from the emulator */
99 #define CMD_WAKE_ON_READ 7 /* tell the emulator to wake us when reading
102 /* Possible status values used to signal errors - see goldfish_pipe_error_convert */
103 #define PIPE_ERROR_INVAL -1
104 #define PIPE_ERROR_AGAIN -2
105 #define PIPE_ERROR_NOMEM -3
106 #define PIPE_ERROR_IO -4
108 /* Bit-flags used to signal events from the emulator */
109 #define PIPE_WAKE_CLOSED (1 << 0) /* emulator closed pipe */
110 #define PIPE_WAKE_READ (1 << 1) /* pipe can now be read from */
111 #define PIPE_WAKE_WRITE (1 << 2) /* pipe can now be written to */
113 struct access_params
{
114 unsigned long channel
;
116 unsigned long address
;
119 /* reserved for future extension */
123 /* The global driver data. Holds a reference to the i/o page used to
124 * communicate with the emulator, and a wake queue for blocked tasks
125 * waiting to be awoken.
127 struct goldfish_pipe_dev
{
129 unsigned char __iomem
*base
;
130 struct access_params
*aps
;
135 static struct goldfish_pipe_dev pipe_dev
[1];
137 /* This data type models a given pipe instance */
138 struct goldfish_pipe
{
139 struct goldfish_pipe_dev
*dev
;
142 wait_queue_head_t wake_queue
;
146 /* Bit flags for the 'flags' field */
148 BIT_CLOSED_ON_HOST
= 0, /* pipe closed by host */
149 BIT_WAKE_ON_WRITE
= 1, /* want to be woken on writes */
150 BIT_WAKE_ON_READ
= 2, /* want to be woken on reads */
154 static u32
goldfish_cmd_status(struct goldfish_pipe
*pipe
, u32 cmd
)
158 struct goldfish_pipe_dev
*dev
= pipe
->dev
;
160 spin_lock_irqsave(&dev
->lock
, flags
);
161 gf_write_ptr(pipe
, dev
->base
+ PIPE_REG_CHANNEL
,
162 dev
->base
+ PIPE_REG_CHANNEL_HIGH
);
163 writel(cmd
, dev
->base
+ PIPE_REG_COMMAND
);
164 status
= readl(dev
->base
+ PIPE_REG_STATUS
);
165 spin_unlock_irqrestore(&dev
->lock
, flags
);
169 static void goldfish_cmd(struct goldfish_pipe
*pipe
, u32 cmd
)
172 struct goldfish_pipe_dev
*dev
= pipe
->dev
;
174 spin_lock_irqsave(&dev
->lock
, flags
);
175 gf_write_ptr(pipe
, dev
->base
+ PIPE_REG_CHANNEL
,
176 dev
->base
+ PIPE_REG_CHANNEL_HIGH
);
177 writel(cmd
, dev
->base
+ PIPE_REG_COMMAND
);
178 spin_unlock_irqrestore(&dev
->lock
, flags
);
181 /* This function converts an error code returned by the emulator through
182 * the PIPE_REG_STATUS i/o register into a valid negative errno value.
184 static int goldfish_pipe_error_convert(int status
)
187 case PIPE_ERROR_AGAIN
:
189 case PIPE_ERROR_NOMEM
:
199 * Notice: QEMU will return 0 for un-known register access, indicating
200 * param_acess is supported or not
202 static int valid_batchbuffer_addr(struct goldfish_pipe_dev
*dev
,
203 struct access_params
*aps
)
207 aph
= readl(dev
->base
+ PIPE_REG_PARAMS_ADDR_HIGH
);
208 apl
= readl(dev
->base
+ PIPE_REG_PARAMS_ADDR_LOW
);
210 paddr
= ((u64
)aph
<< 32) | apl
;
211 if (paddr
!= (__pa(aps
)))
217 static int setup_access_params_addr(struct platform_device
*pdev
,
218 struct goldfish_pipe_dev
*dev
)
220 dma_addr_t dma_handle
;
221 struct access_params
*aps
;
223 aps
= dmam_alloc_coherent(&pdev
->dev
, sizeof(struct access_params
),
224 &dma_handle
, GFP_KERNEL
);
228 writel(upper_32_bits(dma_handle
), dev
->base
+ PIPE_REG_PARAMS_ADDR_HIGH
);
229 writel(lower_32_bits(dma_handle
), dev
->base
+ PIPE_REG_PARAMS_ADDR_LOW
);
231 if (valid_batchbuffer_addr(dev
, aps
)) {
238 /* A value that will not be set by qemu emulator */
239 #define INITIAL_BATCH_RESULT (0xdeadbeaf)
240 static int access_with_param(struct goldfish_pipe_dev
*dev
, const int cmd
,
241 unsigned long address
, unsigned long avail
,
242 struct goldfish_pipe
*pipe
, int *status
)
244 struct access_params
*aps
= dev
->aps
;
249 aps
->result
= INITIAL_BATCH_RESULT
;
250 aps
->channel
= (unsigned long)pipe
;
252 aps
->address
= address
;
254 writel(cmd
, dev
->base
+ PIPE_REG_ACCESS_PARAMS
);
256 * If the aps->result has not changed, that means
257 * that the batch command failed
259 if (aps
->result
== INITIAL_BATCH_RESULT
)
261 *status
= aps
->result
;
265 static ssize_t
goldfish_pipe_read_write(struct file
*filp
, char __user
*buffer
,
266 size_t bufflen
, int is_write
)
268 unsigned long irq_flags
;
269 struct goldfish_pipe
*pipe
= filp
->private_data
;
270 struct goldfish_pipe_dev
*dev
= pipe
->dev
;
271 unsigned long address
, address_end
;
272 int count
= 0, ret
= -EINVAL
;
274 /* If the emulator already closed the pipe, no need to go further */
275 if (test_bit(BIT_CLOSED_ON_HOST
, &pipe
->flags
))
278 /* Null reads or writes succeeds */
279 if (unlikely(bufflen
== 0))
282 /* Check the buffer range for access */
283 if (!access_ok(is_write
? VERIFY_WRITE
: VERIFY_READ
,
287 /* Serialize access to the pipe */
288 if (mutex_lock_interruptible(&pipe
->lock
))
291 address
= (unsigned long)(void *)buffer
;
292 address_end
= address
+ bufflen
;
294 while (address
< address_end
) {
295 unsigned long page_end
= (address
& PAGE_MASK
) + PAGE_SIZE
;
296 unsigned long next
= page_end
< address_end
? page_end
298 unsigned long avail
= next
- address
;
302 /* Either vaddr or paddr depending on the device version */
306 * We grab the pages on a page-by-page basis in case user
307 * space gives us a potentially huge buffer but the read only
308 * returns a small amount, then there's no need to pin that
309 * much memory to the process.
311 down_read(¤t
->mm
->mmap_sem
);
312 ret
= get_user_pages(current
, current
->mm
, address
, 1,
313 !is_write
, 0, &page
, NULL
);
314 up_read(¤t
->mm
->mmap_sem
);
319 /* Device version 1 or newer (qemu-android) expects the
322 xaddr
= page_to_phys(page
) | (address
& ~PAGE_MASK
);
324 /* Device version 0 (classic emulator) expects the
330 /* Now, try to transfer the bytes in the current page */
331 spin_lock_irqsave(&dev
->lock
, irq_flags
);
332 if (access_with_param(dev
,
333 is_write
? CMD_WRITE_BUFFER
: CMD_READ_BUFFER
,
334 xaddr
, avail
, pipe
, &status
)) {
335 gf_write_ptr(pipe
, dev
->base
+ PIPE_REG_CHANNEL
,
336 dev
->base
+ PIPE_REG_CHANNEL_HIGH
);
337 writel(avail
, dev
->base
+ PIPE_REG_SIZE
);
338 gf_write_ptr((void *)xaddr
,
339 dev
->base
+ PIPE_REG_ADDRESS
,
340 dev
->base
+ PIPE_REG_ADDRESS_HIGH
);
341 writel(is_write
? CMD_WRITE_BUFFER
: CMD_READ_BUFFER
,
342 dev
->base
+ PIPE_REG_COMMAND
);
343 status
= readl(dev
->base
+ PIPE_REG_STATUS
);
345 spin_unlock_irqrestore(&dev
->lock
, irq_flags
);
347 if (status
> 0 && !is_write
)
348 set_page_dirty(page
);
351 if (status
> 0) { /* Correct transfer */
355 } else if (status
== 0) { /* EOF */
358 } else if (status
< 0 && count
> 0) {
360 * An error occurred and we already transferred
361 * something on one of the previous pages.
362 * Just return what we already copied and log this
365 * Note: This seems like an incorrect approach but
366 * cannot change it until we check if any user space
367 * ABI relies on this behavior.
369 if (status
!= PIPE_ERROR_AGAIN
)
370 pr_info_ratelimited("goldfish_pipe: backend returned error %d on %s\n",
371 status
, is_write
? "write" : "read");
377 * If the error is not PIPE_ERROR_AGAIN, or if we are not in
378 * non-blocking mode, just return the error code.
380 if (status
!= PIPE_ERROR_AGAIN
||
381 (filp
->f_flags
& O_NONBLOCK
) != 0) {
382 ret
= goldfish_pipe_error_convert(status
);
387 * The backend blocked the read/write, wait until the backend
388 * tells us it's ready to process more data.
390 wakeBit
= is_write
? BIT_WAKE_ON_WRITE
: BIT_WAKE_ON_READ
;
391 set_bit(wakeBit
, &pipe
->flags
);
393 /* Tell the emulator we're going to wait for a wake event */
395 is_write
? CMD_WAKE_ON_WRITE
: CMD_WAKE_ON_READ
);
397 /* Unlock the pipe, then wait for the wake signal */
398 mutex_unlock(&pipe
->lock
);
400 while (test_bit(wakeBit
, &pipe
->flags
)) {
401 if (wait_event_interruptible(
403 !test_bit(wakeBit
, &pipe
->flags
)))
406 if (test_bit(BIT_CLOSED_ON_HOST
, &pipe
->flags
))
410 /* Try to re-acquire the lock */
411 if (mutex_lock_interruptible(&pipe
->lock
))
414 mutex_unlock(&pipe
->lock
);
422 static ssize_t
goldfish_pipe_read(struct file
*filp
, char __user
*buffer
,
423 size_t bufflen
, loff_t
*ppos
)
425 return goldfish_pipe_read_write(filp
, buffer
, bufflen
, 0);
428 static ssize_t
goldfish_pipe_write(struct file
*filp
,
429 const char __user
*buffer
, size_t bufflen
,
432 return goldfish_pipe_read_write(filp
, (char __user
*)buffer
,
437 static unsigned int goldfish_pipe_poll(struct file
*filp
, poll_table
*wait
)
439 struct goldfish_pipe
*pipe
= filp
->private_data
;
440 unsigned int mask
= 0;
443 mutex_lock(&pipe
->lock
);
445 poll_wait(filp
, &pipe
->wake_queue
, wait
);
447 status
= goldfish_cmd_status(pipe
, CMD_POLL
);
449 mutex_unlock(&pipe
->lock
);
451 if (status
& PIPE_POLL_IN
)
452 mask
|= POLLIN
| POLLRDNORM
;
454 if (status
& PIPE_POLL_OUT
)
455 mask
|= POLLOUT
| POLLWRNORM
;
457 if (status
& PIPE_POLL_HUP
)
460 if (test_bit(BIT_CLOSED_ON_HOST
, &pipe
->flags
))
466 static irqreturn_t
goldfish_pipe_interrupt(int irq
, void *dev_id
)
468 struct goldfish_pipe_dev
*dev
= dev_id
;
469 unsigned long irq_flags
;
473 * We're going to read from the emulator a list of (channel,flags)
474 * pairs corresponding to the wake events that occurred on each
475 * blocked pipe (i.e. channel).
477 spin_lock_irqsave(&dev
->lock
, irq_flags
);
479 /* First read the channel, 0 means the end of the list */
480 struct goldfish_pipe
*pipe
;
482 unsigned long channel
= 0;
485 channel
= (u64
)readl(dev
->base
+ PIPE_REG_CHANNEL_HIGH
) << 32;
490 channel
|= readl(dev
->base
+ PIPE_REG_CHANNEL
);
495 /* Convert channel to struct pipe pointer + read wake flags */
496 wakes
= readl(dev
->base
+ PIPE_REG_WAKES
);
497 pipe
= (struct goldfish_pipe
*)(ptrdiff_t)channel
;
499 /* Did the emulator just closed a pipe? */
500 if (wakes
& PIPE_WAKE_CLOSED
) {
501 set_bit(BIT_CLOSED_ON_HOST
, &pipe
->flags
);
502 wakes
|= PIPE_WAKE_READ
| PIPE_WAKE_WRITE
;
504 if (wakes
& PIPE_WAKE_READ
)
505 clear_bit(BIT_WAKE_ON_READ
, &pipe
->flags
);
506 if (wakes
& PIPE_WAKE_WRITE
)
507 clear_bit(BIT_WAKE_ON_WRITE
, &pipe
->flags
);
509 wake_up_interruptible(&pipe
->wake_queue
);
512 spin_unlock_irqrestore(&dev
->lock
, irq_flags
);
514 return (count
== 0) ? IRQ_NONE
: IRQ_HANDLED
;
518 * goldfish_pipe_open - open a channel to the AVD
519 * @inode: inode of device
520 * @file: file struct of opener
522 * Create a new pipe link between the emulator and the use application.
523 * Each new request produces a new pipe.
525 * Note: we use the pipe ID as a mux. All goldfish emulations are 32bit
526 * right now so this is fine. A move to 64bit will need this addressing
528 static int goldfish_pipe_open(struct inode
*inode
, struct file
*file
)
530 struct goldfish_pipe
*pipe
;
531 struct goldfish_pipe_dev
*dev
= pipe_dev
;
534 /* Allocate new pipe kernel object */
535 pipe
= kzalloc(sizeof(*pipe
), GFP_KERNEL
);
540 mutex_init(&pipe
->lock
);
541 init_waitqueue_head(&pipe
->wake_queue
);
544 * Now, tell the emulator we're opening a new pipe. We use the
545 * pipe object's address as the channel identifier for simplicity.
548 status
= goldfish_cmd_status(pipe
, CMD_OPEN
);
554 /* All is done, save the pipe into the file's private data field */
555 file
->private_data
= pipe
;
559 static int goldfish_pipe_release(struct inode
*inode
, struct file
*filp
)
561 struct goldfish_pipe
*pipe
= filp
->private_data
;
563 /* The guest is closing the channel, so tell the emulator right now */
564 goldfish_cmd(pipe
, CMD_CLOSE
);
566 filp
->private_data
= NULL
;
570 static const struct file_operations goldfish_pipe_fops
= {
571 .owner
= THIS_MODULE
,
572 .read
= goldfish_pipe_read
,
573 .write
= goldfish_pipe_write
,
574 .poll
= goldfish_pipe_poll
,
575 .open
= goldfish_pipe_open
,
576 .release
= goldfish_pipe_release
,
579 static struct miscdevice goldfish_pipe_device
= {
580 .minor
= MISC_DYNAMIC_MINOR
,
581 .name
= "goldfish_pipe",
582 .fops
= &goldfish_pipe_fops
,
585 static int goldfish_pipe_probe(struct platform_device
*pdev
)
589 struct goldfish_pipe_dev
*dev
= pipe_dev
;
591 /* not thread safe, but this should not happen */
592 WARN_ON(dev
->base
!= NULL
);
594 spin_lock_init(&dev
->lock
);
596 r
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
597 if (r
== NULL
|| resource_size(r
) < PAGE_SIZE
) {
598 dev_err(&pdev
->dev
, "can't allocate i/o page\n");
601 dev
->base
= devm_ioremap(&pdev
->dev
, r
->start
, PAGE_SIZE
);
602 if (dev
->base
== NULL
) {
603 dev_err(&pdev
->dev
, "ioremap failed\n");
607 r
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 0);
614 err
= devm_request_irq(&pdev
->dev
, dev
->irq
, goldfish_pipe_interrupt
,
615 IRQF_SHARED
, "goldfish_pipe", dev
);
617 dev_err(&pdev
->dev
, "unable to allocate IRQ\n");
621 err
= misc_register(&goldfish_pipe_device
);
623 dev_err(&pdev
->dev
, "unable to register device\n");
626 setup_access_params_addr(pdev
, dev
);
628 /* Although the pipe device in the classic Android emulator does not
629 * recognize the 'version' register, it won't treat this as an error
630 * either and will simply return 0, which is fine.
632 dev
->version
= readl(dev
->base
+ PIPE_REG_VERSION
);
640 static int goldfish_pipe_remove(struct platform_device
*pdev
)
642 struct goldfish_pipe_dev
*dev
= pipe_dev
;
643 misc_deregister(&goldfish_pipe_device
);
648 static const struct acpi_device_id goldfish_pipe_acpi_match
[] = {
652 MODULE_DEVICE_TABLE(acpi
, goldfish_pipe_acpi_match
);
654 static const struct of_device_id goldfish_pipe_of_match
[] = {
655 { .compatible
= "google,android-pipe", },
658 MODULE_DEVICE_TABLE(of
, goldfish_pipe_of_match
);
660 static struct platform_driver goldfish_pipe
= {
661 .probe
= goldfish_pipe_probe
,
662 .remove
= goldfish_pipe_remove
,
664 .name
= "goldfish_pipe",
665 .owner
= THIS_MODULE
,
666 .of_match_table
= goldfish_pipe_of_match
,
667 .acpi_match_table
= ACPI_PTR(goldfish_pipe_acpi_match
),
671 module_platform_driver(goldfish_pipe
);
672 MODULE_AUTHOR("David Turner <digit@google.com>");
673 MODULE_LICENSE("GPL");