ARM: shmobile: r8a7794: add GPIO DT support
authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Sat, 8 Aug 2015 22:09:31 +0000 (01:09 +0300)
committerSimon Horman <horms+renesas@verge.net.au>
Mon, 14 Sep 2015 01:16:32 +0000 (10:16 +0900)
Describe GPIO[0-6] controllers in the R8A7794 device tree.

Based on original patch by Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm/boot/dts/r8a7794.dtsi

index b6db773b9e55dd74437551e2e89ca3887c753f1b..e9fab31e070994938405b9c3b5e862bf5ae27e0e 100644 (file)
                interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
        };
 
+       gpio0: gpio@e6050000 {
+               compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
+               reg = <0 0xe6050000 0 0x50>;
+               interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
+               #gpio-cells = <2>;
+               gpio-controller;
+               gpio-ranges = <&pfc 0 0 32>;
+               #interrupt-cells = <2>;
+               interrupt-controller;
+               clocks = <&mstp9_clks R8A7794_CLK_GPIO0>;
+               power-domains = <&cpg_clocks>;
+       };
+
+       gpio1: gpio@e6051000 {
+               compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
+               reg = <0 0xe6051000 0 0x50>;
+               interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
+               #gpio-cells = <2>;
+               gpio-controller;
+               gpio-ranges = <&pfc 0 32 26>;
+               #interrupt-cells = <2>;
+               interrupt-controller;
+               clocks = <&mstp9_clks R8A7794_CLK_GPIO1>;
+               power-domains = <&cpg_clocks>;
+       };
+
+       gpio2: gpio@e6052000 {
+               compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
+               reg = <0 0xe6052000 0 0x50>;
+               interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
+               #gpio-cells = <2>;
+               gpio-controller;
+               gpio-ranges = <&pfc 0 64 32>;
+               #interrupt-cells = <2>;
+               interrupt-controller;
+               clocks = <&mstp9_clks R8A7794_CLK_GPIO2>;
+               power-domains = <&cpg_clocks>;
+       };
+
+       gpio3: gpio@e6053000 {
+               compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
+               reg = <0 0xe6053000 0 0x50>;
+               interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
+               #gpio-cells = <2>;
+               gpio-controller;
+               gpio-ranges = <&pfc 0 96 32>;
+               #interrupt-cells = <2>;
+               interrupt-controller;
+               clocks = <&mstp9_clks R8A7794_CLK_GPIO3>;
+               power-domains = <&cpg_clocks>;
+       };
+
+       gpio4: gpio@e6054000 {
+               compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
+               reg = <0 0xe6054000 0 0x50>;
+               interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
+               #gpio-cells = <2>;
+               gpio-controller;
+               gpio-ranges = <&pfc 0 128 32>;
+               #interrupt-cells = <2>;
+               interrupt-controller;
+               clocks = <&mstp9_clks R8A7794_CLK_GPIO4>;
+               power-domains = <&cpg_clocks>;
+       };
+
+       gpio5: gpio@e6055000 {
+               compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
+               reg = <0 0xe6055000 0 0x50>;
+               interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
+               #gpio-cells = <2>;
+               gpio-controller;
+               gpio-ranges = <&pfc 0 160 28>;
+               #interrupt-cells = <2>;
+               interrupt-controller;
+               clocks = <&mstp9_clks R8A7794_CLK_GPIO5>;
+               power-domains = <&cpg_clocks>;
+       };
+
+       gpio6: gpio@e6055400 {
+               compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
+               reg = <0 0xe6055400 0 0x50>;
+               interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
+               #gpio-cells = <2>;
+               gpio-controller;
+               gpio-ranges = <&pfc 0 192 26>;
+               #interrupt-cells = <2>;
+               interrupt-controller;
+               clocks = <&mstp9_clks R8A7794_CLK_GPIO6>;
+               power-domains = <&cpg_clocks>;
+       };
+
        cmt0: timer@ffca0000 {
                compatible = "renesas,cmt-48-gen2";
                reg = <0 0xffca0000 0 0x1004>;
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