1 // SPDX-License-Identifier: MIT
3 * Copyright 2022 Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
14 #include <side/trace.h>
15 #include <rseq/rseq.h>
17 #define SIDE_CACHE_LINE_SIZE 256
19 struct side_rcu_percpu_count
{
24 } __attribute__((__aligned__(SIDE_CACHE_LINE_SIZE
)));
26 struct side_rcu_cpu_gp_state
{
27 struct side_rcu_percpu_count count
[2];
30 struct side_rcu_gp_state
{
31 struct side_rcu_cpu_gp_state
*percpu_state
;
34 pthread_mutex_t gp_lock
;
37 //TODO: implement wait/wakeup for grace period using sys_futex
39 unsigned int side_rcu_read_begin(struct side_rcu_gp_state
*gp_state
)
41 unsigned int period
= __atomic_load_n(&gp_state
->period
, __ATOMIC_RELAXED
);
42 struct side_rcu_cpu_gp_state
*cpu_gp_state
;
45 if (side_likely(rseq_offset
> 0)) {
46 cpu
= rseq_cpu_start();
47 cpu_gp_state
= &gp_state
->percpu_state
[cpu
];
48 if (!rseq_addv((intptr_t *)&cpu_gp_state
->count
[period
].rseq_begin
, 1, cpu
))
52 if (side_unlikely(cpu
< 0))
54 cpu_gp_state
= &gp_state
->percpu_state
[cpu
];
55 (void) __atomic_add_fetch(&cpu_gp_state
->count
[period
].begin
, 1, __ATOMIC_RELAXED
);
58 * This compiler barrier (A) is paired with membarrier() at (C),
59 * (D), (E). It effectively upgrades this compiler barrier to a
60 * SEQ_CST fence with respect to the paired barriers.
62 * This barrier (A) ensures that the contents of the read-side
63 * critical section does not leak before the "begin" counter
64 * increment. It pairs with memory barriers (D) and (E).
66 * This barrier (A) also ensures that the "begin" increment is
67 * before the "end" increment. It pairs with memory barrier (C).
68 * It is redundant with barrier (B) for that purpose.
75 void side_rcu_read_end(struct side_rcu_gp_state
*gp_state
, unsigned int period
)
77 struct side_rcu_cpu_gp_state
*cpu_gp_state
;
81 * This compiler barrier (B) is paired with membarrier() at (C),
82 * (D), (E). It effectively upgrades this compiler barrier to a
83 * SEQ_CST fence with respect to the paired barriers.
85 * This barrier (B) ensures that the contents of the read-side
86 * critical section does not leak after the "end" counter
87 * increment. It pairs with memory barriers (D) and (E).
89 * This barrier (B) also ensures that the "begin" increment is
90 * before the "end" increment. It pairs with memory barrier (C).
91 * It is redundant with barrier (A) for that purpose.
95 if (side_likely(rseq_offset
> 0)) {
96 cpu
= rseq_cpu_start();
97 cpu_gp_state
= &gp_state
->percpu_state
[cpu
];
98 if (!rseq_addv((intptr_t *)&cpu_gp_state
->count
[period
].rseq_end
, 1, cpu
))
101 cpu
= sched_getcpu();
102 if (side_unlikely(cpu
< 0))
104 cpu_gp_state
= &gp_state
->percpu_state
[cpu
];
105 (void) __atomic_add_fetch(&cpu_gp_state
->count
[period
].end
, 1, __ATOMIC_RELAXED
);
108 #define side_rcu_dereference(p) \
111 __typeof__(p) _____side_v = __atomic_load_n(&(p), __ATOMIC_CONSUME); \
115 #define side_rcu_assign_pointer(p, v) __atomic_store_n(&(p), v, __ATOMIC_RELEASE); \
117 void side_rcu_wait_grace_period(struct side_rcu_gp_state *gp_state) __attribute__((visibility("hidden")));
118 void side_rcu_gp_init(struct side_rcu_gp_state
*rcu_gp
) __attribute__((visibility("hidden")));
119 void side_rcu_gp_exit(struct side_rcu_gp_state
*rcu_gp
) __attribute__((visibility("hidden")));
121 #endif /* _SIDE_RCU_H */