KVM: ia64: enable external interrupt in vmm
[deliverable/linux.git] / arch / x86 / kvm / mmu.c
CommitLineData
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1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
e495606d 19
1d737c8a 20#include "mmu.h"
e495606d 21
edf88417 22#include <linux/kvm_host.h>
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23#include <linux/types.h>
24#include <linux/string.h>
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25#include <linux/mm.h>
26#include <linux/highmem.h>
27#include <linux/module.h>
448353ca 28#include <linux/swap.h>
05da4558 29#include <linux/hugetlb.h>
2f333bcb 30#include <linux/compiler.h>
6aa8b732 31
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32#include <asm/page.h>
33#include <asm/cmpxchg.h>
4e542370 34#include <asm/io.h>
13673a90 35#include <asm/vmx.h>
6aa8b732 36
18552672
JR
37/*
38 * When setting this variable to true it enables Two-Dimensional-Paging
39 * where the hardware walks 2 page tables:
40 * 1. the guest-virtual to guest-physical
41 * 2. while doing 1. it walks guest-physical to host-physical
42 * If the hardware supports that we don't need to do shadow paging.
43 */
2f333bcb 44bool tdp_enabled = false;
18552672 45
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46#undef MMU_DEBUG
47
48#undef AUDIT
49
50#ifdef AUDIT
51static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
52#else
53static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
54#endif
55
56#ifdef MMU_DEBUG
57
58#define pgprintk(x...) do { if (dbg) printk(x); } while (0)
59#define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
60
61#else
62
63#define pgprintk(x...) do { } while (0)
64#define rmap_printk(x...) do { } while (0)
65
66#endif
67
68#if defined(MMU_DEBUG) || defined(AUDIT)
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69static int dbg = 0;
70module_param(dbg, bool, 0644);
37a7d8b0 71#endif
6aa8b732 72
582801a9
MT
73static int oos_shadow = 1;
74module_param(oos_shadow, bool, 0644);
75
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76#ifndef MMU_DEBUG
77#define ASSERT(x) do { } while (0)
78#else
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79#define ASSERT(x) \
80 if (!(x)) { \
81 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
82 __FILE__, __LINE__, #x); \
83 }
d6c69ee9 84#endif
6aa8b732 85
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86#define PT_FIRST_AVAIL_BITS_SHIFT 9
87#define PT64_SECOND_AVAIL_BITS_SHIFT 52
88
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89#define VALID_PAGE(x) ((x) != INVALID_PAGE)
90
91#define PT64_LEVEL_BITS 9
92
93#define PT64_LEVEL_SHIFT(level) \
d77c26fc 94 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
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95
96#define PT64_LEVEL_MASK(level) \
97 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
98
99#define PT64_INDEX(address, level)\
100 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
101
102
103#define PT32_LEVEL_BITS 10
104
105#define PT32_LEVEL_SHIFT(level) \
d77c26fc 106 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
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107
108#define PT32_LEVEL_MASK(level) \
109 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
110
111#define PT32_INDEX(address, level)\
112 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
113
114
27aba766 115#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
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116#define PT64_DIR_BASE_ADDR_MASK \
117 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
118
119#define PT32_BASE_ADDR_MASK PAGE_MASK
120#define PT32_DIR_BASE_ADDR_MASK \
121 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
122
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123#define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
124 | PT64_NX_MASK)
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125
126#define PFERR_PRESENT_MASK (1U << 0)
127#define PFERR_WRITE_MASK (1U << 1)
128#define PFERR_USER_MASK (1U << 2)
73b1087e 129#define PFERR_FETCH_MASK (1U << 4)
6aa8b732 130
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131#define PT_DIRECTORY_LEVEL 2
132#define PT_PAGE_TABLE_LEVEL 1
133
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134#define RMAP_EXT 4
135
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136#define ACC_EXEC_MASK 1
137#define ACC_WRITE_MASK PT_WRITABLE_MASK
138#define ACC_USER_MASK PT_USER_MASK
139#define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
140
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141#define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
142
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143struct kvm_rmap_desc {
144 u64 *shadow_ptes[RMAP_EXT];
145 struct kvm_rmap_desc *more;
146};
147
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148struct kvm_shadow_walk_iterator {
149 u64 addr;
150 hpa_t shadow_addr;
151 int level;
152 u64 *sptep;
153 unsigned index;
154};
155
156#define for_each_shadow_entry(_vcpu, _addr, _walker) \
157 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
158 shadow_walk_okay(&(_walker)); \
159 shadow_walk_next(&(_walker)))
160
161
4731d4c7
MT
162struct kvm_unsync_walk {
163 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
164};
165
ad8cfbe3
MT
166typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
167
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168static struct kmem_cache *pte_chain_cache;
169static struct kmem_cache *rmap_desc_cache;
d3d25b04 170static struct kmem_cache *mmu_page_header_cache;
b5a33a75 171
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172static u64 __read_mostly shadow_trap_nonpresent_pte;
173static u64 __read_mostly shadow_notrap_nonpresent_pte;
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SY
174static u64 __read_mostly shadow_base_present_pte;
175static u64 __read_mostly shadow_nx_mask;
176static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
177static u64 __read_mostly shadow_user_mask;
178static u64 __read_mostly shadow_accessed_mask;
179static u64 __read_mostly shadow_dirty_mask;
64d4d521 180static u64 __read_mostly shadow_mt_mask;
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181
182void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
183{
184 shadow_trap_nonpresent_pte = trap_pte;
185 shadow_notrap_nonpresent_pte = notrap_pte;
186}
187EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
188
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189void kvm_mmu_set_base_ptes(u64 base_pte)
190{
191 shadow_base_present_pte = base_pte;
192}
193EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
194
195void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
64d4d521 196 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 mt_mask)
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SY
197{
198 shadow_user_mask = user_mask;
199 shadow_accessed_mask = accessed_mask;
200 shadow_dirty_mask = dirty_mask;
201 shadow_nx_mask = nx_mask;
202 shadow_x_mask = x_mask;
64d4d521 203 shadow_mt_mask = mt_mask;
7b52345e
SY
204}
205EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
206
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207static int is_write_protection(struct kvm_vcpu *vcpu)
208{
ad312c7c 209 return vcpu->arch.cr0 & X86_CR0_WP;
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210}
211
212static int is_cpuid_PSE36(void)
213{
214 return 1;
215}
216
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217static int is_nx(struct kvm_vcpu *vcpu)
218{
ad312c7c 219 return vcpu->arch.shadow_efer & EFER_NX;
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220}
221
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222static int is_present_pte(unsigned long pte)
223{
224 return pte & PT_PRESENT_MASK;
225}
226
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227static int is_shadow_present_pte(u64 pte)
228{
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229 return pte != shadow_trap_nonpresent_pte
230 && pte != shadow_notrap_nonpresent_pte;
231}
232
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233static int is_large_pte(u64 pte)
234{
235 return pte & PT_PAGE_SIZE_MASK;
236}
237
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238static int is_writeble_pte(unsigned long pte)
239{
240 return pte & PT_WRITABLE_MASK;
241}
242
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243static int is_dirty_pte(unsigned long pte)
244{
7b52345e 245 return pte & shadow_dirty_mask;
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246}
247
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248static int is_rmap_pte(u64 pte)
249{
4b1a80fa 250 return is_shadow_present_pte(pte);
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251}
252
35149e21 253static pfn_t spte_to_pfn(u64 pte)
0b49ea86 254{
35149e21 255 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
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256}
257
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258static gfn_t pse36_gfn_delta(u32 gpte)
259{
260 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
261
262 return (gpte & PT32_DIR_PSE36_MASK) << shift;
263}
264
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265static void set_shadow_pte(u64 *sptep, u64 spte)
266{
267#ifdef CONFIG_X86_64
268 set_64bit((unsigned long *)sptep, spte);
269#else
270 set_64bit((unsigned long long *)sptep, spte);
271#endif
272}
273
e2dec939 274static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
2e3e5882 275 struct kmem_cache *base_cache, int min)
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276{
277 void *obj;
278
279 if (cache->nobjs >= min)
e2dec939 280 return 0;
714b93da 281 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 282 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
714b93da 283 if (!obj)
e2dec939 284 return -ENOMEM;
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285 cache->objects[cache->nobjs++] = obj;
286 }
e2dec939 287 return 0;
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288}
289
290static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
291{
292 while (mc->nobjs)
293 kfree(mc->objects[--mc->nobjs]);
294}
295
c1158e63 296static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
2e3e5882 297 int min)
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298{
299 struct page *page;
300
301 if (cache->nobjs >= min)
302 return 0;
303 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 304 page = alloc_page(GFP_KERNEL);
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305 if (!page)
306 return -ENOMEM;
307 set_page_private(page, 0);
308 cache->objects[cache->nobjs++] = page_address(page);
309 }
310 return 0;
311}
312
313static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
314{
315 while (mc->nobjs)
c4d198d5 316 free_page((unsigned long)mc->objects[--mc->nobjs]);
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317}
318
2e3e5882 319static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
714b93da 320{
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321 int r;
322
ad312c7c 323 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
2e3e5882 324 pte_chain_cache, 4);
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325 if (r)
326 goto out;
ad312c7c 327 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
c41ef344 328 rmap_desc_cache, 4);
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329 if (r)
330 goto out;
ad312c7c 331 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
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332 if (r)
333 goto out;
ad312c7c 334 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
2e3e5882 335 mmu_page_header_cache, 4);
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336out:
337 return r;
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338}
339
340static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
341{
ad312c7c
ZX
342 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
343 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
344 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
345 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
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346}
347
348static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
349 size_t size)
350{
351 void *p;
352
353 BUG_ON(!mc->nobjs);
354 p = mc->objects[--mc->nobjs];
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355 return p;
356}
357
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358static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
359{
ad312c7c 360 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
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361 sizeof(struct kvm_pte_chain));
362}
363
90cb0529 364static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
714b93da 365{
90cb0529 366 kfree(pc);
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367}
368
369static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
370{
ad312c7c 371 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
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372 sizeof(struct kvm_rmap_desc));
373}
374
90cb0529 375static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
714b93da 376{
90cb0529 377 kfree(rd);
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378}
379
05da4558
MT
380/*
381 * Return the pointer to the largepage write count for a given
382 * gfn, handling slots that are not large page aligned.
383 */
384static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
385{
386 unsigned long idx;
387
388 idx = (gfn / KVM_PAGES_PER_HPAGE) -
389 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
390 return &slot->lpage_info[idx].write_count;
391}
392
393static void account_shadowed(struct kvm *kvm, gfn_t gfn)
394{
395 int *write_count;
396
2843099f
IE
397 gfn = unalias_gfn(kvm, gfn);
398 write_count = slot_largepage_idx(gfn,
399 gfn_to_memslot_unaliased(kvm, gfn));
05da4558 400 *write_count += 1;
05da4558
MT
401}
402
403static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
404{
405 int *write_count;
406
2843099f
IE
407 gfn = unalias_gfn(kvm, gfn);
408 write_count = slot_largepage_idx(gfn,
409 gfn_to_memslot_unaliased(kvm, gfn));
05da4558
MT
410 *write_count -= 1;
411 WARN_ON(*write_count < 0);
412}
413
414static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
415{
2843099f 416 struct kvm_memory_slot *slot;
05da4558
MT
417 int *largepage_idx;
418
2843099f
IE
419 gfn = unalias_gfn(kvm, gfn);
420 slot = gfn_to_memslot_unaliased(kvm, gfn);
05da4558
MT
421 if (slot) {
422 largepage_idx = slot_largepage_idx(gfn, slot);
423 return *largepage_idx;
424 }
425
426 return 1;
427}
428
429static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
430{
431 struct vm_area_struct *vma;
432 unsigned long addr;
4c2155ce 433 int ret = 0;
05da4558
MT
434
435 addr = gfn_to_hva(kvm, gfn);
436 if (kvm_is_error_hva(addr))
4c2155ce 437 return ret;
05da4558 438
4c2155ce 439 down_read(&current->mm->mmap_sem);
05da4558
MT
440 vma = find_vma(current->mm, addr);
441 if (vma && is_vm_hugetlb_page(vma))
4c2155ce
MT
442 ret = 1;
443 up_read(&current->mm->mmap_sem);
05da4558 444
4c2155ce 445 return ret;
05da4558
MT
446}
447
448static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
449{
450 struct kvm_memory_slot *slot;
451
452 if (has_wrprotected_page(vcpu->kvm, large_gfn))
453 return 0;
454
455 if (!host_largepage_backed(vcpu->kvm, large_gfn))
456 return 0;
457
458 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
459 if (slot && slot->dirty_bitmap)
460 return 0;
461
462 return 1;
463}
464
290fc38d
IE
465/*
466 * Take gfn and return the reverse mapping to it.
467 * Note: gfn must be unaliased before this function get called
468 */
469
05da4558 470static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
290fc38d
IE
471{
472 struct kvm_memory_slot *slot;
05da4558 473 unsigned long idx;
290fc38d
IE
474
475 slot = gfn_to_memslot(kvm, gfn);
05da4558
MT
476 if (!lpage)
477 return &slot->rmap[gfn - slot->base_gfn];
478
479 idx = (gfn / KVM_PAGES_PER_HPAGE) -
480 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
481
482 return &slot->lpage_info[idx].rmap_pde;
290fc38d
IE
483}
484
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485/*
486 * Reverse mapping data structures:
487 *
290fc38d
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488 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
489 * that points to page_address(page).
cd4a4e53 490 *
290fc38d
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491 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
492 * containing more mappings.
cd4a4e53 493 */
05da4558 494static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
cd4a4e53 495{
4db35314 496 struct kvm_mmu_page *sp;
cd4a4e53 497 struct kvm_rmap_desc *desc;
290fc38d 498 unsigned long *rmapp;
cd4a4e53
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499 int i;
500
501 if (!is_rmap_pte(*spte))
502 return;
290fc38d 503 gfn = unalias_gfn(vcpu->kvm, gfn);
4db35314
AK
504 sp = page_header(__pa(spte));
505 sp->gfns[spte - sp->spt] = gfn;
05da4558 506 rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
290fc38d 507 if (!*rmapp) {
cd4a4e53 508 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
290fc38d
IE
509 *rmapp = (unsigned long)spte;
510 } else if (!(*rmapp & 1)) {
cd4a4e53 511 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
714b93da 512 desc = mmu_alloc_rmap_desc(vcpu);
290fc38d 513 desc->shadow_ptes[0] = (u64 *)*rmapp;
cd4a4e53 514 desc->shadow_ptes[1] = spte;
290fc38d 515 *rmapp = (unsigned long)desc | 1;
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516 } else {
517 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
290fc38d 518 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
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519 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
520 desc = desc->more;
521 if (desc->shadow_ptes[RMAP_EXT-1]) {
714b93da 522 desc->more = mmu_alloc_rmap_desc(vcpu);
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523 desc = desc->more;
524 }
525 for (i = 0; desc->shadow_ptes[i]; ++i)
526 ;
527 desc->shadow_ptes[i] = spte;
528 }
529}
530
290fc38d 531static void rmap_desc_remove_entry(unsigned long *rmapp,
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532 struct kvm_rmap_desc *desc,
533 int i,
534 struct kvm_rmap_desc *prev_desc)
535{
536 int j;
537
538 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
539 ;
540 desc->shadow_ptes[i] = desc->shadow_ptes[j];
11718b4d 541 desc->shadow_ptes[j] = NULL;
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542 if (j != 0)
543 return;
544 if (!prev_desc && !desc->more)
290fc38d 545 *rmapp = (unsigned long)desc->shadow_ptes[0];
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546 else
547 if (prev_desc)
548 prev_desc->more = desc->more;
549 else
290fc38d 550 *rmapp = (unsigned long)desc->more | 1;
90cb0529 551 mmu_free_rmap_desc(desc);
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552}
553
290fc38d 554static void rmap_remove(struct kvm *kvm, u64 *spte)
cd4a4e53 555{
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556 struct kvm_rmap_desc *desc;
557 struct kvm_rmap_desc *prev_desc;
4db35314 558 struct kvm_mmu_page *sp;
35149e21 559 pfn_t pfn;
290fc38d 560 unsigned long *rmapp;
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561 int i;
562
563 if (!is_rmap_pte(*spte))
564 return;
4db35314 565 sp = page_header(__pa(spte));
35149e21 566 pfn = spte_to_pfn(*spte);
7b52345e 567 if (*spte & shadow_accessed_mask)
35149e21 568 kvm_set_pfn_accessed(pfn);
b4231d61 569 if (is_writeble_pte(*spte))
35149e21 570 kvm_release_pfn_dirty(pfn);
b4231d61 571 else
35149e21 572 kvm_release_pfn_clean(pfn);
05da4558 573 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
290fc38d 574 if (!*rmapp) {
cd4a4e53
AK
575 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
576 BUG();
290fc38d 577 } else if (!(*rmapp & 1)) {
cd4a4e53 578 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
290fc38d 579 if ((u64 *)*rmapp != spte) {
cd4a4e53
AK
580 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
581 spte, *spte);
582 BUG();
583 }
290fc38d 584 *rmapp = 0;
cd4a4e53
AK
585 } else {
586 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
290fc38d 587 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
cd4a4e53
AK
588 prev_desc = NULL;
589 while (desc) {
590 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
591 if (desc->shadow_ptes[i] == spte) {
290fc38d 592 rmap_desc_remove_entry(rmapp,
714b93da 593 desc, i,
cd4a4e53
AK
594 prev_desc);
595 return;
596 }
597 prev_desc = desc;
598 desc = desc->more;
599 }
600 BUG();
601 }
602}
603
98348e95 604static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
374cbac0 605{
374cbac0 606 struct kvm_rmap_desc *desc;
98348e95
IE
607 struct kvm_rmap_desc *prev_desc;
608 u64 *prev_spte;
609 int i;
610
611 if (!*rmapp)
612 return NULL;
613 else if (!(*rmapp & 1)) {
614 if (!spte)
615 return (u64 *)*rmapp;
616 return NULL;
617 }
618 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
619 prev_desc = NULL;
620 prev_spte = NULL;
621 while (desc) {
622 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
623 if (prev_spte == spte)
624 return desc->shadow_ptes[i];
625 prev_spte = desc->shadow_ptes[i];
626 }
627 desc = desc->more;
628 }
629 return NULL;
630}
631
b1a36821 632static int rmap_write_protect(struct kvm *kvm, u64 gfn)
98348e95 633{
290fc38d 634 unsigned long *rmapp;
374cbac0 635 u64 *spte;
caa5b8a5 636 int write_protected = 0;
374cbac0 637
4a4c9924 638 gfn = unalias_gfn(kvm, gfn);
05da4558 639 rmapp = gfn_to_rmap(kvm, gfn, 0);
374cbac0 640
98348e95
IE
641 spte = rmap_next(kvm, rmapp, NULL);
642 while (spte) {
374cbac0 643 BUG_ON(!spte);
374cbac0 644 BUG_ON(!(*spte & PT_PRESENT_MASK));
374cbac0 645 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
caa5b8a5 646 if (is_writeble_pte(*spte)) {
9647c14c 647 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
caa5b8a5
ED
648 write_protected = 1;
649 }
9647c14c 650 spte = rmap_next(kvm, rmapp, spte);
374cbac0 651 }
855149aa 652 if (write_protected) {
35149e21 653 pfn_t pfn;
855149aa
IE
654
655 spte = rmap_next(kvm, rmapp, NULL);
35149e21
AL
656 pfn = spte_to_pfn(*spte);
657 kvm_set_pfn_dirty(pfn);
855149aa
IE
658 }
659
05da4558
MT
660 /* check for huge page mappings */
661 rmapp = gfn_to_rmap(kvm, gfn, 1);
662 spte = rmap_next(kvm, rmapp, NULL);
663 while (spte) {
664 BUG_ON(!spte);
665 BUG_ON(!(*spte & PT_PRESENT_MASK));
666 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
667 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
668 if (is_writeble_pte(*spte)) {
669 rmap_remove(kvm, spte);
670 --kvm->stat.lpages;
671 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
6597ca09 672 spte = NULL;
05da4558
MT
673 write_protected = 1;
674 }
675 spte = rmap_next(kvm, rmapp, spte);
676 }
677
b1a36821 678 return write_protected;
374cbac0
AK
679}
680
e930bffe
AA
681static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
682{
683 u64 *spte;
684 int need_tlb_flush = 0;
685
686 while ((spte = rmap_next(kvm, rmapp, NULL))) {
687 BUG_ON(!(*spte & PT_PRESENT_MASK));
688 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
689 rmap_remove(kvm, spte);
690 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
691 need_tlb_flush = 1;
692 }
693 return need_tlb_flush;
694}
695
696static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
697 int (*handler)(struct kvm *kvm, unsigned long *rmapp))
698{
699 int i;
700 int retval = 0;
701
702 /*
703 * If mmap_sem isn't taken, we can look the memslots with only
704 * the mmu_lock by skipping over the slots with userspace_addr == 0.
705 */
706 for (i = 0; i < kvm->nmemslots; i++) {
707 struct kvm_memory_slot *memslot = &kvm->memslots[i];
708 unsigned long start = memslot->userspace_addr;
709 unsigned long end;
710
711 /* mmu_lock protects userspace_addr */
712 if (!start)
713 continue;
714
715 end = start + (memslot->npages << PAGE_SHIFT);
716 if (hva >= start && hva < end) {
717 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
718 retval |= handler(kvm, &memslot->rmap[gfn_offset]);
719 retval |= handler(kvm,
720 &memslot->lpage_info[
721 gfn_offset /
722 KVM_PAGES_PER_HPAGE].rmap_pde);
723 }
724 }
725
726 return retval;
727}
728
729int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
730{
731 return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
732}
733
734static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
735{
736 u64 *spte;
737 int young = 0;
738
534e38b4
SY
739 /* always return old for EPT */
740 if (!shadow_accessed_mask)
741 return 0;
742
e930bffe
AA
743 spte = rmap_next(kvm, rmapp, NULL);
744 while (spte) {
745 int _young;
746 u64 _spte = *spte;
747 BUG_ON(!(_spte & PT_PRESENT_MASK));
748 _young = _spte & PT_ACCESSED_MASK;
749 if (_young) {
750 young = 1;
751 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
752 }
753 spte = rmap_next(kvm, rmapp, spte);
754 }
755 return young;
756}
757
758int kvm_age_hva(struct kvm *kvm, unsigned long hva)
759{
760 return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
761}
762
d6c69ee9 763#ifdef MMU_DEBUG
47ad8e68 764static int is_empty_shadow_page(u64 *spt)
6aa8b732 765{
139bdb2d
AK
766 u64 *pos;
767 u64 *end;
768
47ad8e68 769 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
3c915510 770 if (is_shadow_present_pte(*pos)) {
b8688d51 771 printk(KERN_ERR "%s: %p %llx\n", __func__,
139bdb2d 772 pos, *pos);
6aa8b732 773 return 0;
139bdb2d 774 }
6aa8b732
AK
775 return 1;
776}
d6c69ee9 777#endif
6aa8b732 778
4db35314 779static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
260746c0 780{
4db35314
AK
781 ASSERT(is_empty_shadow_page(sp->spt));
782 list_del(&sp->link);
783 __free_page(virt_to_page(sp->spt));
784 __free_page(virt_to_page(sp->gfns));
785 kfree(sp);
f05e70ac 786 ++kvm->arch.n_free_mmu_pages;
260746c0
AK
787}
788
cea0f0e7
AK
789static unsigned kvm_page_table_hashfn(gfn_t gfn)
790{
1ae0a13d 791 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
cea0f0e7
AK
792}
793
25c0de2c
AK
794static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
795 u64 *parent_pte)
6aa8b732 796{
4db35314 797 struct kvm_mmu_page *sp;
6aa8b732 798
ad312c7c
ZX
799 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
800 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
801 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
4db35314 802 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
f05e70ac 803 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
6cffe8ca 804 INIT_LIST_HEAD(&sp->oos_link);
291f26bc 805 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
4db35314
AK
806 sp->multimapped = 0;
807 sp->parent_pte = parent_pte;
f05e70ac 808 --vcpu->kvm->arch.n_free_mmu_pages;
4db35314 809 return sp;
6aa8b732
AK
810}
811
714b93da 812static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
4db35314 813 struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7
AK
814{
815 struct kvm_pte_chain *pte_chain;
816 struct hlist_node *node;
817 int i;
818
819 if (!parent_pte)
820 return;
4db35314
AK
821 if (!sp->multimapped) {
822 u64 *old = sp->parent_pte;
cea0f0e7
AK
823
824 if (!old) {
4db35314 825 sp->parent_pte = parent_pte;
cea0f0e7
AK
826 return;
827 }
4db35314 828 sp->multimapped = 1;
714b93da 829 pte_chain = mmu_alloc_pte_chain(vcpu);
4db35314
AK
830 INIT_HLIST_HEAD(&sp->parent_ptes);
831 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
832 pte_chain->parent_ptes[0] = old;
833 }
4db35314 834 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
cea0f0e7
AK
835 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
836 continue;
837 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
838 if (!pte_chain->parent_ptes[i]) {
839 pte_chain->parent_ptes[i] = parent_pte;
840 return;
841 }
842 }
714b93da 843 pte_chain = mmu_alloc_pte_chain(vcpu);
cea0f0e7 844 BUG_ON(!pte_chain);
4db35314 845 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
846 pte_chain->parent_ptes[0] = parent_pte;
847}
848
4db35314 849static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
cea0f0e7
AK
850 u64 *parent_pte)
851{
852 struct kvm_pte_chain *pte_chain;
853 struct hlist_node *node;
854 int i;
855
4db35314
AK
856 if (!sp->multimapped) {
857 BUG_ON(sp->parent_pte != parent_pte);
858 sp->parent_pte = NULL;
cea0f0e7
AK
859 return;
860 }
4db35314 861 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
cea0f0e7
AK
862 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
863 if (!pte_chain->parent_ptes[i])
864 break;
865 if (pte_chain->parent_ptes[i] != parent_pte)
866 continue;
697fe2e2
AK
867 while (i + 1 < NR_PTE_CHAIN_ENTRIES
868 && pte_chain->parent_ptes[i + 1]) {
cea0f0e7
AK
869 pte_chain->parent_ptes[i]
870 = pte_chain->parent_ptes[i + 1];
871 ++i;
872 }
873 pte_chain->parent_ptes[i] = NULL;
697fe2e2
AK
874 if (i == 0) {
875 hlist_del(&pte_chain->link);
90cb0529 876 mmu_free_pte_chain(pte_chain);
4db35314
AK
877 if (hlist_empty(&sp->parent_ptes)) {
878 sp->multimapped = 0;
879 sp->parent_pte = NULL;
697fe2e2
AK
880 }
881 }
cea0f0e7
AK
882 return;
883 }
884 BUG();
885}
886
ad8cfbe3
MT
887
888static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
889 mmu_parent_walk_fn fn)
890{
891 struct kvm_pte_chain *pte_chain;
892 struct hlist_node *node;
893 struct kvm_mmu_page *parent_sp;
894 int i;
895
896 if (!sp->multimapped && sp->parent_pte) {
897 parent_sp = page_header(__pa(sp->parent_pte));
898 fn(vcpu, parent_sp);
899 mmu_parent_walk(vcpu, parent_sp, fn);
900 return;
901 }
902 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
903 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
904 if (!pte_chain->parent_ptes[i])
905 break;
906 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
907 fn(vcpu, parent_sp);
908 mmu_parent_walk(vcpu, parent_sp, fn);
909 }
910}
911
0074ff63
MT
912static void kvm_mmu_update_unsync_bitmap(u64 *spte)
913{
914 unsigned int index;
915 struct kvm_mmu_page *sp = page_header(__pa(spte));
916
917 index = spte - sp->spt;
60c8aec6
MT
918 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
919 sp->unsync_children++;
920 WARN_ON(!sp->unsync_children);
0074ff63
MT
921}
922
923static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
924{
925 struct kvm_pte_chain *pte_chain;
926 struct hlist_node *node;
927 int i;
928
929 if (!sp->parent_pte)
930 return;
931
932 if (!sp->multimapped) {
933 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
934 return;
935 }
936
937 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
938 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
939 if (!pte_chain->parent_ptes[i])
940 break;
941 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
942 }
943}
944
945static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
946{
0074ff63
MT
947 kvm_mmu_update_parents_unsync(sp);
948 return 1;
949}
950
951static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
952 struct kvm_mmu_page *sp)
953{
954 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
955 kvm_mmu_update_parents_unsync(sp);
956}
957
d761a501
AK
958static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
959 struct kvm_mmu_page *sp)
960{
961 int i;
962
963 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
964 sp->spt[i] = shadow_trap_nonpresent_pte;
965}
966
e8bc217a
MT
967static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
968 struct kvm_mmu_page *sp)
969{
970 return 1;
971}
972
a7052897
MT
973static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
974{
975}
976
60c8aec6
MT
977#define KVM_PAGE_ARRAY_NR 16
978
979struct kvm_mmu_pages {
980 struct mmu_page_and_offset {
981 struct kvm_mmu_page *sp;
982 unsigned int idx;
983 } page[KVM_PAGE_ARRAY_NR];
984 unsigned int nr;
985};
986
0074ff63
MT
987#define for_each_unsync_children(bitmap, idx) \
988 for (idx = find_first_bit(bitmap, 512); \
989 idx < 512; \
990 idx = find_next_bit(bitmap, 512, idx+1))
991
cded19f3
HE
992static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
993 int idx)
4731d4c7 994{
60c8aec6 995 int i;
4731d4c7 996
60c8aec6
MT
997 if (sp->unsync)
998 for (i=0; i < pvec->nr; i++)
999 if (pvec->page[i].sp == sp)
1000 return 0;
1001
1002 pvec->page[pvec->nr].sp = sp;
1003 pvec->page[pvec->nr].idx = idx;
1004 pvec->nr++;
1005 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1006}
1007
1008static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1009 struct kvm_mmu_pages *pvec)
1010{
1011 int i, ret, nr_unsync_leaf = 0;
4731d4c7 1012
0074ff63 1013 for_each_unsync_children(sp->unsync_child_bitmap, i) {
4731d4c7
MT
1014 u64 ent = sp->spt[i];
1015
87917239 1016 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
4731d4c7
MT
1017 struct kvm_mmu_page *child;
1018 child = page_header(ent & PT64_BASE_ADDR_MASK);
1019
1020 if (child->unsync_children) {
60c8aec6
MT
1021 if (mmu_pages_add(pvec, child, i))
1022 return -ENOSPC;
1023
1024 ret = __mmu_unsync_walk(child, pvec);
1025 if (!ret)
1026 __clear_bit(i, sp->unsync_child_bitmap);
1027 else if (ret > 0)
1028 nr_unsync_leaf += ret;
1029 else
4731d4c7
MT
1030 return ret;
1031 }
1032
1033 if (child->unsync) {
60c8aec6
MT
1034 nr_unsync_leaf++;
1035 if (mmu_pages_add(pvec, child, i))
1036 return -ENOSPC;
4731d4c7
MT
1037 }
1038 }
1039 }
1040
0074ff63 1041 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
4731d4c7
MT
1042 sp->unsync_children = 0;
1043
60c8aec6
MT
1044 return nr_unsync_leaf;
1045}
1046
1047static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1048 struct kvm_mmu_pages *pvec)
1049{
1050 if (!sp->unsync_children)
1051 return 0;
1052
1053 mmu_pages_add(pvec, sp, 0);
1054 return __mmu_unsync_walk(sp, pvec);
4731d4c7
MT
1055}
1056
4db35314 1057static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
cea0f0e7
AK
1058{
1059 unsigned index;
1060 struct hlist_head *bucket;
4db35314 1061 struct kvm_mmu_page *sp;
cea0f0e7
AK
1062 struct hlist_node *node;
1063
b8688d51 1064 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1ae0a13d 1065 index = kvm_page_table_hashfn(gfn);
f05e70ac 1066 bucket = &kvm->arch.mmu_page_hash[index];
4db35314 1067 hlist_for_each_entry(sp, node, bucket, hash_link)
f6e2c02b 1068 if (sp->gfn == gfn && !sp->role.direct
2e53d63a 1069 && !sp->role.invalid) {
cea0f0e7 1070 pgprintk("%s: found role %x\n",
b8688d51 1071 __func__, sp->role.word);
4db35314 1072 return sp;
cea0f0e7
AK
1073 }
1074 return NULL;
1075}
1076
6cffe8ca
MT
1077static void kvm_unlink_unsync_global(struct kvm *kvm, struct kvm_mmu_page *sp)
1078{
1079 list_del(&sp->oos_link);
1080 --kvm->stat.mmu_unsync_global;
1081}
1082
4731d4c7
MT
1083static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1084{
1085 WARN_ON(!sp->unsync);
1086 sp->unsync = 0;
6cffe8ca
MT
1087 if (sp->global)
1088 kvm_unlink_unsync_global(kvm, sp);
4731d4c7
MT
1089 --kvm->stat.mmu_unsync;
1090}
1091
1092static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1093
1094static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1095{
1096 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1097 kvm_mmu_zap_page(vcpu->kvm, sp);
1098 return 1;
1099 }
1100
b1a36821
MT
1101 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1102 kvm_flush_remote_tlbs(vcpu->kvm);
0c0f40bd 1103 kvm_unlink_unsync_page(vcpu->kvm, sp);
4731d4c7
MT
1104 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1105 kvm_mmu_zap_page(vcpu->kvm, sp);
1106 return 1;
1107 }
1108
1109 kvm_mmu_flush_tlb(vcpu);
4731d4c7
MT
1110 return 0;
1111}
1112
60c8aec6
MT
1113struct mmu_page_path {
1114 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1115 unsigned int idx[PT64_ROOT_LEVEL-1];
4731d4c7
MT
1116};
1117
60c8aec6
MT
1118#define for_each_sp(pvec, sp, parents, i) \
1119 for (i = mmu_pages_next(&pvec, &parents, -1), \
1120 sp = pvec.page[i].sp; \
1121 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1122 i = mmu_pages_next(&pvec, &parents, i))
1123
cded19f3
HE
1124static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1125 struct mmu_page_path *parents,
1126 int i)
60c8aec6
MT
1127{
1128 int n;
1129
1130 for (n = i+1; n < pvec->nr; n++) {
1131 struct kvm_mmu_page *sp = pvec->page[n].sp;
1132
1133 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1134 parents->idx[0] = pvec->page[n].idx;
1135 return n;
1136 }
1137
1138 parents->parent[sp->role.level-2] = sp;
1139 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1140 }
1141
1142 return n;
1143}
1144
cded19f3 1145static void mmu_pages_clear_parents(struct mmu_page_path *parents)
4731d4c7 1146{
60c8aec6
MT
1147 struct kvm_mmu_page *sp;
1148 unsigned int level = 0;
1149
1150 do {
1151 unsigned int idx = parents->idx[level];
4731d4c7 1152
60c8aec6
MT
1153 sp = parents->parent[level];
1154 if (!sp)
1155 return;
1156
1157 --sp->unsync_children;
1158 WARN_ON((int)sp->unsync_children < 0);
1159 __clear_bit(idx, sp->unsync_child_bitmap);
1160 level++;
1161 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
4731d4c7
MT
1162}
1163
60c8aec6
MT
1164static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1165 struct mmu_page_path *parents,
1166 struct kvm_mmu_pages *pvec)
4731d4c7 1167{
60c8aec6
MT
1168 parents->parent[parent->role.level-1] = NULL;
1169 pvec->nr = 0;
1170}
4731d4c7 1171
60c8aec6
MT
1172static void mmu_sync_children(struct kvm_vcpu *vcpu,
1173 struct kvm_mmu_page *parent)
1174{
1175 int i;
1176 struct kvm_mmu_page *sp;
1177 struct mmu_page_path parents;
1178 struct kvm_mmu_pages pages;
1179
1180 kvm_mmu_pages_init(parent, &parents, &pages);
1181 while (mmu_unsync_walk(parent, &pages)) {
b1a36821
MT
1182 int protected = 0;
1183
1184 for_each_sp(pages, sp, parents, i)
1185 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1186
1187 if (protected)
1188 kvm_flush_remote_tlbs(vcpu->kvm);
1189
60c8aec6
MT
1190 for_each_sp(pages, sp, parents, i) {
1191 kvm_sync_page(vcpu, sp);
1192 mmu_pages_clear_parents(&parents);
1193 }
4731d4c7 1194 cond_resched_lock(&vcpu->kvm->mmu_lock);
60c8aec6
MT
1195 kvm_mmu_pages_init(parent, &parents, &pages);
1196 }
4731d4c7
MT
1197}
1198
cea0f0e7
AK
1199static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1200 gfn_t gfn,
1201 gva_t gaddr,
1202 unsigned level,
f6e2c02b 1203 int direct,
41074d07 1204 unsigned access,
f7d9c7b7 1205 u64 *parent_pte)
cea0f0e7
AK
1206{
1207 union kvm_mmu_page_role role;
1208 unsigned index;
1209 unsigned quadrant;
1210 struct hlist_head *bucket;
4db35314 1211 struct kvm_mmu_page *sp;
4731d4c7 1212 struct hlist_node *node, *tmp;
cea0f0e7 1213
a770f6f2 1214 role = vcpu->arch.mmu.base_role;
cea0f0e7 1215 role.level = level;
f6e2c02b 1216 role.direct = direct;
41074d07 1217 role.access = access;
ad312c7c 1218 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
cea0f0e7
AK
1219 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1220 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1221 role.quadrant = quadrant;
1222 }
b8688d51 1223 pgprintk("%s: looking gfn %lx role %x\n", __func__,
cea0f0e7 1224 gfn, role.word);
1ae0a13d 1225 index = kvm_page_table_hashfn(gfn);
f05e70ac 1226 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4731d4c7
MT
1227 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1228 if (sp->gfn == gfn) {
1229 if (sp->unsync)
1230 if (kvm_sync_page(vcpu, sp))
1231 continue;
1232
1233 if (sp->role.word != role.word)
1234 continue;
1235
4db35314 1236 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
0074ff63
MT
1237 if (sp->unsync_children) {
1238 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1239 kvm_mmu_mark_parents_unsync(vcpu, sp);
1240 }
b8688d51 1241 pgprintk("%s: found\n", __func__);
4db35314 1242 return sp;
cea0f0e7 1243 }
dfc5aa00 1244 ++vcpu->kvm->stat.mmu_cache_miss;
4db35314
AK
1245 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1246 if (!sp)
1247 return sp;
b8688d51 1248 pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
4db35314
AK
1249 sp->gfn = gfn;
1250 sp->role = role;
bf47a760 1251 sp->global = 0;
4db35314 1252 hlist_add_head(&sp->hash_link, bucket);
f6e2c02b 1253 if (!direct) {
b1a36821
MT
1254 if (rmap_write_protect(vcpu->kvm, gfn))
1255 kvm_flush_remote_tlbs(vcpu->kvm);
4731d4c7
MT
1256 account_shadowed(vcpu->kvm, gfn);
1257 }
131d8279
AK
1258 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1259 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1260 else
1261 nonpaging_prefetch_page(vcpu, sp);
4db35314 1262 return sp;
cea0f0e7
AK
1263}
1264
2d11123a
AK
1265static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1266 struct kvm_vcpu *vcpu, u64 addr)
1267{
1268 iterator->addr = addr;
1269 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1270 iterator->level = vcpu->arch.mmu.shadow_root_level;
1271 if (iterator->level == PT32E_ROOT_LEVEL) {
1272 iterator->shadow_addr
1273 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1274 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1275 --iterator->level;
1276 if (!iterator->shadow_addr)
1277 iterator->level = 0;
1278 }
1279}
1280
1281static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1282{
1283 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1284 return false;
1285 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1286 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1287 return true;
1288}
1289
1290static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1291{
1292 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1293 --iterator->level;
1294}
1295
90cb0529 1296static void kvm_mmu_page_unlink_children(struct kvm *kvm,
4db35314 1297 struct kvm_mmu_page *sp)
a436036b 1298{
697fe2e2
AK
1299 unsigned i;
1300 u64 *pt;
1301 u64 ent;
1302
4db35314 1303 pt = sp->spt;
697fe2e2 1304
4db35314 1305 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
697fe2e2 1306 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
c7addb90 1307 if (is_shadow_present_pte(pt[i]))
290fc38d 1308 rmap_remove(kvm, &pt[i]);
c7addb90 1309 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2
AK
1310 }
1311 return;
1312 }
1313
1314 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1315 ent = pt[i];
1316
05da4558
MT
1317 if (is_shadow_present_pte(ent)) {
1318 if (!is_large_pte(ent)) {
1319 ent &= PT64_BASE_ADDR_MASK;
1320 mmu_page_remove_parent_pte(page_header(ent),
1321 &pt[i]);
1322 } else {
1323 --kvm->stat.lpages;
1324 rmap_remove(kvm, &pt[i]);
1325 }
1326 }
c7addb90 1327 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2 1328 }
a436036b
AK
1329}
1330
4db35314 1331static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7 1332{
4db35314 1333 mmu_page_remove_parent_pte(sp, parent_pte);
a436036b
AK
1334}
1335
12b7d28f
AK
1336static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1337{
1338 int i;
1339
1340 for (i = 0; i < KVM_MAX_VCPUS; ++i)
1341 if (kvm->vcpus[i])
ad312c7c 1342 kvm->vcpus[i]->arch.last_pte_updated = NULL;
12b7d28f
AK
1343}
1344
31aa2b44 1345static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
a436036b
AK
1346{
1347 u64 *parent_pte;
1348
4db35314
AK
1349 while (sp->multimapped || sp->parent_pte) {
1350 if (!sp->multimapped)
1351 parent_pte = sp->parent_pte;
a436036b
AK
1352 else {
1353 struct kvm_pte_chain *chain;
1354
4db35314 1355 chain = container_of(sp->parent_ptes.first,
a436036b
AK
1356 struct kvm_pte_chain, link);
1357 parent_pte = chain->parent_ptes[0];
1358 }
697fe2e2 1359 BUG_ON(!parent_pte);
4db35314 1360 kvm_mmu_put_page(sp, parent_pte);
c7addb90 1361 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
a436036b 1362 }
31aa2b44
AK
1363}
1364
60c8aec6
MT
1365static int mmu_zap_unsync_children(struct kvm *kvm,
1366 struct kvm_mmu_page *parent)
4731d4c7 1367{
60c8aec6
MT
1368 int i, zapped = 0;
1369 struct mmu_page_path parents;
1370 struct kvm_mmu_pages pages;
4731d4c7 1371
60c8aec6 1372 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
4731d4c7 1373 return 0;
60c8aec6
MT
1374
1375 kvm_mmu_pages_init(parent, &parents, &pages);
1376 while (mmu_unsync_walk(parent, &pages)) {
1377 struct kvm_mmu_page *sp;
1378
1379 for_each_sp(pages, sp, parents, i) {
1380 kvm_mmu_zap_page(kvm, sp);
1381 mmu_pages_clear_parents(&parents);
1382 }
1383 zapped += pages.nr;
1384 kvm_mmu_pages_init(parent, &parents, &pages);
1385 }
1386
1387 return zapped;
4731d4c7
MT
1388}
1389
07385413 1390static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
31aa2b44 1391{
4731d4c7 1392 int ret;
31aa2b44 1393 ++kvm->stat.mmu_shadow_zapped;
4731d4c7 1394 ret = mmu_zap_unsync_children(kvm, sp);
4db35314 1395 kvm_mmu_page_unlink_children(kvm, sp);
31aa2b44 1396 kvm_mmu_unlink_parents(kvm, sp);
5b5c6a5a 1397 kvm_flush_remote_tlbs(kvm);
f6e2c02b 1398 if (!sp->role.invalid && !sp->role.direct)
5b5c6a5a 1399 unaccount_shadowed(kvm, sp->gfn);
4731d4c7
MT
1400 if (sp->unsync)
1401 kvm_unlink_unsync_page(kvm, sp);
4db35314
AK
1402 if (!sp->root_count) {
1403 hlist_del(&sp->hash_link);
1404 kvm_mmu_free_page(kvm, sp);
2e53d63a 1405 } else {
2e53d63a 1406 sp->role.invalid = 1;
5b5c6a5a 1407 list_move(&sp->link, &kvm->arch.active_mmu_pages);
2e53d63a
MT
1408 kvm_reload_remote_mmus(kvm);
1409 }
12b7d28f 1410 kvm_mmu_reset_last_pte_updated(kvm);
4731d4c7 1411 return ret;
a436036b
AK
1412}
1413
82ce2c96
IE
1414/*
1415 * Changing the number of mmu pages allocated to the vm
1416 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1417 */
1418void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1419{
1420 /*
1421 * If we set the number of mmu pages to be smaller be than the
1422 * number of actived pages , we must to free some mmu pages before we
1423 * change the value
1424 */
1425
f05e70ac 1426 if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
82ce2c96 1427 kvm_nr_mmu_pages) {
f05e70ac
ZX
1428 int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
1429 - kvm->arch.n_free_mmu_pages;
82ce2c96
IE
1430
1431 while (n_used_mmu_pages > kvm_nr_mmu_pages) {
1432 struct kvm_mmu_page *page;
1433
f05e70ac 1434 page = container_of(kvm->arch.active_mmu_pages.prev,
82ce2c96
IE
1435 struct kvm_mmu_page, link);
1436 kvm_mmu_zap_page(kvm, page);
1437 n_used_mmu_pages--;
1438 }
f05e70ac 1439 kvm->arch.n_free_mmu_pages = 0;
82ce2c96
IE
1440 }
1441 else
f05e70ac
ZX
1442 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1443 - kvm->arch.n_alloc_mmu_pages;
82ce2c96 1444
f05e70ac 1445 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
82ce2c96
IE
1446}
1447
f67a46f4 1448static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
a436036b
AK
1449{
1450 unsigned index;
1451 struct hlist_head *bucket;
4db35314 1452 struct kvm_mmu_page *sp;
a436036b
AK
1453 struct hlist_node *node, *n;
1454 int r;
1455
b8688d51 1456 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
a436036b 1457 r = 0;
1ae0a13d 1458 index = kvm_page_table_hashfn(gfn);
f05e70ac 1459 bucket = &kvm->arch.mmu_page_hash[index];
4db35314 1460 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
f6e2c02b 1461 if (sp->gfn == gfn && !sp->role.direct) {
b8688d51 1462 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
4db35314 1463 sp->role.word);
a436036b 1464 r = 1;
07385413
MT
1465 if (kvm_mmu_zap_page(kvm, sp))
1466 n = bucket->first;
a436036b
AK
1467 }
1468 return r;
cea0f0e7
AK
1469}
1470
f67a46f4 1471static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
97a0a01e 1472{
4677a3b6
AK
1473 unsigned index;
1474 struct hlist_head *bucket;
4db35314 1475 struct kvm_mmu_page *sp;
4677a3b6 1476 struct hlist_node *node, *nn;
97a0a01e 1477
4677a3b6
AK
1478 index = kvm_page_table_hashfn(gfn);
1479 bucket = &kvm->arch.mmu_page_hash[index];
1480 hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
f6e2c02b 1481 if (sp->gfn == gfn && !sp->role.direct
4677a3b6
AK
1482 && !sp->role.invalid) {
1483 pgprintk("%s: zap %lx %x\n",
1484 __func__, gfn, sp->role.word);
1485 kvm_mmu_zap_page(kvm, sp);
1486 }
97a0a01e
AK
1487 }
1488}
1489
38c335f1 1490static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
6aa8b732 1491{
38c335f1 1492 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
4db35314 1493 struct kvm_mmu_page *sp = page_header(__pa(pte));
6aa8b732 1494
291f26bc 1495 __set_bit(slot, sp->slot_bitmap);
6aa8b732
AK
1496}
1497
6844dec6
MT
1498static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1499{
1500 int i;
1501 u64 *pt = sp->spt;
1502
1503 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1504 return;
1505
1506 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1507 if (pt[i] == shadow_notrap_nonpresent_pte)
1508 set_shadow_pte(&pt[i], shadow_trap_nonpresent_pte);
1509 }
1510}
1511
039576c0
AK
1512struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1513{
72dc67a6
IE
1514 struct page *page;
1515
ad312c7c 1516 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
039576c0
AK
1517
1518 if (gpa == UNMAPPED_GVA)
1519 return NULL;
72dc67a6 1520
72dc67a6 1521 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
72dc67a6
IE
1522
1523 return page;
039576c0
AK
1524}
1525
74be52e3
SY
1526/*
1527 * The function is based on mtrr_type_lookup() in
1528 * arch/x86/kernel/cpu/mtrr/generic.c
1529 */
1530static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1531 u64 start, u64 end)
1532{
1533 int i;
1534 u64 base, mask;
1535 u8 prev_match, curr_match;
1536 int num_var_ranges = KVM_NR_VAR_MTRR;
1537
1538 if (!mtrr_state->enabled)
1539 return 0xFF;
1540
1541 /* Make end inclusive end, instead of exclusive */
1542 end--;
1543
1544 /* Look in fixed ranges. Just return the type as per start */
1545 if (mtrr_state->have_fixed && (start < 0x100000)) {
1546 int idx;
1547
1548 if (start < 0x80000) {
1549 idx = 0;
1550 idx += (start >> 16);
1551 return mtrr_state->fixed_ranges[idx];
1552 } else if (start < 0xC0000) {
1553 idx = 1 * 8;
1554 idx += ((start - 0x80000) >> 14);
1555 return mtrr_state->fixed_ranges[idx];
1556 } else if (start < 0x1000000) {
1557 idx = 3 * 8;
1558 idx += ((start - 0xC0000) >> 12);
1559 return mtrr_state->fixed_ranges[idx];
1560 }
1561 }
1562
1563 /*
1564 * Look in variable ranges
1565 * Look of multiple ranges matching this address and pick type
1566 * as per MTRR precedence
1567 */
1568 if (!(mtrr_state->enabled & 2))
1569 return mtrr_state->def_type;
1570
1571 prev_match = 0xFF;
1572 for (i = 0; i < num_var_ranges; ++i) {
1573 unsigned short start_state, end_state;
1574
1575 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1576 continue;
1577
1578 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1579 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1580 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1581 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1582
1583 start_state = ((start & mask) == (base & mask));
1584 end_state = ((end & mask) == (base & mask));
1585 if (start_state != end_state)
1586 return 0xFE;
1587
1588 if ((start & mask) != (base & mask))
1589 continue;
1590
1591 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1592 if (prev_match == 0xFF) {
1593 prev_match = curr_match;
1594 continue;
1595 }
1596
1597 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1598 curr_match == MTRR_TYPE_UNCACHABLE)
1599 return MTRR_TYPE_UNCACHABLE;
1600
1601 if ((prev_match == MTRR_TYPE_WRBACK &&
1602 curr_match == MTRR_TYPE_WRTHROUGH) ||
1603 (prev_match == MTRR_TYPE_WRTHROUGH &&
1604 curr_match == MTRR_TYPE_WRBACK)) {
1605 prev_match = MTRR_TYPE_WRTHROUGH;
1606 curr_match = MTRR_TYPE_WRTHROUGH;
1607 }
1608
1609 if (prev_match != curr_match)
1610 return MTRR_TYPE_UNCACHABLE;
1611 }
1612
1613 if (prev_match != 0xFF)
1614 return prev_match;
1615
1616 return mtrr_state->def_type;
1617}
1618
1619static u8 get_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1620{
1621 u8 mtrr;
1622
1623 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1624 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1625 if (mtrr == 0xfe || mtrr == 0xff)
1626 mtrr = MTRR_TYPE_WRBACK;
1627 return mtrr;
1628}
1629
4731d4c7
MT
1630static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1631{
1632 unsigned index;
1633 struct hlist_head *bucket;
1634 struct kvm_mmu_page *s;
1635 struct hlist_node *node, *n;
1636
1637 index = kvm_page_table_hashfn(sp->gfn);
1638 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1639 /* don't unsync if pagetable is shadowed with multiple roles */
1640 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
f6e2c02b 1641 if (s->gfn != sp->gfn || s->role.direct)
4731d4c7
MT
1642 continue;
1643 if (s->role.word != sp->role.word)
1644 return 1;
1645 }
4731d4c7
MT
1646 ++vcpu->kvm->stat.mmu_unsync;
1647 sp->unsync = 1;
6cffe8ca
MT
1648
1649 if (sp->global) {
1650 list_add(&sp->oos_link, &vcpu->kvm->arch.oos_global_pages);
1651 ++vcpu->kvm->stat.mmu_unsync_global;
1652 } else
1653 kvm_mmu_mark_parents_unsync(vcpu, sp);
1654
4731d4c7
MT
1655 mmu_convert_notrap(sp);
1656 return 0;
1657}
1658
1659static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1660 bool can_unsync)
1661{
1662 struct kvm_mmu_page *shadow;
1663
1664 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1665 if (shadow) {
1666 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1667 return 1;
1668 if (shadow->unsync)
1669 return 0;
582801a9 1670 if (can_unsync && oos_shadow)
4731d4c7
MT
1671 return kvm_unsync_page(vcpu, shadow);
1672 return 1;
1673 }
1674 return 0;
1675}
1676
1e73f9dd
MT
1677static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1678 unsigned pte_access, int user_fault,
1679 int write_fault, int dirty, int largepage,
6cffe8ca 1680 int global, gfn_t gfn, pfn_t pfn, bool speculative,
4731d4c7 1681 bool can_unsync)
1c4f1fd6
AK
1682{
1683 u64 spte;
1e73f9dd 1684 int ret = 0;
64d4d521 1685 u64 mt_mask = shadow_mt_mask;
6cffe8ca
MT
1686 struct kvm_mmu_page *sp = page_header(__pa(shadow_pte));
1687
1688 if (!global && sp->global) {
1689 sp->global = 0;
1690 if (sp->unsync) {
1691 kvm_unlink_unsync_global(vcpu->kvm, sp);
1692 kvm_mmu_mark_parents_unsync(vcpu, sp);
1693 }
1694 }
64d4d521 1695
1c4f1fd6
AK
1696 /*
1697 * We don't set the accessed bit, since we sometimes want to see
1698 * whether the guest actually used the pte (in order to detect
1699 * demand paging).
1700 */
7b52345e 1701 spte = shadow_base_present_pte | shadow_dirty_mask;
947da538 1702 if (!speculative)
3201b5d9 1703 spte |= shadow_accessed_mask;
1c4f1fd6
AK
1704 if (!dirty)
1705 pte_access &= ~ACC_WRITE_MASK;
7b52345e
SY
1706 if (pte_access & ACC_EXEC_MASK)
1707 spte |= shadow_x_mask;
1708 else
1709 spte |= shadow_nx_mask;
1c4f1fd6 1710 if (pte_access & ACC_USER_MASK)
7b52345e 1711 spte |= shadow_user_mask;
05da4558
MT
1712 if (largepage)
1713 spte |= PT_PAGE_SIZE_MASK;
64d4d521 1714 if (mt_mask) {
2aaf69dc
SY
1715 if (!kvm_is_mmio_pfn(pfn)) {
1716 mt_mask = get_memory_type(vcpu, gfn) <<
1717 kvm_x86_ops->get_mt_mask_shift();
1718 mt_mask |= VMX_EPT_IGMT_BIT;
1719 } else
1720 mt_mask = MTRR_TYPE_UNCACHABLE <<
1721 kvm_x86_ops->get_mt_mask_shift();
64d4d521
SY
1722 spte |= mt_mask;
1723 }
1c4f1fd6 1724
35149e21 1725 spte |= (u64)pfn << PAGE_SHIFT;
1c4f1fd6
AK
1726
1727 if ((pte_access & ACC_WRITE_MASK)
1728 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1c4f1fd6 1729
38187c83
MT
1730 if (largepage && has_wrprotected_page(vcpu->kvm, gfn)) {
1731 ret = 1;
1732 spte = shadow_trap_nonpresent_pte;
1733 goto set_pte;
1734 }
1735
1c4f1fd6 1736 spte |= PT_WRITABLE_MASK;
1c4f1fd6 1737
ecc5589f
MT
1738 /*
1739 * Optimization: for pte sync, if spte was writable the hash
1740 * lookup is unnecessary (and expensive). Write protection
1741 * is responsibility of mmu_get_page / kvm_sync_page.
1742 * Same reasoning can be applied to dirty page accounting.
1743 */
1744 if (!can_unsync && is_writeble_pte(*shadow_pte))
1745 goto set_pte;
1746
4731d4c7 1747 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1c4f1fd6 1748 pgprintk("%s: found shadow page for %lx, marking ro\n",
b8688d51 1749 __func__, gfn);
1e73f9dd 1750 ret = 1;
1c4f1fd6 1751 pte_access &= ~ACC_WRITE_MASK;
a378b4e6 1752 if (is_writeble_pte(spte))
1c4f1fd6 1753 spte &= ~PT_WRITABLE_MASK;
1c4f1fd6
AK
1754 }
1755 }
1756
1c4f1fd6
AK
1757 if (pte_access & ACC_WRITE_MASK)
1758 mark_page_dirty(vcpu->kvm, gfn);
1759
38187c83 1760set_pte:
1c4f1fd6 1761 set_shadow_pte(shadow_pte, spte);
1e73f9dd
MT
1762 return ret;
1763}
1764
1e73f9dd
MT
1765static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1766 unsigned pt_access, unsigned pte_access,
1767 int user_fault, int write_fault, int dirty,
6cffe8ca
MT
1768 int *ptwrite, int largepage, int global,
1769 gfn_t gfn, pfn_t pfn, bool speculative)
1e73f9dd
MT
1770{
1771 int was_rmapped = 0;
1772 int was_writeble = is_writeble_pte(*shadow_pte);
1773
1774 pgprintk("%s: spte %llx access %x write_fault %d"
1775 " user_fault %d gfn %lx\n",
1776 __func__, *shadow_pte, pt_access,
1777 write_fault, user_fault, gfn);
1778
1779 if (is_rmap_pte(*shadow_pte)) {
1780 /*
1781 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1782 * the parent of the now unreachable PTE.
1783 */
1784 if (largepage && !is_large_pte(*shadow_pte)) {
1785 struct kvm_mmu_page *child;
1786 u64 pte = *shadow_pte;
1787
1788 child = page_header(pte & PT64_BASE_ADDR_MASK);
1789 mmu_page_remove_parent_pte(child, shadow_pte);
1790 } else if (pfn != spte_to_pfn(*shadow_pte)) {
1791 pgprintk("hfn old %lx new %lx\n",
1792 spte_to_pfn(*shadow_pte), pfn);
1793 rmap_remove(vcpu->kvm, shadow_pte);
6bed6b9e
JR
1794 } else
1795 was_rmapped = 1;
1e73f9dd
MT
1796 }
1797 if (set_spte(vcpu, shadow_pte, pte_access, user_fault, write_fault,
6cffe8ca 1798 dirty, largepage, global, gfn, pfn, speculative, true)) {
1e73f9dd
MT
1799 if (write_fault)
1800 *ptwrite = 1;
a378b4e6
MT
1801 kvm_x86_ops->tlb_flush(vcpu);
1802 }
1e73f9dd
MT
1803
1804 pgprintk("%s: setting spte %llx\n", __func__, *shadow_pte);
1805 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1806 is_large_pte(*shadow_pte)? "2MB" : "4kB",
1807 is_present_pte(*shadow_pte)?"RW":"R", gfn,
1808 *shadow_pte, shadow_pte);
1809 if (!was_rmapped && is_large_pte(*shadow_pte))
05da4558
MT
1810 ++vcpu->kvm->stat.lpages;
1811
1c4f1fd6
AK
1812 page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
1813 if (!was_rmapped) {
05da4558 1814 rmap_add(vcpu, shadow_pte, gfn, largepage);
1c4f1fd6 1815 if (!is_rmap_pte(*shadow_pte))
35149e21 1816 kvm_release_pfn_clean(pfn);
75e68e60
IE
1817 } else {
1818 if (was_writeble)
35149e21 1819 kvm_release_pfn_dirty(pfn);
75e68e60 1820 else
35149e21 1821 kvm_release_pfn_clean(pfn);
1c4f1fd6 1822 }
1b7fcd32 1823 if (speculative) {
ad312c7c 1824 vcpu->arch.last_pte_updated = shadow_pte;
1b7fcd32
AK
1825 vcpu->arch.last_pte_gfn = gfn;
1826 }
1c4f1fd6
AK
1827}
1828
6aa8b732
AK
1829static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1830{
1831}
1832
9f652d21
AK
1833static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1834 int largepage, gfn_t gfn, pfn_t pfn)
140754bc 1835{
9f652d21 1836 struct kvm_shadow_walk_iterator iterator;
140754bc 1837 struct kvm_mmu_page *sp;
9f652d21 1838 int pt_write = 0;
140754bc 1839 gfn_t pseudo_gfn;
6aa8b732 1840
9f652d21
AK
1841 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1842 if (iterator.level == PT_PAGE_TABLE_LEVEL
1843 || (largepage && iterator.level == PT_DIRECTORY_LEVEL)) {
1844 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1845 0, write, 1, &pt_write,
1846 largepage, 0, gfn, pfn, false);
1847 ++vcpu->stat.pf_fixed;
1848 break;
6aa8b732
AK
1849 }
1850
9f652d21
AK
1851 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1852 pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1853 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1854 iterator.level - 1,
1855 1, ACC_ALL, iterator.sptep);
1856 if (!sp) {
1857 pgprintk("nonpaging_map: ENOMEM\n");
1858 kvm_release_pfn_clean(pfn);
1859 return -ENOMEM;
1860 }
140754bc 1861
9f652d21
AK
1862 set_shadow_pte(iterator.sptep,
1863 __pa(sp->spt)
1864 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1865 | shadow_user_mask | shadow_x_mask);
1866 }
1867 }
1868 return pt_write;
6aa8b732
AK
1869}
1870
10589a46
MT
1871static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1872{
1873 int r;
05da4558 1874 int largepage = 0;
35149e21 1875 pfn_t pfn;
e930bffe 1876 unsigned long mmu_seq;
aaee2c94 1877
05da4558
MT
1878 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
1879 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1880 largepage = 1;
1881 }
1882
e930bffe 1883 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 1884 smp_rmb();
35149e21 1885 pfn = gfn_to_pfn(vcpu->kvm, gfn);
aaee2c94 1886
d196e343 1887 /* mmio */
35149e21
AL
1888 if (is_error_pfn(pfn)) {
1889 kvm_release_pfn_clean(pfn);
d196e343
AK
1890 return 1;
1891 }
1892
aaee2c94 1893 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA
1894 if (mmu_notifier_retry(vcpu, mmu_seq))
1895 goto out_unlock;
eb787d10 1896 kvm_mmu_free_some_pages(vcpu);
6c41f428 1897 r = __direct_map(vcpu, v, write, largepage, gfn, pfn);
aaee2c94
MT
1898 spin_unlock(&vcpu->kvm->mmu_lock);
1899
aaee2c94 1900
10589a46 1901 return r;
e930bffe
AA
1902
1903out_unlock:
1904 spin_unlock(&vcpu->kvm->mmu_lock);
1905 kvm_release_pfn_clean(pfn);
1906 return 0;
10589a46
MT
1907}
1908
1909
17ac10ad
AK
1910static void mmu_free_roots(struct kvm_vcpu *vcpu)
1911{
1912 int i;
4db35314 1913 struct kvm_mmu_page *sp;
17ac10ad 1914
ad312c7c 1915 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
7b53aa56 1916 return;
aaee2c94 1917 spin_lock(&vcpu->kvm->mmu_lock);
ad312c7c
ZX
1918 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1919 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad 1920
4db35314
AK
1921 sp = page_header(root);
1922 --sp->root_count;
2e53d63a
MT
1923 if (!sp->root_count && sp->role.invalid)
1924 kvm_mmu_zap_page(vcpu->kvm, sp);
ad312c7c 1925 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
aaee2c94 1926 spin_unlock(&vcpu->kvm->mmu_lock);
17ac10ad
AK
1927 return;
1928 }
17ac10ad 1929 for (i = 0; i < 4; ++i) {
ad312c7c 1930 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad 1931
417726a3 1932 if (root) {
417726a3 1933 root &= PT64_BASE_ADDR_MASK;
4db35314
AK
1934 sp = page_header(root);
1935 --sp->root_count;
2e53d63a
MT
1936 if (!sp->root_count && sp->role.invalid)
1937 kvm_mmu_zap_page(vcpu->kvm, sp);
417726a3 1938 }
ad312c7c 1939 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 1940 }
aaee2c94 1941 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 1942 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
17ac10ad
AK
1943}
1944
1945static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
1946{
1947 int i;
cea0f0e7 1948 gfn_t root_gfn;
4db35314 1949 struct kvm_mmu_page *sp;
f6e2c02b 1950 int direct = 0;
3bb65a22 1951
ad312c7c 1952 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
17ac10ad 1953
ad312c7c
ZX
1954 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1955 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad
AK
1956
1957 ASSERT(!VALID_PAGE(root));
fb72d167 1958 if (tdp_enabled)
f6e2c02b 1959 direct = 1;
4db35314 1960 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
f6e2c02b 1961 PT64_ROOT_LEVEL, direct,
fb72d167 1962 ACC_ALL, NULL);
4db35314
AK
1963 root = __pa(sp->spt);
1964 ++sp->root_count;
ad312c7c 1965 vcpu->arch.mmu.root_hpa = root;
17ac10ad
AK
1966 return;
1967 }
f6e2c02b 1968 direct = !is_paging(vcpu);
fb72d167 1969 if (tdp_enabled)
f6e2c02b 1970 direct = 1;
17ac10ad 1971 for (i = 0; i < 4; ++i) {
ad312c7c 1972 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad
AK
1973
1974 ASSERT(!VALID_PAGE(root));
ad312c7c
ZX
1975 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
1976 if (!is_present_pte(vcpu->arch.pdptrs[i])) {
1977 vcpu->arch.mmu.pae_root[i] = 0;
417726a3
AK
1978 continue;
1979 }
ad312c7c
ZX
1980 root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
1981 } else if (vcpu->arch.mmu.root_level == 0)
cea0f0e7 1982 root_gfn = 0;
4db35314 1983 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
f6e2c02b 1984 PT32_ROOT_LEVEL, direct,
f7d9c7b7 1985 ACC_ALL, NULL);
4db35314
AK
1986 root = __pa(sp->spt);
1987 ++sp->root_count;
ad312c7c 1988 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
17ac10ad 1989 }
ad312c7c 1990 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
17ac10ad
AK
1991}
1992
0ba73cda
MT
1993static void mmu_sync_roots(struct kvm_vcpu *vcpu)
1994{
1995 int i;
1996 struct kvm_mmu_page *sp;
1997
1998 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
1999 return;
2000 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2001 hpa_t root = vcpu->arch.mmu.root_hpa;
2002 sp = page_header(root);
2003 mmu_sync_children(vcpu, sp);
2004 return;
2005 }
2006 for (i = 0; i < 4; ++i) {
2007 hpa_t root = vcpu->arch.mmu.pae_root[i];
2008
2009 if (root) {
2010 root &= PT64_BASE_ADDR_MASK;
2011 sp = page_header(root);
2012 mmu_sync_children(vcpu, sp);
2013 }
2014 }
2015}
2016
6cffe8ca
MT
2017static void mmu_sync_global(struct kvm_vcpu *vcpu)
2018{
2019 struct kvm *kvm = vcpu->kvm;
2020 struct kvm_mmu_page *sp, *n;
2021
2022 list_for_each_entry_safe(sp, n, &kvm->arch.oos_global_pages, oos_link)
2023 kvm_sync_page(vcpu, sp);
2024}
2025
0ba73cda
MT
2026void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2027{
2028 spin_lock(&vcpu->kvm->mmu_lock);
2029 mmu_sync_roots(vcpu);
6cffe8ca
MT
2030 spin_unlock(&vcpu->kvm->mmu_lock);
2031}
2032
2033void kvm_mmu_sync_global(struct kvm_vcpu *vcpu)
2034{
2035 spin_lock(&vcpu->kvm->mmu_lock);
2036 mmu_sync_global(vcpu);
0ba73cda
MT
2037 spin_unlock(&vcpu->kvm->mmu_lock);
2038}
2039
6aa8b732
AK
2040static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
2041{
2042 return vaddr;
2043}
2044
2045static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
3f3e7124 2046 u32 error_code)
6aa8b732 2047{
e833240f 2048 gfn_t gfn;
e2dec939 2049 int r;
6aa8b732 2050
b8688d51 2051 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
e2dec939
AK
2052 r = mmu_topup_memory_caches(vcpu);
2053 if (r)
2054 return r;
714b93da 2055
6aa8b732 2056 ASSERT(vcpu);
ad312c7c 2057 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 2058
e833240f 2059 gfn = gva >> PAGE_SHIFT;
6aa8b732 2060
e833240f
AK
2061 return nonpaging_map(vcpu, gva & PAGE_MASK,
2062 error_code & PFERR_WRITE_MASK, gfn);
6aa8b732
AK
2063}
2064
fb72d167
JR
2065static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2066 u32 error_code)
2067{
35149e21 2068 pfn_t pfn;
fb72d167 2069 int r;
05da4558
MT
2070 int largepage = 0;
2071 gfn_t gfn = gpa >> PAGE_SHIFT;
e930bffe 2072 unsigned long mmu_seq;
fb72d167
JR
2073
2074 ASSERT(vcpu);
2075 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2076
2077 r = mmu_topup_memory_caches(vcpu);
2078 if (r)
2079 return r;
2080
05da4558
MT
2081 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
2082 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
2083 largepage = 1;
2084 }
e930bffe 2085 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 2086 smp_rmb();
35149e21 2087 pfn = gfn_to_pfn(vcpu->kvm, gfn);
35149e21
AL
2088 if (is_error_pfn(pfn)) {
2089 kvm_release_pfn_clean(pfn);
fb72d167
JR
2090 return 1;
2091 }
2092 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA
2093 if (mmu_notifier_retry(vcpu, mmu_seq))
2094 goto out_unlock;
fb72d167
JR
2095 kvm_mmu_free_some_pages(vcpu);
2096 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
6c41f428 2097 largepage, gfn, pfn);
fb72d167 2098 spin_unlock(&vcpu->kvm->mmu_lock);
fb72d167
JR
2099
2100 return r;
e930bffe
AA
2101
2102out_unlock:
2103 spin_unlock(&vcpu->kvm->mmu_lock);
2104 kvm_release_pfn_clean(pfn);
2105 return 0;
fb72d167
JR
2106}
2107
6aa8b732
AK
2108static void nonpaging_free(struct kvm_vcpu *vcpu)
2109{
17ac10ad 2110 mmu_free_roots(vcpu);
6aa8b732
AK
2111}
2112
2113static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2114{
ad312c7c 2115 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
2116
2117 context->new_cr3 = nonpaging_new_cr3;
2118 context->page_fault = nonpaging_page_fault;
6aa8b732
AK
2119 context->gva_to_gpa = nonpaging_gva_to_gpa;
2120 context->free = nonpaging_free;
c7addb90 2121 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 2122 context->sync_page = nonpaging_sync_page;
a7052897 2123 context->invlpg = nonpaging_invlpg;
cea0f0e7 2124 context->root_level = 0;
6aa8b732 2125 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 2126 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
2127 return 0;
2128}
2129
d835dfec 2130void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
6aa8b732 2131{
1165f5fe 2132 ++vcpu->stat.tlb_flush;
cbdd1bea 2133 kvm_x86_ops->tlb_flush(vcpu);
6aa8b732
AK
2134}
2135
2136static void paging_new_cr3(struct kvm_vcpu *vcpu)
2137{
b8688d51 2138 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
cea0f0e7 2139 mmu_free_roots(vcpu);
6aa8b732
AK
2140}
2141
6aa8b732
AK
2142static void inject_page_fault(struct kvm_vcpu *vcpu,
2143 u64 addr,
2144 u32 err_code)
2145{
c3c91fee 2146 kvm_inject_page_fault(vcpu, addr, err_code);
6aa8b732
AK
2147}
2148
6aa8b732
AK
2149static void paging_free(struct kvm_vcpu *vcpu)
2150{
2151 nonpaging_free(vcpu);
2152}
2153
2154#define PTTYPE 64
2155#include "paging_tmpl.h"
2156#undef PTTYPE
2157
2158#define PTTYPE 32
2159#include "paging_tmpl.h"
2160#undef PTTYPE
2161
17ac10ad 2162static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
6aa8b732 2163{
ad312c7c 2164 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
2165
2166 ASSERT(is_pae(vcpu));
2167 context->new_cr3 = paging_new_cr3;
2168 context->page_fault = paging64_page_fault;
6aa8b732 2169 context->gva_to_gpa = paging64_gva_to_gpa;
c7addb90 2170 context->prefetch_page = paging64_prefetch_page;
e8bc217a 2171 context->sync_page = paging64_sync_page;
a7052897 2172 context->invlpg = paging64_invlpg;
6aa8b732 2173 context->free = paging_free;
17ac10ad
AK
2174 context->root_level = level;
2175 context->shadow_root_level = level;
17c3ba9d 2176 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
2177 return 0;
2178}
2179
17ac10ad
AK
2180static int paging64_init_context(struct kvm_vcpu *vcpu)
2181{
2182 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2183}
2184
6aa8b732
AK
2185static int paging32_init_context(struct kvm_vcpu *vcpu)
2186{
ad312c7c 2187 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
2188
2189 context->new_cr3 = paging_new_cr3;
2190 context->page_fault = paging32_page_fault;
6aa8b732
AK
2191 context->gva_to_gpa = paging32_gva_to_gpa;
2192 context->free = paging_free;
c7addb90 2193 context->prefetch_page = paging32_prefetch_page;
e8bc217a 2194 context->sync_page = paging32_sync_page;
a7052897 2195 context->invlpg = paging32_invlpg;
6aa8b732
AK
2196 context->root_level = PT32_ROOT_LEVEL;
2197 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 2198 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
2199 return 0;
2200}
2201
2202static int paging32E_init_context(struct kvm_vcpu *vcpu)
2203{
17ac10ad 2204 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
6aa8b732
AK
2205}
2206
fb72d167
JR
2207static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2208{
2209 struct kvm_mmu *context = &vcpu->arch.mmu;
2210
2211 context->new_cr3 = nonpaging_new_cr3;
2212 context->page_fault = tdp_page_fault;
2213 context->free = nonpaging_free;
2214 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 2215 context->sync_page = nonpaging_sync_page;
a7052897 2216 context->invlpg = nonpaging_invlpg;
67253af5 2217 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
fb72d167
JR
2218 context->root_hpa = INVALID_PAGE;
2219
2220 if (!is_paging(vcpu)) {
2221 context->gva_to_gpa = nonpaging_gva_to_gpa;
2222 context->root_level = 0;
2223 } else if (is_long_mode(vcpu)) {
2224 context->gva_to_gpa = paging64_gva_to_gpa;
2225 context->root_level = PT64_ROOT_LEVEL;
2226 } else if (is_pae(vcpu)) {
2227 context->gva_to_gpa = paging64_gva_to_gpa;
2228 context->root_level = PT32E_ROOT_LEVEL;
2229 } else {
2230 context->gva_to_gpa = paging32_gva_to_gpa;
2231 context->root_level = PT32_ROOT_LEVEL;
2232 }
2233
2234 return 0;
2235}
2236
2237static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
6aa8b732 2238{
a770f6f2
AK
2239 int r;
2240
6aa8b732 2241 ASSERT(vcpu);
ad312c7c 2242 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732
AK
2243
2244 if (!is_paging(vcpu))
a770f6f2 2245 r = nonpaging_init_context(vcpu);
a9058ecd 2246 else if (is_long_mode(vcpu))
a770f6f2 2247 r = paging64_init_context(vcpu);
6aa8b732 2248 else if (is_pae(vcpu))
a770f6f2 2249 r = paging32E_init_context(vcpu);
6aa8b732 2250 else
a770f6f2
AK
2251 r = paging32_init_context(vcpu);
2252
2253 vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
2254
2255 return r;
6aa8b732
AK
2256}
2257
fb72d167
JR
2258static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2259{
35149e21
AL
2260 vcpu->arch.update_pte.pfn = bad_pfn;
2261
fb72d167
JR
2262 if (tdp_enabled)
2263 return init_kvm_tdp_mmu(vcpu);
2264 else
2265 return init_kvm_softmmu(vcpu);
2266}
2267
6aa8b732
AK
2268static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2269{
2270 ASSERT(vcpu);
ad312c7c
ZX
2271 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2272 vcpu->arch.mmu.free(vcpu);
2273 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6aa8b732
AK
2274 }
2275}
2276
2277int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
17c3ba9d
AK
2278{
2279 destroy_kvm_mmu(vcpu);
2280 return init_kvm_mmu(vcpu);
2281}
8668a3c4 2282EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
17c3ba9d
AK
2283
2284int kvm_mmu_load(struct kvm_vcpu *vcpu)
6aa8b732 2285{
714b93da
AK
2286 int r;
2287
e2dec939 2288 r = mmu_topup_memory_caches(vcpu);
17c3ba9d
AK
2289 if (r)
2290 goto out;
aaee2c94 2291 spin_lock(&vcpu->kvm->mmu_lock);
eb787d10 2292 kvm_mmu_free_some_pages(vcpu);
17c3ba9d 2293 mmu_alloc_roots(vcpu);
0ba73cda 2294 mmu_sync_roots(vcpu);
aaee2c94 2295 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 2296 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
17c3ba9d 2297 kvm_mmu_flush_tlb(vcpu);
714b93da
AK
2298out:
2299 return r;
6aa8b732 2300}
17c3ba9d
AK
2301EXPORT_SYMBOL_GPL(kvm_mmu_load);
2302
2303void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2304{
2305 mmu_free_roots(vcpu);
2306}
6aa8b732 2307
09072daf 2308static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
4db35314 2309 struct kvm_mmu_page *sp,
ac1b714e
AK
2310 u64 *spte)
2311{
2312 u64 pte;
2313 struct kvm_mmu_page *child;
2314
2315 pte = *spte;
c7addb90 2316 if (is_shadow_present_pte(pte)) {
05da4558
MT
2317 if (sp->role.level == PT_PAGE_TABLE_LEVEL ||
2318 is_large_pte(pte))
290fc38d 2319 rmap_remove(vcpu->kvm, spte);
ac1b714e
AK
2320 else {
2321 child = page_header(pte & PT64_BASE_ADDR_MASK);
90cb0529 2322 mmu_page_remove_parent_pte(child, spte);
ac1b714e
AK
2323 }
2324 }
c7addb90 2325 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
05da4558
MT
2326 if (is_large_pte(pte))
2327 --vcpu->kvm->stat.lpages;
ac1b714e
AK
2328}
2329
0028425f 2330static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
4db35314 2331 struct kvm_mmu_page *sp,
0028425f 2332 u64 *spte,
489f1d65 2333 const void *new)
0028425f 2334{
30945387
MT
2335 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2336 if (!vcpu->arch.update_pte.largepage ||
2337 sp->role.glevels == PT32_ROOT_LEVEL) {
2338 ++vcpu->kvm->stat.mmu_pde_zapped;
2339 return;
2340 }
2341 }
0028425f 2342
4cee5764 2343 ++vcpu->kvm->stat.mmu_pte_updated;
4db35314 2344 if (sp->role.glevels == PT32_ROOT_LEVEL)
489f1d65 2345 paging32_update_pte(vcpu, sp, spte, new);
0028425f 2346 else
489f1d65 2347 paging64_update_pte(vcpu, sp, spte, new);
0028425f
AK
2348}
2349
79539cec
AK
2350static bool need_remote_flush(u64 old, u64 new)
2351{
2352 if (!is_shadow_present_pte(old))
2353 return false;
2354 if (!is_shadow_present_pte(new))
2355 return true;
2356 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2357 return true;
2358 old ^= PT64_NX_MASK;
2359 new ^= PT64_NX_MASK;
2360 return (old & ~new & PT64_PERM_MASK) != 0;
2361}
2362
2363static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2364{
2365 if (need_remote_flush(old, new))
2366 kvm_flush_remote_tlbs(vcpu->kvm);
2367 else
2368 kvm_mmu_flush_tlb(vcpu);
2369}
2370
12b7d28f
AK
2371static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2372{
ad312c7c 2373 u64 *spte = vcpu->arch.last_pte_updated;
12b7d28f 2374
7b52345e 2375 return !!(spte && (*spte & shadow_accessed_mask));
12b7d28f
AK
2376}
2377
d7824fff
AK
2378static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2379 const u8 *new, int bytes)
2380{
2381 gfn_t gfn;
2382 int r;
2383 u64 gpte = 0;
35149e21 2384 pfn_t pfn;
d7824fff 2385
05da4558
MT
2386 vcpu->arch.update_pte.largepage = 0;
2387
d7824fff
AK
2388 if (bytes != 4 && bytes != 8)
2389 return;
2390
2391 /*
2392 * Assume that the pte write on a page table of the same type
2393 * as the current vcpu paging mode. This is nearly always true
2394 * (might be false while changing modes). Note it is verified later
2395 * by update_pte().
2396 */
2397 if (is_pae(vcpu)) {
2398 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2399 if ((bytes == 4) && (gpa % 4 == 0)) {
2400 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2401 if (r)
2402 return;
2403 memcpy((void *)&gpte + (gpa % 8), new, 4);
2404 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2405 memcpy((void *)&gpte, new, 8);
2406 }
2407 } else {
2408 if ((bytes == 4) && (gpa % 4 == 0))
2409 memcpy((void *)&gpte, new, 4);
2410 }
2411 if (!is_present_pte(gpte))
2412 return;
2413 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
72dc67a6 2414
05da4558
MT
2415 if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
2416 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
2417 vcpu->arch.update_pte.largepage = 1;
2418 }
e930bffe 2419 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 2420 smp_rmb();
35149e21 2421 pfn = gfn_to_pfn(vcpu->kvm, gfn);
72dc67a6 2422
35149e21
AL
2423 if (is_error_pfn(pfn)) {
2424 kvm_release_pfn_clean(pfn);
d196e343
AK
2425 return;
2426 }
d7824fff 2427 vcpu->arch.update_pte.gfn = gfn;
35149e21 2428 vcpu->arch.update_pte.pfn = pfn;
d7824fff
AK
2429}
2430
1b7fcd32
AK
2431static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2432{
2433 u64 *spte = vcpu->arch.last_pte_updated;
2434
2435 if (spte
2436 && vcpu->arch.last_pte_gfn == gfn
2437 && shadow_accessed_mask
2438 && !(*spte & shadow_accessed_mask)
2439 && is_shadow_present_pte(*spte))
2440 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2441}
2442
09072daf 2443void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
ad218f85
MT
2444 const u8 *new, int bytes,
2445 bool guest_initiated)
da4a00f0 2446{
9b7a0325 2447 gfn_t gfn = gpa >> PAGE_SHIFT;
4db35314 2448 struct kvm_mmu_page *sp;
0e7bc4b9 2449 struct hlist_node *node, *n;
9b7a0325
AK
2450 struct hlist_head *bucket;
2451 unsigned index;
489f1d65 2452 u64 entry, gentry;
9b7a0325 2453 u64 *spte;
9b7a0325 2454 unsigned offset = offset_in_page(gpa);
0e7bc4b9 2455 unsigned pte_size;
9b7a0325 2456 unsigned page_offset;
0e7bc4b9 2457 unsigned misaligned;
fce0657f 2458 unsigned quadrant;
9b7a0325 2459 int level;
86a5ba02 2460 int flooded = 0;
ac1b714e 2461 int npte;
489f1d65 2462 int r;
9b7a0325 2463
b8688d51 2464 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
d7824fff 2465 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
aaee2c94 2466 spin_lock(&vcpu->kvm->mmu_lock);
1b7fcd32 2467 kvm_mmu_access_page(vcpu, gfn);
eb787d10 2468 kvm_mmu_free_some_pages(vcpu);
4cee5764 2469 ++vcpu->kvm->stat.mmu_pte_write;
c7addb90 2470 kvm_mmu_audit(vcpu, "pre pte write");
ad218f85
MT
2471 if (guest_initiated) {
2472 if (gfn == vcpu->arch.last_pt_write_gfn
2473 && !last_updated_pte_accessed(vcpu)) {
2474 ++vcpu->arch.last_pt_write_count;
2475 if (vcpu->arch.last_pt_write_count >= 3)
2476 flooded = 1;
2477 } else {
2478 vcpu->arch.last_pt_write_gfn = gfn;
2479 vcpu->arch.last_pt_write_count = 1;
2480 vcpu->arch.last_pte_updated = NULL;
2481 }
86a5ba02 2482 }
1ae0a13d 2483 index = kvm_page_table_hashfn(gfn);
f05e70ac 2484 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4db35314 2485 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
f6e2c02b 2486 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
9b7a0325 2487 continue;
4db35314 2488 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
0e7bc4b9 2489 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
e925c5ba 2490 misaligned |= bytes < 4;
86a5ba02 2491 if (misaligned || flooded) {
0e7bc4b9
AK
2492 /*
2493 * Misaligned accesses are too much trouble to fix
2494 * up; also, they usually indicate a page is not used
2495 * as a page table.
86a5ba02
AK
2496 *
2497 * If we're seeing too many writes to a page,
2498 * it may no longer be a page table, or we may be
2499 * forking, in which case it is better to unmap the
2500 * page.
0e7bc4b9
AK
2501 */
2502 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
4db35314 2503 gpa, bytes, sp->role.word);
07385413
MT
2504 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2505 n = bucket->first;
4cee5764 2506 ++vcpu->kvm->stat.mmu_flooded;
0e7bc4b9
AK
2507 continue;
2508 }
9b7a0325 2509 page_offset = offset;
4db35314 2510 level = sp->role.level;
ac1b714e 2511 npte = 1;
4db35314 2512 if (sp->role.glevels == PT32_ROOT_LEVEL) {
ac1b714e
AK
2513 page_offset <<= 1; /* 32->64 */
2514 /*
2515 * A 32-bit pde maps 4MB while the shadow pdes map
2516 * only 2MB. So we need to double the offset again
2517 * and zap two pdes instead of one.
2518 */
2519 if (level == PT32_ROOT_LEVEL) {
6b8d0f9b 2520 page_offset &= ~7; /* kill rounding error */
ac1b714e
AK
2521 page_offset <<= 1;
2522 npte = 2;
2523 }
fce0657f 2524 quadrant = page_offset >> PAGE_SHIFT;
9b7a0325 2525 page_offset &= ~PAGE_MASK;
4db35314 2526 if (quadrant != sp->role.quadrant)
fce0657f 2527 continue;
9b7a0325 2528 }
4db35314 2529 spte = &sp->spt[page_offset / sizeof(*spte)];
489f1d65
DE
2530 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2531 gentry = 0;
2532 r = kvm_read_guest_atomic(vcpu->kvm,
2533 gpa & ~(u64)(pte_size - 1),
2534 &gentry, pte_size);
2535 new = (const void *)&gentry;
2536 if (r < 0)
2537 new = NULL;
2538 }
ac1b714e 2539 while (npte--) {
79539cec 2540 entry = *spte;
4db35314 2541 mmu_pte_write_zap_pte(vcpu, sp, spte);
489f1d65
DE
2542 if (new)
2543 mmu_pte_write_new_pte(vcpu, sp, spte, new);
79539cec 2544 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
ac1b714e 2545 ++spte;
9b7a0325 2546 }
9b7a0325 2547 }
c7addb90 2548 kvm_mmu_audit(vcpu, "post pte write");
aaee2c94 2549 spin_unlock(&vcpu->kvm->mmu_lock);
35149e21
AL
2550 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2551 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2552 vcpu->arch.update_pte.pfn = bad_pfn;
d7824fff 2553 }
da4a00f0
AK
2554}
2555
a436036b
AK
2556int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2557{
10589a46
MT
2558 gpa_t gpa;
2559 int r;
a436036b 2560
10589a46 2561 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
10589a46 2562
aaee2c94 2563 spin_lock(&vcpu->kvm->mmu_lock);
10589a46 2564 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
aaee2c94 2565 spin_unlock(&vcpu->kvm->mmu_lock);
10589a46 2566 return r;
a436036b 2567}
577bdc49 2568EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
a436036b 2569
22d95b12 2570void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
ebeace86 2571{
f05e70ac 2572 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
4db35314 2573 struct kvm_mmu_page *sp;
ebeace86 2574
f05e70ac 2575 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
4db35314
AK
2576 struct kvm_mmu_page, link);
2577 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 2578 ++vcpu->kvm->stat.mmu_recycled;
ebeace86
AK
2579 }
2580}
ebeace86 2581
3067714c
AK
2582int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2583{
2584 int r;
2585 enum emulation_result er;
2586
ad312c7c 2587 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
3067714c
AK
2588 if (r < 0)
2589 goto out;
2590
2591 if (!r) {
2592 r = 1;
2593 goto out;
2594 }
2595
b733bfb5
AK
2596 r = mmu_topup_memory_caches(vcpu);
2597 if (r)
2598 goto out;
2599
3067714c 2600 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
3067714c
AK
2601
2602 switch (er) {
2603 case EMULATE_DONE:
2604 return 1;
2605 case EMULATE_DO_MMIO:
2606 ++vcpu->stat.mmio_exits;
2607 return 0;
2608 case EMULATE_FAIL:
2609 kvm_report_emulation_failure(vcpu, "pagetable");
2610 return 1;
2611 default:
2612 BUG();
2613 }
2614out:
3067714c
AK
2615 return r;
2616}
2617EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2618
a7052897
MT
2619void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2620{
a7052897 2621 vcpu->arch.mmu.invlpg(vcpu, gva);
a7052897
MT
2622 kvm_mmu_flush_tlb(vcpu);
2623 ++vcpu->stat.invlpg;
2624}
2625EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2626
18552672
JR
2627void kvm_enable_tdp(void)
2628{
2629 tdp_enabled = true;
2630}
2631EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2632
5f4cb662
JR
2633void kvm_disable_tdp(void)
2634{
2635 tdp_enabled = false;
2636}
2637EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2638
6aa8b732
AK
2639static void free_mmu_pages(struct kvm_vcpu *vcpu)
2640{
ad312c7c 2641 free_page((unsigned long)vcpu->arch.mmu.pae_root);
6aa8b732
AK
2642}
2643
2644static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2645{
17ac10ad 2646 struct page *page;
6aa8b732
AK
2647 int i;
2648
2649 ASSERT(vcpu);
2650
f05e70ac
ZX
2651 if (vcpu->kvm->arch.n_requested_mmu_pages)
2652 vcpu->kvm->arch.n_free_mmu_pages =
2653 vcpu->kvm->arch.n_requested_mmu_pages;
82ce2c96 2654 else
f05e70ac
ZX
2655 vcpu->kvm->arch.n_free_mmu_pages =
2656 vcpu->kvm->arch.n_alloc_mmu_pages;
17ac10ad
AK
2657 /*
2658 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2659 * Therefore we need to allocate shadow page tables in the first
2660 * 4GB of memory, which happens to fit the DMA32 zone.
2661 */
2662 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2663 if (!page)
2664 goto error_1;
ad312c7c 2665 vcpu->arch.mmu.pae_root = page_address(page);
17ac10ad 2666 for (i = 0; i < 4; ++i)
ad312c7c 2667 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 2668
6aa8b732
AK
2669 return 0;
2670
2671error_1:
2672 free_mmu_pages(vcpu);
2673 return -ENOMEM;
2674}
2675
8018c27b 2676int kvm_mmu_create(struct kvm_vcpu *vcpu)
6aa8b732 2677{
6aa8b732 2678 ASSERT(vcpu);
ad312c7c 2679 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 2680
8018c27b
IM
2681 return alloc_mmu_pages(vcpu);
2682}
6aa8b732 2683
8018c27b
IM
2684int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2685{
2686 ASSERT(vcpu);
ad312c7c 2687 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2c264957 2688
8018c27b 2689 return init_kvm_mmu(vcpu);
6aa8b732
AK
2690}
2691
2692void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2693{
2694 ASSERT(vcpu);
2695
2696 destroy_kvm_mmu(vcpu);
2697 free_mmu_pages(vcpu);
714b93da 2698 mmu_free_memory_caches(vcpu);
6aa8b732
AK
2699}
2700
90cb0529 2701void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
6aa8b732 2702{
4db35314 2703 struct kvm_mmu_page *sp;
6aa8b732 2704
2245a28f 2705 spin_lock(&kvm->mmu_lock);
f05e70ac 2706 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
6aa8b732
AK
2707 int i;
2708 u64 *pt;
2709
291f26bc 2710 if (!test_bit(slot, sp->slot_bitmap))
6aa8b732
AK
2711 continue;
2712
4db35314 2713 pt = sp->spt;
6aa8b732
AK
2714 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2715 /* avoid RMW */
9647c14c 2716 if (pt[i] & PT_WRITABLE_MASK)
6aa8b732 2717 pt[i] &= ~PT_WRITABLE_MASK;
6aa8b732 2718 }
171d595d 2719 kvm_flush_remote_tlbs(kvm);
2245a28f 2720 spin_unlock(&kvm->mmu_lock);
6aa8b732 2721}
37a7d8b0 2722
90cb0529 2723void kvm_mmu_zap_all(struct kvm *kvm)
e0fa826f 2724{
4db35314 2725 struct kvm_mmu_page *sp, *node;
e0fa826f 2726
aaee2c94 2727 spin_lock(&kvm->mmu_lock);
f05e70ac 2728 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
07385413
MT
2729 if (kvm_mmu_zap_page(kvm, sp))
2730 node = container_of(kvm->arch.active_mmu_pages.next,
2731 struct kvm_mmu_page, link);
aaee2c94 2732 spin_unlock(&kvm->mmu_lock);
e0fa826f 2733
90cb0529 2734 kvm_flush_remote_tlbs(kvm);
e0fa826f
DL
2735}
2736
8b2cf73c 2737static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
3ee16c81
IE
2738{
2739 struct kvm_mmu_page *page;
2740
2741 page = container_of(kvm->arch.active_mmu_pages.prev,
2742 struct kvm_mmu_page, link);
2743 kvm_mmu_zap_page(kvm, page);
2744}
2745
2746static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2747{
2748 struct kvm *kvm;
2749 struct kvm *kvm_freed = NULL;
2750 int cache_count = 0;
2751
2752 spin_lock(&kvm_lock);
2753
2754 list_for_each_entry(kvm, &vm_list, vm_list) {
2755 int npages;
2756
5a4c9288
MT
2757 if (!down_read_trylock(&kvm->slots_lock))
2758 continue;
3ee16c81
IE
2759 spin_lock(&kvm->mmu_lock);
2760 npages = kvm->arch.n_alloc_mmu_pages -
2761 kvm->arch.n_free_mmu_pages;
2762 cache_count += npages;
2763 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2764 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2765 cache_count--;
2766 kvm_freed = kvm;
2767 }
2768 nr_to_scan--;
2769
2770 spin_unlock(&kvm->mmu_lock);
5a4c9288 2771 up_read(&kvm->slots_lock);
3ee16c81
IE
2772 }
2773 if (kvm_freed)
2774 list_move_tail(&kvm_freed->vm_list, &vm_list);
2775
2776 spin_unlock(&kvm_lock);
2777
2778 return cache_count;
2779}
2780
2781static struct shrinker mmu_shrinker = {
2782 .shrink = mmu_shrink,
2783 .seeks = DEFAULT_SEEKS * 10,
2784};
2785
2ddfd20e 2786static void mmu_destroy_caches(void)
b5a33a75
AK
2787{
2788 if (pte_chain_cache)
2789 kmem_cache_destroy(pte_chain_cache);
2790 if (rmap_desc_cache)
2791 kmem_cache_destroy(rmap_desc_cache);
d3d25b04
AK
2792 if (mmu_page_header_cache)
2793 kmem_cache_destroy(mmu_page_header_cache);
b5a33a75
AK
2794}
2795
3ee16c81
IE
2796void kvm_mmu_module_exit(void)
2797{
2798 mmu_destroy_caches();
2799 unregister_shrinker(&mmu_shrinker);
2800}
2801
b5a33a75
AK
2802int kvm_mmu_module_init(void)
2803{
2804 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2805 sizeof(struct kvm_pte_chain),
20c2df83 2806 0, 0, NULL);
b5a33a75
AK
2807 if (!pte_chain_cache)
2808 goto nomem;
2809 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2810 sizeof(struct kvm_rmap_desc),
20c2df83 2811 0, 0, NULL);
b5a33a75
AK
2812 if (!rmap_desc_cache)
2813 goto nomem;
2814
d3d25b04
AK
2815 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2816 sizeof(struct kvm_mmu_page),
20c2df83 2817 0, 0, NULL);
d3d25b04
AK
2818 if (!mmu_page_header_cache)
2819 goto nomem;
2820
3ee16c81
IE
2821 register_shrinker(&mmu_shrinker);
2822
b5a33a75
AK
2823 return 0;
2824
2825nomem:
3ee16c81 2826 mmu_destroy_caches();
b5a33a75
AK
2827 return -ENOMEM;
2828}
2829
3ad82a7e
ZX
2830/*
2831 * Caculate mmu pages needed for kvm.
2832 */
2833unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
2834{
2835 int i;
2836 unsigned int nr_mmu_pages;
2837 unsigned int nr_pages = 0;
2838
2839 for (i = 0; i < kvm->nmemslots; i++)
2840 nr_pages += kvm->memslots[i].npages;
2841
2842 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
2843 nr_mmu_pages = max(nr_mmu_pages,
2844 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
2845
2846 return nr_mmu_pages;
2847}
2848
2f333bcb
MT
2849static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2850 unsigned len)
2851{
2852 if (len > buffer->len)
2853 return NULL;
2854 return buffer->ptr;
2855}
2856
2857static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2858 unsigned len)
2859{
2860 void *ret;
2861
2862 ret = pv_mmu_peek_buffer(buffer, len);
2863 if (!ret)
2864 return ret;
2865 buffer->ptr += len;
2866 buffer->len -= len;
2867 buffer->processed += len;
2868 return ret;
2869}
2870
2871static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
2872 gpa_t addr, gpa_t value)
2873{
2874 int bytes = 8;
2875 int r;
2876
2877 if (!is_long_mode(vcpu) && !is_pae(vcpu))
2878 bytes = 4;
2879
2880 r = mmu_topup_memory_caches(vcpu);
2881 if (r)
2882 return r;
2883
3200f405 2884 if (!emulator_write_phys(vcpu, addr, &value, bytes))
2f333bcb
MT
2885 return -EFAULT;
2886
2887 return 1;
2888}
2889
2890static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2891{
a8cd0244 2892 kvm_set_cr3(vcpu, vcpu->arch.cr3);
2f333bcb
MT
2893 return 1;
2894}
2895
2896static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
2897{
2898 spin_lock(&vcpu->kvm->mmu_lock);
2899 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
2900 spin_unlock(&vcpu->kvm->mmu_lock);
2901 return 1;
2902}
2903
2904static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
2905 struct kvm_pv_mmu_op_buffer *buffer)
2906{
2907 struct kvm_mmu_op_header *header;
2908
2909 header = pv_mmu_peek_buffer(buffer, sizeof *header);
2910 if (!header)
2911 return 0;
2912 switch (header->op) {
2913 case KVM_MMU_OP_WRITE_PTE: {
2914 struct kvm_mmu_op_write_pte *wpte;
2915
2916 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
2917 if (!wpte)
2918 return 0;
2919 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
2920 wpte->pte_val);
2921 }
2922 case KVM_MMU_OP_FLUSH_TLB: {
2923 struct kvm_mmu_op_flush_tlb *ftlb;
2924
2925 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
2926 if (!ftlb)
2927 return 0;
2928 return kvm_pv_mmu_flush_tlb(vcpu);
2929 }
2930 case KVM_MMU_OP_RELEASE_PT: {
2931 struct kvm_mmu_op_release_pt *rpt;
2932
2933 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
2934 if (!rpt)
2935 return 0;
2936 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
2937 }
2938 default: return 0;
2939 }
2940}
2941
2942int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
2943 gpa_t addr, unsigned long *ret)
2944{
2945 int r;
6ad18fba 2946 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
2f333bcb 2947
6ad18fba
DH
2948 buffer->ptr = buffer->buf;
2949 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
2950 buffer->processed = 0;
2f333bcb 2951
6ad18fba 2952 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
2f333bcb
MT
2953 if (r)
2954 goto out;
2955
6ad18fba
DH
2956 while (buffer->len) {
2957 r = kvm_pv_mmu_op_one(vcpu, buffer);
2f333bcb
MT
2958 if (r < 0)
2959 goto out;
2960 if (r == 0)
2961 break;
2962 }
2963
2964 r = 1;
2965out:
6ad18fba 2966 *ret = buffer->processed;
2f333bcb
MT
2967 return r;
2968}
2969
37a7d8b0
AK
2970#ifdef AUDIT
2971
2972static const char *audit_msg;
2973
2974static gva_t canonicalize(gva_t gva)
2975{
2976#ifdef CONFIG_X86_64
2977 gva = (long long)(gva << 16) >> 16;
2978#endif
2979 return gva;
2980}
2981
2982static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
2983 gva_t va, int level)
2984{
2985 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
2986 int i;
2987 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
2988
2989 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
2990 u64 ent = pt[i];
2991
c7addb90 2992 if (ent == shadow_trap_nonpresent_pte)
37a7d8b0
AK
2993 continue;
2994
2995 va = canonicalize(va);
c7addb90
AK
2996 if (level > 1) {
2997 if (ent == shadow_notrap_nonpresent_pte)
2998 printk(KERN_ERR "audit: (%s) nontrapping pte"
2999 " in nonleaf level: levels %d gva %lx"
3000 " level %d pte %llx\n", audit_msg,
ad312c7c 3001 vcpu->arch.mmu.root_level, va, level, ent);
c7addb90 3002
37a7d8b0 3003 audit_mappings_page(vcpu, ent, va, level - 1);
c7addb90 3004 } else {
ad312c7c 3005 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
35149e21 3006 hpa_t hpa = (hpa_t)gpa_to_pfn(vcpu, gpa) << PAGE_SHIFT;
37a7d8b0 3007
c7addb90 3008 if (is_shadow_present_pte(ent)
37a7d8b0 3009 && (ent & PT64_BASE_ADDR_MASK) != hpa)
c7addb90
AK
3010 printk(KERN_ERR "xx audit error: (%s) levels %d"
3011 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
ad312c7c 3012 audit_msg, vcpu->arch.mmu.root_level,
d77c26fc
MD
3013 va, gpa, hpa, ent,
3014 is_shadow_present_pte(ent));
c7addb90
AK
3015 else if (ent == shadow_notrap_nonpresent_pte
3016 && !is_error_hpa(hpa))
3017 printk(KERN_ERR "audit: (%s) notrap shadow,"
3018 " valid guest gva %lx\n", audit_msg, va);
35149e21 3019 kvm_release_pfn_clean(pfn);
c7addb90 3020
37a7d8b0
AK
3021 }
3022 }
3023}
3024
3025static void audit_mappings(struct kvm_vcpu *vcpu)
3026{
1ea252af 3027 unsigned i;
37a7d8b0 3028
ad312c7c
ZX
3029 if (vcpu->arch.mmu.root_level == 4)
3030 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
37a7d8b0
AK
3031 else
3032 for (i = 0; i < 4; ++i)
ad312c7c 3033 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
37a7d8b0 3034 audit_mappings_page(vcpu,
ad312c7c 3035 vcpu->arch.mmu.pae_root[i],
37a7d8b0
AK
3036 i << 30,
3037 2);
3038}
3039
3040static int count_rmaps(struct kvm_vcpu *vcpu)
3041{
3042 int nmaps = 0;
3043 int i, j, k;
3044
3045 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3046 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
3047 struct kvm_rmap_desc *d;
3048
3049 for (j = 0; j < m->npages; ++j) {
290fc38d 3050 unsigned long *rmapp = &m->rmap[j];
37a7d8b0 3051
290fc38d 3052 if (!*rmapp)
37a7d8b0 3053 continue;
290fc38d 3054 if (!(*rmapp & 1)) {
37a7d8b0
AK
3055 ++nmaps;
3056 continue;
3057 }
290fc38d 3058 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
37a7d8b0
AK
3059 while (d) {
3060 for (k = 0; k < RMAP_EXT; ++k)
3061 if (d->shadow_ptes[k])
3062 ++nmaps;
3063 else
3064 break;
3065 d = d->more;
3066 }
3067 }
3068 }
3069 return nmaps;
3070}
3071
3072static int count_writable_mappings(struct kvm_vcpu *vcpu)
3073{
3074 int nmaps = 0;
4db35314 3075 struct kvm_mmu_page *sp;
37a7d8b0
AK
3076 int i;
3077
f05e70ac 3078 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 3079 u64 *pt = sp->spt;
37a7d8b0 3080
4db35314 3081 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
37a7d8b0
AK
3082 continue;
3083
3084 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3085 u64 ent = pt[i];
3086
3087 if (!(ent & PT_PRESENT_MASK))
3088 continue;
3089 if (!(ent & PT_WRITABLE_MASK))
3090 continue;
3091 ++nmaps;
3092 }
3093 }
3094 return nmaps;
3095}
3096
3097static void audit_rmap(struct kvm_vcpu *vcpu)
3098{
3099 int n_rmap = count_rmaps(vcpu);
3100 int n_actual = count_writable_mappings(vcpu);
3101
3102 if (n_rmap != n_actual)
3103 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
b8688d51 3104 __func__, audit_msg, n_rmap, n_actual);
37a7d8b0
AK
3105}
3106
3107static void audit_write_protection(struct kvm_vcpu *vcpu)
3108{
4db35314 3109 struct kvm_mmu_page *sp;
290fc38d
IE
3110 struct kvm_memory_slot *slot;
3111 unsigned long *rmapp;
3112 gfn_t gfn;
37a7d8b0 3113
f05e70ac 3114 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
f6e2c02b 3115 if (sp->role.direct)
37a7d8b0
AK
3116 continue;
3117
4db35314 3118 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
2843099f 3119 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
290fc38d
IE
3120 rmapp = &slot->rmap[gfn - slot->base_gfn];
3121 if (*rmapp)
37a7d8b0
AK
3122 printk(KERN_ERR "%s: (%s) shadow page has writable"
3123 " mappings: gfn %lx role %x\n",
b8688d51 3124 __func__, audit_msg, sp->gfn,
4db35314 3125 sp->role.word);
37a7d8b0
AK
3126 }
3127}
3128
3129static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3130{
3131 int olddbg = dbg;
3132
3133 dbg = 0;
3134 audit_msg = msg;
3135 audit_rmap(vcpu);
3136 audit_write_protection(vcpu);
3137 audit_mappings(vcpu);
3138 dbg = olddbg;
3139}
3140
3141#endif
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