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KVM: silence lapic kernel messages that can be triggered by a guest
[deliverable/linux.git] / arch / x86 / kvm / mmu.c
CommitLineData
6aa8b732
AK		 1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
e495606d 19
1d737c8a 20#include "mmu.h"
6de4f3ad 21#include "kvm_cache_regs.h"
e495606d 22
edf88417 23#include <linux/kvm_host.h>
6aa8b732
AK		 24#include <linux/types.h>
25#include <linux/string.h>
6aa8b732
AK		 26#include <linux/mm.h>
27#include <linux/highmem.h>
28#include <linux/module.h>
448353ca 29#include <linux/swap.h>
05da4558 30#include <linux/hugetlb.h>
2f333bcb 31#include <linux/compiler.h>
6aa8b732 32
e495606d
AK		 33#include <asm/page.h>
34#include <asm/cmpxchg.h>
4e542370 35#include <asm/io.h>
13673a90 36#include <asm/vmx.h>
6aa8b732 37
18552672
JR		 38/*
39 * When setting this variable to true it enables Two-Dimensional-Paging
40 * where the hardware walks 2 page tables:
41 * 1. the guest-virtual to guest-physical
42 * 2. while doing 1. it walks guest-physical to host-physical
43 * If the hardware supports that we don't need to do shadow paging.
44 */
2f333bcb 45bool tdp_enabled = false;
18552672 46
37a7d8b0
AK		 47#undef MMU_DEBUG
48
49#undef AUDIT
50
51#ifdef AUDIT
52static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
53#else
54static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
55#endif
56
57#ifdef MMU_DEBUG
58
59#define pgprintk(x...) do { if (dbg) printk(x); } while (0)
60#define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
61
62#else
63
64#define pgprintk(x...) do { } while (0)
65#define rmap_printk(x...) do { } while (0)
66
67#endif
68
69#if defined(MMU_DEBUG) || defined(AUDIT)
6ada8cca
AK		 70static int dbg = 0;
71module_param(dbg, bool, 0644);
37a7d8b0 72#endif
6aa8b732 73
582801a9
MT		 74static int oos_shadow = 1;
75module_param(oos_shadow, bool, 0644);
76
d6c69ee9
YD		 77#ifndef MMU_DEBUG
78#define ASSERT(x) do { } while (0)
79#else
6aa8b732
AK		 80#define ASSERT(x) \
81 if (!(x)) { \
82 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
83 __FILE__, __LINE__, #x); \
84 }
d6c69ee9 85#endif
6aa8b732 86
6aa8b732
AK		 87#define PT_FIRST_AVAIL_BITS_SHIFT 9
88#define PT64_SECOND_AVAIL_BITS_SHIFT 52
89
6aa8b732
AK		 90#define VALID_PAGE(x) ((x) != INVALID_PAGE)
91
92#define PT64_LEVEL_BITS 9
93
94#define PT64_LEVEL_SHIFT(level) \
d77c26fc 95 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
6aa8b732
AK		 96
97#define PT64_LEVEL_MASK(level) \
98 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
99
100#define PT64_INDEX(address, level)\
101 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
102
103
104#define PT32_LEVEL_BITS 10
105
106#define PT32_LEVEL_SHIFT(level) \
d77c26fc 107 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
6aa8b732
AK		 108
109#define PT32_LEVEL_MASK(level) \
110 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
111
112#define PT32_INDEX(address, level)\
113 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
114
115
27aba766 116#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
6aa8b732
AK		 117#define PT64_DIR_BASE_ADDR_MASK \
118 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
119
120#define PT32_BASE_ADDR_MASK PAGE_MASK
121#define PT32_DIR_BASE_ADDR_MASK \
122 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
123
79539cec
AK		 124#define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
125 | PT64_NX_MASK)
6aa8b732
AK		 126
127#define PFERR_PRESENT_MASK (1U << 0)
128#define PFERR_WRITE_MASK (1U << 1)
129#define PFERR_USER_MASK (1U << 2)
82725b20 130#define PFERR_RSVD_MASK (1U << 3)
73b1087e 131#define PFERR_FETCH_MASK (1U << 4)
6aa8b732 132
6aa8b732
AK		 133#define PT_DIRECTORY_LEVEL 2
134#define PT_PAGE_TABLE_LEVEL 1
135
cd4a4e53
AK		 136#define RMAP_EXT 4
137
fe135d2c
AK		 138#define ACC_EXEC_MASK 1
139#define ACC_WRITE_MASK PT_WRITABLE_MASK
140#define ACC_USER_MASK PT_USER_MASK
141#define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
142
07420171
AK		 143#define CREATE_TRACE_POINTS
144#include "mmutrace.h"
145
135f8c2b
AK		 146#define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
147
cd4a4e53 148struct kvm_rmap_desc {
d555c333 149 u64 *sptes[RMAP_EXT];
cd4a4e53
AK		 150 struct kvm_rmap_desc *more;
151};
152
2d11123a
AK		 153struct kvm_shadow_walk_iterator {
154 u64 addr;
155 hpa_t shadow_addr;
156 int level;
157 u64 *sptep;
158 unsigned index;
159};
160
161#define for_each_shadow_entry(_vcpu, _addr, _walker) \
162 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
163 shadow_walk_okay(&(_walker)); \
164 shadow_walk_next(&(_walker)))
165
166
4731d4c7
MT		 167struct kvm_unsync_walk {
168 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
169};
170
ad8cfbe3
MT		 171typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
172
b5a33a75
AK		 173static struct kmem_cache *pte_chain_cache;
174static struct kmem_cache *rmap_desc_cache;
d3d25b04 175static struct kmem_cache *mmu_page_header_cache;
b5a33a75 176
c7addb90
AK		 177static u64 __read_mostly shadow_trap_nonpresent_pte;
178static u64 __read_mostly shadow_notrap_nonpresent_pte;
7b52345e
SY		 179static u64 __read_mostly shadow_base_present_pte;
180static u64 __read_mostly shadow_nx_mask;
181static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
182static u64 __read_mostly shadow_user_mask;
183static u64 __read_mostly shadow_accessed_mask;
184static u64 __read_mostly shadow_dirty_mask;
c7addb90 185
82725b20
DE		 186static inline u64 rsvd_bits(int s, int e)
187{
188 return ((1ULL << (e - s + 1)) - 1) << s;
189}
190
c7addb90
AK		 191void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
192{
193 shadow_trap_nonpresent_pte = trap_pte;
194 shadow_notrap_nonpresent_pte = notrap_pte;
195}
196EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
197
7b52345e
SY		 198void kvm_mmu_set_base_ptes(u64 base_pte)
199{
200 shadow_base_present_pte = base_pte;
201}
202EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
203
204void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
4b12f0de 205 u64 dirty_mask, u64 nx_mask, u64 x_mask)
7b52345e
SY		 206{
207 shadow_user_mask = user_mask;
208 shadow_accessed_mask = accessed_mask;
209 shadow_dirty_mask = dirty_mask;
210 shadow_nx_mask = nx_mask;
211 shadow_x_mask = x_mask;
212}
213EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
214
6aa8b732
AK		 215static int is_write_protection(struct kvm_vcpu *vcpu)
216{
ad312c7c 217 return vcpu->arch.cr0 & X86_CR0_WP;
6aa8b732
AK		 218}
219
220static int is_cpuid_PSE36(void)
221{
222 return 1;
223}
224
73b1087e
AK		 225static int is_nx(struct kvm_vcpu *vcpu)
226{
ad312c7c 227 return vcpu->arch.shadow_efer & EFER_NX;
73b1087e
AK		 228}
229
c7addb90
AK		 230static int is_shadow_present_pte(u64 pte)
231{
c7addb90
AK		 232 return pte != shadow_trap_nonpresent_pte
233 && pte != shadow_notrap_nonpresent_pte;
234}
235
05da4558
MT		 236static int is_large_pte(u64 pte)
237{
238 return pte & PT_PAGE_SIZE_MASK;
239}
240
6aa8b732
AK		 241static int is_writeble_pte(unsigned long pte)
242{
243 return pte & PT_WRITABLE_MASK;
244}
245
43a3795a 246static int is_dirty_gpte(unsigned long pte)
e3c5e7ec 247{
439e218a 248 return pte & PT_DIRTY_MASK;
e3c5e7ec
AK		 249}
250
43a3795a 251static int is_rmap_spte(u64 pte)
cd4a4e53 252{
4b1a80fa 253 return is_shadow_present_pte(pte);
cd4a4e53
AK		 254}
255
776e6633
MT		 256static int is_last_spte(u64 pte, int level)
257{
258 if (level == PT_PAGE_TABLE_LEVEL)
259 return 1;
260 if (level == PT_DIRECTORY_LEVEL && is_large_pte(pte))
261 return 1;
262 return 0;
263}
264
35149e21 265static pfn_t spte_to_pfn(u64 pte)
0b49ea86 266{
35149e21 267 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
0b49ea86
AK		 268}
269
da928521
AK		 270static gfn_t pse36_gfn_delta(u32 gpte)
271{
272 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
273
274 return (gpte & PT32_DIR_PSE36_MASK) << shift;
275}
276
d555c333 277static void __set_spte(u64 *sptep, u64 spte)
e663ee64
AK		 278{
279#ifdef CONFIG_X86_64
280 set_64bit((unsigned long *)sptep, spte);
281#else
282 set_64bit((unsigned long long *)sptep, spte);
283#endif
284}
285
e2dec939 286static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
2e3e5882 287 struct kmem_cache *base_cache, int min)
714b93da
AK		 288{
289 void *obj;
290
291 if (cache->nobjs >= min)
e2dec939 292 return 0;
714b93da 293 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 294 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
714b93da 295 if (!obj)
e2dec939 296 return -ENOMEM;
714b93da
AK		 297 cache->objects[cache->nobjs++] = obj;
298 }
e2dec939 299 return 0;
714b93da
AK		 300}
301
302static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
303{
304 while (mc->nobjs)
305 kfree(mc->objects[--mc->nobjs]);
306}
307
c1158e63 308static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
2e3e5882 309 int min)
c1158e63
AK		 310{
311 struct page *page;
312
313 if (cache->nobjs >= min)
314 return 0;
315 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 316 page = alloc_page(GFP_KERNEL);
c1158e63
AK		 317 if (!page)
318 return -ENOMEM;
319 set_page_private(page, 0);
320 cache->objects[cache->nobjs++] = page_address(page);
321 }
322 return 0;
323}
324
325static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
326{
327 while (mc->nobjs)
c4d198d5 328 free_page((unsigned long)mc->objects[--mc->nobjs]);
c1158e63
AK		 329}
330
2e3e5882 331static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
714b93da 332{
e2dec939
AK		 333 int r;
334
ad312c7c 335 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
2e3e5882 336 pte_chain_cache, 4);
e2dec939
AK		 337 if (r)
338 goto out;
ad312c7c 339 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
c41ef344 340 rmap_desc_cache, 4);
d3d25b04
AK		 341 if (r)
342 goto out;
ad312c7c 343 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
d3d25b04
AK		 344 if (r)
345 goto out;
ad312c7c 346 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
2e3e5882 347 mmu_page_header_cache, 4);
e2dec939
AK		 348out:
349 return r;
714b93da
AK		 350}
351
352static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
353{
ad312c7c
ZX		 354 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
355 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
356 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
357 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
714b93da
AK		 358}
359
360static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
361 size_t size)
362{
363 void *p;
364
365 BUG_ON(!mc->nobjs);
366 p = mc->objects[--mc->nobjs];
714b93da
AK		 367 return p;
368}
369
714b93da
AK		 370static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
371{
ad312c7c 372 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
714b93da
AK		 373 sizeof(struct kvm_pte_chain));
374}
375
90cb0529 376static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
714b93da 377{
90cb0529 378 kfree(pc);
714b93da
AK		 379}
380
381static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
382{
ad312c7c 383 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
714b93da
AK		 384 sizeof(struct kvm_rmap_desc));
385}
386
90cb0529 387static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
714b93da 388{
90cb0529 389 kfree(rd);
714b93da
AK		 390}
391
05da4558
MT		 392/*
393 * Return the pointer to the largepage write count for a given
394 * gfn, handling slots that are not large page aligned.
395 */
396static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
397{
398 unsigned long idx;
399
ec04b260
JR		 400 idx = (gfn / KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL)) -
401 (slot->base_gfn / KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL));
402 return &slot->lpage_info[0][idx].write_count;
05da4558
MT		 403}
404
405static void account_shadowed(struct kvm *kvm, gfn_t gfn)
406{
407 int *write_count;
408
2843099f
IE		 409 gfn = unalias_gfn(kvm, gfn);
410 write_count = slot_largepage_idx(gfn,
411 gfn_to_memslot_unaliased(kvm, gfn));
05da4558 412 *write_count += 1;
05da4558
MT		 413}
414
415static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
416{
417 int *write_count;
418
2843099f
IE		 419 gfn = unalias_gfn(kvm, gfn);
420 write_count = slot_largepage_idx(gfn,
421 gfn_to_memslot_unaliased(kvm, gfn));
05da4558
MT		 422 *write_count -= 1;
423 WARN_ON(*write_count < 0);
424}
425
426static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
427{
2843099f 428 struct kvm_memory_slot *slot;
05da4558
MT		 429 int *largepage_idx;
430
2843099f
IE		 431 gfn = unalias_gfn(kvm, gfn);
432 slot = gfn_to_memslot_unaliased(kvm, gfn);
05da4558
MT		 433 if (slot) {
434 largepage_idx = slot_largepage_idx(gfn, slot);
435 return *largepage_idx;
436 }
437
438 return 1;
439}
440
441static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
442{
443 struct vm_area_struct *vma;
444 unsigned long addr;
4c2155ce 445 int ret = 0;
05da4558
MT		 446
447 addr = gfn_to_hva(kvm, gfn);
448 if (kvm_is_error_hva(addr))
4c2155ce 449 return ret;
05da4558 450
4c2155ce 451 down_read(&current->mm->mmap_sem);
05da4558
MT		 452 vma = find_vma(current->mm, addr);
453 if (vma && is_vm_hugetlb_page(vma))
4c2155ce
MT		 454 ret = 1;
455 up_read(&current->mm->mmap_sem);
05da4558 456
4c2155ce 457 return ret;
05da4558
MT		 458}
459
460static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
461{
462 struct kvm_memory_slot *slot;
463
464 if (has_wrprotected_page(vcpu->kvm, large_gfn))
465 return 0;
466
467 if (!host_largepage_backed(vcpu->kvm, large_gfn))
468 return 0;
469
470 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
471 if (slot && slot->dirty_bitmap)
472 return 0;
473
474 return 1;
475}
476
290fc38d
IE		 477/*
478 * Take gfn and return the reverse mapping to it.
479 * Note: gfn must be unaliased before this function get called
480 */
481
05da4558 482static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
290fc38d
IE		 483{
484 struct kvm_memory_slot *slot;
05da4558 485 unsigned long idx;
290fc38d
IE		 486
487 slot = gfn_to_memslot(kvm, gfn);
05da4558
MT		 488 if (!lpage)
489 return &slot->rmap[gfn - slot->base_gfn];
490
ec04b260
JR		 491 idx = (gfn / KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL)) -
492 (slot->base_gfn / KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL));
05da4558 493
ec04b260 494 return &slot->lpage_info[0][idx].rmap_pde;
290fc38d
IE		 495}
496
cd4a4e53
AK		 497/*
498 * Reverse mapping data structures:
499 *
290fc38d
IE		 500 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
501 * that points to page_address(page).
cd4a4e53 502 *
290fc38d
IE		 503 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
504 * containing more mappings.
53a27b39
MT		 505 *
506 * Returns the number of rmap entries before the spte was added or zero if
507 * the spte was not added.
508 *
cd4a4e53 509 */
53a27b39 510static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
cd4a4e53 511{
4db35314 512 struct kvm_mmu_page *sp;
cd4a4e53 513 struct kvm_rmap_desc *desc;
290fc38d 514 unsigned long *rmapp;
53a27b39 515 int i, count = 0;
cd4a4e53 516
43a3795a 517 if (!is_rmap_spte(*spte))
53a27b39 518 return count;
290fc38d 519 gfn = unalias_gfn(vcpu->kvm, gfn);
4db35314
AK		 520 sp = page_header(__pa(spte));
521 sp->gfns[spte - sp->spt] = gfn;
05da4558 522 rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
290fc38d 523 if (!*rmapp) {
cd4a4e53 524 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
290fc38d
IE		 525 *rmapp = (unsigned long)spte;
526 } else if (!(*rmapp & 1)) {
cd4a4e53 527 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
714b93da 528 desc = mmu_alloc_rmap_desc(vcpu);
d555c333
AK		 529 desc->sptes[0] = (u64 *)*rmapp;
530 desc->sptes[1] = spte;
290fc38d 531 *rmapp = (unsigned long)desc | 1;
cd4a4e53
AK		 532 } else {
533 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
290fc38d 534 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
d555c333 535 while (desc->sptes[RMAP_EXT-1] && desc->more) {
cd4a4e53 536 desc = desc->more;
53a27b39
MT		 537 count += RMAP_EXT;
538 }
d555c333 539 if (desc->sptes[RMAP_EXT-1]) {
714b93da 540 desc->more = mmu_alloc_rmap_desc(vcpu);
cd4a4e53
AK		 541 desc = desc->more;
542 }
d555c333 543 for (i = 0; desc->sptes[i]; ++i)
cd4a4e53 544 ;
d555c333 545 desc->sptes[i] = spte;
cd4a4e53 546 }
53a27b39 547 return count;
cd4a4e53
AK		 548}
549
290fc38d 550static void rmap_desc_remove_entry(unsigned long *rmapp,
cd4a4e53
AK		 551 struct kvm_rmap_desc *desc,
552 int i,
553 struct kvm_rmap_desc *prev_desc)
554{
555 int j;
556
d555c333 557 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
cd4a4e53 558 ;
d555c333
AK		 559 desc->sptes[i] = desc->sptes[j];
560 desc->sptes[j] = NULL;
cd4a4e53
AK		 561 if (j != 0)
562 return;
563 if (!prev_desc && !desc->more)
d555c333 564 *rmapp = (unsigned long)desc->sptes[0];
cd4a4e53
AK		 565 else
566 if (prev_desc)
567 prev_desc->more = desc->more;
568 else
290fc38d 569 *rmapp = (unsigned long)desc->more | 1;
90cb0529 570 mmu_free_rmap_desc(desc);
cd4a4e53
AK		 571}
572
290fc38d 573static void rmap_remove(struct kvm *kvm, u64 *spte)
cd4a4e53 574{
cd4a4e53
AK		 575 struct kvm_rmap_desc *desc;
576 struct kvm_rmap_desc *prev_desc;
4db35314 577 struct kvm_mmu_page *sp;
35149e21 578 pfn_t pfn;
290fc38d 579 unsigned long *rmapp;
cd4a4e53
AK		 580 int i;
581
43a3795a 582 if (!is_rmap_spte(*spte))
cd4a4e53 583 return;
4db35314 584 sp = page_header(__pa(spte));
35149e21 585 pfn = spte_to_pfn(*spte);
7b52345e 586 if (*spte & shadow_accessed_mask)
35149e21 587 kvm_set_pfn_accessed(pfn);
b4231d61 588 if (is_writeble_pte(*spte))
35149e21 589 kvm_release_pfn_dirty(pfn);
b4231d61 590 else
35149e21 591 kvm_release_pfn_clean(pfn);
05da4558 592 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
290fc38d 593 if (!*rmapp) {
cd4a4e53
AK		 594 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
595 BUG();
290fc38d 596 } else if (!(*rmapp & 1)) {
cd4a4e53 597 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
290fc38d 598 if ((u64 *)*rmapp != spte) {
cd4a4e53
AK		 599 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
600 spte, *spte);
601 BUG();
602 }
290fc38d 603 *rmapp = 0;
cd4a4e53
AK		 604 } else {
605 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
290fc38d 606 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
cd4a4e53
AK		 607 prev_desc = NULL;
608 while (desc) {
d555c333
AK		 609 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
610 if (desc->sptes[i] == spte) {
290fc38d 611 rmap_desc_remove_entry(rmapp,
714b93da 612 desc, i,
cd4a4e53
AK		 613 prev_desc);
614 return;
615 }
616 prev_desc = desc;
617 desc = desc->more;
618 }
619 BUG();
620 }
621}
622
98348e95 623static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
374cbac0 624{
374cbac0 625 struct kvm_rmap_desc *desc;
98348e95
IE		 626 struct kvm_rmap_desc *prev_desc;
627 u64 *prev_spte;
628 int i;
629
630 if (!*rmapp)
631 return NULL;
632 else if (!(*rmapp & 1)) {
633 if (!spte)
634 return (u64 *)*rmapp;
635 return NULL;
636 }
637 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
638 prev_desc = NULL;
639 prev_spte = NULL;
640 while (desc) {
d555c333 641 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
98348e95 642 if (prev_spte == spte)
d555c333
AK		 643 return desc->sptes[i];
644 prev_spte = desc->sptes[i];
98348e95
IE		 645 }
646 desc = desc->more;
647 }
648 return NULL;
649}
650
b1a36821 651static int rmap_write_protect(struct kvm *kvm, u64 gfn)
98348e95 652{
290fc38d 653 unsigned long *rmapp;
374cbac0 654 u64 *spte;
caa5b8a5 655 int write_protected = 0;
374cbac0 656
4a4c9924 657 gfn = unalias_gfn(kvm, gfn);
05da4558 658 rmapp = gfn_to_rmap(kvm, gfn, 0);
374cbac0 659
98348e95
IE		 660 spte = rmap_next(kvm, rmapp, NULL);
661 while (spte) {
374cbac0 662 BUG_ON(!spte);
374cbac0 663 BUG_ON(!(*spte & PT_PRESENT_MASK));
374cbac0 664 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
caa5b8a5 665 if (is_writeble_pte(*spte)) {
d555c333 666 __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
caa5b8a5
ED		 667 write_protected = 1;
668 }
9647c14c 669 spte = rmap_next(kvm, rmapp, spte);
374cbac0 670 }
855149aa 671 if (write_protected) {
35149e21 672 pfn_t pfn;
855149aa
IE		 673
674 spte = rmap_next(kvm, rmapp, NULL);
35149e21
AL		 675 pfn = spte_to_pfn(*spte);
676 kvm_set_pfn_dirty(pfn);
855149aa
IE		 677 }
678
05da4558
MT		 679 /* check for huge page mappings */
680 rmapp = gfn_to_rmap(kvm, gfn, 1);
681 spte = rmap_next(kvm, rmapp, NULL);
682 while (spte) {
683 BUG_ON(!spte);
684 BUG_ON(!(*spte & PT_PRESENT_MASK));
685 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
686 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
687 if (is_writeble_pte(*spte)) {
688 rmap_remove(kvm, spte);
689 --kvm->stat.lpages;
d555c333 690 __set_spte(spte, shadow_trap_nonpresent_pte);
6597ca09 691 spte = NULL;
05da4558
MT		 692 write_protected = 1;
693 }
694 spte = rmap_next(kvm, rmapp, spte);
695 }
696
b1a36821 697 return write_protected;
374cbac0
AK		 698}
699
e930bffe
AA		 700static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
701{
702 u64 *spte;
703 int need_tlb_flush = 0;
704
705 while ((spte = rmap_next(kvm, rmapp, NULL))) {
706 BUG_ON(!(*spte & PT_PRESENT_MASK));
707 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
708 rmap_remove(kvm, spte);
d555c333 709 __set_spte(spte, shadow_trap_nonpresent_pte);
e930bffe
AA		 710 need_tlb_flush = 1;
711 }
712 return need_tlb_flush;
713}
714
715static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
716 int (*handler)(struct kvm *kvm, unsigned long *rmapp))
717{
718 int i;
719 int retval = 0;
720
721 /*
722 * If mmap_sem isn't taken, we can look the memslots with only
723 * the mmu_lock by skipping over the slots with userspace_addr == 0.
724 */
725 for (i = 0; i < kvm->nmemslots; i++) {
726 struct kvm_memory_slot *memslot = &kvm->memslots[i];
727 unsigned long start = memslot->userspace_addr;
728 unsigned long end;
729
730 /* mmu_lock protects userspace_addr */
731 if (!start)
732 continue;
733
734 end = start + (memslot->npages << PAGE_SHIFT);
735 if (hva >= start && hva < end) {
736 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
ec04b260
JR		 737 int idx = gfn_offset /
738 KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL);
e930bffe
AA		 739 retval |= handler(kvm, &memslot->rmap[gfn_offset]);
740 retval |= handler(kvm,
ec04b260 741 &memslot->lpage_info[0][idx].rmap_pde);
e930bffe
AA		 742 }
743 }
744
745 return retval;
746}
747
748int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
749{
750 return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
751}
752
753static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
754{
755 u64 *spte;
756 int young = 0;
757
534e38b4
SY		 758 /* always return old for EPT */
759 if (!shadow_accessed_mask)
760 return 0;
761
e930bffe
AA		 762 spte = rmap_next(kvm, rmapp, NULL);
763 while (spte) {
764 int _young;
765 u64 _spte = *spte;
766 BUG_ON(!(_spte & PT_PRESENT_MASK));
767 _young = _spte & PT_ACCESSED_MASK;
768 if (_young) {
769 young = 1;
770 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
771 }
772 spte = rmap_next(kvm, rmapp, spte);
773 }
774 return young;
775}
776
53a27b39
MT		 777#define RMAP_RECYCLE_THRESHOLD 1000
778
779static void rmap_recycle(struct kvm_vcpu *vcpu, gfn_t gfn, int lpage)
780{
781 unsigned long *rmapp;
782
783 gfn = unalias_gfn(vcpu->kvm, gfn);
784 rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
785
786 kvm_unmap_rmapp(vcpu->kvm, rmapp);
787 kvm_flush_remote_tlbs(vcpu->kvm);
788}
789
e930bffe
AA		 790int kvm_age_hva(struct kvm *kvm, unsigned long hva)
791{
792 return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
793}
794
d6c69ee9 795#ifdef MMU_DEBUG
47ad8e68 796static int is_empty_shadow_page(u64 *spt)
6aa8b732 797{
139bdb2d
AK		 798 u64 *pos;
799 u64 *end;
800
47ad8e68 801 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
3c915510 802 if (is_shadow_present_pte(*pos)) {
b8688d51 803 printk(KERN_ERR "%s: %p %llx\n", __func__,
139bdb2d 804 pos, *pos);
6aa8b732 805 return 0;
139bdb2d 806 }
6aa8b732
AK		 807 return 1;
808}
d6c69ee9 809#endif
6aa8b732 810
4db35314 811static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
260746c0 812{
4db35314
AK		 813 ASSERT(is_empty_shadow_page(sp->spt));
814 list_del(&sp->link);
815 __free_page(virt_to_page(sp->spt));
816 __free_page(virt_to_page(sp->gfns));
817 kfree(sp);
f05e70ac 818 ++kvm->arch.n_free_mmu_pages;
260746c0
AK		 819}
820
cea0f0e7
AK		 821static unsigned kvm_page_table_hashfn(gfn_t gfn)
822{
1ae0a13d 823 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
cea0f0e7
AK		 824}
825
25c0de2c
AK		 826static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
827 u64 *parent_pte)
6aa8b732 828{
4db35314 829 struct kvm_mmu_page *sp;
6aa8b732 830
ad312c7c
ZX		 831 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
832 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
833 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
4db35314 834 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
f05e70ac 835 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
6cffe8ca 836 INIT_LIST_HEAD(&sp->oos_link);
291f26bc 837 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
4db35314
AK		 838 sp->multimapped = 0;
839 sp->parent_pte = parent_pte;
f05e70ac 840 --vcpu->kvm->arch.n_free_mmu_pages;
4db35314 841 return sp;
6aa8b732
AK		 842}
843
714b93da 844static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
4db35314 845 struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7
AK		 846{
847 struct kvm_pte_chain *pte_chain;
848 struct hlist_node *node;
849 int i;
850
851 if (!parent_pte)
852 return;
4db35314
AK		 853 if (!sp->multimapped) {
854 u64 *old = sp->parent_pte;
cea0f0e7
AK		 855
856 if (!old) {
4db35314 857 sp->parent_pte = parent_pte;
cea0f0e7
AK		 858 return;
859 }
4db35314 860 sp->multimapped = 1;
714b93da 861 pte_chain = mmu_alloc_pte_chain(vcpu);
4db35314
AK		 862 INIT_HLIST_HEAD(&sp->parent_ptes);
863 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK		 864 pte_chain->parent_ptes[0] = old;
865 }
4db35314 866 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
cea0f0e7
AK		 867 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
868 continue;
869 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
870 if (!pte_chain->parent_ptes[i]) {
871 pte_chain->parent_ptes[i] = parent_pte;
872 return;
873 }
874 }
714b93da 875 pte_chain = mmu_alloc_pte_chain(vcpu);
cea0f0e7 876 BUG_ON(!pte_chain);
4db35314 877 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK		 878 pte_chain->parent_ptes[0] = parent_pte;
879}
880
4db35314 881static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
cea0f0e7
AK		 882 u64 *parent_pte)
883{
884 struct kvm_pte_chain *pte_chain;
885 struct hlist_node *node;
886 int i;
887
4db35314
AK		 888 if (!sp->multimapped) {
889 BUG_ON(sp->parent_pte != parent_pte);
890 sp->parent_pte = NULL;
cea0f0e7
AK		 891 return;
892 }
4db35314 893 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
cea0f0e7
AK		 894 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
895 if (!pte_chain->parent_ptes[i])
896 break;
897 if (pte_chain->parent_ptes[i] != parent_pte)
898 continue;
697fe2e2
AK		 899 while (i + 1 < NR_PTE_CHAIN_ENTRIES
900 && pte_chain->parent_ptes[i + 1]) {
cea0f0e7
AK		 901 pte_chain->parent_ptes[i]
902 = pte_chain->parent_ptes[i + 1];
903 ++i;
904 }
905 pte_chain->parent_ptes[i] = NULL;
697fe2e2
AK		 906 if (i == 0) {
907 hlist_del(&pte_chain->link);
90cb0529 908 mmu_free_pte_chain(pte_chain);
4db35314
AK		 909 if (hlist_empty(&sp->parent_ptes)) {
910 sp->multimapped = 0;
911 sp->parent_pte = NULL;
697fe2e2
AK		 912 }
913 }
cea0f0e7
AK		 914 return;
915 }
916 BUG();
917}
918
ad8cfbe3
MT		 919
920static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
921 mmu_parent_walk_fn fn)
922{
923 struct kvm_pte_chain *pte_chain;
924 struct hlist_node *node;
925 struct kvm_mmu_page *parent_sp;
926 int i;
927
928 if (!sp->multimapped && sp->parent_pte) {
929 parent_sp = page_header(__pa(sp->parent_pte));
930 fn(vcpu, parent_sp);
931 mmu_parent_walk(vcpu, parent_sp, fn);
932 return;
933 }
934 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
935 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
936 if (!pte_chain->parent_ptes[i])
937 break;
938 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
939 fn(vcpu, parent_sp);
940 mmu_parent_walk(vcpu, parent_sp, fn);
941 }
942}
943
0074ff63
MT		 944static void kvm_mmu_update_unsync_bitmap(u64 *spte)
945{
946 unsigned int index;
947 struct kvm_mmu_page *sp = page_header(__pa(spte));
948
949 index = spte - sp->spt;
60c8aec6
MT		 950 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
951 sp->unsync_children++;
952 WARN_ON(!sp->unsync_children);
0074ff63
MT		 953}
954
955static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
956{
957 struct kvm_pte_chain *pte_chain;
958 struct hlist_node *node;
959 int i;
960
961 if (!sp->parent_pte)
962 return;
963
964 if (!sp->multimapped) {
965 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
966 return;
967 }
968
969 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
970 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
971 if (!pte_chain->parent_ptes[i])
972 break;
973 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
974 }
975}
976
977static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
978{
0074ff63
MT		 979 kvm_mmu_update_parents_unsync(sp);
980 return 1;
981}
982
983static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
984 struct kvm_mmu_page *sp)
985{
986 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
987 kvm_mmu_update_parents_unsync(sp);
988}
989
d761a501
AK		 990static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
991 struct kvm_mmu_page *sp)
992{
993 int i;
994
995 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
996 sp->spt[i] = shadow_trap_nonpresent_pte;
997}
998
e8bc217a
MT		 999static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1000 struct kvm_mmu_page *sp)
1001{
1002 return 1;
1003}
1004
a7052897
MT		 1005static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1006{
1007}
1008
60c8aec6
MT		 1009#define KVM_PAGE_ARRAY_NR 16
1010
1011struct kvm_mmu_pages {
1012 struct mmu_page_and_offset {
1013 struct kvm_mmu_page *sp;
1014 unsigned int idx;
1015 } page[KVM_PAGE_ARRAY_NR];
1016 unsigned int nr;
1017};
1018
0074ff63
MT		 1019#define for_each_unsync_children(bitmap, idx) \
1020 for (idx = find_first_bit(bitmap, 512); \
1021 idx < 512; \
1022 idx = find_next_bit(bitmap, 512, idx+1))
1023
cded19f3
HE		 1024static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1025 int idx)
4731d4c7 1026{
60c8aec6 1027 int i;
4731d4c7 1028
60c8aec6
MT		 1029 if (sp->unsync)
1030 for (i=0; i < pvec->nr; i++)
1031 if (pvec->page[i].sp == sp)
1032 return 0;
1033
1034 pvec->page[pvec->nr].sp = sp;
1035 pvec->page[pvec->nr].idx = idx;
1036 pvec->nr++;
1037 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1038}
1039
1040static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1041 struct kvm_mmu_pages *pvec)
1042{
1043 int i, ret, nr_unsync_leaf = 0;
4731d4c7 1044
0074ff63 1045 for_each_unsync_children(sp->unsync_child_bitmap, i) {
4731d4c7
MT		 1046 u64 ent = sp->spt[i];
1047
87917239 1048 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
4731d4c7
MT		 1049 struct kvm_mmu_page *child;
1050 child = page_header(ent & PT64_BASE_ADDR_MASK);
1051
1052 if (child->unsync_children) {
60c8aec6
MT		 1053 if (mmu_pages_add(pvec, child, i))
1054 return -ENOSPC;
1055
1056 ret = __mmu_unsync_walk(child, pvec);
1057 if (!ret)
1058 __clear_bit(i, sp->unsync_child_bitmap);
1059 else if (ret > 0)
1060 nr_unsync_leaf += ret;
1061 else
4731d4c7
MT		 1062 return ret;
1063 }
1064
1065 if (child->unsync) {
60c8aec6
MT		 1066 nr_unsync_leaf++;
1067 if (mmu_pages_add(pvec, child, i))
1068 return -ENOSPC;
4731d4c7
MT		 1069 }
1070 }
1071 }
1072
0074ff63 1073 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
4731d4c7
MT		 1074 sp->unsync_children = 0;
1075
60c8aec6
MT		 1076 return nr_unsync_leaf;
1077}
1078
1079static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1080 struct kvm_mmu_pages *pvec)
1081{
1082 if (!sp->unsync_children)
1083 return 0;
1084
1085 mmu_pages_add(pvec, sp, 0);
1086 return __mmu_unsync_walk(sp, pvec);
4731d4c7
MT		 1087}
1088
4db35314 1089static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
cea0f0e7
AK		 1090{
1091 unsigned index;
1092 struct hlist_head *bucket;
4db35314 1093 struct kvm_mmu_page *sp;
cea0f0e7
AK		 1094 struct hlist_node *node;
1095
b8688d51 1096 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1ae0a13d 1097 index = kvm_page_table_hashfn(gfn);
f05e70ac 1098 bucket = &kvm->arch.mmu_page_hash[index];
4db35314 1099 hlist_for_each_entry(sp, node, bucket, hash_link)
f6e2c02b 1100 if (sp->gfn == gfn && !sp->role.direct
2e53d63a 1101 && !sp->role.invalid) {
cea0f0e7 1102 pgprintk("%s: found role %x\n",
b8688d51 1103 __func__, sp->role.word);
4db35314 1104 return sp;
cea0f0e7
AK		 1105 }
1106 return NULL;
1107}
1108
4731d4c7
MT		 1109static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1110{
1111 WARN_ON(!sp->unsync);
1112 sp->unsync = 0;
1113 --kvm->stat.mmu_unsync;
1114}
1115
1116static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1117
1118static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1119{
1120 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1121 kvm_mmu_zap_page(vcpu->kvm, sp);
1122 return 1;
1123 }
1124
f691fe1d 1125 trace_kvm_mmu_sync_page(sp);
b1a36821
MT		 1126 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1127 kvm_flush_remote_tlbs(vcpu->kvm);
0c0f40bd 1128 kvm_unlink_unsync_page(vcpu->kvm, sp);
4731d4c7
MT		 1129 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1130 kvm_mmu_zap_page(vcpu->kvm, sp);
1131 return 1;
1132 }
1133
1134 kvm_mmu_flush_tlb(vcpu);
4731d4c7
MT		 1135 return 0;
1136}
1137
60c8aec6
MT		 1138struct mmu_page_path {
1139 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1140 unsigned int idx[PT64_ROOT_LEVEL-1];
4731d4c7
MT		 1141};
1142
60c8aec6
MT		 1143#define for_each_sp(pvec, sp, parents, i) \
1144 for (i = mmu_pages_next(&pvec, &parents, -1), \
1145 sp = pvec.page[i].sp; \
1146 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1147 i = mmu_pages_next(&pvec, &parents, i))
1148
cded19f3
HE		 1149static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1150 struct mmu_page_path *parents,
1151 int i)
60c8aec6
MT		 1152{
1153 int n;
1154
1155 for (n = i+1; n < pvec->nr; n++) {
1156 struct kvm_mmu_page *sp = pvec->page[n].sp;
1157
1158 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1159 parents->idx[0] = pvec->page[n].idx;
1160 return n;
1161 }
1162
1163 parents->parent[sp->role.level-2] = sp;
1164 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1165 }
1166
1167 return n;
1168}
1169
cded19f3 1170static void mmu_pages_clear_parents(struct mmu_page_path *parents)
4731d4c7 1171{
60c8aec6
MT		 1172 struct kvm_mmu_page *sp;
1173 unsigned int level = 0;
1174
1175 do {
1176 unsigned int idx = parents->idx[level];
4731d4c7 1177
60c8aec6
MT		 1178 sp = parents->parent[level];
1179 if (!sp)
1180 return;
1181
1182 --sp->unsync_children;
1183 WARN_ON((int)sp->unsync_children < 0);
1184 __clear_bit(idx, sp->unsync_child_bitmap);
1185 level++;
1186 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
4731d4c7
MT		 1187}
1188
60c8aec6
MT		 1189static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1190 struct mmu_page_path *parents,
1191 struct kvm_mmu_pages *pvec)
4731d4c7 1192{
60c8aec6
MT		 1193 parents->parent[parent->role.level-1] = NULL;
1194 pvec->nr = 0;
1195}
4731d4c7 1196
60c8aec6
MT		 1197static void mmu_sync_children(struct kvm_vcpu *vcpu,
1198 struct kvm_mmu_page *parent)
1199{
1200 int i;
1201 struct kvm_mmu_page *sp;
1202 struct mmu_page_path parents;
1203 struct kvm_mmu_pages pages;
1204
1205 kvm_mmu_pages_init(parent, &parents, &pages);
1206 while (mmu_unsync_walk(parent, &pages)) {
b1a36821
MT		 1207 int protected = 0;
1208
1209 for_each_sp(pages, sp, parents, i)
1210 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1211
1212 if (protected)
1213 kvm_flush_remote_tlbs(vcpu->kvm);
1214
60c8aec6
MT		 1215 for_each_sp(pages, sp, parents, i) {
1216 kvm_sync_page(vcpu, sp);
1217 mmu_pages_clear_parents(&parents);
1218 }
4731d4c7 1219 cond_resched_lock(&vcpu->kvm->mmu_lock);
60c8aec6
MT		 1220 kvm_mmu_pages_init(parent, &parents, &pages);
1221 }
4731d4c7
MT		 1222}
1223
cea0f0e7
AK		 1224static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1225 gfn_t gfn,
1226 gva_t gaddr,
1227 unsigned level,
f6e2c02b 1228 int direct,
41074d07 1229 unsigned access,
f7d9c7b7 1230 u64 *parent_pte)
cea0f0e7
AK		 1231{
1232 union kvm_mmu_page_role role;
1233 unsigned index;
1234 unsigned quadrant;
1235 struct hlist_head *bucket;
4db35314 1236 struct kvm_mmu_page *sp;
4731d4c7 1237 struct hlist_node *node, *tmp;
cea0f0e7 1238
a770f6f2 1239 role = vcpu->arch.mmu.base_role;
cea0f0e7 1240 role.level = level;
f6e2c02b 1241 role.direct = direct;
41074d07 1242 role.access = access;
ad312c7c 1243 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
cea0f0e7
AK		 1244 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1245 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1246 role.quadrant = quadrant;
1247 }
1ae0a13d 1248 index = kvm_page_table_hashfn(gfn);
f05e70ac 1249 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4731d4c7
MT		 1250 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1251 if (sp->gfn == gfn) {
1252 if (sp->unsync)
1253 if (kvm_sync_page(vcpu, sp))
1254 continue;
1255
1256 if (sp->role.word != role.word)
1257 continue;
1258
4db35314 1259 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
0074ff63
MT		 1260 if (sp->unsync_children) {
1261 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1262 kvm_mmu_mark_parents_unsync(vcpu, sp);
1263 }
f691fe1d 1264 trace_kvm_mmu_get_page(sp, false);
4db35314 1265 return sp;
cea0f0e7 1266 }
dfc5aa00 1267 ++vcpu->kvm->stat.mmu_cache_miss;
4db35314
AK		 1268 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1269 if (!sp)
1270 return sp;
4db35314
AK		 1271 sp->gfn = gfn;
1272 sp->role = role;
1273 hlist_add_head(&sp->hash_link, bucket);
f6e2c02b 1274 if (!direct) {
b1a36821
MT		 1275 if (rmap_write_protect(vcpu->kvm, gfn))
1276 kvm_flush_remote_tlbs(vcpu->kvm);
4731d4c7
MT		 1277 account_shadowed(vcpu->kvm, gfn);
1278 }
131d8279
AK		 1279 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1280 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1281 else
1282 nonpaging_prefetch_page(vcpu, sp);
f691fe1d 1283 trace_kvm_mmu_get_page(sp, true);
4db35314 1284 return sp;
cea0f0e7
AK		 1285}
1286
2d11123a
AK		 1287static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1288 struct kvm_vcpu *vcpu, u64 addr)
1289{
1290 iterator->addr = addr;
1291 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1292 iterator->level = vcpu->arch.mmu.shadow_root_level;
1293 if (iterator->level == PT32E_ROOT_LEVEL) {
1294 iterator->shadow_addr
1295 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1296 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1297 --iterator->level;
1298 if (!iterator->shadow_addr)
1299 iterator->level = 0;
1300 }
1301}
1302
1303static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1304{
1305 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1306 return false;
4d88954d
MT		 1307
1308 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1309 if (is_large_pte(*iterator->sptep))
1310 return false;
1311
2d11123a
AK		 1312 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1313 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1314 return true;
1315}
1316
1317static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1318{
1319 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1320 --iterator->level;
1321}
1322
90cb0529 1323static void kvm_mmu_page_unlink_children(struct kvm *kvm,
4db35314 1324 struct kvm_mmu_page *sp)
a436036b 1325{
697fe2e2
AK		 1326 unsigned i;
1327 u64 *pt;
1328 u64 ent;
1329
4db35314 1330 pt = sp->spt;
697fe2e2 1331
697fe2e2
AK		 1332 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1333 ent = pt[i];
1334
05da4558 1335 if (is_shadow_present_pte(ent)) {
776e6633 1336 if (!is_last_spte(ent, sp->role.level)) {
05da4558
MT		 1337 ent &= PT64_BASE_ADDR_MASK;
1338 mmu_page_remove_parent_pte(page_header(ent),
1339 &pt[i]);
1340 } else {
776e6633
MT		 1341 if (is_large_pte(ent))
1342 --kvm->stat.lpages;
05da4558
MT		 1343 rmap_remove(kvm, &pt[i]);
1344 }
1345 }
c7addb90 1346 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2 1347 }
a436036b
AK		 1348}
1349
4db35314 1350static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7 1351{
4db35314 1352 mmu_page_remove_parent_pte(sp, parent_pte);
a436036b
AK		 1353}
1354
12b7d28f
AK		 1355static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1356{
1357 int i;
988a2cae 1358 struct kvm_vcpu *vcpu;
12b7d28f 1359
988a2cae
GN		 1360 kvm_for_each_vcpu(i, vcpu, kvm)
1361 vcpu->arch.last_pte_updated = NULL;
12b7d28f
AK		 1362}
1363
31aa2b44 1364static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
a436036b
AK		 1365{
1366 u64 *parent_pte;
1367
4db35314
AK		 1368 while (sp->multimapped || sp->parent_pte) {
1369 if (!sp->multimapped)
1370 parent_pte = sp->parent_pte;
a436036b
AK		 1371 else {
1372 struct kvm_pte_chain *chain;
1373
4db35314 1374 chain = container_of(sp->parent_ptes.first,
a436036b
AK		 1375 struct kvm_pte_chain, link);
1376 parent_pte = chain->parent_ptes[0];
1377 }
697fe2e2 1378 BUG_ON(!parent_pte);
4db35314 1379 kvm_mmu_put_page(sp, parent_pte);
d555c333 1380 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
a436036b 1381 }
31aa2b44
AK		 1382}
1383
60c8aec6
MT		 1384static int mmu_zap_unsync_children(struct kvm *kvm,
1385 struct kvm_mmu_page *parent)
4731d4c7 1386{
60c8aec6
MT		 1387 int i, zapped = 0;
1388 struct mmu_page_path parents;
1389 struct kvm_mmu_pages pages;
4731d4c7 1390
60c8aec6 1391 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
4731d4c7 1392 return 0;
60c8aec6
MT		 1393
1394 kvm_mmu_pages_init(parent, &parents, &pages);
1395 while (mmu_unsync_walk(parent, &pages)) {
1396 struct kvm_mmu_page *sp;
1397
1398 for_each_sp(pages, sp, parents, i) {
1399 kvm_mmu_zap_page(kvm, sp);
1400 mmu_pages_clear_parents(&parents);
1401 }
1402 zapped += pages.nr;
1403 kvm_mmu_pages_init(parent, &parents, &pages);
1404 }
1405
1406 return zapped;
4731d4c7
MT		 1407}
1408
07385413 1409static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
31aa2b44 1410{
4731d4c7 1411 int ret;
f691fe1d
AK		 1412
1413 trace_kvm_mmu_zap_page(sp);
31aa2b44 1414 ++kvm->stat.mmu_shadow_zapped;
4731d4c7 1415 ret = mmu_zap_unsync_children(kvm, sp);
4db35314 1416 kvm_mmu_page_unlink_children(kvm, sp);
31aa2b44 1417 kvm_mmu_unlink_parents(kvm, sp);
5b5c6a5a 1418 kvm_flush_remote_tlbs(kvm);
f6e2c02b 1419 if (!sp->role.invalid && !sp->role.direct)
5b5c6a5a 1420 unaccount_shadowed(kvm, sp->gfn);
4731d4c7
MT		 1421 if (sp->unsync)
1422 kvm_unlink_unsync_page(kvm, sp);
4db35314
AK		 1423 if (!sp->root_count) {
1424 hlist_del(&sp->hash_link);
1425 kvm_mmu_free_page(kvm, sp);
2e53d63a 1426 } else {
2e53d63a 1427 sp->role.invalid = 1;
5b5c6a5a 1428 list_move(&sp->link, &kvm->arch.active_mmu_pages);
2e53d63a
MT		 1429 kvm_reload_remote_mmus(kvm);
1430 }
12b7d28f 1431 kvm_mmu_reset_last_pte_updated(kvm);
4731d4c7 1432 return ret;
a436036b
AK		 1433}
1434
82ce2c96
IE		 1435/*
1436 * Changing the number of mmu pages allocated to the vm
1437 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1438 */
1439void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1440{
025dbbf3
MT		 1441 int used_pages;
1442
1443 used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1444 used_pages = max(0, used_pages);
1445
82ce2c96
IE		 1446 /*
1447 * If we set the number of mmu pages to be smaller be than the
1448 * number of actived pages , we must to free some mmu pages before we
1449 * change the value
1450 */
1451
025dbbf3
MT		 1452 if (used_pages > kvm_nr_mmu_pages) {
1453 while (used_pages > kvm_nr_mmu_pages) {
82ce2c96
IE		 1454 struct kvm_mmu_page *page;
1455
f05e70ac 1456 page = container_of(kvm->arch.active_mmu_pages.prev,
82ce2c96
IE		 1457 struct kvm_mmu_page, link);
1458 kvm_mmu_zap_page(kvm, page);
025dbbf3 1459 used_pages--;
82ce2c96 1460 }
f05e70ac 1461 kvm->arch.n_free_mmu_pages = 0;
82ce2c96
IE		 1462 }
1463 else
f05e70ac
ZX		 1464 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1465 - kvm->arch.n_alloc_mmu_pages;
82ce2c96 1466
f05e70ac 1467 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
82ce2c96
IE		 1468}
1469
f67a46f4 1470static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
a436036b
AK		 1471{
1472 unsigned index;
1473 struct hlist_head *bucket;
4db35314 1474 struct kvm_mmu_page *sp;
a436036b
AK		 1475 struct hlist_node *node, *n;
1476 int r;
1477
b8688d51 1478 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
a436036b 1479 r = 0;
1ae0a13d 1480 index = kvm_page_table_hashfn(gfn);
f05e70ac 1481 bucket = &kvm->arch.mmu_page_hash[index];
4db35314 1482 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
f6e2c02b 1483 if (sp->gfn == gfn && !sp->role.direct) {
b8688d51 1484 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
4db35314 1485 sp->role.word);
a436036b 1486 r = 1;
07385413
MT		 1487 if (kvm_mmu_zap_page(kvm, sp))
1488 n = bucket->first;
a436036b
AK		 1489 }
1490 return r;
cea0f0e7
AK		 1491}
1492
f67a46f4 1493static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
97a0a01e 1494{
4677a3b6
AK		 1495 unsigned index;
1496 struct hlist_head *bucket;
4db35314 1497 struct kvm_mmu_page *sp;
4677a3b6 1498 struct hlist_node *node, *nn;
97a0a01e 1499
4677a3b6
AK		 1500 index = kvm_page_table_hashfn(gfn);
1501 bucket = &kvm->arch.mmu_page_hash[index];
1502 hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
f6e2c02b 1503 if (sp->gfn == gfn && !sp->role.direct
4677a3b6
AK		 1504 && !sp->role.invalid) {
1505 pgprintk("%s: zap %lx %x\n",
1506 __func__, gfn, sp->role.word);
1507 kvm_mmu_zap_page(kvm, sp);
1508 }
97a0a01e
AK		 1509 }
1510}
1511
38c335f1 1512static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
6aa8b732 1513{
38c335f1 1514 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
4db35314 1515 struct kvm_mmu_page *sp = page_header(__pa(pte));
6aa8b732 1516
291f26bc 1517 __set_bit(slot, sp->slot_bitmap);
6aa8b732
AK		 1518}
1519
6844dec6
MT		 1520static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1521{
1522 int i;
1523 u64 *pt = sp->spt;
1524
1525 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1526 return;
1527
1528 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1529 if (pt[i] == shadow_notrap_nonpresent_pte)
d555c333 1530 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
6844dec6
MT		 1531 }
1532}
1533
039576c0
AK		 1534struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1535{
72dc67a6
IE		 1536 struct page *page;
1537
ad312c7c 1538 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
039576c0
AK		 1539
1540 if (gpa == UNMAPPED_GVA)
1541 return NULL;
72dc67a6 1542
72dc67a6 1543 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
72dc67a6
IE		 1544
1545 return page;
039576c0
AK		 1546}
1547
74be52e3
SY		 1548/*
1549 * The function is based on mtrr_type_lookup() in
1550 * arch/x86/kernel/cpu/mtrr/generic.c
1551 */
1552static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1553 u64 start, u64 end)
1554{
1555 int i;
1556 u64 base, mask;
1557 u8 prev_match, curr_match;
1558 int num_var_ranges = KVM_NR_VAR_MTRR;
1559
1560 if (!mtrr_state->enabled)
1561 return 0xFF;
1562
1563 /* Make end inclusive end, instead of exclusive */
1564 end--;
1565
1566 /* Look in fixed ranges. Just return the type as per start */
1567 if (mtrr_state->have_fixed && (start < 0x100000)) {
1568 int idx;
1569
1570 if (start < 0x80000) {
1571 idx = 0;
1572 idx += (start >> 16);
1573 return mtrr_state->fixed_ranges[idx];
1574 } else if (start < 0xC0000) {
1575 idx = 1 * 8;
1576 idx += ((start - 0x80000) >> 14);
1577 return mtrr_state->fixed_ranges[idx];
1578 } else if (start < 0x1000000) {
1579 idx = 3 * 8;
1580 idx += ((start - 0xC0000) >> 12);
1581 return mtrr_state->fixed_ranges[idx];
1582 }
1583 }
1584
1585 /*
1586 * Look in variable ranges
1587 * Look of multiple ranges matching this address and pick type
1588 * as per MTRR precedence
1589 */
1590 if (!(mtrr_state->enabled & 2))
1591 return mtrr_state->def_type;
1592
1593 prev_match = 0xFF;
1594 for (i = 0; i < num_var_ranges; ++i) {
1595 unsigned short start_state, end_state;
1596
1597 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1598 continue;
1599
1600 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1601 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1602 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1603 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1604
1605 start_state = ((start & mask) == (base & mask));
1606 end_state = ((end & mask) == (base & mask));
1607 if (start_state != end_state)
1608 return 0xFE;
1609
1610 if ((start & mask) != (base & mask))
1611 continue;
1612
1613 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1614 if (prev_match == 0xFF) {
1615 prev_match = curr_match;
1616 continue;
1617 }
1618
1619 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1620 curr_match == MTRR_TYPE_UNCACHABLE)
1621 return MTRR_TYPE_UNCACHABLE;
1622
1623 if ((prev_match == MTRR_TYPE_WRBACK &&
1624 curr_match == MTRR_TYPE_WRTHROUGH) ||
1625 (prev_match == MTRR_TYPE_WRTHROUGH &&
1626 curr_match == MTRR_TYPE_WRBACK)) {
1627 prev_match = MTRR_TYPE_WRTHROUGH;
1628 curr_match = MTRR_TYPE_WRTHROUGH;
1629 }
1630
1631 if (prev_match != curr_match)
1632 return MTRR_TYPE_UNCACHABLE;
1633 }
1634
1635 if (prev_match != 0xFF)
1636 return prev_match;
1637
1638 return mtrr_state->def_type;
1639}
1640
4b12f0de 1641u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
74be52e3
SY		 1642{
1643 u8 mtrr;
1644
1645 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1646 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1647 if (mtrr == 0xfe || mtrr == 0xff)
1648 mtrr = MTRR_TYPE_WRBACK;
1649 return mtrr;
1650}
4b12f0de 1651EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
74be52e3 1652
4731d4c7
MT		 1653static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1654{
1655 unsigned index;
1656 struct hlist_head *bucket;
1657 struct kvm_mmu_page *s;
1658 struct hlist_node *node, *n;
1659
f691fe1d 1660 trace_kvm_mmu_unsync_page(sp);
4731d4c7
MT		 1661 index = kvm_page_table_hashfn(sp->gfn);
1662 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1663 /* don't unsync if pagetable is shadowed with multiple roles */
1664 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
f6e2c02b 1665 if (s->gfn != sp->gfn || s->role.direct)
4731d4c7
MT		 1666 continue;
1667 if (s->role.word != sp->role.word)
1668 return 1;
1669 }
4731d4c7
MT		 1670 ++vcpu->kvm->stat.mmu_unsync;
1671 sp->unsync = 1;
6cffe8ca 1672
c2d0ee46 1673 kvm_mmu_mark_parents_unsync(vcpu, sp);
6cffe8ca 1674
4731d4c7
MT		 1675 mmu_convert_notrap(sp);
1676 return 0;
1677}
1678
1679static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1680 bool can_unsync)
1681{
1682 struct kvm_mmu_page *shadow;
1683
1684 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1685 if (shadow) {
1686 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1687 return 1;
1688 if (shadow->unsync)
1689 return 0;
582801a9 1690 if (can_unsync && oos_shadow)
4731d4c7
MT		 1691 return kvm_unsync_page(vcpu, shadow);
1692 return 1;
1693 }
1694 return 0;
1695}
1696
d555c333 1697static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1e73f9dd
MT		 1698 unsigned pte_access, int user_fault,
1699 int write_fault, int dirty, int largepage,
c2d0ee46 1700 gfn_t gfn, pfn_t pfn, bool speculative,
4731d4c7 1701 bool can_unsync)
1c4f1fd6
AK		 1702{
1703 u64 spte;
1e73f9dd 1704 int ret = 0;
64d4d521 1705
1c4f1fd6
AK		 1706 /*
1707 * We don't set the accessed bit, since we sometimes want to see
1708 * whether the guest actually used the pte (in order to detect
1709 * demand paging).
1710 */
7b52345e 1711 spte = shadow_base_present_pte | shadow_dirty_mask;
947da538 1712 if (!speculative)
3201b5d9 1713 spte |= shadow_accessed_mask;
1c4f1fd6
AK		 1714 if (!dirty)
1715 pte_access &= ~ACC_WRITE_MASK;
7b52345e
SY		 1716 if (pte_access & ACC_EXEC_MASK)
1717 spte |= shadow_x_mask;
1718 else
1719 spte |= shadow_nx_mask;
1c4f1fd6 1720 if (pte_access & ACC_USER_MASK)
7b52345e 1721 spte |= shadow_user_mask;
05da4558
MT		 1722 if (largepage)
1723 spte |= PT_PAGE_SIZE_MASK;
4b12f0de
SY		 1724 if (tdp_enabled)
1725 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1726 kvm_is_mmio_pfn(pfn));
1c4f1fd6 1727
35149e21 1728 spte |= (u64)pfn << PAGE_SHIFT;
1c4f1fd6
AK		 1729
1730 if ((pte_access & ACC_WRITE_MASK)
1731 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1c4f1fd6 1732
38187c83
MT		 1733 if (largepage && has_wrprotected_page(vcpu->kvm, gfn)) {
1734 ret = 1;
1735 spte = shadow_trap_nonpresent_pte;
1736 goto set_pte;
1737 }
1738
1c4f1fd6 1739 spte |= PT_WRITABLE_MASK;
1c4f1fd6 1740
ecc5589f
MT		 1741 /*
1742 * Optimization: for pte sync, if spte was writable the hash
1743 * lookup is unnecessary (and expensive). Write protection
1744 * is responsibility of mmu_get_page / kvm_sync_page.
1745 * Same reasoning can be applied to dirty page accounting.
1746 */
d555c333 1747 if (!can_unsync && is_writeble_pte(*sptep))
ecc5589f
MT		 1748 goto set_pte;
1749
4731d4c7 1750 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1c4f1fd6 1751 pgprintk("%s: found shadow page for %lx, marking ro\n",
b8688d51 1752 __func__, gfn);
1e73f9dd 1753 ret = 1;
1c4f1fd6 1754 pte_access &= ~ACC_WRITE_MASK;
a378b4e6 1755 if (is_writeble_pte(spte))
1c4f1fd6 1756 spte &= ~PT_WRITABLE_MASK;
1c4f1fd6
AK		 1757 }
1758 }
1759
1c4f1fd6
AK		 1760 if (pte_access & ACC_WRITE_MASK)
1761 mark_page_dirty(vcpu->kvm, gfn);
1762
38187c83 1763set_pte:
d555c333 1764 __set_spte(sptep, spte);
1e73f9dd
MT		 1765 return ret;
1766}
1767
d555c333 1768static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1e73f9dd
MT		 1769 unsigned pt_access, unsigned pte_access,
1770 int user_fault, int write_fault, int dirty,
c2d0ee46
MT		 1771 int *ptwrite, int largepage, gfn_t gfn,
1772 pfn_t pfn, bool speculative)
1e73f9dd
MT		 1773{
1774 int was_rmapped = 0;
d555c333 1775 int was_writeble = is_writeble_pte(*sptep);
53a27b39 1776 int rmap_count;
1e73f9dd
MT		 1777
1778 pgprintk("%s: spte %llx access %x write_fault %d"
1779 " user_fault %d gfn %lx\n",
d555c333 1780 __func__, *sptep, pt_access,
1e73f9dd
MT		 1781 write_fault, user_fault, gfn);
1782
d555c333 1783 if (is_rmap_spte(*sptep)) {
1e73f9dd
MT		 1784 /*
1785 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1786 * the parent of the now unreachable PTE.
1787 */
d555c333 1788 if (largepage && !is_large_pte(*sptep)) {
1e73f9dd 1789 struct kvm_mmu_page *child;
d555c333 1790 u64 pte = *sptep;
1e73f9dd
MT		 1791
1792 child = page_header(pte & PT64_BASE_ADDR_MASK);
d555c333
AK		 1793 mmu_page_remove_parent_pte(child, sptep);
1794 } else if (pfn != spte_to_pfn(*sptep)) {
1e73f9dd 1795 pgprintk("hfn old %lx new %lx\n",
d555c333
AK		 1796 spte_to_pfn(*sptep), pfn);
1797 rmap_remove(vcpu->kvm, sptep);
6bed6b9e
JR		 1798 } else
1799 was_rmapped = 1;
1e73f9dd 1800 }
d555c333 1801 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
c2d0ee46 1802 dirty, largepage, gfn, pfn, speculative, true)) {
1e73f9dd
MT		 1803 if (write_fault)
1804 *ptwrite = 1;
a378b4e6
MT		 1805 kvm_x86_ops->tlb_flush(vcpu);
1806 }
1e73f9dd 1807
d555c333 1808 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1e73f9dd 1809 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
d555c333 1810 is_large_pte(*sptep)? "2MB" : "4kB",
a205bc19
JR		 1811 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1812 *sptep, sptep);
d555c333 1813 if (!was_rmapped && is_large_pte(*sptep))
05da4558
MT		 1814 ++vcpu->kvm->stat.lpages;
1815
d555c333 1816 page_header_update_slot(vcpu->kvm, sptep, gfn);
1c4f1fd6 1817 if (!was_rmapped) {
d555c333
AK		 1818 rmap_count = rmap_add(vcpu, sptep, gfn, largepage);
1819 if (!is_rmap_spte(*sptep))
35149e21 1820 kvm_release_pfn_clean(pfn);
53a27b39
MT		 1821 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
1822 rmap_recycle(vcpu, gfn, largepage);
75e68e60
IE		 1823 } else {
1824 if (was_writeble)
35149e21 1825 kvm_release_pfn_dirty(pfn);
75e68e60 1826 else
35149e21 1827 kvm_release_pfn_clean(pfn);
1c4f1fd6 1828 }
1b7fcd32 1829 if (speculative) {
d555c333 1830 vcpu->arch.last_pte_updated = sptep;
1b7fcd32
AK		 1831 vcpu->arch.last_pte_gfn = gfn;
1832 }
1c4f1fd6
AK		 1833}
1834
6aa8b732
AK		 1835static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1836{
1837}
1838
9f652d21
AK		 1839static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1840 int largepage, gfn_t gfn, pfn_t pfn)
140754bc 1841{
9f652d21 1842 struct kvm_shadow_walk_iterator iterator;
140754bc 1843 struct kvm_mmu_page *sp;
9f652d21 1844 int pt_write = 0;
140754bc 1845 gfn_t pseudo_gfn;
6aa8b732 1846
9f652d21
AK		 1847 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1848 if (iterator.level == PT_PAGE_TABLE_LEVEL
1849 || (largepage && iterator.level == PT_DIRECTORY_LEVEL)) {
1850 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1851 0, write, 1, &pt_write,
c2d0ee46 1852 largepage, gfn, pfn, false);
9f652d21
AK		 1853 ++vcpu->stat.pf_fixed;
1854 break;
6aa8b732
AK		 1855 }
1856
9f652d21
AK		 1857 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1858 pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1859 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1860 iterator.level - 1,
1861 1, ACC_ALL, iterator.sptep);
1862 if (!sp) {
1863 pgprintk("nonpaging_map: ENOMEM\n");
1864 kvm_release_pfn_clean(pfn);
1865 return -ENOMEM;
1866 }
140754bc 1867
d555c333
AK		 1868 __set_spte(iterator.sptep,
1869 __pa(sp->spt)
1870 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1871 | shadow_user_mask | shadow_x_mask);
9f652d21
AK		 1872 }
1873 }
1874 return pt_write;
6aa8b732
AK		 1875}
1876
10589a46
MT		 1877static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1878{
1879 int r;
05da4558 1880 int largepage = 0;
35149e21 1881 pfn_t pfn;
e930bffe 1882 unsigned long mmu_seq;
aaee2c94 1883
ec04b260
JR		 1884 if (is_largepage_backed(vcpu, gfn &
1885 ~(KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL) - 1))) {
1886 gfn &= ~(KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL) - 1);
05da4558
MT		 1887 largepage = 1;
1888 }
1889
e930bffe 1890 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 1891 smp_rmb();
35149e21 1892 pfn = gfn_to_pfn(vcpu->kvm, gfn);
aaee2c94 1893
d196e343 1894 /* mmio */
35149e21
AL		 1895 if (is_error_pfn(pfn)) {
1896 kvm_release_pfn_clean(pfn);
d196e343
AK		 1897 return 1;
1898 }
1899
aaee2c94 1900 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA		 1901 if (mmu_notifier_retry(vcpu, mmu_seq))
1902 goto out_unlock;
eb787d10 1903 kvm_mmu_free_some_pages(vcpu);
6c41f428 1904 r = __direct_map(vcpu, v, write, largepage, gfn, pfn);
aaee2c94
MT		 1905 spin_unlock(&vcpu->kvm->mmu_lock);
1906
aaee2c94 1907
10589a46 1908 return r;
e930bffe
AA		 1909
1910out_unlock:
1911 spin_unlock(&vcpu->kvm->mmu_lock);
1912 kvm_release_pfn_clean(pfn);
1913 return 0;
10589a46
MT		 1914}
1915
1916
17ac10ad
AK		 1917static void mmu_free_roots(struct kvm_vcpu *vcpu)
1918{
1919 int i;
4db35314 1920 struct kvm_mmu_page *sp;
17ac10ad 1921
ad312c7c 1922 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
7b53aa56 1923 return;
aaee2c94 1924 spin_lock(&vcpu->kvm->mmu_lock);
ad312c7c
ZX		 1925 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1926 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad 1927
4db35314
AK		 1928 sp = page_header(root);
1929 --sp->root_count;
2e53d63a
MT		 1930 if (!sp->root_count && sp->role.invalid)
1931 kvm_mmu_zap_page(vcpu->kvm, sp);
ad312c7c 1932 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
aaee2c94 1933 spin_unlock(&vcpu->kvm->mmu_lock);
17ac10ad
AK		 1934 return;
1935 }
17ac10ad 1936 for (i = 0; i < 4; ++i) {
ad312c7c 1937 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad 1938
417726a3 1939 if (root) {
417726a3 1940 root &= PT64_BASE_ADDR_MASK;
4db35314
AK		 1941 sp = page_header(root);
1942 --sp->root_count;
2e53d63a
MT		 1943 if (!sp->root_count && sp->role.invalid)
1944 kvm_mmu_zap_page(vcpu->kvm, sp);
417726a3 1945 }
ad312c7c 1946 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 1947 }
aaee2c94 1948 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 1949 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
17ac10ad
AK		 1950}
1951
8986ecc0
MT		 1952static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
1953{
1954 int ret = 0;
1955
1956 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
1957 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
1958 ret = 1;
1959 }
1960
1961 return ret;
1962}
1963
1964static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
17ac10ad
AK		 1965{
1966 int i;
cea0f0e7 1967 gfn_t root_gfn;
4db35314 1968 struct kvm_mmu_page *sp;
f6e2c02b 1969 int direct = 0;
6de4f3ad 1970 u64 pdptr;
3bb65a22 1971
ad312c7c 1972 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
17ac10ad 1973
ad312c7c
ZX		 1974 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1975 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad
AK		 1976
1977 ASSERT(!VALID_PAGE(root));
fb72d167 1978 if (tdp_enabled)
f6e2c02b 1979 direct = 1;
8986ecc0
MT		 1980 if (mmu_check_root(vcpu, root_gfn))
1981 return 1;
4db35314 1982 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
f6e2c02b 1983 PT64_ROOT_LEVEL, direct,
fb72d167 1984 ACC_ALL, NULL);
4db35314
AK		 1985 root = __pa(sp->spt);
1986 ++sp->root_count;
ad312c7c 1987 vcpu->arch.mmu.root_hpa = root;
8986ecc0 1988 return 0;
17ac10ad 1989 }
f6e2c02b 1990 direct = !is_paging(vcpu);
fb72d167 1991 if (tdp_enabled)
f6e2c02b 1992 direct = 1;
17ac10ad 1993 for (i = 0; i < 4; ++i) {
ad312c7c 1994 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad
AK		 1995
1996 ASSERT(!VALID_PAGE(root));
ad312c7c 1997 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
6de4f3ad 1998 pdptr = kvm_pdptr_read(vcpu, i);
43a3795a 1999 if (!is_present_gpte(pdptr)) {
ad312c7c 2000 vcpu->arch.mmu.pae_root[i] = 0;
417726a3
AK		 2001 continue;
2002 }
6de4f3ad 2003 root_gfn = pdptr >> PAGE_SHIFT;
ad312c7c 2004 } else if (vcpu->arch.mmu.root_level == 0)
cea0f0e7 2005 root_gfn = 0;
8986ecc0
MT		 2006 if (mmu_check_root(vcpu, root_gfn))
2007 return 1;
4db35314 2008 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
f6e2c02b 2009 PT32_ROOT_LEVEL, direct,
f7d9c7b7 2010 ACC_ALL, NULL);
4db35314
AK		 2011 root = __pa(sp->spt);
2012 ++sp->root_count;
ad312c7c 2013 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
17ac10ad 2014 }
ad312c7c 2015 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
8986ecc0 2016 return 0;
17ac10ad
AK		 2017}
2018
0ba73cda
MT		 2019static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2020{
2021 int i;
2022 struct kvm_mmu_page *sp;
2023
2024 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2025 return;
2026 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2027 hpa_t root = vcpu->arch.mmu.root_hpa;
2028 sp = page_header(root);
2029 mmu_sync_children(vcpu, sp);
2030 return;
2031 }
2032 for (i = 0; i < 4; ++i) {
2033 hpa_t root = vcpu->arch.mmu.pae_root[i];
2034
8986ecc0 2035 if (root && VALID_PAGE(root)) {
0ba73cda
MT		 2036 root &= PT64_BASE_ADDR_MASK;
2037 sp = page_header(root);
2038 mmu_sync_children(vcpu, sp);
2039 }
2040 }
2041}
2042
2043void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2044{
2045 spin_lock(&vcpu->kvm->mmu_lock);
2046 mmu_sync_roots(vcpu);
6cffe8ca 2047 spin_unlock(&vcpu->kvm->mmu_lock);
0ba73cda
MT		 2048}
2049
6aa8b732
AK		 2050static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
2051{
2052 return vaddr;
2053}
2054
2055static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
3f3e7124 2056 u32 error_code)
6aa8b732 2057{
e833240f 2058 gfn_t gfn;
e2dec939 2059 int r;
6aa8b732 2060
b8688d51 2061 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
e2dec939
AK		 2062 r = mmu_topup_memory_caches(vcpu);
2063 if (r)
2064 return r;
714b93da 2065
6aa8b732 2066 ASSERT(vcpu);
ad312c7c 2067 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 2068
e833240f 2069 gfn = gva >> PAGE_SHIFT;
6aa8b732 2070
e833240f
AK		 2071 return nonpaging_map(vcpu, gva & PAGE_MASK,
2072 error_code & PFERR_WRITE_MASK, gfn);
6aa8b732
AK		 2073}
2074
fb72d167
JR		 2075static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2076 u32 error_code)
2077{
35149e21 2078 pfn_t pfn;
fb72d167 2079 int r;
05da4558
MT		 2080 int largepage = 0;
2081 gfn_t gfn = gpa >> PAGE_SHIFT;
e930bffe 2082 unsigned long mmu_seq;
fb72d167
JR		 2083
2084 ASSERT(vcpu);
2085 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2086
2087 r = mmu_topup_memory_caches(vcpu);
2088 if (r)
2089 return r;
2090
ec04b260
JR		 2091 if (is_largepage_backed(vcpu, gfn &
2092 ~(KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL) - 1))) {
2093 gfn &= ~(KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL) - 1);
05da4558
MT		 2094 largepage = 1;
2095 }
e930bffe 2096 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 2097 smp_rmb();
35149e21 2098 pfn = gfn_to_pfn(vcpu->kvm, gfn);
35149e21
AL		 2099 if (is_error_pfn(pfn)) {
2100 kvm_release_pfn_clean(pfn);
fb72d167
JR		 2101 return 1;
2102 }
2103 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA		 2104 if (mmu_notifier_retry(vcpu, mmu_seq))
2105 goto out_unlock;
fb72d167
JR		 2106 kvm_mmu_free_some_pages(vcpu);
2107 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
6c41f428 2108 largepage, gfn, pfn);
fb72d167 2109 spin_unlock(&vcpu->kvm->mmu_lock);
fb72d167
JR		 2110
2111 return r;
e930bffe
AA		 2112
2113out_unlock:
2114 spin_unlock(&vcpu->kvm->mmu_lock);
2115 kvm_release_pfn_clean(pfn);
2116 return 0;
fb72d167
JR		 2117}
2118
6aa8b732
AK		 2119static void nonpaging_free(struct kvm_vcpu *vcpu)
2120{
17ac10ad 2121 mmu_free_roots(vcpu);
6aa8b732
AK		 2122}
2123
2124static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2125{
ad312c7c 2126 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK		 2127
2128 context->new_cr3 = nonpaging_new_cr3;
2129 context->page_fault = nonpaging_page_fault;
6aa8b732
AK		 2130 context->gva_to_gpa = nonpaging_gva_to_gpa;
2131 context->free = nonpaging_free;
c7addb90 2132 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 2133 context->sync_page = nonpaging_sync_page;
a7052897 2134 context->invlpg = nonpaging_invlpg;
cea0f0e7 2135 context->root_level = 0;
6aa8b732 2136 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 2137 context->root_hpa = INVALID_PAGE;
6aa8b732
AK		 2138 return 0;
2139}
2140
d835dfec 2141void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
6aa8b732 2142{
1165f5fe 2143 ++vcpu->stat.tlb_flush;
cbdd1bea 2144 kvm_x86_ops->tlb_flush(vcpu);
6aa8b732
AK		 2145}
2146
2147static void paging_new_cr3(struct kvm_vcpu *vcpu)
2148{
b8688d51 2149 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
cea0f0e7 2150 mmu_free_roots(vcpu);
6aa8b732
AK		 2151}
2152
6aa8b732
AK		 2153static void inject_page_fault(struct kvm_vcpu *vcpu,
2154 u64 addr,
2155 u32 err_code)
2156{
c3c91fee 2157 kvm_inject_page_fault(vcpu, addr, err_code);
6aa8b732
AK		 2158}
2159
6aa8b732
AK		 2160static void paging_free(struct kvm_vcpu *vcpu)
2161{
2162 nonpaging_free(vcpu);
2163}
2164
82725b20
DE		 2165static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2166{
2167 int bit7;
2168
2169 bit7 = (gpte >> 7) & 1;
2170 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2171}
2172
6aa8b732
AK		 2173#define PTTYPE 64
2174#include "paging_tmpl.h"
2175#undef PTTYPE
2176
2177#define PTTYPE 32
2178#include "paging_tmpl.h"
2179#undef PTTYPE
2180
82725b20
DE		 2181static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2182{
2183 struct kvm_mmu *context = &vcpu->arch.mmu;
2184 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2185 u64 exb_bit_rsvd = 0;
2186
2187 if (!is_nx(vcpu))
2188 exb_bit_rsvd = rsvd_bits(63, 63);
2189 switch (level) {
2190 case PT32_ROOT_LEVEL:
2191 /* no rsvd bits for 2 level 4K page table entries */
2192 context->rsvd_bits_mask[0][1] = 0;
2193 context->rsvd_bits_mask[0][0] = 0;
2194 if (is_cpuid_PSE36())
2195 /* 36bits PSE 4MB page */
2196 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2197 else
2198 /* 32 bits PSE 4MB page */
2199 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
29a4b933 2200 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
82725b20
DE		 2201 break;
2202 case PT32E_ROOT_LEVEL:
20c466b5
DE		 2203 context->rsvd_bits_mask[0][2] =
2204 rsvd_bits(maxphyaddr, 63) |
2205 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
82725b20 2206 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
4c26b4cd 2207 rsvd_bits(maxphyaddr, 62); /* PDE */
82725b20
DE		 2208 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2209 rsvd_bits(maxphyaddr, 62); /* PTE */
2210 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2211 rsvd_bits(maxphyaddr, 62) |
2212 rsvd_bits(13, 20); /* large page */
29a4b933 2213 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
82725b20
DE		 2214 break;
2215 case PT64_ROOT_LEVEL:
2216 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2217 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2218 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2219 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2220 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
4c26b4cd 2221 rsvd_bits(maxphyaddr, 51);
82725b20
DE		 2222 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2223 rsvd_bits(maxphyaddr, 51);
2224 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2225 context->rsvd_bits_mask[1][2] = context->rsvd_bits_mask[0][2];
2226 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
4c26b4cd
SY		 2227 rsvd_bits(maxphyaddr, 51) |
2228 rsvd_bits(13, 20); /* large page */
29a4b933 2229 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
82725b20
DE		 2230 break;
2231 }
2232}
2233
17ac10ad 2234static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
6aa8b732 2235{
ad312c7c 2236 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK		 2237
2238 ASSERT(is_pae(vcpu));
2239 context->new_cr3 = paging_new_cr3;
2240 context->page_fault = paging64_page_fault;
6aa8b732 2241 context->gva_to_gpa = paging64_gva_to_gpa;
c7addb90 2242 context->prefetch_page = paging64_prefetch_page;
e8bc217a 2243 context->sync_page = paging64_sync_page;
a7052897 2244 context->invlpg = paging64_invlpg;
6aa8b732 2245 context->free = paging_free;
17ac10ad
AK		 2246 context->root_level = level;
2247 context->shadow_root_level = level;
17c3ba9d 2248 context->root_hpa = INVALID_PAGE;
6aa8b732
AK		 2249 return 0;
2250}
2251
17ac10ad
AK		 2252static int paging64_init_context(struct kvm_vcpu *vcpu)
2253{
82725b20 2254 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
17ac10ad
AK		 2255 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2256}
2257
6aa8b732
AK		 2258static int paging32_init_context(struct kvm_vcpu *vcpu)
2259{
ad312c7c 2260 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732 2261
82725b20 2262 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
6aa8b732
AK		 2263 context->new_cr3 = paging_new_cr3;
2264 context->page_fault = paging32_page_fault;
6aa8b732
AK		 2265 context->gva_to_gpa = paging32_gva_to_gpa;
2266 context->free = paging_free;
c7addb90 2267 context->prefetch_page = paging32_prefetch_page;
e8bc217a 2268 context->sync_page = paging32_sync_page;
a7052897 2269 context->invlpg = paging32_invlpg;
6aa8b732
AK		 2270 context->root_level = PT32_ROOT_LEVEL;
2271 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 2272 context->root_hpa = INVALID_PAGE;
6aa8b732
AK		 2273 return 0;
2274}
2275
2276static int paging32E_init_context(struct kvm_vcpu *vcpu)
2277{
82725b20 2278 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
17ac10ad 2279 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
6aa8b732
AK		 2280}
2281
fb72d167
JR		 2282static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2283{
2284 struct kvm_mmu *context = &vcpu->arch.mmu;
2285
2286 context->new_cr3 = nonpaging_new_cr3;
2287 context->page_fault = tdp_page_fault;
2288 context->free = nonpaging_free;
2289 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 2290 context->sync_page = nonpaging_sync_page;
a7052897 2291 context->invlpg = nonpaging_invlpg;
67253af5 2292 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
fb72d167
JR		 2293 context->root_hpa = INVALID_PAGE;
2294
2295 if (!is_paging(vcpu)) {
2296 context->gva_to_gpa = nonpaging_gva_to_gpa;
2297 context->root_level = 0;
2298 } else if (is_long_mode(vcpu)) {
82725b20 2299 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
fb72d167
JR		 2300 context->gva_to_gpa = paging64_gva_to_gpa;
2301 context->root_level = PT64_ROOT_LEVEL;
2302 } else if (is_pae(vcpu)) {
82725b20 2303 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
fb72d167
JR		 2304 context->gva_to_gpa = paging64_gva_to_gpa;
2305 context->root_level = PT32E_ROOT_LEVEL;
2306 } else {
82725b20 2307 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
fb72d167
JR		 2308 context->gva_to_gpa = paging32_gva_to_gpa;
2309 context->root_level = PT32_ROOT_LEVEL;
2310 }
2311
2312 return 0;
2313}
2314
2315static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
6aa8b732 2316{
a770f6f2
AK		 2317 int r;
2318
6aa8b732 2319 ASSERT(vcpu);
ad312c7c 2320 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732
AK		 2321
2322 if (!is_paging(vcpu))
a770f6f2 2323 r = nonpaging_init_context(vcpu);
a9058ecd 2324 else if (is_long_mode(vcpu))
a770f6f2 2325 r = paging64_init_context(vcpu);
6aa8b732 2326 else if (is_pae(vcpu))
a770f6f2 2327 r = paging32E_init_context(vcpu);
6aa8b732 2328 else
a770f6f2
AK		 2329 r = paging32_init_context(vcpu);
2330
2331 vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
2332
2333 return r;
6aa8b732
AK		 2334}
2335
fb72d167
JR		 2336static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2337{
35149e21
AL		 2338 vcpu->arch.update_pte.pfn = bad_pfn;
2339
fb72d167
JR		 2340 if (tdp_enabled)
2341 return init_kvm_tdp_mmu(vcpu);
2342 else
2343 return init_kvm_softmmu(vcpu);
2344}
2345
6aa8b732
AK		 2346static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2347{
2348 ASSERT(vcpu);
ad312c7c
ZX		 2349 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2350 vcpu->arch.mmu.free(vcpu);
2351 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6aa8b732
AK		 2352 }
2353}
2354
2355int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
17c3ba9d
AK		 2356{
2357 destroy_kvm_mmu(vcpu);
2358 return init_kvm_mmu(vcpu);
2359}
8668a3c4 2360EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
17c3ba9d
AK		 2361
2362int kvm_mmu_load(struct kvm_vcpu *vcpu)
6aa8b732 2363{
714b93da
AK		 2364 int r;
2365
e2dec939 2366 r = mmu_topup_memory_caches(vcpu);
17c3ba9d
AK		 2367 if (r)
2368 goto out;
aaee2c94 2369 spin_lock(&vcpu->kvm->mmu_lock);
eb787d10 2370 kvm_mmu_free_some_pages(vcpu);
8986ecc0 2371 r = mmu_alloc_roots(vcpu);
0ba73cda 2372 mmu_sync_roots(vcpu);
aaee2c94 2373 spin_unlock(&vcpu->kvm->mmu_lock);
8986ecc0
MT		 2374 if (r)
2375 goto out;
ad312c7c 2376 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
17c3ba9d 2377 kvm_mmu_flush_tlb(vcpu);
714b93da
AK		 2378out:
2379 return r;
6aa8b732 2380}
17c3ba9d
AK		 2381EXPORT_SYMBOL_GPL(kvm_mmu_load);
2382
2383void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2384{
2385 mmu_free_roots(vcpu);
2386}
6aa8b732 2387
09072daf 2388static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
4db35314 2389 struct kvm_mmu_page *sp,
ac1b714e
AK		 2390 u64 *spte)
2391{
2392 u64 pte;
2393 struct kvm_mmu_page *child;
2394
2395 pte = *spte;
c7addb90 2396 if (is_shadow_present_pte(pte)) {
776e6633 2397 if (is_last_spte(pte, sp->role.level))
290fc38d 2398 rmap_remove(vcpu->kvm, spte);
ac1b714e
AK		 2399 else {
2400 child = page_header(pte & PT64_BASE_ADDR_MASK);
90cb0529 2401 mmu_page_remove_parent_pte(child, spte);
ac1b714e
AK		 2402 }
2403 }
d555c333 2404 __set_spte(spte, shadow_trap_nonpresent_pte);
05da4558
MT		 2405 if (is_large_pte(pte))
2406 --vcpu->kvm->stat.lpages;
ac1b714e
AK		 2407}
2408
0028425f 2409static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
4db35314 2410 struct kvm_mmu_page *sp,
0028425f 2411 u64 *spte,
489f1d65 2412 const void *new)
0028425f 2413{
30945387
MT		 2414 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2415 if (!vcpu->arch.update_pte.largepage ||
2416 sp->role.glevels == PT32_ROOT_LEVEL) {
2417 ++vcpu->kvm->stat.mmu_pde_zapped;
2418 return;
2419 }
2420 }
0028425f 2421
4cee5764 2422 ++vcpu->kvm->stat.mmu_pte_updated;
4db35314 2423 if (sp->role.glevels == PT32_ROOT_LEVEL)
489f1d65 2424 paging32_update_pte(vcpu, sp, spte, new);
0028425f 2425 else
489f1d65 2426 paging64_update_pte(vcpu, sp, spte, new);
0028425f
AK		 2427}
2428
79539cec
AK		 2429static bool need_remote_flush(u64 old, u64 new)
2430{
2431 if (!is_shadow_present_pte(old))
2432 return false;
2433 if (!is_shadow_present_pte(new))
2434 return true;
2435 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2436 return true;
2437 old ^= PT64_NX_MASK;
2438 new ^= PT64_NX_MASK;
2439 return (old & ~new & PT64_PERM_MASK) != 0;
2440}
2441
2442static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2443{
2444 if (need_remote_flush(old, new))
2445 kvm_flush_remote_tlbs(vcpu->kvm);
2446 else
2447 kvm_mmu_flush_tlb(vcpu);
2448}
2449
12b7d28f
AK		 2450static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2451{
ad312c7c 2452 u64 *spte = vcpu->arch.last_pte_updated;
12b7d28f 2453
7b52345e 2454 return !!(spte && (*spte & shadow_accessed_mask));
12b7d28f
AK		 2455}
2456
d7824fff
AK		 2457static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2458 const u8 *new, int bytes)
2459{
2460 gfn_t gfn;
2461 int r;
2462 u64 gpte = 0;
35149e21 2463 pfn_t pfn;
d7824fff 2464
05da4558
MT		 2465 vcpu->arch.update_pte.largepage = 0;
2466
d7824fff
AK		 2467 if (bytes != 4 && bytes != 8)
2468 return;
2469
2470 /*
2471 * Assume that the pte write on a page table of the same type
2472 * as the current vcpu paging mode. This is nearly always true
2473 * (might be false while changing modes). Note it is verified later
2474 * by update_pte().
2475 */
2476 if (is_pae(vcpu)) {
2477 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2478 if ((bytes == 4) && (gpa % 4 == 0)) {
2479 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2480 if (r)
2481 return;
2482 memcpy((void *)&gpte + (gpa % 8), new, 4);
2483 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2484 memcpy((void *)&gpte, new, 8);
2485 }
2486 } else {
2487 if ((bytes == 4) && (gpa % 4 == 0))
2488 memcpy((void *)&gpte, new, 4);
2489 }
43a3795a 2490 if (!is_present_gpte(gpte))
d7824fff
AK		 2491 return;
2492 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
72dc67a6 2493
05da4558 2494 if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
ec04b260 2495 gfn &= ~(KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL) - 1);
05da4558
MT		 2496 vcpu->arch.update_pte.largepage = 1;
2497 }
e930bffe 2498 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 2499 smp_rmb();
35149e21 2500 pfn = gfn_to_pfn(vcpu->kvm, gfn);
72dc67a6 2501
35149e21
AL		 2502 if (is_error_pfn(pfn)) {
2503 kvm_release_pfn_clean(pfn);
d196e343
AK		 2504 return;
2505 }
d7824fff 2506 vcpu->arch.update_pte.gfn = gfn;
35149e21 2507 vcpu->arch.update_pte.pfn = pfn;
d7824fff
AK		 2508}
2509
1b7fcd32
AK		 2510static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2511{
2512 u64 *spte = vcpu->arch.last_pte_updated;
2513
2514 if (spte
2515 && vcpu->arch.last_pte_gfn == gfn
2516 && shadow_accessed_mask
2517 && !(*spte & shadow_accessed_mask)
2518 && is_shadow_present_pte(*spte))
2519 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2520}
2521
09072daf 2522void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
ad218f85
MT		 2523 const u8 *new, int bytes,
2524 bool guest_initiated)
da4a00f0 2525{
9b7a0325 2526 gfn_t gfn = gpa >> PAGE_SHIFT;
4db35314 2527 struct kvm_mmu_page *sp;
0e7bc4b9 2528 struct hlist_node *node, *n;
9b7a0325
AK		 2529 struct hlist_head *bucket;
2530 unsigned index;
489f1d65 2531 u64 entry, gentry;
9b7a0325 2532 u64 *spte;
9b7a0325 2533 unsigned offset = offset_in_page(gpa);
0e7bc4b9 2534 unsigned pte_size;
9b7a0325 2535 unsigned page_offset;
0e7bc4b9 2536 unsigned misaligned;
fce0657f 2537 unsigned quadrant;
9b7a0325 2538 int level;
86a5ba02 2539 int flooded = 0;
ac1b714e 2540 int npte;
489f1d65 2541 int r;
9b7a0325 2542
b8688d51 2543 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
d7824fff 2544 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
aaee2c94 2545 spin_lock(&vcpu->kvm->mmu_lock);
1b7fcd32 2546 kvm_mmu_access_page(vcpu, gfn);
eb787d10 2547 kvm_mmu_free_some_pages(vcpu);
4cee5764 2548 ++vcpu->kvm->stat.mmu_pte_write;
c7addb90 2549 kvm_mmu_audit(vcpu, "pre pte write");
ad218f85
MT		 2550 if (guest_initiated) {
2551 if (gfn == vcpu->arch.last_pt_write_gfn
2552 && !last_updated_pte_accessed(vcpu)) {
2553 ++vcpu->arch.last_pt_write_count;
2554 if (vcpu->arch.last_pt_write_count >= 3)
2555 flooded = 1;
2556 } else {
2557 vcpu->arch.last_pt_write_gfn = gfn;
2558 vcpu->arch.last_pt_write_count = 1;
2559 vcpu->arch.last_pte_updated = NULL;
2560 }
86a5ba02 2561 }
1ae0a13d 2562 index = kvm_page_table_hashfn(gfn);
f05e70ac 2563 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4db35314 2564 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
f6e2c02b 2565 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
9b7a0325 2566 continue;
4db35314 2567 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
0e7bc4b9 2568 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
e925c5ba 2569 misaligned |= bytes < 4;
86a5ba02 2570 if (misaligned || flooded) {
0e7bc4b9
AK		 2571 /*
2572 * Misaligned accesses are too much trouble to fix
2573 * up; also, they usually indicate a page is not used
2574 * as a page table.
86a5ba02
AK		 2575 *
2576 * If we're seeing too many writes to a page,
2577 * it may no longer be a page table, or we may be
2578 * forking, in which case it is better to unmap the
2579 * page.
0e7bc4b9
AK		 2580 */
2581 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
4db35314 2582 gpa, bytes, sp->role.word);
07385413
MT		 2583 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2584 n = bucket->first;
4cee5764 2585 ++vcpu->kvm->stat.mmu_flooded;
0e7bc4b9
AK		 2586 continue;
2587 }
9b7a0325 2588 page_offset = offset;
4db35314 2589 level = sp->role.level;
ac1b714e 2590 npte = 1;
4db35314 2591 if (sp->role.glevels == PT32_ROOT_LEVEL) {
ac1b714e
AK		 2592 page_offset <<= 1; /* 32->64 */
2593 /*
2594 * A 32-bit pde maps 4MB while the shadow pdes map
2595 * only 2MB. So we need to double the offset again
2596 * and zap two pdes instead of one.
2597 */
2598 if (level == PT32_ROOT_LEVEL) {
6b8d0f9b 2599 page_offset &= ~7; /* kill rounding error */
ac1b714e
AK		 2600 page_offset <<= 1;
2601 npte = 2;
2602 }
fce0657f 2603 quadrant = page_offset >> PAGE_SHIFT;
9b7a0325 2604 page_offset &= ~PAGE_MASK;
4db35314 2605 if (quadrant != sp->role.quadrant)
fce0657f 2606 continue;
9b7a0325 2607 }
4db35314 2608 spte = &sp->spt[page_offset / sizeof(*spte)];
489f1d65
DE		 2609 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2610 gentry = 0;
2611 r = kvm_read_guest_atomic(vcpu->kvm,
2612 gpa & ~(u64)(pte_size - 1),
2613 &gentry, pte_size);
2614 new = (const void *)&gentry;
2615 if (r < 0)
2616 new = NULL;
2617 }
ac1b714e 2618 while (npte--) {
79539cec 2619 entry = *spte;
4db35314 2620 mmu_pte_write_zap_pte(vcpu, sp, spte);
489f1d65
DE		 2621 if (new)
2622 mmu_pte_write_new_pte(vcpu, sp, spte, new);
79539cec 2623 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
ac1b714e 2624 ++spte;
9b7a0325 2625 }
9b7a0325 2626 }
c7addb90 2627 kvm_mmu_audit(vcpu, "post pte write");
aaee2c94 2628 spin_unlock(&vcpu->kvm->mmu_lock);
35149e21
AL		 2629 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2630 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2631 vcpu->arch.update_pte.pfn = bad_pfn;
d7824fff 2632 }
da4a00f0
AK		 2633}
2634
a436036b
AK		 2635int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2636{
10589a46
MT		 2637 gpa_t gpa;
2638 int r;
a436036b 2639
10589a46 2640 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
10589a46 2641
aaee2c94 2642 spin_lock(&vcpu->kvm->mmu_lock);
10589a46 2643 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
aaee2c94 2644 spin_unlock(&vcpu->kvm->mmu_lock);
10589a46 2645 return r;
a436036b 2646}
577bdc49 2647EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
a436036b 2648
22d95b12 2649void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
ebeace86 2650{
f05e70ac 2651 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
4db35314 2652 struct kvm_mmu_page *sp;
ebeace86 2653
f05e70ac 2654 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
4db35314
AK		 2655 struct kvm_mmu_page, link);
2656 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 2657 ++vcpu->kvm->stat.mmu_recycled;
ebeace86
AK		 2658 }
2659}
ebeace86 2660
3067714c
AK		 2661int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2662{
2663 int r;
2664 enum emulation_result er;
2665
ad312c7c 2666 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
3067714c
AK		 2667 if (r < 0)
2668 goto out;
2669
2670 if (!r) {
2671 r = 1;
2672 goto out;
2673 }
2674
b733bfb5
AK		 2675 r = mmu_topup_memory_caches(vcpu);
2676 if (r)
2677 goto out;
2678
3067714c 2679 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
3067714c
AK		 2680
2681 switch (er) {
2682 case EMULATE_DONE:
2683 return 1;
2684 case EMULATE_DO_MMIO:
2685 ++vcpu->stat.mmio_exits;
2686 return 0;
2687 case EMULATE_FAIL:
3f5d18a9
AK		 2688 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
2689 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
2690 return 0;
3067714c
AK		 2691 default:
2692 BUG();
2693 }
2694out:
3067714c
AK		 2695 return r;
2696}
2697EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2698
a7052897
MT		 2699void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2700{
a7052897 2701 vcpu->arch.mmu.invlpg(vcpu, gva);
a7052897
MT		 2702 kvm_mmu_flush_tlb(vcpu);
2703 ++vcpu->stat.invlpg;
2704}
2705EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2706
18552672
JR		 2707void kvm_enable_tdp(void)
2708{
2709 tdp_enabled = true;
2710}
2711EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2712
5f4cb662
JR		 2713void kvm_disable_tdp(void)
2714{
2715 tdp_enabled = false;
2716}
2717EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2718
6aa8b732
AK		 2719static void free_mmu_pages(struct kvm_vcpu *vcpu)
2720{
ad312c7c 2721 free_page((unsigned long)vcpu->arch.mmu.pae_root);
6aa8b732
AK		 2722}
2723
2724static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2725{
17ac10ad 2726 struct page *page;
6aa8b732
AK		 2727 int i;
2728
2729 ASSERT(vcpu);
2730
f05e70ac
ZX		 2731 if (vcpu->kvm->arch.n_requested_mmu_pages)
2732 vcpu->kvm->arch.n_free_mmu_pages =
2733 vcpu->kvm->arch.n_requested_mmu_pages;
82ce2c96 2734 else
f05e70ac
ZX		 2735 vcpu->kvm->arch.n_free_mmu_pages =
2736 vcpu->kvm->arch.n_alloc_mmu_pages;
17ac10ad
AK		 2737 /*
2738 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2739 * Therefore we need to allocate shadow page tables in the first
2740 * 4GB of memory, which happens to fit the DMA32 zone.
2741 */
2742 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2743 if (!page)
2744 goto error_1;
ad312c7c 2745 vcpu->arch.mmu.pae_root = page_address(page);
17ac10ad 2746 for (i = 0; i < 4; ++i)
ad312c7c 2747 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 2748
6aa8b732
AK		 2749 return 0;
2750
2751error_1:
2752 free_mmu_pages(vcpu);
2753 return -ENOMEM;
2754}
2755
8018c27b 2756int kvm_mmu_create(struct kvm_vcpu *vcpu)
6aa8b732 2757{
6aa8b732 2758 ASSERT(vcpu);
ad312c7c 2759 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 2760
8018c27b
IM		 2761 return alloc_mmu_pages(vcpu);
2762}
6aa8b732 2763
8018c27b
IM		 2764int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2765{
2766 ASSERT(vcpu);
ad312c7c 2767 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2c264957 2768
8018c27b 2769 return init_kvm_mmu(vcpu);
6aa8b732
AK		 2770}
2771
2772void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2773{
2774 ASSERT(vcpu);
2775
2776 destroy_kvm_mmu(vcpu);
2777 free_mmu_pages(vcpu);
714b93da 2778 mmu_free_memory_caches(vcpu);
6aa8b732
AK		 2779}
2780
90cb0529 2781void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
6aa8b732 2782{
4db35314 2783 struct kvm_mmu_page *sp;
6aa8b732 2784
f05e70ac 2785 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
6aa8b732
AK		 2786 int i;
2787 u64 *pt;
2788
291f26bc 2789 if (!test_bit(slot, sp->slot_bitmap))
6aa8b732
AK		 2790 continue;
2791
4db35314 2792 pt = sp->spt;
6aa8b732
AK		 2793 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2794 /* avoid RMW */
9647c14c 2795 if (pt[i] & PT_WRITABLE_MASK)
6aa8b732 2796 pt[i] &= ~PT_WRITABLE_MASK;
6aa8b732 2797 }
171d595d 2798 kvm_flush_remote_tlbs(kvm);
6aa8b732 2799}
37a7d8b0 2800
90cb0529 2801void kvm_mmu_zap_all(struct kvm *kvm)
e0fa826f 2802{
4db35314 2803 struct kvm_mmu_page *sp, *node;
e0fa826f 2804
aaee2c94 2805 spin_lock(&kvm->mmu_lock);
f05e70ac 2806 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
07385413
MT		 2807 if (kvm_mmu_zap_page(kvm, sp))
2808 node = container_of(kvm->arch.active_mmu_pages.next,
2809 struct kvm_mmu_page, link);
aaee2c94 2810 spin_unlock(&kvm->mmu_lock);
e0fa826f 2811
90cb0529 2812 kvm_flush_remote_tlbs(kvm);
e0fa826f
DL		 2813}
2814
8b2cf73c 2815static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
3ee16c81
IE		 2816{
2817 struct kvm_mmu_page *page;
2818
2819 page = container_of(kvm->arch.active_mmu_pages.prev,
2820 struct kvm_mmu_page, link);
2821 kvm_mmu_zap_page(kvm, page);
2822}
2823
2824static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2825{
2826 struct kvm *kvm;
2827 struct kvm *kvm_freed = NULL;
2828 int cache_count = 0;
2829
2830 spin_lock(&kvm_lock);
2831
2832 list_for_each_entry(kvm, &vm_list, vm_list) {
2833 int npages;
2834
5a4c9288
MT		 2835 if (!down_read_trylock(&kvm->slots_lock))
2836 continue;
3ee16c81
IE		 2837 spin_lock(&kvm->mmu_lock);
2838 npages = kvm->arch.n_alloc_mmu_pages -
2839 kvm->arch.n_free_mmu_pages;
2840 cache_count += npages;
2841 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2842 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2843 cache_count--;
2844 kvm_freed = kvm;
2845 }
2846 nr_to_scan--;
2847
2848 spin_unlock(&kvm->mmu_lock);
5a4c9288 2849 up_read(&kvm->slots_lock);
3ee16c81
IE		 2850 }
2851 if (kvm_freed)
2852 list_move_tail(&kvm_freed->vm_list, &vm_list);
2853
2854 spin_unlock(&kvm_lock);
2855
2856 return cache_count;
2857}
2858
2859static struct shrinker mmu_shrinker = {
2860 .shrink = mmu_shrink,
2861 .seeks = DEFAULT_SEEKS * 10,
2862};
2863
2ddfd20e 2864static void mmu_destroy_caches(void)
b5a33a75
AK		 2865{
2866 if (pte_chain_cache)
2867 kmem_cache_destroy(pte_chain_cache);
2868 if (rmap_desc_cache)
2869 kmem_cache_destroy(rmap_desc_cache);
d3d25b04
AK		 2870 if (mmu_page_header_cache)
2871 kmem_cache_destroy(mmu_page_header_cache);
b5a33a75
AK		 2872}
2873
3ee16c81
IE		 2874void kvm_mmu_module_exit(void)
2875{
2876 mmu_destroy_caches();
2877 unregister_shrinker(&mmu_shrinker);
2878}
2879
b5a33a75
AK		 2880int kvm_mmu_module_init(void)
2881{
2882 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2883 sizeof(struct kvm_pte_chain),
20c2df83 2884 0, 0, NULL);
b5a33a75
AK		 2885 if (!pte_chain_cache)
2886 goto nomem;
2887 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2888 sizeof(struct kvm_rmap_desc),
20c2df83 2889 0, 0, NULL);
b5a33a75
AK		 2890 if (!rmap_desc_cache)
2891 goto nomem;
2892
d3d25b04
AK		 2893 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2894 sizeof(struct kvm_mmu_page),
20c2df83 2895 0, 0, NULL);
d3d25b04
AK		 2896 if (!mmu_page_header_cache)
2897 goto nomem;
2898
3ee16c81
IE		 2899 register_shrinker(&mmu_shrinker);
2900
b5a33a75
AK		 2901 return 0;
2902
2903nomem:
3ee16c81 2904 mmu_destroy_caches();
b5a33a75
AK		 2905 return -ENOMEM;
2906}
2907
3ad82a7e
ZX		 2908/*
2909 * Caculate mmu pages needed for kvm.
2910 */
2911unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
2912{
2913 int i;
2914 unsigned int nr_mmu_pages;
2915 unsigned int nr_pages = 0;
2916
2917 for (i = 0; i < kvm->nmemslots; i++)
2918 nr_pages += kvm->memslots[i].npages;
2919
2920 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
2921 nr_mmu_pages = max(nr_mmu_pages,
2922 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
2923
2924 return nr_mmu_pages;
2925}
2926
2f333bcb
MT		 2927static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2928 unsigned len)
2929{
2930 if (len > buffer->len)
2931 return NULL;
2932 return buffer->ptr;
2933}
2934
2935static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2936 unsigned len)
2937{
2938 void *ret;
2939
2940 ret = pv_mmu_peek_buffer(buffer, len);
2941 if (!ret)
2942 return ret;
2943 buffer->ptr += len;
2944 buffer->len -= len;
2945 buffer->processed += len;
2946 return ret;
2947}
2948
2949static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
2950 gpa_t addr, gpa_t value)
2951{
2952 int bytes = 8;
2953 int r;
2954
2955 if (!is_long_mode(vcpu) && !is_pae(vcpu))
2956 bytes = 4;
2957
2958 r = mmu_topup_memory_caches(vcpu);
2959 if (r)
2960 return r;
2961
3200f405 2962 if (!emulator_write_phys(vcpu, addr, &value, bytes))
2f333bcb
MT		 2963 return -EFAULT;
2964
2965 return 1;
2966}
2967
2968static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2969{
a8cd0244 2970 kvm_set_cr3(vcpu, vcpu->arch.cr3);
2f333bcb
MT		 2971 return 1;
2972}
2973
2974static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
2975{
2976 spin_lock(&vcpu->kvm->mmu_lock);
2977 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
2978 spin_unlock(&vcpu->kvm->mmu_lock);
2979 return 1;
2980}
2981
2982static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
2983 struct kvm_pv_mmu_op_buffer *buffer)
2984{
2985 struct kvm_mmu_op_header *header;
2986
2987 header = pv_mmu_peek_buffer(buffer, sizeof *header);
2988 if (!header)
2989 return 0;
2990 switch (header->op) {
2991 case KVM_MMU_OP_WRITE_PTE: {
2992 struct kvm_mmu_op_write_pte *wpte;
2993
2994 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
2995 if (!wpte)
2996 return 0;
2997 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
2998 wpte->pte_val);
2999 }
3000 case KVM_MMU_OP_FLUSH_TLB: {
3001 struct kvm_mmu_op_flush_tlb *ftlb;
3002
3003 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3004 if (!ftlb)
3005 return 0;
3006 return kvm_pv_mmu_flush_tlb(vcpu);
3007 }
3008 case KVM_MMU_OP_RELEASE_PT: {
3009 struct kvm_mmu_op_release_pt *rpt;
3010
3011 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3012 if (!rpt)
3013 return 0;
3014 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3015 }
3016 default: return 0;
3017 }
3018}
3019
3020int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3021 gpa_t addr, unsigned long *ret)
3022{
3023 int r;
6ad18fba 3024 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
2f333bcb 3025
6ad18fba
DH		 3026 buffer->ptr = buffer->buf;
3027 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3028 buffer->processed = 0;
2f333bcb 3029
6ad18fba 3030 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
2f333bcb
MT		 3031 if (r)
3032 goto out;
3033
6ad18fba
DH		 3034 while (buffer->len) {
3035 r = kvm_pv_mmu_op_one(vcpu, buffer);
2f333bcb
MT		 3036 if (r < 0)
3037 goto out;
3038 if (r == 0)
3039 break;
3040 }
3041
3042 r = 1;
3043out:
6ad18fba 3044 *ret = buffer->processed;
2f333bcb
MT		 3045 return r;
3046}
3047
94d8b056
MT		 3048int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3049{
3050 struct kvm_shadow_walk_iterator iterator;
3051 int nr_sptes = 0;
3052
3053 spin_lock(&vcpu->kvm->mmu_lock);
3054 for_each_shadow_entry(vcpu, addr, iterator) {
3055 sptes[iterator.level-1] = *iterator.sptep;
3056 nr_sptes++;
3057 if (!is_shadow_present_pte(*iterator.sptep))
3058 break;
3059 }
3060 spin_unlock(&vcpu->kvm->mmu_lock);
3061
3062 return nr_sptes;
3063}
3064EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3065
37a7d8b0
AK		 3066#ifdef AUDIT
3067
3068static const char *audit_msg;
3069
3070static gva_t canonicalize(gva_t gva)
3071{
3072#ifdef CONFIG_X86_64
3073 gva = (long long)(gva << 16) >> 16;
3074#endif
3075 return gva;
3076}
3077
08a3732b
MT		 3078
3079typedef void (*inspect_spte_fn) (struct kvm *kvm, struct kvm_mmu_page *sp,
3080 u64 *sptep);
3081
3082static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3083 inspect_spte_fn fn)
3084{
3085 int i;
3086
3087 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3088 u64 ent = sp->spt[i];
3089
3090 if (is_shadow_present_pte(ent)) {
2920d728 3091 if (!is_last_spte(ent, sp->role.level)) {
08a3732b
MT		 3092 struct kvm_mmu_page *child;
3093 child = page_header(ent & PT64_BASE_ADDR_MASK);
3094 __mmu_spte_walk(kvm, child, fn);
2920d728 3095 } else
08a3732b
MT		 3096 fn(kvm, sp, &sp->spt[i]);
3097 }
3098 }
3099}
3100
3101static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3102{
3103 int i;
3104 struct kvm_mmu_page *sp;
3105
3106 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3107 return;
3108 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3109 hpa_t root = vcpu->arch.mmu.root_hpa;
3110 sp = page_header(root);
3111 __mmu_spte_walk(vcpu->kvm, sp, fn);
3112 return;
3113 }
3114 for (i = 0; i < 4; ++i) {
3115 hpa_t root = vcpu->arch.mmu.pae_root[i];
3116
3117 if (root && VALID_PAGE(root)) {
3118 root &= PT64_BASE_ADDR_MASK;
3119 sp = page_header(root);
3120 __mmu_spte_walk(vcpu->kvm, sp, fn);
3121 }
3122 }
3123 return;
3124}
3125
37a7d8b0
AK		 3126static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3127 gva_t va, int level)
3128{
3129 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3130 int i;
3131 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3132
3133 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3134 u64 ent = pt[i];
3135
c7addb90 3136 if (ent == shadow_trap_nonpresent_pte)
37a7d8b0
AK		 3137 continue;
3138
3139 va = canonicalize(va);
2920d728
MT		 3140 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3141 audit_mappings_page(vcpu, ent, va, level - 1);
3142 else {
ad312c7c 3143 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
34382539
JK		 3144 gfn_t gfn = gpa >> PAGE_SHIFT;
3145 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3146 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
37a7d8b0 3147
2aaf65e8
MT		 3148 if (is_error_pfn(pfn)) {
3149 kvm_release_pfn_clean(pfn);
3150 continue;
3151 }
3152
c7addb90 3153 if (is_shadow_present_pte(ent)
37a7d8b0 3154 && (ent & PT64_BASE_ADDR_MASK) != hpa)
c7addb90
AK		 3155 printk(KERN_ERR "xx audit error: (%s) levels %d"
3156 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
ad312c7c 3157 audit_msg, vcpu->arch.mmu.root_level,
d77c26fc
MD		 3158 va, gpa, hpa, ent,
3159 is_shadow_present_pte(ent));
c7addb90
AK		 3160 else if (ent == shadow_notrap_nonpresent_pte
3161 && !is_error_hpa(hpa))
3162 printk(KERN_ERR "audit: (%s) notrap shadow,"
3163 " valid guest gva %lx\n", audit_msg, va);
35149e21 3164 kvm_release_pfn_clean(pfn);
c7addb90 3165
37a7d8b0
AK		 3166 }
3167 }
3168}
3169
3170static void audit_mappings(struct kvm_vcpu *vcpu)
3171{
1ea252af 3172 unsigned i;
37a7d8b0 3173
ad312c7c
ZX		 3174 if (vcpu->arch.mmu.root_level == 4)
3175 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
37a7d8b0
AK		 3176 else
3177 for (i = 0; i < 4; ++i)
ad312c7c 3178 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
37a7d8b0 3179 audit_mappings_page(vcpu,
ad312c7c 3180 vcpu->arch.mmu.pae_root[i],
37a7d8b0
AK		 3181 i << 30,
3182 2);
3183}
3184
3185static int count_rmaps(struct kvm_vcpu *vcpu)
3186{
3187 int nmaps = 0;
3188 int i, j, k;
3189
3190 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3191 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
3192 struct kvm_rmap_desc *d;
3193
3194 for (j = 0; j < m->npages; ++j) {
290fc38d 3195 unsigned long *rmapp = &m->rmap[j];
37a7d8b0 3196
290fc38d 3197 if (!*rmapp)
37a7d8b0 3198 continue;
290fc38d 3199 if (!(*rmapp & 1)) {
37a7d8b0
AK		 3200 ++nmaps;
3201 continue;
3202 }
290fc38d 3203 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
37a7d8b0
AK		 3204 while (d) {
3205 for (k = 0; k < RMAP_EXT; ++k)
d555c333 3206 if (d->sptes[k])
37a7d8b0
AK		 3207 ++nmaps;
3208 else
3209 break;
3210 d = d->more;
3211 }
3212 }
3213 }
3214 return nmaps;
3215}
3216
08a3732b
MT		 3217void inspect_spte_has_rmap(struct kvm *kvm, struct kvm_mmu_page *sp, u64 *sptep)
3218{
3219 unsigned long *rmapp;
3220 struct kvm_mmu_page *rev_sp;
3221 gfn_t gfn;
3222
3223 if (*sptep & PT_WRITABLE_MASK) {
3224 rev_sp = page_header(__pa(sptep));
3225 gfn = rev_sp->gfns[sptep - rev_sp->spt];
3226
3227 if (!gfn_to_memslot(kvm, gfn)) {
3228 if (!printk_ratelimit())
3229 return;
3230 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3231 audit_msg, gfn);
3232 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3233 audit_msg, sptep - rev_sp->spt,
3234 rev_sp->gfn);
3235 dump_stack();
3236 return;
3237 }
3238
2920d728
MT		 3239 rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
3240 is_large_pte(*sptep));
08a3732b
MT		 3241 if (!*rmapp) {
3242 if (!printk_ratelimit())
3243 return;
3244 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3245 audit_msg, *sptep);
3246 dump_stack();
3247 }
3248 }
3249
3250}
3251
3252void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3253{
3254 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3255}
3256
3257static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
37a7d8b0 3258{
4db35314 3259 struct kvm_mmu_page *sp;
37a7d8b0
AK		 3260 int i;
3261
f05e70ac 3262 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 3263 u64 *pt = sp->spt;
37a7d8b0 3264
4db35314 3265 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
37a7d8b0
AK		 3266 continue;
3267
3268 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3269 u64 ent = pt[i];
3270
3271 if (!(ent & PT_PRESENT_MASK))
3272 continue;
3273 if (!(ent & PT_WRITABLE_MASK))
3274 continue;
08a3732b 3275 inspect_spte_has_rmap(vcpu->kvm, sp, &pt[i]);
37a7d8b0
AK		 3276 }
3277 }
08a3732b 3278 return;
37a7d8b0
AK		 3279}
3280
3281static void audit_rmap(struct kvm_vcpu *vcpu)
3282{
08a3732b
MT		 3283 check_writable_mappings_rmap(vcpu);
3284 count_rmaps(vcpu);
37a7d8b0
AK		 3285}
3286
3287static void audit_write_protection(struct kvm_vcpu *vcpu)
3288{
4db35314 3289 struct kvm_mmu_page *sp;
290fc38d
IE		 3290 struct kvm_memory_slot *slot;
3291 unsigned long *rmapp;
e58b0f9e 3292 u64 *spte;
290fc38d 3293 gfn_t gfn;
37a7d8b0 3294
f05e70ac 3295 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
f6e2c02b 3296 if (sp->role.direct)
37a7d8b0 3297 continue;
e58b0f9e
MT		 3298 if (sp->unsync)
3299 continue;
37a7d8b0 3300
4db35314 3301 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
2843099f 3302 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
290fc38d 3303 rmapp = &slot->rmap[gfn - slot->base_gfn];
e58b0f9e
MT		 3304
3305 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3306 while (spte) {
3307 if (*spte & PT_WRITABLE_MASK)
3308 printk(KERN_ERR "%s: (%s) shadow page has "
3309 "writable mappings: gfn %lx role %x\n",
b8688d51 3310 __func__, audit_msg, sp->gfn,
4db35314 3311 sp->role.word);
e58b0f9e
MT		 3312 spte = rmap_next(vcpu->kvm, rmapp, spte);
3313 }
37a7d8b0
AK		 3314 }
3315}
3316
3317static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3318{
3319 int olddbg = dbg;
3320
3321 dbg = 0;
3322 audit_msg = msg;
3323 audit_rmap(vcpu);
3324 audit_write_protection(vcpu);
2aaf65e8
MT		 3325 if (strcmp("pre pte write", audit_msg) != 0)
3326 audit_mappings(vcpu);
08a3732b 3327 audit_writable_sptes_have_rmaps(vcpu);
37a7d8b0
AK		 3328 dbg = olddbg;
3329}
3330
3331#endif
Linux kernel - Deliverables
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