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KVM: x86 emulator: Add Virtual-8086 mode of emulation
[deliverable/linux.git] / arch / x86 / kvm / mmu.c
CommitLineData
6aa8b732
AK		 1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
e495606d 19
1d737c8a 20#include "mmu.h"
836a1b3c 21#include "x86.h"
6de4f3ad 22#include "kvm_cache_regs.h"
e495606d 23
edf88417 24#include <linux/kvm_host.h>
6aa8b732
AK		 25#include <linux/types.h>
26#include <linux/string.h>
6aa8b732
AK		 27#include <linux/mm.h>
28#include <linux/highmem.h>
29#include <linux/module.h>
448353ca 30#include <linux/swap.h>
05da4558 31#include <linux/hugetlb.h>
2f333bcb 32#include <linux/compiler.h>
bc6678a3 33#include <linux/srcu.h>
6aa8b732 34
e495606d
AK		 35#include <asm/page.h>
36#include <asm/cmpxchg.h>
4e542370 37#include <asm/io.h>
13673a90 38#include <asm/vmx.h>
6aa8b732 39
18552672
JR		 40/*
41 * When setting this variable to true it enables Two-Dimensional-Paging
42 * where the hardware walks 2 page tables:
43 * 1. the guest-virtual to guest-physical
44 * 2. while doing 1. it walks guest-physical to host-physical
45 * If the hardware supports that we don't need to do shadow paging.
46 */
2f333bcb 47bool tdp_enabled = false;
18552672 48
37a7d8b0
AK		 49#undef MMU_DEBUG
50
51#undef AUDIT
52
53#ifdef AUDIT
54static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
55#else
56static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
57#endif
58
59#ifdef MMU_DEBUG
60
61#define pgprintk(x...) do { if (dbg) printk(x); } while (0)
62#define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
63
64#else
65
66#define pgprintk(x...) do { } while (0)
67#define rmap_printk(x...) do { } while (0)
68
69#endif
70
71#if defined(MMU_DEBUG) || defined(AUDIT)
6ada8cca
AK		 72static int dbg = 0;
73module_param(dbg, bool, 0644);
37a7d8b0 74#endif
6aa8b732 75
582801a9
MT		 76static int oos_shadow = 1;
77module_param(oos_shadow, bool, 0644);
78
d6c69ee9
YD		 79#ifndef MMU_DEBUG
80#define ASSERT(x) do { } while (0)
81#else
6aa8b732
AK		 82#define ASSERT(x) \
83 if (!(x)) { \
84 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
85 __FILE__, __LINE__, #x); \
86 }
d6c69ee9 87#endif
6aa8b732 88
6aa8b732
AK		 89#define PT_FIRST_AVAIL_BITS_SHIFT 9
90#define PT64_SECOND_AVAIL_BITS_SHIFT 52
91
6aa8b732
AK		 92#define VALID_PAGE(x) ((x) != INVALID_PAGE)
93
94#define PT64_LEVEL_BITS 9
95
96#define PT64_LEVEL_SHIFT(level) \
d77c26fc 97 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
6aa8b732
AK		 98
99#define PT64_LEVEL_MASK(level) \
100 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
101
102#define PT64_INDEX(address, level)\
103 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
104
105
106#define PT32_LEVEL_BITS 10
107
108#define PT32_LEVEL_SHIFT(level) \
d77c26fc 109 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
6aa8b732
AK		 110
111#define PT32_LEVEL_MASK(level) \
112 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
e04da980
JR		 113#define PT32_LVL_OFFSET_MASK(level) \
114 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
115 * PT32_LEVEL_BITS))) - 1))
6aa8b732
AK		 116
117#define PT32_INDEX(address, level)\
118 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
119
120
27aba766 121#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
6aa8b732
AK		 122#define PT64_DIR_BASE_ADDR_MASK \
123 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
e04da980
JR		 124#define PT64_LVL_ADDR_MASK(level) \
125 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
126 * PT64_LEVEL_BITS))) - 1))
127#define PT64_LVL_OFFSET_MASK(level) \
128 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
129 * PT64_LEVEL_BITS))) - 1))
6aa8b732
AK		 130
131#define PT32_BASE_ADDR_MASK PAGE_MASK
132#define PT32_DIR_BASE_ADDR_MASK \
133 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
e04da980
JR		 134#define PT32_LVL_ADDR_MASK(level) \
135 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
136 * PT32_LEVEL_BITS))) - 1))
6aa8b732 137
79539cec
AK		 138#define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
139 | PT64_NX_MASK)
6aa8b732
AK		 140
141#define PFERR_PRESENT_MASK (1U << 0)
142#define PFERR_WRITE_MASK (1U << 1)
143#define PFERR_USER_MASK (1U << 2)
82725b20 144#define PFERR_RSVD_MASK (1U << 3)
73b1087e 145#define PFERR_FETCH_MASK (1U << 4)
6aa8b732 146
cd4a4e53
AK		 147#define RMAP_EXT 4
148
fe135d2c
AK		 149#define ACC_EXEC_MASK 1
150#define ACC_WRITE_MASK PT_WRITABLE_MASK
151#define ACC_USER_MASK PT_USER_MASK
152#define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
153
90bb6fc5
AK		 154#include <trace/events/kvm.h>
155
156#undef TRACE_INCLUDE_FILE
07420171
AK		 157#define CREATE_TRACE_POINTS
158#include "mmutrace.h"
159
1403283a
IE		 160#define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
161
135f8c2b
AK		 162#define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
163
cd4a4e53 164struct kvm_rmap_desc {
d555c333 165 u64 *sptes[RMAP_EXT];
cd4a4e53
AK		 166 struct kvm_rmap_desc *more;
167};
168
2d11123a
AK		 169struct kvm_shadow_walk_iterator {
170 u64 addr;
171 hpa_t shadow_addr;
172 int level;
173 u64 *sptep;
174 unsigned index;
175};
176
177#define for_each_shadow_entry(_vcpu, _addr, _walker) \
178 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
179 shadow_walk_okay(&(_walker)); \
180 shadow_walk_next(&(_walker)))
181
182
4731d4c7
MT		 183struct kvm_unsync_walk {
184 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
185};
186
ad8cfbe3
MT		 187typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
188
b5a33a75
AK		 189static struct kmem_cache *pte_chain_cache;
190static struct kmem_cache *rmap_desc_cache;
d3d25b04 191static struct kmem_cache *mmu_page_header_cache;
b5a33a75 192
c7addb90
AK		 193static u64 __read_mostly shadow_trap_nonpresent_pte;
194static u64 __read_mostly shadow_notrap_nonpresent_pte;
7b52345e
SY		 195static u64 __read_mostly shadow_base_present_pte;
196static u64 __read_mostly shadow_nx_mask;
197static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
198static u64 __read_mostly shadow_user_mask;
199static u64 __read_mostly shadow_accessed_mask;
200static u64 __read_mostly shadow_dirty_mask;
c7addb90 201
82725b20
DE		 202static inline u64 rsvd_bits(int s, int e)
203{
204 return ((1ULL << (e - s + 1)) - 1) << s;
205}
206
c7addb90
AK		 207void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
208{
209 shadow_trap_nonpresent_pte = trap_pte;
210 shadow_notrap_nonpresent_pte = notrap_pte;
211}
212EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
213
7b52345e
SY		 214void kvm_mmu_set_base_ptes(u64 base_pte)
215{
216 shadow_base_present_pte = base_pte;
217}
218EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
219
220void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
4b12f0de 221 u64 dirty_mask, u64 nx_mask, u64 x_mask)
7b52345e
SY		 222{
223 shadow_user_mask = user_mask;
224 shadow_accessed_mask = accessed_mask;
225 shadow_dirty_mask = dirty_mask;
226 shadow_nx_mask = nx_mask;
227 shadow_x_mask = x_mask;
228}
229EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
230
6aa8b732
AK		 231static int is_write_protection(struct kvm_vcpu *vcpu)
232{
4d4ec087 233 return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
6aa8b732
AK		 234}
235
236static int is_cpuid_PSE36(void)
237{
238 return 1;
239}
240
73b1087e
AK		 241static int is_nx(struct kvm_vcpu *vcpu)
242{
f6801dff 243 return vcpu->arch.efer & EFER_NX;
73b1087e
AK		 244}
245
c7addb90
AK		 246static int is_shadow_present_pte(u64 pte)
247{
c7addb90
AK		 248 return pte != shadow_trap_nonpresent_pte
249 && pte != shadow_notrap_nonpresent_pte;
250}
251
05da4558
MT		 252static int is_large_pte(u64 pte)
253{
254 return pte & PT_PAGE_SIZE_MASK;
255}
256
8dae4445 257static int is_writable_pte(unsigned long pte)
6aa8b732
AK		 258{
259 return pte & PT_WRITABLE_MASK;
260}
261
43a3795a 262static int is_dirty_gpte(unsigned long pte)
e3c5e7ec 263{
439e218a 264 return pte & PT_DIRTY_MASK;
e3c5e7ec
AK		 265}
266
43a3795a 267static int is_rmap_spte(u64 pte)
cd4a4e53 268{
4b1a80fa 269 return is_shadow_present_pte(pte);
cd4a4e53
AK		 270}
271
776e6633
MT		 272static int is_last_spte(u64 pte, int level)
273{
274 if (level == PT_PAGE_TABLE_LEVEL)
275 return 1;
852e3c19 276 if (is_large_pte(pte))
776e6633
MT		 277 return 1;
278 return 0;
279}
280
35149e21 281static pfn_t spte_to_pfn(u64 pte)
0b49ea86 282{
35149e21 283 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
0b49ea86
AK		 284}
285
da928521
AK		 286static gfn_t pse36_gfn_delta(u32 gpte)
287{
288 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
289
290 return (gpte & PT32_DIR_PSE36_MASK) << shift;
291}
292
d555c333 293static void __set_spte(u64 *sptep, u64 spte)
e663ee64
AK		 294{
295#ifdef CONFIG_X86_64
296 set_64bit((unsigned long *)sptep, spte);
297#else
298 set_64bit((unsigned long long *)sptep, spte);
299#endif
300}
301
e2dec939 302static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
2e3e5882 303 struct kmem_cache *base_cache, int min)
714b93da
AK		 304{
305 void *obj;
306
307 if (cache->nobjs >= min)
e2dec939 308 return 0;
714b93da 309 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 310 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
714b93da 311 if (!obj)
e2dec939 312 return -ENOMEM;
714b93da
AK		 313 cache->objects[cache->nobjs++] = obj;
314 }
e2dec939 315 return 0;
714b93da
AK		 316}
317
318static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
319{
320 while (mc->nobjs)
321 kfree(mc->objects[--mc->nobjs]);
322}
323
c1158e63 324static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
2e3e5882 325 int min)
c1158e63
AK		 326{
327 struct page *page;
328
329 if (cache->nobjs >= min)
330 return 0;
331 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 332 page = alloc_page(GFP_KERNEL);
c1158e63
AK		 333 if (!page)
334 return -ENOMEM;
335 set_page_private(page, 0);
336 cache->objects[cache->nobjs++] = page_address(page);
337 }
338 return 0;
339}
340
341static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
342{
343 while (mc->nobjs)
c4d198d5 344 free_page((unsigned long)mc->objects[--mc->nobjs]);
c1158e63
AK		 345}
346
2e3e5882 347static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
714b93da 348{
e2dec939
AK		 349 int r;
350
ad312c7c 351 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
2e3e5882 352 pte_chain_cache, 4);
e2dec939
AK		 353 if (r)
354 goto out;
ad312c7c 355 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
c41ef344 356 rmap_desc_cache, 4);
d3d25b04
AK		 357 if (r)
358 goto out;
ad312c7c 359 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
d3d25b04
AK		 360 if (r)
361 goto out;
ad312c7c 362 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
2e3e5882 363 mmu_page_header_cache, 4);
e2dec939
AK		 364out:
365 return r;
714b93da
AK		 366}
367
368static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
369{
ad312c7c
ZX		 370 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
371 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
372 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
373 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
714b93da
AK		 374}
375
376static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
377 size_t size)
378{
379 void *p;
380
381 BUG_ON(!mc->nobjs);
382 p = mc->objects[--mc->nobjs];
714b93da
AK		 383 return p;
384}
385
714b93da
AK		 386static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
387{
ad312c7c 388 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
714b93da
AK		 389 sizeof(struct kvm_pte_chain));
390}
391
90cb0529 392static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
714b93da 393{
90cb0529 394 kfree(pc);
714b93da
AK		 395}
396
397static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
398{
ad312c7c 399 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
714b93da
AK		 400 sizeof(struct kvm_rmap_desc));
401}
402
90cb0529 403static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
714b93da 404{
90cb0529 405 kfree(rd);
714b93da
AK		 406}
407
05da4558
MT		 408/*
409 * Return the pointer to the largepage write count for a given
410 * gfn, handling slots that are not large page aligned.
411 */
d25797b2
JR		 412static int *slot_largepage_idx(gfn_t gfn,
413 struct kvm_memory_slot *slot,
414 int level)
05da4558
MT		 415{
416 unsigned long idx;
417
d25797b2
JR		 418 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
419 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
420 return &slot->lpage_info[level - 2][idx].write_count;
05da4558
MT		 421}
422
423static void account_shadowed(struct kvm *kvm, gfn_t gfn)
424{
d25797b2 425 struct kvm_memory_slot *slot;
05da4558 426 int *write_count;
d25797b2 427 int i;
05da4558 428
2843099f 429 gfn = unalias_gfn(kvm, gfn);
d25797b2
JR		 430
431 slot = gfn_to_memslot_unaliased(kvm, gfn);
432 for (i = PT_DIRECTORY_LEVEL;
433 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
434 write_count = slot_largepage_idx(gfn, slot, i);
435 *write_count += 1;
436 }
05da4558
MT		 437}
438
439static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
440{
d25797b2 441 struct kvm_memory_slot *slot;
05da4558 442 int *write_count;
d25797b2 443 int i;
05da4558 444
2843099f 445 gfn = unalias_gfn(kvm, gfn);
d25797b2
JR		 446 for (i = PT_DIRECTORY_LEVEL;
447 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
448 slot = gfn_to_memslot_unaliased(kvm, gfn);
449 write_count = slot_largepage_idx(gfn, slot, i);
450 *write_count -= 1;
451 WARN_ON(*write_count < 0);
452 }
05da4558
MT		 453}
454
d25797b2
JR		 455static int has_wrprotected_page(struct kvm *kvm,
456 gfn_t gfn,
457 int level)
05da4558 458{
2843099f 459 struct kvm_memory_slot *slot;
05da4558
MT		 460 int *largepage_idx;
461
2843099f
IE		 462 gfn = unalias_gfn(kvm, gfn);
463 slot = gfn_to_memslot_unaliased(kvm, gfn);
05da4558 464 if (slot) {
d25797b2 465 largepage_idx = slot_largepage_idx(gfn, slot, level);
05da4558
MT		 466 return *largepage_idx;
467 }
468
469 return 1;
470}
471
d25797b2 472static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
05da4558 473{
8f0b1ab6 474 unsigned long page_size;
d25797b2 475 int i, ret = 0;
05da4558 476
8f0b1ab6 477 page_size = kvm_host_page_size(kvm, gfn);
05da4558 478
d25797b2
JR		 479 for (i = PT_PAGE_TABLE_LEVEL;
480 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
481 if (page_size >= KVM_HPAGE_SIZE(i))
482 ret = i;
483 else
484 break;
485 }
486
4c2155ce 487 return ret;
05da4558
MT		 488}
489
d25797b2 490static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
05da4558
MT		 491{
492 struct kvm_memory_slot *slot;
878403b7 493 int host_level, level, max_level;
05da4558
MT		 494
495 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
496 if (slot && slot->dirty_bitmap)
d25797b2 497 return PT_PAGE_TABLE_LEVEL;
05da4558 498
d25797b2
JR		 499 host_level = host_mapping_level(vcpu->kvm, large_gfn);
500
501 if (host_level == PT_PAGE_TABLE_LEVEL)
502 return host_level;
503
878403b7
SY		 504 max_level = kvm_x86_ops->get_lpage_level() < host_level ?
505 kvm_x86_ops->get_lpage_level() : host_level;
506
507 for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
d25797b2
JR		 508 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
509 break;
d25797b2
JR		 510
511 return level - 1;
05da4558
MT		 512}
513
290fc38d
IE		 514/*
515 * Take gfn and return the reverse mapping to it.
516 * Note: gfn must be unaliased before this function get called
517 */
518
44ad9944 519static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
290fc38d
IE		 520{
521 struct kvm_memory_slot *slot;
05da4558 522 unsigned long idx;
290fc38d
IE		 523
524 slot = gfn_to_memslot(kvm, gfn);
44ad9944 525 if (likely(level == PT_PAGE_TABLE_LEVEL))
05da4558
MT		 526 return &slot->rmap[gfn - slot->base_gfn];
527
44ad9944
JR		 528 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
529 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
05da4558 530
44ad9944 531 return &slot->lpage_info[level - 2][idx].rmap_pde;
290fc38d
IE		 532}
533
cd4a4e53
AK		 534/*
535 * Reverse mapping data structures:
536 *
290fc38d
IE		 537 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
538 * that points to page_address(page).
cd4a4e53 539 *
290fc38d
IE		 540 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
541 * containing more mappings.
53a27b39
MT		 542 *
543 * Returns the number of rmap entries before the spte was added or zero if
544 * the spte was not added.
545 *
cd4a4e53 546 */
44ad9944 547static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
cd4a4e53 548{
4db35314 549 struct kvm_mmu_page *sp;
cd4a4e53 550 struct kvm_rmap_desc *desc;
290fc38d 551 unsigned long *rmapp;
53a27b39 552 int i, count = 0;
cd4a4e53 553
43a3795a 554 if (!is_rmap_spte(*spte))
53a27b39 555 return count;
290fc38d 556 gfn = unalias_gfn(vcpu->kvm, gfn);
4db35314
AK		 557 sp = page_header(__pa(spte));
558 sp->gfns[spte - sp->spt] = gfn;
44ad9944 559 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
290fc38d 560 if (!*rmapp) {
cd4a4e53 561 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
290fc38d
IE		 562 *rmapp = (unsigned long)spte;
563 } else if (!(*rmapp & 1)) {
cd4a4e53 564 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
714b93da 565 desc = mmu_alloc_rmap_desc(vcpu);
d555c333
AK		 566 desc->sptes[0] = (u64 *)*rmapp;
567 desc->sptes[1] = spte;
290fc38d 568 *rmapp = (unsigned long)desc | 1;
cd4a4e53
AK		 569 } else {
570 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
290fc38d 571 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
d555c333 572 while (desc->sptes[RMAP_EXT-1] && desc->more) {
cd4a4e53 573 desc = desc->more;
53a27b39
MT		 574 count += RMAP_EXT;
575 }
d555c333 576 if (desc->sptes[RMAP_EXT-1]) {
714b93da 577 desc->more = mmu_alloc_rmap_desc(vcpu);
cd4a4e53
AK		 578 desc = desc->more;
579 }
d555c333 580 for (i = 0; desc->sptes[i]; ++i)
cd4a4e53 581 ;
d555c333 582 desc->sptes[i] = spte;
cd4a4e53 583 }
53a27b39 584 return count;
cd4a4e53
AK		 585}
586
290fc38d 587static void rmap_desc_remove_entry(unsigned long *rmapp,
cd4a4e53
AK		 588 struct kvm_rmap_desc *desc,
589 int i,
590 struct kvm_rmap_desc *prev_desc)
591{
592 int j;
593
d555c333 594 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
cd4a4e53 595 ;
d555c333
AK		 596 desc->sptes[i] = desc->sptes[j];
597 desc->sptes[j] = NULL;
cd4a4e53
AK		 598 if (j != 0)
599 return;
600 if (!prev_desc && !desc->more)
d555c333 601 *rmapp = (unsigned long)desc->sptes[0];
cd4a4e53
AK		 602 else
603 if (prev_desc)
604 prev_desc->more = desc->more;
605 else
290fc38d 606 *rmapp = (unsigned long)desc->more | 1;
90cb0529 607 mmu_free_rmap_desc(desc);
cd4a4e53
AK		 608}
609
290fc38d 610static void rmap_remove(struct kvm *kvm, u64 *spte)
cd4a4e53 611{
cd4a4e53
AK		 612 struct kvm_rmap_desc *desc;
613 struct kvm_rmap_desc *prev_desc;
4db35314 614 struct kvm_mmu_page *sp;
35149e21 615 pfn_t pfn;
290fc38d 616 unsigned long *rmapp;
cd4a4e53
AK		 617 int i;
618
43a3795a 619 if (!is_rmap_spte(*spte))
cd4a4e53 620 return;
4db35314 621 sp = page_header(__pa(spte));
35149e21 622 pfn = spte_to_pfn(*spte);
7b52345e 623 if (*spte & shadow_accessed_mask)
35149e21 624 kvm_set_pfn_accessed(pfn);
8dae4445 625 if (is_writable_pte(*spte))
acb66dd0 626 kvm_set_pfn_dirty(pfn);
44ad9944 627 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level);
290fc38d 628 if (!*rmapp) {
cd4a4e53
AK		 629 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
630 BUG();
290fc38d 631 } else if (!(*rmapp & 1)) {
cd4a4e53 632 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
290fc38d 633 if ((u64 *)*rmapp != spte) {
cd4a4e53
AK		 634 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
635 spte, *spte);
636 BUG();
637 }
290fc38d 638 *rmapp = 0;
cd4a4e53
AK		 639 } else {
640 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
290fc38d 641 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
cd4a4e53
AK		 642 prev_desc = NULL;
643 while (desc) {
d555c333
AK		 644 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
645 if (desc->sptes[i] == spte) {
290fc38d 646 rmap_desc_remove_entry(rmapp,
714b93da 647 desc, i,
cd4a4e53
AK		 648 prev_desc);
649 return;
650 }
651 prev_desc = desc;
652 desc = desc->more;
653 }
186a3e52 654 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
cd4a4e53
AK		 655 BUG();
656 }
657}
658
98348e95 659static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
374cbac0 660{
374cbac0 661 struct kvm_rmap_desc *desc;
98348e95
IE		 662 struct kvm_rmap_desc *prev_desc;
663 u64 *prev_spte;
664 int i;
665
666 if (!*rmapp)
667 return NULL;
668 else if (!(*rmapp & 1)) {
669 if (!spte)
670 return (u64 *)*rmapp;
671 return NULL;
672 }
673 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
674 prev_desc = NULL;
675 prev_spte = NULL;
676 while (desc) {
d555c333 677 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
98348e95 678 if (prev_spte == spte)
d555c333
AK		 679 return desc->sptes[i];
680 prev_spte = desc->sptes[i];
98348e95
IE		 681 }
682 desc = desc->more;
683 }
684 return NULL;
685}
686
b1a36821 687static int rmap_write_protect(struct kvm *kvm, u64 gfn)
98348e95 688{
290fc38d 689 unsigned long *rmapp;
374cbac0 690 u64 *spte;
44ad9944 691 int i, write_protected = 0;
374cbac0 692
4a4c9924 693 gfn = unalias_gfn(kvm, gfn);
44ad9944 694 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
374cbac0 695
98348e95
IE		 696 spte = rmap_next(kvm, rmapp, NULL);
697 while (spte) {
374cbac0 698 BUG_ON(!spte);
374cbac0 699 BUG_ON(!(*spte & PT_PRESENT_MASK));
374cbac0 700 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
8dae4445 701 if (is_writable_pte(*spte)) {
d555c333 702 __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
caa5b8a5
ED		 703 write_protected = 1;
704 }
9647c14c 705 spte = rmap_next(kvm, rmapp, spte);
374cbac0 706 }
855149aa 707 if (write_protected) {
35149e21 708 pfn_t pfn;
855149aa
IE		 709
710 spte = rmap_next(kvm, rmapp, NULL);
35149e21
AL		 711 pfn = spte_to_pfn(*spte);
712 kvm_set_pfn_dirty(pfn);
855149aa
IE		 713 }
714
05da4558 715 /* check for huge page mappings */
44ad9944
JR		 716 for (i = PT_DIRECTORY_LEVEL;
717 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
718 rmapp = gfn_to_rmap(kvm, gfn, i);
719 spte = rmap_next(kvm, rmapp, NULL);
720 while (spte) {
721 BUG_ON(!spte);
722 BUG_ON(!(*spte & PT_PRESENT_MASK));
723 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
724 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
8dae4445 725 if (is_writable_pte(*spte)) {
44ad9944
JR		 726 rmap_remove(kvm, spte);
727 --kvm->stat.lpages;
728 __set_spte(spte, shadow_trap_nonpresent_pte);
729 spte = NULL;
730 write_protected = 1;
731 }
732 spte = rmap_next(kvm, rmapp, spte);
05da4558 733 }
05da4558
MT		 734 }
735
b1a36821 736 return write_protected;
374cbac0
AK		 737}
738
8a8365c5
FD		 739static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
740 unsigned long data)
e930bffe
AA		 741{
742 u64 *spte;
743 int need_tlb_flush = 0;
744
745 while ((spte = rmap_next(kvm, rmapp, NULL))) {
746 BUG_ON(!(*spte & PT_PRESENT_MASK));
747 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
748 rmap_remove(kvm, spte);
d555c333 749 __set_spte(spte, shadow_trap_nonpresent_pte);
e930bffe
AA		 750 need_tlb_flush = 1;
751 }
752 return need_tlb_flush;
753}
754
8a8365c5
FD		 755static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
756 unsigned long data)
3da0dd43
IE		 757{
758 int need_flush = 0;
759 u64 *spte, new_spte;
760 pte_t *ptep = (pte_t *)data;
761 pfn_t new_pfn;
762
763 WARN_ON(pte_huge(*ptep));
764 new_pfn = pte_pfn(*ptep);
765 spte = rmap_next(kvm, rmapp, NULL);
766 while (spte) {
767 BUG_ON(!is_shadow_present_pte(*spte));
768 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
769 need_flush = 1;
770 if (pte_write(*ptep)) {
771 rmap_remove(kvm, spte);
772 __set_spte(spte, shadow_trap_nonpresent_pte);
773 spte = rmap_next(kvm, rmapp, NULL);
774 } else {
775 new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
776 new_spte |= (u64)new_pfn << PAGE_SHIFT;
777
778 new_spte &= ~PT_WRITABLE_MASK;
779 new_spte &= ~SPTE_HOST_WRITEABLE;
8dae4445 780 if (is_writable_pte(*spte))
3da0dd43
IE		 781 kvm_set_pfn_dirty(spte_to_pfn(*spte));
782 __set_spte(spte, new_spte);
783 spte = rmap_next(kvm, rmapp, spte);
784 }
785 }
786 if (need_flush)
787 kvm_flush_remote_tlbs(kvm);
788
789 return 0;
790}
791
8a8365c5
FD		 792static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
793 unsigned long data,
3da0dd43 794 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
8a8365c5 795 unsigned long data))
e930bffe 796{
852e3c19 797 int i, j;
90bb6fc5 798 int ret;
e930bffe 799 int retval = 0;
bc6678a3
MT		 800 struct kvm_memslots *slots;
801
802 slots = rcu_dereference(kvm->memslots);
e930bffe 803
46a26bf5
MT		 804 for (i = 0; i < slots->nmemslots; i++) {
805 struct kvm_memory_slot *memslot = &slots->memslots[i];
e930bffe
AA		 806 unsigned long start = memslot->userspace_addr;
807 unsigned long end;
808
e930bffe
AA		 809 end = start + (memslot->npages << PAGE_SHIFT);
810 if (hva >= start && hva < end) {
811 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
852e3c19 812
90bb6fc5 813 ret = handler(kvm, &memslot->rmap[gfn_offset], data);
852e3c19
JR		 814
815 for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
816 int idx = gfn_offset;
817 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
90bb6fc5 818 ret |= handler(kvm,
3da0dd43
IE		 819 &memslot->lpage_info[j][idx].rmap_pde,
820 data);
852e3c19 821 }
90bb6fc5
AK		 822 trace_kvm_age_page(hva, memslot, ret);
823 retval |= ret;
e930bffe
AA		 824 }
825 }
826
827 return retval;
828}
829
830int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
831{
3da0dd43
IE		 832 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
833}
834
835void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
836{
8a8365c5 837 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
e930bffe
AA		 838}
839
8a8365c5
FD		 840static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
841 unsigned long data)
e930bffe
AA		 842{
843 u64 *spte;
844 int young = 0;
845
6316e1c8
RR		 846 /*
847 * Emulate the accessed bit for EPT, by checking if this page has
848 * an EPT mapping, and clearing it if it does. On the next access,
849 * a new EPT mapping will be established.
850 * This has some overhead, but not as much as the cost of swapping
851 * out actively used pages or breaking up actively used hugepages.
852 */
534e38b4 853 if (!shadow_accessed_mask)
6316e1c8 854 return kvm_unmap_rmapp(kvm, rmapp, data);
534e38b4 855
e930bffe
AA		 856 spte = rmap_next(kvm, rmapp, NULL);
857 while (spte) {
858 int _young;
859 u64 _spte = *spte;
860 BUG_ON(!(_spte & PT_PRESENT_MASK));
861 _young = _spte & PT_ACCESSED_MASK;
862 if (_young) {
863 young = 1;
864 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
865 }
866 spte = rmap_next(kvm, rmapp, spte);
867 }
868 return young;
869}
870
53a27b39
MT		 871#define RMAP_RECYCLE_THRESHOLD 1000
872
852e3c19 873static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
53a27b39
MT		 874{
875 unsigned long *rmapp;
852e3c19
JR		 876 struct kvm_mmu_page *sp;
877
878 sp = page_header(__pa(spte));
53a27b39
MT		 879
880 gfn = unalias_gfn(vcpu->kvm, gfn);
852e3c19 881 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
53a27b39 882
3da0dd43 883 kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
53a27b39
MT		 884 kvm_flush_remote_tlbs(vcpu->kvm);
885}
886
e930bffe
AA		 887int kvm_age_hva(struct kvm *kvm, unsigned long hva)
888{
3da0dd43 889 return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
e930bffe
AA		 890}
891
d6c69ee9 892#ifdef MMU_DEBUG
47ad8e68 893static int is_empty_shadow_page(u64 *spt)
6aa8b732 894{
139bdb2d
AK		 895 u64 *pos;
896 u64 *end;
897
47ad8e68 898 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
3c915510 899 if (is_shadow_present_pte(*pos)) {
b8688d51 900 printk(KERN_ERR "%s: %p %llx\n", __func__,
139bdb2d 901 pos, *pos);
6aa8b732 902 return 0;
139bdb2d 903 }
6aa8b732
AK		 904 return 1;
905}
d6c69ee9 906#endif
6aa8b732 907
4db35314 908static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
260746c0 909{
4db35314
AK		 910 ASSERT(is_empty_shadow_page(sp->spt));
911 list_del(&sp->link);
912 __free_page(virt_to_page(sp->spt));
913 __free_page(virt_to_page(sp->gfns));
914 kfree(sp);
f05e70ac 915 ++kvm->arch.n_free_mmu_pages;
260746c0
AK		 916}
917
cea0f0e7
AK		 918static unsigned kvm_page_table_hashfn(gfn_t gfn)
919{
1ae0a13d 920 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
cea0f0e7
AK		 921}
922
25c0de2c
AK		 923static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
924 u64 *parent_pte)
6aa8b732 925{
4db35314 926 struct kvm_mmu_page *sp;
6aa8b732 927
ad312c7c
ZX		 928 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
929 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
930 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
4db35314 931 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
f05e70ac 932 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
6cffe8ca 933 INIT_LIST_HEAD(&sp->oos_link);
291f26bc 934 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
4db35314
AK		 935 sp->multimapped = 0;
936 sp->parent_pte = parent_pte;
f05e70ac 937 --vcpu->kvm->arch.n_free_mmu_pages;
4db35314 938 return sp;
6aa8b732
AK		 939}
940
714b93da 941static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
4db35314 942 struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7
AK		 943{
944 struct kvm_pte_chain *pte_chain;
945 struct hlist_node *node;
946 int i;
947
948 if (!parent_pte)
949 return;
4db35314
AK		 950 if (!sp->multimapped) {
951 u64 *old = sp->parent_pte;
cea0f0e7
AK		 952
953 if (!old) {
4db35314 954 sp->parent_pte = parent_pte;
cea0f0e7
AK		 955 return;
956 }
4db35314 957 sp->multimapped = 1;
714b93da 958 pte_chain = mmu_alloc_pte_chain(vcpu);
4db35314
AK		 959 INIT_HLIST_HEAD(&sp->parent_ptes);
960 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK		 961 pte_chain->parent_ptes[0] = old;
962 }
4db35314 963 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
cea0f0e7
AK		 964 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
965 continue;
966 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
967 if (!pte_chain->parent_ptes[i]) {
968 pte_chain->parent_ptes[i] = parent_pte;
969 return;
970 }
971 }
714b93da 972 pte_chain = mmu_alloc_pte_chain(vcpu);
cea0f0e7 973 BUG_ON(!pte_chain);
4db35314 974 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK		 975 pte_chain->parent_ptes[0] = parent_pte;
976}
977
4db35314 978static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
cea0f0e7
AK		 979 u64 *parent_pte)
980{
981 struct kvm_pte_chain *pte_chain;
982 struct hlist_node *node;
983 int i;
984
4db35314
AK		 985 if (!sp->multimapped) {
986 BUG_ON(sp->parent_pte != parent_pte);
987 sp->parent_pte = NULL;
cea0f0e7
AK		 988 return;
989 }
4db35314 990 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
cea0f0e7
AK		 991 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
992 if (!pte_chain->parent_ptes[i])
993 break;
994 if (pte_chain->parent_ptes[i] != parent_pte)
995 continue;
697fe2e2
AK		 996 while (i + 1 < NR_PTE_CHAIN_ENTRIES
997 && pte_chain->parent_ptes[i + 1]) {
cea0f0e7
AK		 998 pte_chain->parent_ptes[i]
999 = pte_chain->parent_ptes[i + 1];
1000 ++i;
1001 }
1002 pte_chain->parent_ptes[i] = NULL;
697fe2e2
AK		 1003 if (i == 0) {
1004 hlist_del(&pte_chain->link);
90cb0529 1005 mmu_free_pte_chain(pte_chain);
4db35314
AK		 1006 if (hlist_empty(&sp->parent_ptes)) {
1007 sp->multimapped = 0;
1008 sp->parent_pte = NULL;
697fe2e2
AK		 1009 }
1010 }
cea0f0e7
AK		 1011 return;
1012 }
1013 BUG();
1014}
1015
ad8cfbe3
MT		 1016
1017static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1018 mmu_parent_walk_fn fn)
1019{
1020 struct kvm_pte_chain *pte_chain;
1021 struct hlist_node *node;
1022 struct kvm_mmu_page *parent_sp;
1023 int i;
1024
1025 if (!sp->multimapped && sp->parent_pte) {
1026 parent_sp = page_header(__pa(sp->parent_pte));
1027 fn(vcpu, parent_sp);
1028 mmu_parent_walk(vcpu, parent_sp, fn);
1029 return;
1030 }
1031 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1032 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1033 if (!pte_chain->parent_ptes[i])
1034 break;
1035 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
1036 fn(vcpu, parent_sp);
1037 mmu_parent_walk(vcpu, parent_sp, fn);
1038 }
1039}
1040
0074ff63
MT		 1041static void kvm_mmu_update_unsync_bitmap(u64 *spte)
1042{
1043 unsigned int index;
1044 struct kvm_mmu_page *sp = page_header(__pa(spte));
1045
1046 index = spte - sp->spt;
60c8aec6
MT		 1047 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
1048 sp->unsync_children++;
1049 WARN_ON(!sp->unsync_children);
0074ff63
MT		 1050}
1051
1052static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
1053{
1054 struct kvm_pte_chain *pte_chain;
1055 struct hlist_node *node;
1056 int i;
1057
1058 if (!sp->parent_pte)
1059 return;
1060
1061 if (!sp->multimapped) {
1062 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
1063 return;
1064 }
1065
1066 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1067 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1068 if (!pte_chain->parent_ptes[i])
1069 break;
1070 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
1071 }
1072}
1073
1074static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1075{
0074ff63
MT		 1076 kvm_mmu_update_parents_unsync(sp);
1077 return 1;
1078}
1079
1080static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
1081 struct kvm_mmu_page *sp)
1082{
1083 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
1084 kvm_mmu_update_parents_unsync(sp);
1085}
1086
d761a501
AK		 1087static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1088 struct kvm_mmu_page *sp)
1089{
1090 int i;
1091
1092 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1093 sp->spt[i] = shadow_trap_nonpresent_pte;
1094}
1095
e8bc217a
MT		 1096static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1097 struct kvm_mmu_page *sp)
1098{
1099 return 1;
1100}
1101
a7052897
MT		 1102static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1103{
1104}
1105
60c8aec6
MT		 1106#define KVM_PAGE_ARRAY_NR 16
1107
1108struct kvm_mmu_pages {
1109 struct mmu_page_and_offset {
1110 struct kvm_mmu_page *sp;
1111 unsigned int idx;
1112 } page[KVM_PAGE_ARRAY_NR];
1113 unsigned int nr;
1114};
1115
0074ff63
MT		 1116#define for_each_unsync_children(bitmap, idx) \
1117 for (idx = find_first_bit(bitmap, 512); \
1118 idx < 512; \
1119 idx = find_next_bit(bitmap, 512, idx+1))
1120
cded19f3
HE		 1121static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1122 int idx)
4731d4c7 1123{
60c8aec6 1124 int i;
4731d4c7 1125
60c8aec6
MT		 1126 if (sp->unsync)
1127 for (i=0; i < pvec->nr; i++)
1128 if (pvec->page[i].sp == sp)
1129 return 0;
1130
1131 pvec->page[pvec->nr].sp = sp;
1132 pvec->page[pvec->nr].idx = idx;
1133 pvec->nr++;
1134 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1135}
1136
1137static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1138 struct kvm_mmu_pages *pvec)
1139{
1140 int i, ret, nr_unsync_leaf = 0;
4731d4c7 1141
0074ff63 1142 for_each_unsync_children(sp->unsync_child_bitmap, i) {
4731d4c7
MT		 1143 u64 ent = sp->spt[i];
1144
87917239 1145 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
4731d4c7
MT		 1146 struct kvm_mmu_page *child;
1147 child = page_header(ent & PT64_BASE_ADDR_MASK);
1148
1149 if (child->unsync_children) {
60c8aec6
MT		 1150 if (mmu_pages_add(pvec, child, i))
1151 return -ENOSPC;
1152
1153 ret = __mmu_unsync_walk(child, pvec);
1154 if (!ret)
1155 __clear_bit(i, sp->unsync_child_bitmap);
1156 else if (ret > 0)
1157 nr_unsync_leaf += ret;
1158 else
4731d4c7
MT		 1159 return ret;
1160 }
1161
1162 if (child->unsync) {
60c8aec6
MT		 1163 nr_unsync_leaf++;
1164 if (mmu_pages_add(pvec, child, i))
1165 return -ENOSPC;
4731d4c7
MT		 1166 }
1167 }
1168 }
1169
0074ff63 1170 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
4731d4c7
MT		 1171 sp->unsync_children = 0;
1172
60c8aec6
MT		 1173 return nr_unsync_leaf;
1174}
1175
1176static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1177 struct kvm_mmu_pages *pvec)
1178{
1179 if (!sp->unsync_children)
1180 return 0;
1181
1182 mmu_pages_add(pvec, sp, 0);
1183 return __mmu_unsync_walk(sp, pvec);
4731d4c7
MT		 1184}
1185
4db35314 1186static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
cea0f0e7
AK		 1187{
1188 unsigned index;
1189 struct hlist_head *bucket;
4db35314 1190 struct kvm_mmu_page *sp;
cea0f0e7
AK		 1191 struct hlist_node *node;
1192
b8688d51 1193 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1ae0a13d 1194 index = kvm_page_table_hashfn(gfn);
f05e70ac 1195 bucket = &kvm->arch.mmu_page_hash[index];
4db35314 1196 hlist_for_each_entry(sp, node, bucket, hash_link)
f6e2c02b 1197 if (sp->gfn == gfn && !sp->role.direct
2e53d63a 1198 && !sp->role.invalid) {
cea0f0e7 1199 pgprintk("%s: found role %x\n",
b8688d51 1200 __func__, sp->role.word);
4db35314 1201 return sp;
cea0f0e7
AK		 1202 }
1203 return NULL;
1204}
1205
4731d4c7
MT		 1206static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1207{
1208 WARN_ON(!sp->unsync);
1209 sp->unsync = 0;
1210 --kvm->stat.mmu_unsync;
1211}
1212
1213static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1214
1215static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1216{
1217 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1218 kvm_mmu_zap_page(vcpu->kvm, sp);
1219 return 1;
1220 }
1221
f691fe1d 1222 trace_kvm_mmu_sync_page(sp);
b1a36821
MT		 1223 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1224 kvm_flush_remote_tlbs(vcpu->kvm);
0c0f40bd 1225 kvm_unlink_unsync_page(vcpu->kvm, sp);
4731d4c7
MT		 1226 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1227 kvm_mmu_zap_page(vcpu->kvm, sp);
1228 return 1;
1229 }
1230
1231 kvm_mmu_flush_tlb(vcpu);
4731d4c7
MT		 1232 return 0;
1233}
1234
60c8aec6
MT		 1235struct mmu_page_path {
1236 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1237 unsigned int idx[PT64_ROOT_LEVEL-1];
4731d4c7
MT		 1238};
1239
60c8aec6
MT		 1240#define for_each_sp(pvec, sp, parents, i) \
1241 for (i = mmu_pages_next(&pvec, &parents, -1), \
1242 sp = pvec.page[i].sp; \
1243 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1244 i = mmu_pages_next(&pvec, &parents, i))
1245
cded19f3
HE		 1246static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1247 struct mmu_page_path *parents,
1248 int i)
60c8aec6
MT		 1249{
1250 int n;
1251
1252 for (n = i+1; n < pvec->nr; n++) {
1253 struct kvm_mmu_page *sp = pvec->page[n].sp;
1254
1255 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1256 parents->idx[0] = pvec->page[n].idx;
1257 return n;
1258 }
1259
1260 parents->parent[sp->role.level-2] = sp;
1261 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1262 }
1263
1264 return n;
1265}
1266
cded19f3 1267static void mmu_pages_clear_parents(struct mmu_page_path *parents)
4731d4c7 1268{
60c8aec6
MT		 1269 struct kvm_mmu_page *sp;
1270 unsigned int level = 0;
1271
1272 do {
1273 unsigned int idx = parents->idx[level];
4731d4c7 1274
60c8aec6
MT		 1275 sp = parents->parent[level];
1276 if (!sp)
1277 return;
1278
1279 --sp->unsync_children;
1280 WARN_ON((int)sp->unsync_children < 0);
1281 __clear_bit(idx, sp->unsync_child_bitmap);
1282 level++;
1283 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
4731d4c7
MT		 1284}
1285
60c8aec6
MT		 1286static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1287 struct mmu_page_path *parents,
1288 struct kvm_mmu_pages *pvec)
4731d4c7 1289{
60c8aec6
MT		 1290 parents->parent[parent->role.level-1] = NULL;
1291 pvec->nr = 0;
1292}
4731d4c7 1293
60c8aec6
MT		 1294static void mmu_sync_children(struct kvm_vcpu *vcpu,
1295 struct kvm_mmu_page *parent)
1296{
1297 int i;
1298 struct kvm_mmu_page *sp;
1299 struct mmu_page_path parents;
1300 struct kvm_mmu_pages pages;
1301
1302 kvm_mmu_pages_init(parent, &parents, &pages);
1303 while (mmu_unsync_walk(parent, &pages)) {
b1a36821
MT		 1304 int protected = 0;
1305
1306 for_each_sp(pages, sp, parents, i)
1307 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1308
1309 if (protected)
1310 kvm_flush_remote_tlbs(vcpu->kvm);
1311
60c8aec6
MT		 1312 for_each_sp(pages, sp, parents, i) {
1313 kvm_sync_page(vcpu, sp);
1314 mmu_pages_clear_parents(&parents);
1315 }
4731d4c7 1316 cond_resched_lock(&vcpu->kvm->mmu_lock);
60c8aec6
MT		 1317 kvm_mmu_pages_init(parent, &parents, &pages);
1318 }
4731d4c7
MT		 1319}
1320
cea0f0e7
AK		 1321static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1322 gfn_t gfn,
1323 gva_t gaddr,
1324 unsigned level,
f6e2c02b 1325 int direct,
41074d07 1326 unsigned access,
f7d9c7b7 1327 u64 *parent_pte)
cea0f0e7
AK		 1328{
1329 union kvm_mmu_page_role role;
1330 unsigned index;
1331 unsigned quadrant;
1332 struct hlist_head *bucket;
4db35314 1333 struct kvm_mmu_page *sp;
4731d4c7 1334 struct hlist_node *node, *tmp;
cea0f0e7 1335
a770f6f2 1336 role = vcpu->arch.mmu.base_role;
cea0f0e7 1337 role.level = level;
f6e2c02b 1338 role.direct = direct;
41074d07 1339 role.access = access;
ad312c7c 1340 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
cea0f0e7
AK		 1341 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1342 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1343 role.quadrant = quadrant;
1344 }
1ae0a13d 1345 index = kvm_page_table_hashfn(gfn);
f05e70ac 1346 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4731d4c7
MT		 1347 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1348 if (sp->gfn == gfn) {
1349 if (sp->unsync)
1350 if (kvm_sync_page(vcpu, sp))
1351 continue;
1352
1353 if (sp->role.word != role.word)
1354 continue;
1355
4db35314 1356 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
0074ff63
MT		 1357 if (sp->unsync_children) {
1358 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1359 kvm_mmu_mark_parents_unsync(vcpu, sp);
1360 }
f691fe1d 1361 trace_kvm_mmu_get_page(sp, false);
4db35314 1362 return sp;
cea0f0e7 1363 }
dfc5aa00 1364 ++vcpu->kvm->stat.mmu_cache_miss;
4db35314
AK		 1365 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1366 if (!sp)
1367 return sp;
4db35314
AK		 1368 sp->gfn = gfn;
1369 sp->role = role;
1370 hlist_add_head(&sp->hash_link, bucket);
f6e2c02b 1371 if (!direct) {
b1a36821
MT		 1372 if (rmap_write_protect(vcpu->kvm, gfn))
1373 kvm_flush_remote_tlbs(vcpu->kvm);
4731d4c7
MT		 1374 account_shadowed(vcpu->kvm, gfn);
1375 }
131d8279
AK		 1376 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1377 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1378 else
1379 nonpaging_prefetch_page(vcpu, sp);
f691fe1d 1380 trace_kvm_mmu_get_page(sp, true);
4db35314 1381 return sp;
cea0f0e7
AK		 1382}
1383
2d11123a
AK		 1384static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1385 struct kvm_vcpu *vcpu, u64 addr)
1386{
1387 iterator->addr = addr;
1388 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1389 iterator->level = vcpu->arch.mmu.shadow_root_level;
1390 if (iterator->level == PT32E_ROOT_LEVEL) {
1391 iterator->shadow_addr
1392 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1393 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1394 --iterator->level;
1395 if (!iterator->shadow_addr)
1396 iterator->level = 0;
1397 }
1398}
1399
1400static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1401{
1402 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1403 return false;
4d88954d
MT		 1404
1405 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1406 if (is_large_pte(*iterator->sptep))
1407 return false;
1408
2d11123a
AK		 1409 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1410 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1411 return true;
1412}
1413
1414static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1415{
1416 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1417 --iterator->level;
1418}
1419
90cb0529 1420static void kvm_mmu_page_unlink_children(struct kvm *kvm,
4db35314 1421 struct kvm_mmu_page *sp)
a436036b 1422{
697fe2e2
AK		 1423 unsigned i;
1424 u64 *pt;
1425 u64 ent;
1426
4db35314 1427 pt = sp->spt;
697fe2e2 1428
697fe2e2
AK		 1429 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1430 ent = pt[i];
1431
05da4558 1432 if (is_shadow_present_pte(ent)) {
776e6633 1433 if (!is_last_spte(ent, sp->role.level)) {
05da4558
MT		 1434 ent &= PT64_BASE_ADDR_MASK;
1435 mmu_page_remove_parent_pte(page_header(ent),
1436 &pt[i]);
1437 } else {
776e6633
MT		 1438 if (is_large_pte(ent))
1439 --kvm->stat.lpages;
05da4558
MT		 1440 rmap_remove(kvm, &pt[i]);
1441 }
1442 }
c7addb90 1443 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2 1444 }
a436036b
AK		 1445}
1446
4db35314 1447static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7 1448{
4db35314 1449 mmu_page_remove_parent_pte(sp, parent_pte);
a436036b
AK		 1450}
1451
12b7d28f
AK		 1452static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1453{
1454 int i;
988a2cae 1455 struct kvm_vcpu *vcpu;
12b7d28f 1456
988a2cae
GN		 1457 kvm_for_each_vcpu(i, vcpu, kvm)
1458 vcpu->arch.last_pte_updated = NULL;
12b7d28f
AK		 1459}
1460
31aa2b44 1461static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
a436036b
AK		 1462{
1463 u64 *parent_pte;
1464
4db35314
AK		 1465 while (sp->multimapped || sp->parent_pte) {
1466 if (!sp->multimapped)
1467 parent_pte = sp->parent_pte;
a436036b
AK		 1468 else {
1469 struct kvm_pte_chain *chain;
1470
4db35314 1471 chain = container_of(sp->parent_ptes.first,
a436036b
AK		 1472 struct kvm_pte_chain, link);
1473 parent_pte = chain->parent_ptes[0];
1474 }
697fe2e2 1475 BUG_ON(!parent_pte);
4db35314 1476 kvm_mmu_put_page(sp, parent_pte);
d555c333 1477 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
a436036b 1478 }
31aa2b44
AK		 1479}
1480
60c8aec6
MT		 1481static int mmu_zap_unsync_children(struct kvm *kvm,
1482 struct kvm_mmu_page *parent)
4731d4c7 1483{
60c8aec6
MT		 1484 int i, zapped = 0;
1485 struct mmu_page_path parents;
1486 struct kvm_mmu_pages pages;
4731d4c7 1487
60c8aec6 1488 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
4731d4c7 1489 return 0;
60c8aec6
MT		 1490
1491 kvm_mmu_pages_init(parent, &parents, &pages);
1492 while (mmu_unsync_walk(parent, &pages)) {
1493 struct kvm_mmu_page *sp;
1494
1495 for_each_sp(pages, sp, parents, i) {
1496 kvm_mmu_zap_page(kvm, sp);
1497 mmu_pages_clear_parents(&parents);
1498 }
1499 zapped += pages.nr;
1500 kvm_mmu_pages_init(parent, &parents, &pages);
1501 }
1502
1503 return zapped;
4731d4c7
MT		 1504}
1505
07385413 1506static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
31aa2b44 1507{
4731d4c7 1508 int ret;
f691fe1d
AK		 1509
1510 trace_kvm_mmu_zap_page(sp);
31aa2b44 1511 ++kvm->stat.mmu_shadow_zapped;
4731d4c7 1512 ret = mmu_zap_unsync_children(kvm, sp);
4db35314 1513 kvm_mmu_page_unlink_children(kvm, sp);
31aa2b44 1514 kvm_mmu_unlink_parents(kvm, sp);
5b5c6a5a 1515 kvm_flush_remote_tlbs(kvm);
f6e2c02b 1516 if (!sp->role.invalid && !sp->role.direct)
5b5c6a5a 1517 unaccount_shadowed(kvm, sp->gfn);
4731d4c7
MT		 1518 if (sp->unsync)
1519 kvm_unlink_unsync_page(kvm, sp);
4db35314
AK		 1520 if (!sp->root_count) {
1521 hlist_del(&sp->hash_link);
1522 kvm_mmu_free_page(kvm, sp);
2e53d63a 1523 } else {
2e53d63a 1524 sp->role.invalid = 1;
5b5c6a5a 1525 list_move(&sp->link, &kvm->arch.active_mmu_pages);
2e53d63a
MT		 1526 kvm_reload_remote_mmus(kvm);
1527 }
12b7d28f 1528 kvm_mmu_reset_last_pte_updated(kvm);
4731d4c7 1529 return ret;
a436036b
AK		 1530}
1531
82ce2c96
IE		 1532/*
1533 * Changing the number of mmu pages allocated to the vm
1534 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1535 */
1536void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1537{
025dbbf3
MT		 1538 int used_pages;
1539
1540 used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1541 used_pages = max(0, used_pages);
1542
82ce2c96
IE		 1543 /*
1544 * If we set the number of mmu pages to be smaller be than the
1545 * number of actived pages , we must to free some mmu pages before we
1546 * change the value
1547 */
1548
025dbbf3
MT		 1549 if (used_pages > kvm_nr_mmu_pages) {
1550 while (used_pages > kvm_nr_mmu_pages) {
82ce2c96
IE		 1551 struct kvm_mmu_page *page;
1552
f05e70ac 1553 page = container_of(kvm->arch.active_mmu_pages.prev,
82ce2c96
IE		 1554 struct kvm_mmu_page, link);
1555 kvm_mmu_zap_page(kvm, page);
025dbbf3 1556 used_pages--;
82ce2c96 1557 }
f05e70ac 1558 kvm->arch.n_free_mmu_pages = 0;
82ce2c96
IE		 1559 }
1560 else
f05e70ac
ZX		 1561 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1562 - kvm->arch.n_alloc_mmu_pages;
82ce2c96 1563
f05e70ac 1564 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
82ce2c96
IE		 1565}
1566
f67a46f4 1567static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
a436036b
AK		 1568{
1569 unsigned index;
1570 struct hlist_head *bucket;
4db35314 1571 struct kvm_mmu_page *sp;
a436036b
AK		 1572 struct hlist_node *node, *n;
1573 int r;
1574
b8688d51 1575 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
a436036b 1576 r = 0;
1ae0a13d 1577 index = kvm_page_table_hashfn(gfn);
f05e70ac 1578 bucket = &kvm->arch.mmu_page_hash[index];
4db35314 1579 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
f6e2c02b 1580 if (sp->gfn == gfn && !sp->role.direct) {
b8688d51 1581 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
4db35314 1582 sp->role.word);
a436036b 1583 r = 1;
07385413
MT		 1584 if (kvm_mmu_zap_page(kvm, sp))
1585 n = bucket->first;
a436036b
AK		 1586 }
1587 return r;
cea0f0e7
AK		 1588}
1589
f67a46f4 1590static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
97a0a01e 1591{
4677a3b6
AK		 1592 unsigned index;
1593 struct hlist_head *bucket;
4db35314 1594 struct kvm_mmu_page *sp;
4677a3b6 1595 struct hlist_node *node, *nn;
97a0a01e 1596
4677a3b6
AK		 1597 index = kvm_page_table_hashfn(gfn);
1598 bucket = &kvm->arch.mmu_page_hash[index];
1599 hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
f6e2c02b 1600 if (sp->gfn == gfn && !sp->role.direct
4677a3b6
AK		 1601 && !sp->role.invalid) {
1602 pgprintk("%s: zap %lx %x\n",
1603 __func__, gfn, sp->role.word);
1604 kvm_mmu_zap_page(kvm, sp);
1605 }
97a0a01e
AK		 1606 }
1607}
1608
38c335f1 1609static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
6aa8b732 1610{
bc6678a3 1611 int slot = memslot_id(kvm, gfn);
4db35314 1612 struct kvm_mmu_page *sp = page_header(__pa(pte));
6aa8b732 1613
291f26bc 1614 __set_bit(slot, sp->slot_bitmap);
6aa8b732
AK		 1615}
1616
6844dec6
MT		 1617static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1618{
1619 int i;
1620 u64 *pt = sp->spt;
1621
1622 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1623 return;
1624
1625 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1626 if (pt[i] == shadow_notrap_nonpresent_pte)
d555c333 1627 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
6844dec6
MT		 1628 }
1629}
1630
039576c0
AK		 1631struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1632{
72dc67a6
IE		 1633 struct page *page;
1634
ad312c7c 1635 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
039576c0
AK		 1636
1637 if (gpa == UNMAPPED_GVA)
1638 return NULL;
72dc67a6 1639
72dc67a6 1640 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
72dc67a6
IE		 1641
1642 return page;
039576c0
AK		 1643}
1644
74be52e3
SY		 1645/*
1646 * The function is based on mtrr_type_lookup() in
1647 * arch/x86/kernel/cpu/mtrr/generic.c
1648 */
1649static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1650 u64 start, u64 end)
1651{
1652 int i;
1653 u64 base, mask;
1654 u8 prev_match, curr_match;
1655 int num_var_ranges = KVM_NR_VAR_MTRR;
1656
1657 if (!mtrr_state->enabled)
1658 return 0xFF;
1659
1660 /* Make end inclusive end, instead of exclusive */
1661 end--;
1662
1663 /* Look in fixed ranges. Just return the type as per start */
1664 if (mtrr_state->have_fixed && (start < 0x100000)) {
1665 int idx;
1666
1667 if (start < 0x80000) {
1668 idx = 0;
1669 idx += (start >> 16);
1670 return mtrr_state->fixed_ranges[idx];
1671 } else if (start < 0xC0000) {
1672 idx = 1 * 8;
1673 idx += ((start - 0x80000) >> 14);
1674 return mtrr_state->fixed_ranges[idx];
1675 } else if (start < 0x1000000) {
1676 idx = 3 * 8;
1677 idx += ((start - 0xC0000) >> 12);
1678 return mtrr_state->fixed_ranges[idx];
1679 }
1680 }
1681
1682 /*
1683 * Look in variable ranges
1684 * Look of multiple ranges matching this address and pick type
1685 * as per MTRR precedence
1686 */
1687 if (!(mtrr_state->enabled & 2))
1688 return mtrr_state->def_type;
1689
1690 prev_match = 0xFF;
1691 for (i = 0; i < num_var_ranges; ++i) {
1692 unsigned short start_state, end_state;
1693
1694 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1695 continue;
1696
1697 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1698 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1699 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1700 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1701
1702 start_state = ((start & mask) == (base & mask));
1703 end_state = ((end & mask) == (base & mask));
1704 if (start_state != end_state)
1705 return 0xFE;
1706
1707 if ((start & mask) != (base & mask))
1708 continue;
1709
1710 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1711 if (prev_match == 0xFF) {
1712 prev_match = curr_match;
1713 continue;
1714 }
1715
1716 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1717 curr_match == MTRR_TYPE_UNCACHABLE)
1718 return MTRR_TYPE_UNCACHABLE;
1719
1720 if ((prev_match == MTRR_TYPE_WRBACK &&
1721 curr_match == MTRR_TYPE_WRTHROUGH) ||
1722 (prev_match == MTRR_TYPE_WRTHROUGH &&
1723 curr_match == MTRR_TYPE_WRBACK)) {
1724 prev_match = MTRR_TYPE_WRTHROUGH;
1725 curr_match = MTRR_TYPE_WRTHROUGH;
1726 }
1727
1728 if (prev_match != curr_match)
1729 return MTRR_TYPE_UNCACHABLE;
1730 }
1731
1732 if (prev_match != 0xFF)
1733 return prev_match;
1734
1735 return mtrr_state->def_type;
1736}
1737
4b12f0de 1738u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
74be52e3
SY		 1739{
1740 u8 mtrr;
1741
1742 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1743 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1744 if (mtrr == 0xfe || mtrr == 0xff)
1745 mtrr = MTRR_TYPE_WRBACK;
1746 return mtrr;
1747}
4b12f0de 1748EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
74be52e3 1749
4731d4c7
MT		 1750static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1751{
1752 unsigned index;
1753 struct hlist_head *bucket;
1754 struct kvm_mmu_page *s;
1755 struct hlist_node *node, *n;
1756
f691fe1d 1757 trace_kvm_mmu_unsync_page(sp);
4731d4c7
MT		 1758 index = kvm_page_table_hashfn(sp->gfn);
1759 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1760 /* don't unsync if pagetable is shadowed with multiple roles */
1761 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
f6e2c02b 1762 if (s->gfn != sp->gfn || s->role.direct)
4731d4c7
MT		 1763 continue;
1764 if (s->role.word != sp->role.word)
1765 return 1;
1766 }
4731d4c7
MT		 1767 ++vcpu->kvm->stat.mmu_unsync;
1768 sp->unsync = 1;
6cffe8ca 1769
c2d0ee46 1770 kvm_mmu_mark_parents_unsync(vcpu, sp);
6cffe8ca 1771
4731d4c7
MT		 1772 mmu_convert_notrap(sp);
1773 return 0;
1774}
1775
1776static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1777 bool can_unsync)
1778{
1779 struct kvm_mmu_page *shadow;
1780
1781 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1782 if (shadow) {
1783 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1784 return 1;
1785 if (shadow->unsync)
1786 return 0;
582801a9 1787 if (can_unsync && oos_shadow)
4731d4c7
MT		 1788 return kvm_unsync_page(vcpu, shadow);
1789 return 1;
1790 }
1791 return 0;
1792}
1793
d555c333 1794static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1e73f9dd 1795 unsigned pte_access, int user_fault,
852e3c19 1796 int write_fault, int dirty, int level,
c2d0ee46 1797 gfn_t gfn, pfn_t pfn, bool speculative,
1403283a 1798 bool can_unsync, bool reset_host_protection)
1c4f1fd6
AK		 1799{
1800 u64 spte;
1e73f9dd 1801 int ret = 0;
64d4d521 1802
1c4f1fd6
AK		 1803 /*
1804 * We don't set the accessed bit, since we sometimes want to see
1805 * whether the guest actually used the pte (in order to detect
1806 * demand paging).
1807 */
7b52345e 1808 spte = shadow_base_present_pte | shadow_dirty_mask;
947da538 1809 if (!speculative)
3201b5d9 1810 spte |= shadow_accessed_mask;
1c4f1fd6
AK		 1811 if (!dirty)
1812 pte_access &= ~ACC_WRITE_MASK;
7b52345e
SY		 1813 if (pte_access & ACC_EXEC_MASK)
1814 spte |= shadow_x_mask;
1815 else
1816 spte |= shadow_nx_mask;
1c4f1fd6 1817 if (pte_access & ACC_USER_MASK)
7b52345e 1818 spte |= shadow_user_mask;
852e3c19 1819 if (level > PT_PAGE_TABLE_LEVEL)
05da4558 1820 spte |= PT_PAGE_SIZE_MASK;
4b12f0de
SY		 1821 if (tdp_enabled)
1822 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1823 kvm_is_mmio_pfn(pfn));
1c4f1fd6 1824
1403283a
IE		 1825 if (reset_host_protection)
1826 spte |= SPTE_HOST_WRITEABLE;
1827
35149e21 1828 spte |= (u64)pfn << PAGE_SHIFT;
1c4f1fd6
AK		 1829
1830 if ((pte_access & ACC_WRITE_MASK)
1831 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1c4f1fd6 1832
852e3c19
JR		 1833 if (level > PT_PAGE_TABLE_LEVEL &&
1834 has_wrprotected_page(vcpu->kvm, gfn, level)) {
38187c83
MT		 1835 ret = 1;
1836 spte = shadow_trap_nonpresent_pte;
1837 goto set_pte;
1838 }
1839
1c4f1fd6 1840 spte |= PT_WRITABLE_MASK;
1c4f1fd6 1841
ecc5589f
MT		 1842 /*
1843 * Optimization: for pte sync, if spte was writable the hash
1844 * lookup is unnecessary (and expensive). Write protection
1845 * is responsibility of mmu_get_page / kvm_sync_page.
1846 * Same reasoning can be applied to dirty page accounting.
1847 */
8dae4445 1848 if (!can_unsync && is_writable_pte(*sptep))
ecc5589f
MT		 1849 goto set_pte;
1850
4731d4c7 1851 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1c4f1fd6 1852 pgprintk("%s: found shadow page for %lx, marking ro\n",
b8688d51 1853 __func__, gfn);
1e73f9dd 1854 ret = 1;
1c4f1fd6 1855 pte_access &= ~ACC_WRITE_MASK;
8dae4445 1856 if (is_writable_pte(spte))
1c4f1fd6 1857 spte &= ~PT_WRITABLE_MASK;
1c4f1fd6
AK		 1858 }
1859 }
1860
1c4f1fd6
AK		 1861 if (pte_access & ACC_WRITE_MASK)
1862 mark_page_dirty(vcpu->kvm, gfn);
1863
38187c83 1864set_pte:
d555c333 1865 __set_spte(sptep, spte);
1e73f9dd
MT		 1866 return ret;
1867}
1868
d555c333 1869static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1e73f9dd
MT		 1870 unsigned pt_access, unsigned pte_access,
1871 int user_fault, int write_fault, int dirty,
852e3c19 1872 int *ptwrite, int level, gfn_t gfn,
1403283a
IE		 1873 pfn_t pfn, bool speculative,
1874 bool reset_host_protection)
1e73f9dd
MT		 1875{
1876 int was_rmapped = 0;
8dae4445 1877 int was_writable = is_writable_pte(*sptep);
53a27b39 1878 int rmap_count;
1e73f9dd
MT		 1879
1880 pgprintk("%s: spte %llx access %x write_fault %d"
1881 " user_fault %d gfn %lx\n",
d555c333 1882 __func__, *sptep, pt_access,
1e73f9dd
MT		 1883 write_fault, user_fault, gfn);
1884
d555c333 1885 if (is_rmap_spte(*sptep)) {
1e73f9dd
MT		 1886 /*
1887 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1888 * the parent of the now unreachable PTE.
1889 */
852e3c19
JR		 1890 if (level > PT_PAGE_TABLE_LEVEL &&
1891 !is_large_pte(*sptep)) {
1e73f9dd 1892 struct kvm_mmu_page *child;
d555c333 1893 u64 pte = *sptep;
1e73f9dd
MT		 1894
1895 child = page_header(pte & PT64_BASE_ADDR_MASK);
d555c333
AK		 1896 mmu_page_remove_parent_pte(child, sptep);
1897 } else if (pfn != spte_to_pfn(*sptep)) {
1e73f9dd 1898 pgprintk("hfn old %lx new %lx\n",
d555c333
AK		 1899 spte_to_pfn(*sptep), pfn);
1900 rmap_remove(vcpu->kvm, sptep);
6bed6b9e
JR		 1901 } else
1902 was_rmapped = 1;
1e73f9dd 1903 }
852e3c19 1904
d555c333 1905 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1403283a
IE		 1906 dirty, level, gfn, pfn, speculative, true,
1907 reset_host_protection)) {
1e73f9dd
MT		 1908 if (write_fault)
1909 *ptwrite = 1;
a378b4e6
MT		 1910 kvm_x86_ops->tlb_flush(vcpu);
1911 }
1e73f9dd 1912
d555c333 1913 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1e73f9dd 1914 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
d555c333 1915 is_large_pte(*sptep)? "2MB" : "4kB",
a205bc19
JR		 1916 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1917 *sptep, sptep);
d555c333 1918 if (!was_rmapped && is_large_pte(*sptep))
05da4558
MT		 1919 ++vcpu->kvm->stat.lpages;
1920
d555c333 1921 page_header_update_slot(vcpu->kvm, sptep, gfn);
1c4f1fd6 1922 if (!was_rmapped) {
44ad9944 1923 rmap_count = rmap_add(vcpu, sptep, gfn);
acb66dd0 1924 kvm_release_pfn_clean(pfn);
53a27b39 1925 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
852e3c19 1926 rmap_recycle(vcpu, sptep, gfn);
75e68e60 1927 } else {
8dae4445 1928 if (was_writable)
35149e21 1929 kvm_release_pfn_dirty(pfn);
75e68e60 1930 else
35149e21 1931 kvm_release_pfn_clean(pfn);
1c4f1fd6 1932 }
1b7fcd32 1933 if (speculative) {
d555c333 1934 vcpu->arch.last_pte_updated = sptep;
1b7fcd32
AK		 1935 vcpu->arch.last_pte_gfn = gfn;
1936 }
1c4f1fd6
AK		 1937}
1938
6aa8b732
AK		 1939static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1940{
1941}
1942
9f652d21 1943static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
852e3c19 1944 int level, gfn_t gfn, pfn_t pfn)
140754bc 1945{
9f652d21 1946 struct kvm_shadow_walk_iterator iterator;
140754bc 1947 struct kvm_mmu_page *sp;
9f652d21 1948 int pt_write = 0;
140754bc 1949 gfn_t pseudo_gfn;
6aa8b732 1950
9f652d21 1951 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
852e3c19 1952 if (iterator.level == level) {
9f652d21
AK		 1953 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1954 0, write, 1, &pt_write,
1403283a 1955 level, gfn, pfn, false, true);
9f652d21
AK		 1956 ++vcpu->stat.pf_fixed;
1957 break;
6aa8b732
AK		 1958 }
1959
9f652d21
AK		 1960 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1961 pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1962 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1963 iterator.level - 1,
1964 1, ACC_ALL, iterator.sptep);
1965 if (!sp) {
1966 pgprintk("nonpaging_map: ENOMEM\n");
1967 kvm_release_pfn_clean(pfn);
1968 return -ENOMEM;
1969 }
140754bc 1970
d555c333
AK		 1971 __set_spte(iterator.sptep,
1972 __pa(sp->spt)
1973 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1974 | shadow_user_mask | shadow_x_mask);
9f652d21
AK		 1975 }
1976 }
1977 return pt_write;
6aa8b732
AK		 1978}
1979
10589a46
MT		 1980static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1981{
1982 int r;
852e3c19 1983 int level;
35149e21 1984 pfn_t pfn;
e930bffe 1985 unsigned long mmu_seq;
aaee2c94 1986
852e3c19
JR		 1987 level = mapping_level(vcpu, gfn);
1988
1989 /*
1990 * This path builds a PAE pagetable - so we can map 2mb pages at
1991 * maximum. Therefore check if the level is larger than that.
1992 */
1993 if (level > PT_DIRECTORY_LEVEL)
1994 level = PT_DIRECTORY_LEVEL;
1995
1996 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
05da4558 1997
e930bffe 1998 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 1999 smp_rmb();
35149e21 2000 pfn = gfn_to_pfn(vcpu->kvm, gfn);
aaee2c94 2001
d196e343 2002 /* mmio */
35149e21
AL		 2003 if (is_error_pfn(pfn)) {
2004 kvm_release_pfn_clean(pfn);
d196e343
AK		 2005 return 1;
2006 }
2007
aaee2c94 2008 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA		 2009 if (mmu_notifier_retry(vcpu, mmu_seq))
2010 goto out_unlock;
eb787d10 2011 kvm_mmu_free_some_pages(vcpu);
852e3c19 2012 r = __direct_map(vcpu, v, write, level, gfn, pfn);
aaee2c94
MT		 2013 spin_unlock(&vcpu->kvm->mmu_lock);
2014
aaee2c94 2015
10589a46 2016 return r;
e930bffe
AA		 2017
2018out_unlock:
2019 spin_unlock(&vcpu->kvm->mmu_lock);
2020 kvm_release_pfn_clean(pfn);
2021 return 0;
10589a46
MT		 2022}
2023
2024
17ac10ad
AK		 2025static void mmu_free_roots(struct kvm_vcpu *vcpu)
2026{
2027 int i;
4db35314 2028 struct kvm_mmu_page *sp;
17ac10ad 2029
ad312c7c 2030 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
7b53aa56 2031 return;
aaee2c94 2032 spin_lock(&vcpu->kvm->mmu_lock);
ad312c7c
ZX		 2033 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2034 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad 2035
4db35314
AK		 2036 sp = page_header(root);
2037 --sp->root_count;
2e53d63a
MT		 2038 if (!sp->root_count && sp->role.invalid)
2039 kvm_mmu_zap_page(vcpu->kvm, sp);
ad312c7c 2040 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
aaee2c94 2041 spin_unlock(&vcpu->kvm->mmu_lock);
17ac10ad
AK		 2042 return;
2043 }
17ac10ad 2044 for (i = 0; i < 4; ++i) {
ad312c7c 2045 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad 2046
417726a3 2047 if (root) {
417726a3 2048 root &= PT64_BASE_ADDR_MASK;
4db35314
AK		 2049 sp = page_header(root);
2050 --sp->root_count;
2e53d63a
MT		 2051 if (!sp->root_count && sp->role.invalid)
2052 kvm_mmu_zap_page(vcpu->kvm, sp);
417726a3 2053 }
ad312c7c 2054 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 2055 }
aaee2c94 2056 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 2057 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
17ac10ad
AK		 2058}
2059
8986ecc0
MT		 2060static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2061{
2062 int ret = 0;
2063
2064 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2065 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2066 ret = 1;
2067 }
2068
2069 return ret;
2070}
2071
2072static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
17ac10ad
AK		 2073{
2074 int i;
cea0f0e7 2075 gfn_t root_gfn;
4db35314 2076 struct kvm_mmu_page *sp;
f6e2c02b 2077 int direct = 0;
6de4f3ad 2078 u64 pdptr;
3bb65a22 2079
ad312c7c 2080 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
17ac10ad 2081
ad312c7c
ZX		 2082 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2083 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad
AK		 2084
2085 ASSERT(!VALID_PAGE(root));
fb72d167 2086 if (tdp_enabled)
f6e2c02b 2087 direct = 1;
8986ecc0
MT		 2088 if (mmu_check_root(vcpu, root_gfn))
2089 return 1;
4db35314 2090 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
f6e2c02b 2091 PT64_ROOT_LEVEL, direct,
fb72d167 2092 ACC_ALL, NULL);
4db35314
AK		 2093 root = __pa(sp->spt);
2094 ++sp->root_count;
ad312c7c 2095 vcpu->arch.mmu.root_hpa = root;
8986ecc0 2096 return 0;
17ac10ad 2097 }
f6e2c02b 2098 direct = !is_paging(vcpu);
fb72d167 2099 if (tdp_enabled)
f6e2c02b 2100 direct = 1;
17ac10ad 2101 for (i = 0; i < 4; ++i) {
ad312c7c 2102 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad
AK		 2103
2104 ASSERT(!VALID_PAGE(root));
ad312c7c 2105 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
6de4f3ad 2106 pdptr = kvm_pdptr_read(vcpu, i);
43a3795a 2107 if (!is_present_gpte(pdptr)) {
ad312c7c 2108 vcpu->arch.mmu.pae_root[i] = 0;
417726a3
AK		 2109 continue;
2110 }
6de4f3ad 2111 root_gfn = pdptr >> PAGE_SHIFT;
ad312c7c 2112 } else if (vcpu->arch.mmu.root_level == 0)
cea0f0e7 2113 root_gfn = 0;
8986ecc0
MT		 2114 if (mmu_check_root(vcpu, root_gfn))
2115 return 1;
4db35314 2116 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
f6e2c02b 2117 PT32_ROOT_LEVEL, direct,
f7d9c7b7 2118 ACC_ALL, NULL);
4db35314
AK		 2119 root = __pa(sp->spt);
2120 ++sp->root_count;
ad312c7c 2121 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
17ac10ad 2122 }
ad312c7c 2123 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
8986ecc0 2124 return 0;
17ac10ad
AK		 2125}
2126
0ba73cda
MT		 2127static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2128{
2129 int i;
2130 struct kvm_mmu_page *sp;
2131
2132 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2133 return;
2134 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2135 hpa_t root = vcpu->arch.mmu.root_hpa;
2136 sp = page_header(root);
2137 mmu_sync_children(vcpu, sp);
2138 return;
2139 }
2140 for (i = 0; i < 4; ++i) {
2141 hpa_t root = vcpu->arch.mmu.pae_root[i];
2142
8986ecc0 2143 if (root && VALID_PAGE(root)) {
0ba73cda
MT		 2144 root &= PT64_BASE_ADDR_MASK;
2145 sp = page_header(root);
2146 mmu_sync_children(vcpu, sp);
2147 }
2148 }
2149}
2150
2151void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2152{
2153 spin_lock(&vcpu->kvm->mmu_lock);
2154 mmu_sync_roots(vcpu);
6cffe8ca 2155 spin_unlock(&vcpu->kvm->mmu_lock);
0ba73cda
MT		 2156}
2157
6aa8b732
AK		 2158static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
2159{
2160 return vaddr;
2161}
2162
2163static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
3f3e7124 2164 u32 error_code)
6aa8b732 2165{
e833240f 2166 gfn_t gfn;
e2dec939 2167 int r;
6aa8b732 2168
b8688d51 2169 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
e2dec939
AK		 2170 r = mmu_topup_memory_caches(vcpu);
2171 if (r)
2172 return r;
714b93da 2173
6aa8b732 2174 ASSERT(vcpu);
ad312c7c 2175 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 2176
e833240f 2177 gfn = gva >> PAGE_SHIFT;
6aa8b732 2178
e833240f
AK		 2179 return nonpaging_map(vcpu, gva & PAGE_MASK,
2180 error_code & PFERR_WRITE_MASK, gfn);
6aa8b732
AK		 2181}
2182
fb72d167
JR		 2183static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2184 u32 error_code)
2185{
35149e21 2186 pfn_t pfn;
fb72d167 2187 int r;
852e3c19 2188 int level;
05da4558 2189 gfn_t gfn = gpa >> PAGE_SHIFT;
e930bffe 2190 unsigned long mmu_seq;
fb72d167
JR		 2191
2192 ASSERT(vcpu);
2193 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2194
2195 r = mmu_topup_memory_caches(vcpu);
2196 if (r)
2197 return r;
2198
852e3c19
JR		 2199 level = mapping_level(vcpu, gfn);
2200
2201 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2202
e930bffe 2203 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 2204 smp_rmb();
35149e21 2205 pfn = gfn_to_pfn(vcpu->kvm, gfn);
35149e21
AL		 2206 if (is_error_pfn(pfn)) {
2207 kvm_release_pfn_clean(pfn);
fb72d167
JR		 2208 return 1;
2209 }
2210 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA		 2211 if (mmu_notifier_retry(vcpu, mmu_seq))
2212 goto out_unlock;
fb72d167
JR		 2213 kvm_mmu_free_some_pages(vcpu);
2214 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
852e3c19 2215 level, gfn, pfn);
fb72d167 2216 spin_unlock(&vcpu->kvm->mmu_lock);
fb72d167
JR		 2217
2218 return r;
e930bffe
AA		 2219
2220out_unlock:
2221 spin_unlock(&vcpu->kvm->mmu_lock);
2222 kvm_release_pfn_clean(pfn);
2223 return 0;
fb72d167
JR		 2224}
2225
6aa8b732
AK		 2226static void nonpaging_free(struct kvm_vcpu *vcpu)
2227{
17ac10ad 2228 mmu_free_roots(vcpu);
6aa8b732
AK		 2229}
2230
2231static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2232{
ad312c7c 2233 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK		 2234
2235 context->new_cr3 = nonpaging_new_cr3;
2236 context->page_fault = nonpaging_page_fault;
6aa8b732
AK		 2237 context->gva_to_gpa = nonpaging_gva_to_gpa;
2238 context->free = nonpaging_free;
c7addb90 2239 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 2240 context->sync_page = nonpaging_sync_page;
a7052897 2241 context->invlpg = nonpaging_invlpg;
cea0f0e7 2242 context->root_level = 0;
6aa8b732 2243 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 2244 context->root_hpa = INVALID_PAGE;
6aa8b732
AK		 2245 return 0;
2246}
2247
d835dfec 2248void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
6aa8b732 2249{
1165f5fe 2250 ++vcpu->stat.tlb_flush;
cbdd1bea 2251 kvm_x86_ops->tlb_flush(vcpu);
6aa8b732
AK		 2252}
2253
2254static void paging_new_cr3(struct kvm_vcpu *vcpu)
2255{
b8688d51 2256 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
cea0f0e7 2257 mmu_free_roots(vcpu);
6aa8b732
AK		 2258}
2259
6aa8b732
AK		 2260static void inject_page_fault(struct kvm_vcpu *vcpu,
2261 u64 addr,
2262 u32 err_code)
2263{
c3c91fee 2264 kvm_inject_page_fault(vcpu, addr, err_code);
6aa8b732
AK		 2265}
2266
6aa8b732
AK		 2267static void paging_free(struct kvm_vcpu *vcpu)
2268{
2269 nonpaging_free(vcpu);
2270}
2271
82725b20
DE		 2272static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2273{
2274 int bit7;
2275
2276 bit7 = (gpte >> 7) & 1;
2277 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2278}
2279
6aa8b732
AK		 2280#define PTTYPE 64
2281#include "paging_tmpl.h"
2282#undef PTTYPE
2283
2284#define PTTYPE 32
2285#include "paging_tmpl.h"
2286#undef PTTYPE
2287
82725b20
DE		 2288static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2289{
2290 struct kvm_mmu *context = &vcpu->arch.mmu;
2291 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2292 u64 exb_bit_rsvd = 0;
2293
2294 if (!is_nx(vcpu))
2295 exb_bit_rsvd = rsvd_bits(63, 63);
2296 switch (level) {
2297 case PT32_ROOT_LEVEL:
2298 /* no rsvd bits for 2 level 4K page table entries */
2299 context->rsvd_bits_mask[0][1] = 0;
2300 context->rsvd_bits_mask[0][0] = 0;
2301 if (is_cpuid_PSE36())
2302 /* 36bits PSE 4MB page */
2303 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2304 else
2305 /* 32 bits PSE 4MB page */
2306 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
29a4b933 2307 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
82725b20
DE		 2308 break;
2309 case PT32E_ROOT_LEVEL:
20c466b5
DE		 2310 context->rsvd_bits_mask[0][2] =
2311 rsvd_bits(maxphyaddr, 63) |
2312 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
82725b20 2313 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
4c26b4cd 2314 rsvd_bits(maxphyaddr, 62); /* PDE */
82725b20
DE		 2315 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2316 rsvd_bits(maxphyaddr, 62); /* PTE */
2317 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2318 rsvd_bits(maxphyaddr, 62) |
2319 rsvd_bits(13, 20); /* large page */
29a4b933 2320 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
82725b20
DE		 2321 break;
2322 case PT64_ROOT_LEVEL:
2323 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2324 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2325 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2326 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2327 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
4c26b4cd 2328 rsvd_bits(maxphyaddr, 51);
82725b20
DE		 2329 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2330 rsvd_bits(maxphyaddr, 51);
2331 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
e04da980
JR		 2332 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2333 rsvd_bits(maxphyaddr, 51) |
2334 rsvd_bits(13, 29);
82725b20 2335 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
4c26b4cd
SY		 2336 rsvd_bits(maxphyaddr, 51) |
2337 rsvd_bits(13, 20); /* large page */
29a4b933 2338 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
82725b20
DE		 2339 break;
2340 }
2341}
2342
17ac10ad 2343static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
6aa8b732 2344{
ad312c7c 2345 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK		 2346
2347 ASSERT(is_pae(vcpu));
2348 context->new_cr3 = paging_new_cr3;
2349 context->page_fault = paging64_page_fault;
6aa8b732 2350 context->gva_to_gpa = paging64_gva_to_gpa;
c7addb90 2351 context->prefetch_page = paging64_prefetch_page;
e8bc217a 2352 context->sync_page = paging64_sync_page;
a7052897 2353 context->invlpg = paging64_invlpg;
6aa8b732 2354 context->free = paging_free;
17ac10ad
AK		 2355 context->root_level = level;
2356 context->shadow_root_level = level;
17c3ba9d 2357 context->root_hpa = INVALID_PAGE;
6aa8b732
AK		 2358 return 0;
2359}
2360
17ac10ad
AK		 2361static int paging64_init_context(struct kvm_vcpu *vcpu)
2362{
82725b20 2363 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
17ac10ad
AK		 2364 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2365}
2366
6aa8b732
AK		 2367static int paging32_init_context(struct kvm_vcpu *vcpu)
2368{
ad312c7c 2369 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732 2370
82725b20 2371 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
6aa8b732
AK		 2372 context->new_cr3 = paging_new_cr3;
2373 context->page_fault = paging32_page_fault;
6aa8b732
AK		 2374 context->gva_to_gpa = paging32_gva_to_gpa;
2375 context->free = paging_free;
c7addb90 2376 context->prefetch_page = paging32_prefetch_page;
e8bc217a 2377 context->sync_page = paging32_sync_page;
a7052897 2378 context->invlpg = paging32_invlpg;
6aa8b732
AK		 2379 context->root_level = PT32_ROOT_LEVEL;
2380 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 2381 context->root_hpa = INVALID_PAGE;
6aa8b732
AK		 2382 return 0;
2383}
2384
2385static int paging32E_init_context(struct kvm_vcpu *vcpu)
2386{
82725b20 2387 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
17ac10ad 2388 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
6aa8b732
AK		 2389}
2390
fb72d167
JR		 2391static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2392{
2393 struct kvm_mmu *context = &vcpu->arch.mmu;
2394
2395 context->new_cr3 = nonpaging_new_cr3;
2396 context->page_fault = tdp_page_fault;
2397 context->free = nonpaging_free;
2398 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 2399 context->sync_page = nonpaging_sync_page;
a7052897 2400 context->invlpg = nonpaging_invlpg;
67253af5 2401 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
fb72d167
JR		 2402 context->root_hpa = INVALID_PAGE;
2403
2404 if (!is_paging(vcpu)) {
2405 context->gva_to_gpa = nonpaging_gva_to_gpa;
2406 context->root_level = 0;
2407 } else if (is_long_mode(vcpu)) {
82725b20 2408 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
fb72d167
JR		 2409 context->gva_to_gpa = paging64_gva_to_gpa;
2410 context->root_level = PT64_ROOT_LEVEL;
2411 } else if (is_pae(vcpu)) {
82725b20 2412 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
fb72d167
JR		 2413 context->gva_to_gpa = paging64_gva_to_gpa;
2414 context->root_level = PT32E_ROOT_LEVEL;
2415 } else {
82725b20 2416 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
fb72d167
JR		 2417 context->gva_to_gpa = paging32_gva_to_gpa;
2418 context->root_level = PT32_ROOT_LEVEL;
2419 }
2420
2421 return 0;
2422}
2423
2424static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
6aa8b732 2425{
a770f6f2
AK		 2426 int r;
2427
6aa8b732 2428 ASSERT(vcpu);
ad312c7c 2429 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732
AK		 2430
2431 if (!is_paging(vcpu))
a770f6f2 2432 r = nonpaging_init_context(vcpu);
a9058ecd 2433 else if (is_long_mode(vcpu))
a770f6f2 2434 r = paging64_init_context(vcpu);
6aa8b732 2435 else if (is_pae(vcpu))
a770f6f2 2436 r = paging32E_init_context(vcpu);
6aa8b732 2437 else
a770f6f2
AK		 2438 r = paging32_init_context(vcpu);
2439
2440 vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
2441
2442 return r;
6aa8b732
AK		 2443}
2444
fb72d167
JR		 2445static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2446{
35149e21
AL		 2447 vcpu->arch.update_pte.pfn = bad_pfn;
2448
fb72d167
JR		 2449 if (tdp_enabled)
2450 return init_kvm_tdp_mmu(vcpu);
2451 else
2452 return init_kvm_softmmu(vcpu);
2453}
2454
6aa8b732
AK		 2455static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2456{
2457 ASSERT(vcpu);
ad312c7c
ZX		 2458 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2459 vcpu->arch.mmu.free(vcpu);
2460 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6aa8b732
AK		 2461 }
2462}
2463
2464int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
17c3ba9d
AK		 2465{
2466 destroy_kvm_mmu(vcpu);
2467 return init_kvm_mmu(vcpu);
2468}
8668a3c4 2469EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
17c3ba9d
AK		 2470
2471int kvm_mmu_load(struct kvm_vcpu *vcpu)
6aa8b732 2472{
714b93da
AK		 2473 int r;
2474
e2dec939 2475 r = mmu_topup_memory_caches(vcpu);
17c3ba9d
AK		 2476 if (r)
2477 goto out;
aaee2c94 2478 spin_lock(&vcpu->kvm->mmu_lock);
eb787d10 2479 kvm_mmu_free_some_pages(vcpu);
8986ecc0 2480 r = mmu_alloc_roots(vcpu);
0ba73cda 2481 mmu_sync_roots(vcpu);
aaee2c94 2482 spin_unlock(&vcpu->kvm->mmu_lock);
8986ecc0
MT		 2483 if (r)
2484 goto out;
3662cb1c 2485 /* set_cr3() should ensure TLB has been flushed */
ad312c7c 2486 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
714b93da
AK		 2487out:
2488 return r;
6aa8b732 2489}
17c3ba9d
AK		 2490EXPORT_SYMBOL_GPL(kvm_mmu_load);
2491
2492void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2493{
2494 mmu_free_roots(vcpu);
2495}
6aa8b732 2496
09072daf 2497static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
4db35314 2498 struct kvm_mmu_page *sp,
ac1b714e
AK		 2499 u64 *spte)
2500{
2501 u64 pte;
2502 struct kvm_mmu_page *child;
2503
2504 pte = *spte;
c7addb90 2505 if (is_shadow_present_pte(pte)) {
776e6633 2506 if (is_last_spte(pte, sp->role.level))
290fc38d 2507 rmap_remove(vcpu->kvm, spte);
ac1b714e
AK		 2508 else {
2509 child = page_header(pte & PT64_BASE_ADDR_MASK);
90cb0529 2510 mmu_page_remove_parent_pte(child, spte);
ac1b714e
AK		 2511 }
2512 }
d555c333 2513 __set_spte(spte, shadow_trap_nonpresent_pte);
05da4558
MT		 2514 if (is_large_pte(pte))
2515 --vcpu->kvm->stat.lpages;
ac1b714e
AK		 2516}
2517
0028425f 2518static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
4db35314 2519 struct kvm_mmu_page *sp,
0028425f 2520 u64 *spte,
489f1d65 2521 const void *new)
0028425f 2522{
30945387 2523 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
7e4e4056
JR		 2524 ++vcpu->kvm->stat.mmu_pde_zapped;
2525 return;
30945387 2526 }
0028425f 2527
4cee5764 2528 ++vcpu->kvm->stat.mmu_pte_updated;
4db35314 2529 if (sp->role.glevels == PT32_ROOT_LEVEL)
489f1d65 2530 paging32_update_pte(vcpu, sp, spte, new);
0028425f 2531 else
489f1d65 2532 paging64_update_pte(vcpu, sp, spte, new);
0028425f
AK		 2533}
2534
79539cec
AK		 2535static bool need_remote_flush(u64 old, u64 new)
2536{
2537 if (!is_shadow_present_pte(old))
2538 return false;
2539 if (!is_shadow_present_pte(new))
2540 return true;
2541 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2542 return true;
2543 old ^= PT64_NX_MASK;
2544 new ^= PT64_NX_MASK;
2545 return (old & ~new & PT64_PERM_MASK) != 0;
2546}
2547
2548static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2549{
2550 if (need_remote_flush(old, new))
2551 kvm_flush_remote_tlbs(vcpu->kvm);
2552 else
2553 kvm_mmu_flush_tlb(vcpu);
2554}
2555
12b7d28f
AK		 2556static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2557{
ad312c7c 2558 u64 *spte = vcpu->arch.last_pte_updated;
12b7d28f 2559
7b52345e 2560 return !!(spte && (*spte & shadow_accessed_mask));
12b7d28f
AK		 2561}
2562
d7824fff
AK		 2563static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2564 const u8 *new, int bytes)
2565{
2566 gfn_t gfn;
2567 int r;
2568 u64 gpte = 0;
35149e21 2569 pfn_t pfn;
d7824fff
AK		 2570
2571 if (bytes != 4 && bytes != 8)
2572 return;
2573
2574 /*
2575 * Assume that the pte write on a page table of the same type
2576 * as the current vcpu paging mode. This is nearly always true
2577 * (might be false while changing modes). Note it is verified later
2578 * by update_pte().
2579 */
2580 if (is_pae(vcpu)) {
2581 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2582 if ((bytes == 4) && (gpa % 4 == 0)) {
2583 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2584 if (r)
2585 return;
2586 memcpy((void *)&gpte + (gpa % 8), new, 4);
2587 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2588 memcpy((void *)&gpte, new, 8);
2589 }
2590 } else {
2591 if ((bytes == 4) && (gpa % 4 == 0))
2592 memcpy((void *)&gpte, new, 4);
2593 }
43a3795a 2594 if (!is_present_gpte(gpte))
d7824fff
AK		 2595 return;
2596 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
72dc67a6 2597
e930bffe 2598 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 2599 smp_rmb();
35149e21 2600 pfn = gfn_to_pfn(vcpu->kvm, gfn);
72dc67a6 2601
35149e21
AL		 2602 if (is_error_pfn(pfn)) {
2603 kvm_release_pfn_clean(pfn);
d196e343
AK		 2604 return;
2605 }
d7824fff 2606 vcpu->arch.update_pte.gfn = gfn;
35149e21 2607 vcpu->arch.update_pte.pfn = pfn;
d7824fff
AK		 2608}
2609
1b7fcd32
AK		 2610static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2611{
2612 u64 *spte = vcpu->arch.last_pte_updated;
2613
2614 if (spte
2615 && vcpu->arch.last_pte_gfn == gfn
2616 && shadow_accessed_mask
2617 && !(*spte & shadow_accessed_mask)
2618 && is_shadow_present_pte(*spte))
2619 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2620}
2621
09072daf 2622void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
ad218f85
MT		 2623 const u8 *new, int bytes,
2624 bool guest_initiated)
da4a00f0 2625{
9b7a0325 2626 gfn_t gfn = gpa >> PAGE_SHIFT;
4db35314 2627 struct kvm_mmu_page *sp;
0e7bc4b9 2628 struct hlist_node *node, *n;
9b7a0325
AK		 2629 struct hlist_head *bucket;
2630 unsigned index;
489f1d65 2631 u64 entry, gentry;
9b7a0325 2632 u64 *spte;
9b7a0325 2633 unsigned offset = offset_in_page(gpa);
0e7bc4b9 2634 unsigned pte_size;
9b7a0325 2635 unsigned page_offset;
0e7bc4b9 2636 unsigned misaligned;
fce0657f 2637 unsigned quadrant;
9b7a0325 2638 int level;
86a5ba02 2639 int flooded = 0;
ac1b714e 2640 int npte;
489f1d65 2641 int r;
9b7a0325 2642
b8688d51 2643 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
d7824fff 2644 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
aaee2c94 2645 spin_lock(&vcpu->kvm->mmu_lock);
1b7fcd32 2646 kvm_mmu_access_page(vcpu, gfn);
eb787d10 2647 kvm_mmu_free_some_pages(vcpu);
4cee5764 2648 ++vcpu->kvm->stat.mmu_pte_write;
c7addb90 2649 kvm_mmu_audit(vcpu, "pre pte write");
ad218f85
MT		 2650 if (guest_initiated) {
2651 if (gfn == vcpu->arch.last_pt_write_gfn
2652 && !last_updated_pte_accessed(vcpu)) {
2653 ++vcpu->arch.last_pt_write_count;
2654 if (vcpu->arch.last_pt_write_count >= 3)
2655 flooded = 1;
2656 } else {
2657 vcpu->arch.last_pt_write_gfn = gfn;
2658 vcpu->arch.last_pt_write_count = 1;
2659 vcpu->arch.last_pte_updated = NULL;
2660 }
86a5ba02 2661 }
1ae0a13d 2662 index = kvm_page_table_hashfn(gfn);
f05e70ac 2663 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4db35314 2664 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
f6e2c02b 2665 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
9b7a0325 2666 continue;
4db35314 2667 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
0e7bc4b9 2668 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
e925c5ba 2669 misaligned |= bytes < 4;
86a5ba02 2670 if (misaligned || flooded) {
0e7bc4b9
AK		 2671 /*
2672 * Misaligned accesses are too much trouble to fix
2673 * up; also, they usually indicate a page is not used
2674 * as a page table.
86a5ba02
AK		 2675 *
2676 * If we're seeing too many writes to a page,
2677 * it may no longer be a page table, or we may be
2678 * forking, in which case it is better to unmap the
2679 * page.
0e7bc4b9
AK		 2680 */
2681 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
4db35314 2682 gpa, bytes, sp->role.word);
07385413
MT		 2683 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2684 n = bucket->first;
4cee5764 2685 ++vcpu->kvm->stat.mmu_flooded;
0e7bc4b9
AK		 2686 continue;
2687 }
9b7a0325 2688 page_offset = offset;
4db35314 2689 level = sp->role.level;
ac1b714e 2690 npte = 1;
4db35314 2691 if (sp->role.glevels == PT32_ROOT_LEVEL) {
ac1b714e
AK		 2692 page_offset <<= 1; /* 32->64 */
2693 /*
2694 * A 32-bit pde maps 4MB while the shadow pdes map
2695 * only 2MB. So we need to double the offset again
2696 * and zap two pdes instead of one.
2697 */
2698 if (level == PT32_ROOT_LEVEL) {
6b8d0f9b 2699 page_offset &= ~7; /* kill rounding error */
ac1b714e
AK		 2700 page_offset <<= 1;
2701 npte = 2;
2702 }
fce0657f 2703 quadrant = page_offset >> PAGE_SHIFT;
9b7a0325 2704 page_offset &= ~PAGE_MASK;
4db35314 2705 if (quadrant != sp->role.quadrant)
fce0657f 2706 continue;
9b7a0325 2707 }
4db35314 2708 spte = &sp->spt[page_offset / sizeof(*spte)];
489f1d65
DE		 2709 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2710 gentry = 0;
2711 r = kvm_read_guest_atomic(vcpu->kvm,
2712 gpa & ~(u64)(pte_size - 1),
2713 &gentry, pte_size);
2714 new = (const void *)&gentry;
2715 if (r < 0)
2716 new = NULL;
2717 }
ac1b714e 2718 while (npte--) {
79539cec 2719 entry = *spte;
4db35314 2720 mmu_pte_write_zap_pte(vcpu, sp, spte);
489f1d65
DE		 2721 if (new)
2722 mmu_pte_write_new_pte(vcpu, sp, spte, new);
79539cec 2723 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
ac1b714e 2724 ++spte;
9b7a0325 2725 }
9b7a0325 2726 }
c7addb90 2727 kvm_mmu_audit(vcpu, "post pte write");
aaee2c94 2728 spin_unlock(&vcpu->kvm->mmu_lock);
35149e21
AL		 2729 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2730 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2731 vcpu->arch.update_pte.pfn = bad_pfn;
d7824fff 2732 }
da4a00f0
AK		 2733}
2734
a436036b
AK		 2735int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2736{
10589a46
MT		 2737 gpa_t gpa;
2738 int r;
a436036b 2739
60f24784
AK		 2740 if (tdp_enabled)
2741 return 0;
2742
10589a46 2743 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
10589a46 2744
aaee2c94 2745 spin_lock(&vcpu->kvm->mmu_lock);
10589a46 2746 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
aaee2c94 2747 spin_unlock(&vcpu->kvm->mmu_lock);
10589a46 2748 return r;
a436036b 2749}
577bdc49 2750EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
a436036b 2751
22d95b12 2752void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
ebeace86 2753{
3b80fffe
IE		 2754 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES &&
2755 !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
4db35314 2756 struct kvm_mmu_page *sp;
ebeace86 2757
f05e70ac 2758 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
4db35314
AK		 2759 struct kvm_mmu_page, link);
2760 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 2761 ++vcpu->kvm->stat.mmu_recycled;
ebeace86
AK		 2762 }
2763}
ebeace86 2764
3067714c
AK		 2765int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2766{
2767 int r;
2768 enum emulation_result er;
2769
ad312c7c 2770 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
3067714c
AK		 2771 if (r < 0)
2772 goto out;
2773
2774 if (!r) {
2775 r = 1;
2776 goto out;
2777 }
2778
b733bfb5
AK		 2779 r = mmu_topup_memory_caches(vcpu);
2780 if (r)
2781 goto out;
2782
851ba692 2783 er = emulate_instruction(vcpu, cr2, error_code, 0);
3067714c
AK		 2784
2785 switch (er) {
2786 case EMULATE_DONE:
2787 return 1;
2788 case EMULATE_DO_MMIO:
2789 ++vcpu->stat.mmio_exits;
2790 return 0;
2791 case EMULATE_FAIL:
3f5d18a9
AK		 2792 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
2793 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
a9c7399d 2794 vcpu->run->internal.ndata = 0;
3f5d18a9 2795 return 0;
3067714c
AK		 2796 default:
2797 BUG();
2798 }
2799out:
3067714c
AK		 2800 return r;
2801}
2802EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2803
a7052897
MT		 2804void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2805{
a7052897 2806 vcpu->arch.mmu.invlpg(vcpu, gva);
a7052897
MT		 2807 kvm_mmu_flush_tlb(vcpu);
2808 ++vcpu->stat.invlpg;
2809}
2810EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2811
18552672
JR		 2812void kvm_enable_tdp(void)
2813{
2814 tdp_enabled = true;
2815}
2816EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2817
5f4cb662
JR		 2818void kvm_disable_tdp(void)
2819{
2820 tdp_enabled = false;
2821}
2822EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2823
6aa8b732
AK		 2824static void free_mmu_pages(struct kvm_vcpu *vcpu)
2825{
ad312c7c 2826 free_page((unsigned long)vcpu->arch.mmu.pae_root);
6aa8b732
AK		 2827}
2828
2829static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2830{
17ac10ad 2831 struct page *page;
6aa8b732
AK		 2832 int i;
2833
2834 ASSERT(vcpu);
2835
17ac10ad
AK		 2836 /*
2837 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2838 * Therefore we need to allocate shadow page tables in the first
2839 * 4GB of memory, which happens to fit the DMA32 zone.
2840 */
2841 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2842 if (!page)
d7fa6ab2
WY		 2843 return -ENOMEM;
2844
ad312c7c 2845 vcpu->arch.mmu.pae_root = page_address(page);
17ac10ad 2846 for (i = 0; i < 4; ++i)
ad312c7c 2847 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 2848
6aa8b732 2849 return 0;
6aa8b732
AK		 2850}
2851
8018c27b 2852int kvm_mmu_create(struct kvm_vcpu *vcpu)
6aa8b732 2853{
6aa8b732 2854 ASSERT(vcpu);
ad312c7c 2855 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 2856
8018c27b
IM		 2857 return alloc_mmu_pages(vcpu);
2858}
6aa8b732 2859
8018c27b
IM		 2860int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2861{
2862 ASSERT(vcpu);
ad312c7c 2863 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2c264957 2864
8018c27b 2865 return init_kvm_mmu(vcpu);
6aa8b732
AK		 2866}
2867
2868void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2869{
2870 ASSERT(vcpu);
2871
2872 destroy_kvm_mmu(vcpu);
2873 free_mmu_pages(vcpu);
714b93da 2874 mmu_free_memory_caches(vcpu);
6aa8b732
AK		 2875}
2876
90cb0529 2877void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
6aa8b732 2878{
4db35314 2879 struct kvm_mmu_page *sp;
6aa8b732 2880
f05e70ac 2881 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
6aa8b732
AK		 2882 int i;
2883 u64 *pt;
2884
291f26bc 2885 if (!test_bit(slot, sp->slot_bitmap))
6aa8b732
AK		 2886 continue;
2887
4db35314 2888 pt = sp->spt;
6aa8b732
AK		 2889 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2890 /* avoid RMW */
9647c14c 2891 if (pt[i] & PT_WRITABLE_MASK)
6aa8b732 2892 pt[i] &= ~PT_WRITABLE_MASK;
6aa8b732 2893 }
171d595d 2894 kvm_flush_remote_tlbs(kvm);
6aa8b732 2895}
37a7d8b0 2896
90cb0529 2897void kvm_mmu_zap_all(struct kvm *kvm)
e0fa826f 2898{
4db35314 2899 struct kvm_mmu_page *sp, *node;
e0fa826f 2900
aaee2c94 2901 spin_lock(&kvm->mmu_lock);
f05e70ac 2902 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
07385413
MT		 2903 if (kvm_mmu_zap_page(kvm, sp))
2904 node = container_of(kvm->arch.active_mmu_pages.next,
2905 struct kvm_mmu_page, link);
aaee2c94 2906 spin_unlock(&kvm->mmu_lock);
e0fa826f 2907
90cb0529 2908 kvm_flush_remote_tlbs(kvm);
e0fa826f
DL		 2909}
2910
8b2cf73c 2911static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
3ee16c81
IE		 2912{
2913 struct kvm_mmu_page *page;
2914
2915 page = container_of(kvm->arch.active_mmu_pages.prev,
2916 struct kvm_mmu_page, link);
2917 kvm_mmu_zap_page(kvm, page);
2918}
2919
2920static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2921{
2922 struct kvm *kvm;
2923 struct kvm *kvm_freed = NULL;
2924 int cache_count = 0;
2925
2926 spin_lock(&kvm_lock);
2927
2928 list_for_each_entry(kvm, &vm_list, vm_list) {
f656ce01 2929 int npages, idx;
3ee16c81 2930
f656ce01 2931 idx = srcu_read_lock(&kvm->srcu);
3ee16c81
IE		 2932 spin_lock(&kvm->mmu_lock);
2933 npages = kvm->arch.n_alloc_mmu_pages -
2934 kvm->arch.n_free_mmu_pages;
2935 cache_count += npages;
2936 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2937 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2938 cache_count--;
2939 kvm_freed = kvm;
2940 }
2941 nr_to_scan--;
2942
2943 spin_unlock(&kvm->mmu_lock);
f656ce01 2944 srcu_read_unlock(&kvm->srcu, idx);
3ee16c81
IE		 2945 }
2946 if (kvm_freed)
2947 list_move_tail(&kvm_freed->vm_list, &vm_list);
2948
2949 spin_unlock(&kvm_lock);
2950
2951 return cache_count;
2952}
2953
2954static struct shrinker mmu_shrinker = {
2955 .shrink = mmu_shrink,
2956 .seeks = DEFAULT_SEEKS * 10,
2957};
2958
2ddfd20e 2959static void mmu_destroy_caches(void)
b5a33a75
AK		 2960{
2961 if (pte_chain_cache)
2962 kmem_cache_destroy(pte_chain_cache);
2963 if (rmap_desc_cache)
2964 kmem_cache_destroy(rmap_desc_cache);
d3d25b04
AK		 2965 if (mmu_page_header_cache)
2966 kmem_cache_destroy(mmu_page_header_cache);
b5a33a75
AK		 2967}
2968
3ee16c81
IE		 2969void kvm_mmu_module_exit(void)
2970{
2971 mmu_destroy_caches();
2972 unregister_shrinker(&mmu_shrinker);
2973}
2974
b5a33a75
AK		 2975int kvm_mmu_module_init(void)
2976{
2977 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2978 sizeof(struct kvm_pte_chain),
20c2df83 2979 0, 0, NULL);
b5a33a75
AK		 2980 if (!pte_chain_cache)
2981 goto nomem;
2982 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2983 sizeof(struct kvm_rmap_desc),
20c2df83 2984 0, 0, NULL);
b5a33a75
AK		 2985 if (!rmap_desc_cache)
2986 goto nomem;
2987
d3d25b04
AK		 2988 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2989 sizeof(struct kvm_mmu_page),
20c2df83 2990 0, 0, NULL);
d3d25b04
AK		 2991 if (!mmu_page_header_cache)
2992 goto nomem;
2993
3ee16c81
IE		 2994 register_shrinker(&mmu_shrinker);
2995
b5a33a75
AK		 2996 return 0;
2997
2998nomem:
3ee16c81 2999 mmu_destroy_caches();
b5a33a75
AK		 3000 return -ENOMEM;
3001}
3002
3ad82a7e
ZX		 3003/*
3004 * Caculate mmu pages needed for kvm.
3005 */
3006unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3007{
3008 int i;
3009 unsigned int nr_mmu_pages;
3010 unsigned int nr_pages = 0;
bc6678a3 3011 struct kvm_memslots *slots;
3ad82a7e 3012
bc6678a3
MT		 3013 slots = rcu_dereference(kvm->memslots);
3014 for (i = 0; i < slots->nmemslots; i++)
3015 nr_pages += slots->memslots[i].npages;
3ad82a7e
ZX		 3016
3017 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3018 nr_mmu_pages = max(nr_mmu_pages,
3019 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3020
3021 return nr_mmu_pages;
3022}
3023
2f333bcb
MT		 3024static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3025 unsigned len)
3026{
3027 if (len > buffer->len)
3028 return NULL;
3029 return buffer->ptr;
3030}
3031
3032static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3033 unsigned len)
3034{
3035 void *ret;
3036
3037 ret = pv_mmu_peek_buffer(buffer, len);
3038 if (!ret)
3039 return ret;
3040 buffer->ptr += len;
3041 buffer->len -= len;
3042 buffer->processed += len;
3043 return ret;
3044}
3045
3046static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3047 gpa_t addr, gpa_t value)
3048{
3049 int bytes = 8;
3050 int r;
3051
3052 if (!is_long_mode(vcpu) && !is_pae(vcpu))
3053 bytes = 4;
3054
3055 r = mmu_topup_memory_caches(vcpu);
3056 if (r)
3057 return r;
3058
3200f405 3059 if (!emulator_write_phys(vcpu, addr, &value, bytes))
2f333bcb
MT		 3060 return -EFAULT;
3061
3062 return 1;
3063}
3064
3065static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3066{
a8cd0244 3067 kvm_set_cr3(vcpu, vcpu->arch.cr3);
2f333bcb
MT		 3068 return 1;
3069}
3070
3071static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3072{
3073 spin_lock(&vcpu->kvm->mmu_lock);
3074 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3075 spin_unlock(&vcpu->kvm->mmu_lock);
3076 return 1;
3077}
3078
3079static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3080 struct kvm_pv_mmu_op_buffer *buffer)
3081{
3082 struct kvm_mmu_op_header *header;
3083
3084 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3085 if (!header)
3086 return 0;
3087 switch (header->op) {
3088 case KVM_MMU_OP_WRITE_PTE: {
3089 struct kvm_mmu_op_write_pte *wpte;
3090
3091 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3092 if (!wpte)
3093 return 0;
3094 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3095 wpte->pte_val);
3096 }
3097 case KVM_MMU_OP_FLUSH_TLB: {
3098 struct kvm_mmu_op_flush_tlb *ftlb;
3099
3100 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3101 if (!ftlb)
3102 return 0;
3103 return kvm_pv_mmu_flush_tlb(vcpu);
3104 }
3105 case KVM_MMU_OP_RELEASE_PT: {
3106 struct kvm_mmu_op_release_pt *rpt;
3107
3108 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3109 if (!rpt)
3110 return 0;
3111 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3112 }
3113 default: return 0;
3114 }
3115}
3116
3117int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3118 gpa_t addr, unsigned long *ret)
3119{
3120 int r;
6ad18fba 3121 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
2f333bcb 3122
6ad18fba
DH		 3123 buffer->ptr = buffer->buf;
3124 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3125 buffer->processed = 0;
2f333bcb 3126
6ad18fba 3127 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
2f333bcb
MT		 3128 if (r)
3129 goto out;
3130
6ad18fba
DH		 3131 while (buffer->len) {
3132 r = kvm_pv_mmu_op_one(vcpu, buffer);
2f333bcb
MT		 3133 if (r < 0)
3134 goto out;
3135 if (r == 0)
3136 break;
3137 }
3138
3139 r = 1;
3140out:
6ad18fba 3141 *ret = buffer->processed;
2f333bcb
MT		 3142 return r;
3143}
3144
94d8b056
MT		 3145int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3146{
3147 struct kvm_shadow_walk_iterator iterator;
3148 int nr_sptes = 0;
3149
3150 spin_lock(&vcpu->kvm->mmu_lock);
3151 for_each_shadow_entry(vcpu, addr, iterator) {
3152 sptes[iterator.level-1] = *iterator.sptep;
3153 nr_sptes++;
3154 if (!is_shadow_present_pte(*iterator.sptep))
3155 break;
3156 }
3157 spin_unlock(&vcpu->kvm->mmu_lock);
3158
3159 return nr_sptes;
3160}
3161EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3162
37a7d8b0
AK		 3163#ifdef AUDIT
3164
3165static const char *audit_msg;
3166
3167static gva_t canonicalize(gva_t gva)
3168{
3169#ifdef CONFIG_X86_64
3170 gva = (long long)(gva << 16) >> 16;
3171#endif
3172 return gva;
3173}
3174
08a3732b
MT		 3175
3176typedef void (*inspect_spte_fn) (struct kvm *kvm, struct kvm_mmu_page *sp,
3177 u64 *sptep);
3178
3179static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3180 inspect_spte_fn fn)
3181{
3182 int i;
3183
3184 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3185 u64 ent = sp->spt[i];
3186
3187 if (is_shadow_present_pte(ent)) {
2920d728 3188 if (!is_last_spte(ent, sp->role.level)) {
08a3732b
MT		 3189 struct kvm_mmu_page *child;
3190 child = page_header(ent & PT64_BASE_ADDR_MASK);
3191 __mmu_spte_walk(kvm, child, fn);
2920d728 3192 } else
08a3732b
MT		 3193 fn(kvm, sp, &sp->spt[i]);
3194 }
3195 }
3196}
3197
3198static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3199{
3200 int i;
3201 struct kvm_mmu_page *sp;
3202
3203 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3204 return;
3205 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3206 hpa_t root = vcpu->arch.mmu.root_hpa;
3207 sp = page_header(root);
3208 __mmu_spte_walk(vcpu->kvm, sp, fn);
3209 return;
3210 }
3211 for (i = 0; i < 4; ++i) {
3212 hpa_t root = vcpu->arch.mmu.pae_root[i];
3213
3214 if (root && VALID_PAGE(root)) {
3215 root &= PT64_BASE_ADDR_MASK;
3216 sp = page_header(root);
3217 __mmu_spte_walk(vcpu->kvm, sp, fn);
3218 }
3219 }
3220 return;
3221}
3222
37a7d8b0
AK		 3223static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3224 gva_t va, int level)
3225{
3226 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3227 int i;
3228 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3229
3230 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3231 u64 ent = pt[i];
3232
c7addb90 3233 if (ent == shadow_trap_nonpresent_pte)
37a7d8b0
AK		 3234 continue;
3235
3236 va = canonicalize(va);
2920d728
MT		 3237 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3238 audit_mappings_page(vcpu, ent, va, level - 1);
3239 else {
ad312c7c 3240 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
34382539
JK		 3241 gfn_t gfn = gpa >> PAGE_SHIFT;
3242 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3243 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
37a7d8b0 3244
2aaf65e8
MT		 3245 if (is_error_pfn(pfn)) {
3246 kvm_release_pfn_clean(pfn);
3247 continue;
3248 }
3249
c7addb90 3250 if (is_shadow_present_pte(ent)
37a7d8b0 3251 && (ent & PT64_BASE_ADDR_MASK) != hpa)
c7addb90
AK		 3252 printk(KERN_ERR "xx audit error: (%s) levels %d"
3253 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
ad312c7c 3254 audit_msg, vcpu->arch.mmu.root_level,
d77c26fc
MD		 3255 va, gpa, hpa, ent,
3256 is_shadow_present_pte(ent));
c7addb90
AK		 3257 else if (ent == shadow_notrap_nonpresent_pte
3258 && !is_error_hpa(hpa))
3259 printk(KERN_ERR "audit: (%s) notrap shadow,"
3260 " valid guest gva %lx\n", audit_msg, va);
35149e21 3261 kvm_release_pfn_clean(pfn);
c7addb90 3262
37a7d8b0
AK		 3263 }
3264 }
3265}
3266
3267static void audit_mappings(struct kvm_vcpu *vcpu)
3268{
1ea252af 3269 unsigned i;
37a7d8b0 3270
ad312c7c
ZX		 3271 if (vcpu->arch.mmu.root_level == 4)
3272 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
37a7d8b0
AK		 3273 else
3274 for (i = 0; i < 4; ++i)
ad312c7c 3275 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
37a7d8b0 3276 audit_mappings_page(vcpu,
ad312c7c 3277 vcpu->arch.mmu.pae_root[i],
37a7d8b0
AK		 3278 i << 30,
3279 2);
3280}
3281
3282static int count_rmaps(struct kvm_vcpu *vcpu)
3283{
3284 int nmaps = 0;
bc6678a3 3285 int i, j, k, idx;
37a7d8b0 3286
bc6678a3
MT		 3287 idx = srcu_read_lock(&kvm->srcu);
3288 slots = rcu_dereference(kvm->memslots);
37a7d8b0 3289 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
bc6678a3 3290 struct kvm_memory_slot *m = &slots->memslots[i];
37a7d8b0
AK		 3291 struct kvm_rmap_desc *d;
3292
3293 for (j = 0; j < m->npages; ++j) {
290fc38d 3294 unsigned long *rmapp = &m->rmap[j];
37a7d8b0 3295
290fc38d 3296 if (!*rmapp)
37a7d8b0 3297 continue;
290fc38d 3298 if (!(*rmapp & 1)) {
37a7d8b0
AK		 3299 ++nmaps;
3300 continue;
3301 }
290fc38d 3302 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
37a7d8b0
AK		 3303 while (d) {
3304 for (k = 0; k < RMAP_EXT; ++k)
d555c333 3305 if (d->sptes[k])
37a7d8b0
AK		 3306 ++nmaps;
3307 else
3308 break;
3309 d = d->more;
3310 }
3311 }
3312 }
bc6678a3 3313 srcu_read_unlock(&kvm->srcu, idx);
37a7d8b0
AK		 3314 return nmaps;
3315}
3316
08a3732b
MT		 3317void inspect_spte_has_rmap(struct kvm *kvm, struct kvm_mmu_page *sp, u64 *sptep)
3318{
3319 unsigned long *rmapp;
3320 struct kvm_mmu_page *rev_sp;
3321 gfn_t gfn;
3322
3323 if (*sptep & PT_WRITABLE_MASK) {
3324 rev_sp = page_header(__pa(sptep));
3325 gfn = rev_sp->gfns[sptep - rev_sp->spt];
3326
3327 if (!gfn_to_memslot(kvm, gfn)) {
3328 if (!printk_ratelimit())
3329 return;
3330 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3331 audit_msg, gfn);
3332 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3333 audit_msg, sptep - rev_sp->spt,
3334 rev_sp->gfn);
3335 dump_stack();
3336 return;
3337 }
3338
2920d728
MT		 3339 rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
3340 is_large_pte(*sptep));
08a3732b
MT		 3341 if (!*rmapp) {
3342 if (!printk_ratelimit())
3343 return;
3344 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3345 audit_msg, *sptep);
3346 dump_stack();
3347 }
3348 }
3349
3350}
3351
3352void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3353{
3354 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3355}
3356
3357static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
37a7d8b0 3358{
4db35314 3359 struct kvm_mmu_page *sp;
37a7d8b0
AK		 3360 int i;
3361
f05e70ac 3362 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 3363 u64 *pt = sp->spt;
37a7d8b0 3364
4db35314 3365 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
37a7d8b0
AK		 3366 continue;
3367
3368 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3369 u64 ent = pt[i];
3370
3371 if (!(ent & PT_PRESENT_MASK))
3372 continue;
3373 if (!(ent & PT_WRITABLE_MASK))
3374 continue;
08a3732b 3375 inspect_spte_has_rmap(vcpu->kvm, sp, &pt[i]);
37a7d8b0
AK		 3376 }
3377 }
08a3732b 3378 return;
37a7d8b0
AK		 3379}
3380
3381static void audit_rmap(struct kvm_vcpu *vcpu)
3382{
08a3732b
MT		 3383 check_writable_mappings_rmap(vcpu);
3384 count_rmaps(vcpu);
37a7d8b0
AK		 3385}
3386
3387static void audit_write_protection(struct kvm_vcpu *vcpu)
3388{
4db35314 3389 struct kvm_mmu_page *sp;
290fc38d
IE		 3390 struct kvm_memory_slot *slot;
3391 unsigned long *rmapp;
e58b0f9e 3392 u64 *spte;
290fc38d 3393 gfn_t gfn;
37a7d8b0 3394
f05e70ac 3395 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
f6e2c02b 3396 if (sp->role.direct)
37a7d8b0 3397 continue;
e58b0f9e
MT		 3398 if (sp->unsync)
3399 continue;
37a7d8b0 3400
4db35314 3401 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
2843099f 3402 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
290fc38d 3403 rmapp = &slot->rmap[gfn - slot->base_gfn];
e58b0f9e
MT		 3404
3405 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3406 while (spte) {
3407 if (*spte & PT_WRITABLE_MASK)
3408 printk(KERN_ERR "%s: (%s) shadow page has "
3409 "writable mappings: gfn %lx role %x\n",
b8688d51 3410 __func__, audit_msg, sp->gfn,
4db35314 3411 sp->role.word);
e58b0f9e
MT		 3412 spte = rmap_next(vcpu->kvm, rmapp, spte);
3413 }
37a7d8b0
AK		 3414 }
3415}
3416
3417static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3418{
3419 int olddbg = dbg;
3420
3421 dbg = 0;
3422 audit_msg = msg;
3423 audit_rmap(vcpu);
3424 audit_write_protection(vcpu);
2aaf65e8
MT		 3425 if (strcmp("pre pte write", audit_msg) != 0)
3426 audit_mappings(vcpu);
08a3732b 3427 audit_writable_sptes_have_rmaps(vcpu);
37a7d8b0
AK		 3428 dbg = olddbg;
3429}
3430
3431#endif
Linux kernel - Deliverables
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