KVM: fix sparse warnings: context imbalance
[deliverable/linux.git] / arch / x86 / kvm / mmu.c
CommitLineData
6aa8b732
AK
1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
e495606d 19
1d737c8a 20#include "mmu.h"
e495606d 21
edf88417 22#include <linux/kvm_host.h>
6aa8b732
AK
23#include <linux/types.h>
24#include <linux/string.h>
6aa8b732
AK
25#include <linux/mm.h>
26#include <linux/highmem.h>
27#include <linux/module.h>
448353ca 28#include <linux/swap.h>
05da4558 29#include <linux/hugetlb.h>
2f333bcb 30#include <linux/compiler.h>
6aa8b732 31
e495606d
AK
32#include <asm/page.h>
33#include <asm/cmpxchg.h>
4e542370 34#include <asm/io.h>
13673a90 35#include <asm/vmx.h>
6aa8b732 36
18552672
JR
37/*
38 * When setting this variable to true it enables Two-Dimensional-Paging
39 * where the hardware walks 2 page tables:
40 * 1. the guest-virtual to guest-physical
41 * 2. while doing 1. it walks guest-physical to host-physical
42 * If the hardware supports that we don't need to do shadow paging.
43 */
2f333bcb 44bool tdp_enabled = false;
18552672 45
37a7d8b0
AK
46#undef MMU_DEBUG
47
48#undef AUDIT
49
50#ifdef AUDIT
51static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
52#else
53static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
54#endif
55
56#ifdef MMU_DEBUG
57
58#define pgprintk(x...) do { if (dbg) printk(x); } while (0)
59#define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
60
61#else
62
63#define pgprintk(x...) do { } while (0)
64#define rmap_printk(x...) do { } while (0)
65
66#endif
67
68#if defined(MMU_DEBUG) || defined(AUDIT)
6ada8cca
AK
69static int dbg = 0;
70module_param(dbg, bool, 0644);
37a7d8b0 71#endif
6aa8b732 72
582801a9
MT
73static int oos_shadow = 1;
74module_param(oos_shadow, bool, 0644);
75
d6c69ee9
YD
76#ifndef MMU_DEBUG
77#define ASSERT(x) do { } while (0)
78#else
6aa8b732
AK
79#define ASSERT(x) \
80 if (!(x)) { \
81 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
82 __FILE__, __LINE__, #x); \
83 }
d6c69ee9 84#endif
6aa8b732 85
6aa8b732
AK
86#define PT_FIRST_AVAIL_BITS_SHIFT 9
87#define PT64_SECOND_AVAIL_BITS_SHIFT 52
88
6aa8b732
AK
89#define VALID_PAGE(x) ((x) != INVALID_PAGE)
90
91#define PT64_LEVEL_BITS 9
92
93#define PT64_LEVEL_SHIFT(level) \
d77c26fc 94 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
6aa8b732
AK
95
96#define PT64_LEVEL_MASK(level) \
97 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
98
99#define PT64_INDEX(address, level)\
100 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
101
102
103#define PT32_LEVEL_BITS 10
104
105#define PT32_LEVEL_SHIFT(level) \
d77c26fc 106 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
6aa8b732
AK
107
108#define PT32_LEVEL_MASK(level) \
109 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
110
111#define PT32_INDEX(address, level)\
112 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
113
114
27aba766 115#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
6aa8b732
AK
116#define PT64_DIR_BASE_ADDR_MASK \
117 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
118
119#define PT32_BASE_ADDR_MASK PAGE_MASK
120#define PT32_DIR_BASE_ADDR_MASK \
121 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
122
79539cec
AK
123#define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
124 | PT64_NX_MASK)
6aa8b732
AK
125
126#define PFERR_PRESENT_MASK (1U << 0)
127#define PFERR_WRITE_MASK (1U << 1)
128#define PFERR_USER_MASK (1U << 2)
73b1087e 129#define PFERR_FETCH_MASK (1U << 4)
6aa8b732 130
6aa8b732
AK
131#define PT_DIRECTORY_LEVEL 2
132#define PT_PAGE_TABLE_LEVEL 1
133
cd4a4e53
AK
134#define RMAP_EXT 4
135
fe135d2c
AK
136#define ACC_EXEC_MASK 1
137#define ACC_WRITE_MASK PT_WRITABLE_MASK
138#define ACC_USER_MASK PT_USER_MASK
139#define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
140
135f8c2b
AK
141#define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
142
cd4a4e53
AK
143struct kvm_rmap_desc {
144 u64 *shadow_ptes[RMAP_EXT];
145 struct kvm_rmap_desc *more;
146};
147
2d11123a
AK
148struct kvm_shadow_walk_iterator {
149 u64 addr;
150 hpa_t shadow_addr;
151 int level;
152 u64 *sptep;
153 unsigned index;
154};
155
156#define for_each_shadow_entry(_vcpu, _addr, _walker) \
157 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
158 shadow_walk_okay(&(_walker)); \
159 shadow_walk_next(&(_walker)))
160
161
4731d4c7
MT
162struct kvm_unsync_walk {
163 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
164};
165
ad8cfbe3
MT
166typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
167
b5a33a75
AK
168static struct kmem_cache *pte_chain_cache;
169static struct kmem_cache *rmap_desc_cache;
d3d25b04 170static struct kmem_cache *mmu_page_header_cache;
b5a33a75 171
c7addb90
AK
172static u64 __read_mostly shadow_trap_nonpresent_pte;
173static u64 __read_mostly shadow_notrap_nonpresent_pte;
7b52345e
SY
174static u64 __read_mostly shadow_base_present_pte;
175static u64 __read_mostly shadow_nx_mask;
176static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
177static u64 __read_mostly shadow_user_mask;
178static u64 __read_mostly shadow_accessed_mask;
179static u64 __read_mostly shadow_dirty_mask;
64d4d521 180static u64 __read_mostly shadow_mt_mask;
c7addb90
AK
181
182void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
183{
184 shadow_trap_nonpresent_pte = trap_pte;
185 shadow_notrap_nonpresent_pte = notrap_pte;
186}
187EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
188
7b52345e
SY
189void kvm_mmu_set_base_ptes(u64 base_pte)
190{
191 shadow_base_present_pte = base_pte;
192}
193EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
194
195void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
64d4d521 196 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 mt_mask)
7b52345e
SY
197{
198 shadow_user_mask = user_mask;
199 shadow_accessed_mask = accessed_mask;
200 shadow_dirty_mask = dirty_mask;
201 shadow_nx_mask = nx_mask;
202 shadow_x_mask = x_mask;
64d4d521 203 shadow_mt_mask = mt_mask;
7b52345e
SY
204}
205EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
206
6aa8b732
AK
207static int is_write_protection(struct kvm_vcpu *vcpu)
208{
ad312c7c 209 return vcpu->arch.cr0 & X86_CR0_WP;
6aa8b732
AK
210}
211
212static int is_cpuid_PSE36(void)
213{
214 return 1;
215}
216
73b1087e
AK
217static int is_nx(struct kvm_vcpu *vcpu)
218{
ad312c7c 219 return vcpu->arch.shadow_efer & EFER_NX;
73b1087e
AK
220}
221
6aa8b732
AK
222static int is_present_pte(unsigned long pte)
223{
224 return pte & PT_PRESENT_MASK;
225}
226
c7addb90
AK
227static int is_shadow_present_pte(u64 pte)
228{
c7addb90
AK
229 return pte != shadow_trap_nonpresent_pte
230 && pte != shadow_notrap_nonpresent_pte;
231}
232
05da4558
MT
233static int is_large_pte(u64 pte)
234{
235 return pte & PT_PAGE_SIZE_MASK;
236}
237
6aa8b732
AK
238static int is_writeble_pte(unsigned long pte)
239{
240 return pte & PT_WRITABLE_MASK;
241}
242
e3c5e7ec
AK
243static int is_dirty_pte(unsigned long pte)
244{
7b52345e 245 return pte & shadow_dirty_mask;
e3c5e7ec
AK
246}
247
cd4a4e53
AK
248static int is_rmap_pte(u64 pte)
249{
4b1a80fa 250 return is_shadow_present_pte(pte);
cd4a4e53
AK
251}
252
35149e21 253static pfn_t spte_to_pfn(u64 pte)
0b49ea86 254{
35149e21 255 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
0b49ea86
AK
256}
257
da928521
AK
258static gfn_t pse36_gfn_delta(u32 gpte)
259{
260 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
261
262 return (gpte & PT32_DIR_PSE36_MASK) << shift;
263}
264
e663ee64
AK
265static void set_shadow_pte(u64 *sptep, u64 spte)
266{
267#ifdef CONFIG_X86_64
268 set_64bit((unsigned long *)sptep, spte);
269#else
270 set_64bit((unsigned long long *)sptep, spte);
271#endif
272}
273
e2dec939 274static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
2e3e5882 275 struct kmem_cache *base_cache, int min)
714b93da
AK
276{
277 void *obj;
278
279 if (cache->nobjs >= min)
e2dec939 280 return 0;
714b93da 281 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 282 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
714b93da 283 if (!obj)
e2dec939 284 return -ENOMEM;
714b93da
AK
285 cache->objects[cache->nobjs++] = obj;
286 }
e2dec939 287 return 0;
714b93da
AK
288}
289
290static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
291{
292 while (mc->nobjs)
293 kfree(mc->objects[--mc->nobjs]);
294}
295
c1158e63 296static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
2e3e5882 297 int min)
c1158e63
AK
298{
299 struct page *page;
300
301 if (cache->nobjs >= min)
302 return 0;
303 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 304 page = alloc_page(GFP_KERNEL);
c1158e63
AK
305 if (!page)
306 return -ENOMEM;
307 set_page_private(page, 0);
308 cache->objects[cache->nobjs++] = page_address(page);
309 }
310 return 0;
311}
312
313static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
314{
315 while (mc->nobjs)
c4d198d5 316 free_page((unsigned long)mc->objects[--mc->nobjs]);
c1158e63
AK
317}
318
2e3e5882 319static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
714b93da 320{
e2dec939
AK
321 int r;
322
ad312c7c 323 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
2e3e5882 324 pte_chain_cache, 4);
e2dec939
AK
325 if (r)
326 goto out;
ad312c7c 327 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
c41ef344 328 rmap_desc_cache, 4);
d3d25b04
AK
329 if (r)
330 goto out;
ad312c7c 331 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
d3d25b04
AK
332 if (r)
333 goto out;
ad312c7c 334 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
2e3e5882 335 mmu_page_header_cache, 4);
e2dec939
AK
336out:
337 return r;
714b93da
AK
338}
339
340static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
341{
ad312c7c
ZX
342 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
343 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
344 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
345 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
714b93da
AK
346}
347
348static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
349 size_t size)
350{
351 void *p;
352
353 BUG_ON(!mc->nobjs);
354 p = mc->objects[--mc->nobjs];
714b93da
AK
355 return p;
356}
357
714b93da
AK
358static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
359{
ad312c7c 360 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
714b93da
AK
361 sizeof(struct kvm_pte_chain));
362}
363
90cb0529 364static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
714b93da 365{
90cb0529 366 kfree(pc);
714b93da
AK
367}
368
369static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
370{
ad312c7c 371 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
714b93da
AK
372 sizeof(struct kvm_rmap_desc));
373}
374
90cb0529 375static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
714b93da 376{
90cb0529 377 kfree(rd);
714b93da
AK
378}
379
05da4558
MT
380/*
381 * Return the pointer to the largepage write count for a given
382 * gfn, handling slots that are not large page aligned.
383 */
384static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
385{
386 unsigned long idx;
387
388 idx = (gfn / KVM_PAGES_PER_HPAGE) -
389 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
390 return &slot->lpage_info[idx].write_count;
391}
392
393static void account_shadowed(struct kvm *kvm, gfn_t gfn)
394{
395 int *write_count;
396
2843099f
IE
397 gfn = unalias_gfn(kvm, gfn);
398 write_count = slot_largepage_idx(gfn,
399 gfn_to_memslot_unaliased(kvm, gfn));
05da4558 400 *write_count += 1;
05da4558
MT
401}
402
403static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
404{
405 int *write_count;
406
2843099f
IE
407 gfn = unalias_gfn(kvm, gfn);
408 write_count = slot_largepage_idx(gfn,
409 gfn_to_memslot_unaliased(kvm, gfn));
05da4558
MT
410 *write_count -= 1;
411 WARN_ON(*write_count < 0);
412}
413
414static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
415{
2843099f 416 struct kvm_memory_slot *slot;
05da4558
MT
417 int *largepage_idx;
418
2843099f
IE
419 gfn = unalias_gfn(kvm, gfn);
420 slot = gfn_to_memslot_unaliased(kvm, gfn);
05da4558
MT
421 if (slot) {
422 largepage_idx = slot_largepage_idx(gfn, slot);
423 return *largepage_idx;
424 }
425
426 return 1;
427}
428
429static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
430{
431 struct vm_area_struct *vma;
432 unsigned long addr;
4c2155ce 433 int ret = 0;
05da4558
MT
434
435 addr = gfn_to_hva(kvm, gfn);
436 if (kvm_is_error_hva(addr))
4c2155ce 437 return ret;
05da4558 438
4c2155ce 439 down_read(&current->mm->mmap_sem);
05da4558
MT
440 vma = find_vma(current->mm, addr);
441 if (vma && is_vm_hugetlb_page(vma))
4c2155ce
MT
442 ret = 1;
443 up_read(&current->mm->mmap_sem);
05da4558 444
4c2155ce 445 return ret;
05da4558
MT
446}
447
448static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
449{
450 struct kvm_memory_slot *slot;
451
452 if (has_wrprotected_page(vcpu->kvm, large_gfn))
453 return 0;
454
455 if (!host_largepage_backed(vcpu->kvm, large_gfn))
456 return 0;
457
458 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
459 if (slot && slot->dirty_bitmap)
460 return 0;
461
462 return 1;
463}
464
290fc38d
IE
465/*
466 * Take gfn and return the reverse mapping to it.
467 * Note: gfn must be unaliased before this function get called
468 */
469
05da4558 470static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
290fc38d
IE
471{
472 struct kvm_memory_slot *slot;
05da4558 473 unsigned long idx;
290fc38d
IE
474
475 slot = gfn_to_memslot(kvm, gfn);
05da4558
MT
476 if (!lpage)
477 return &slot->rmap[gfn - slot->base_gfn];
478
479 idx = (gfn / KVM_PAGES_PER_HPAGE) -
480 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
481
482 return &slot->lpage_info[idx].rmap_pde;
290fc38d
IE
483}
484
cd4a4e53
AK
485/*
486 * Reverse mapping data structures:
487 *
290fc38d
IE
488 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
489 * that points to page_address(page).
cd4a4e53 490 *
290fc38d
IE
491 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
492 * containing more mappings.
cd4a4e53 493 */
05da4558 494static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
cd4a4e53 495{
4db35314 496 struct kvm_mmu_page *sp;
cd4a4e53 497 struct kvm_rmap_desc *desc;
290fc38d 498 unsigned long *rmapp;
cd4a4e53
AK
499 int i;
500
501 if (!is_rmap_pte(*spte))
502 return;
290fc38d 503 gfn = unalias_gfn(vcpu->kvm, gfn);
4db35314
AK
504 sp = page_header(__pa(spte));
505 sp->gfns[spte - sp->spt] = gfn;
05da4558 506 rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
290fc38d 507 if (!*rmapp) {
cd4a4e53 508 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
290fc38d
IE
509 *rmapp = (unsigned long)spte;
510 } else if (!(*rmapp & 1)) {
cd4a4e53 511 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
714b93da 512 desc = mmu_alloc_rmap_desc(vcpu);
290fc38d 513 desc->shadow_ptes[0] = (u64 *)*rmapp;
cd4a4e53 514 desc->shadow_ptes[1] = spte;
290fc38d 515 *rmapp = (unsigned long)desc | 1;
cd4a4e53
AK
516 } else {
517 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
290fc38d 518 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
cd4a4e53
AK
519 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
520 desc = desc->more;
521 if (desc->shadow_ptes[RMAP_EXT-1]) {
714b93da 522 desc->more = mmu_alloc_rmap_desc(vcpu);
cd4a4e53
AK
523 desc = desc->more;
524 }
525 for (i = 0; desc->shadow_ptes[i]; ++i)
526 ;
527 desc->shadow_ptes[i] = spte;
528 }
529}
530
290fc38d 531static void rmap_desc_remove_entry(unsigned long *rmapp,
cd4a4e53
AK
532 struct kvm_rmap_desc *desc,
533 int i,
534 struct kvm_rmap_desc *prev_desc)
535{
536 int j;
537
538 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
539 ;
540 desc->shadow_ptes[i] = desc->shadow_ptes[j];
11718b4d 541 desc->shadow_ptes[j] = NULL;
cd4a4e53
AK
542 if (j != 0)
543 return;
544 if (!prev_desc && !desc->more)
290fc38d 545 *rmapp = (unsigned long)desc->shadow_ptes[0];
cd4a4e53
AK
546 else
547 if (prev_desc)
548 prev_desc->more = desc->more;
549 else
290fc38d 550 *rmapp = (unsigned long)desc->more | 1;
90cb0529 551 mmu_free_rmap_desc(desc);
cd4a4e53
AK
552}
553
290fc38d 554static void rmap_remove(struct kvm *kvm, u64 *spte)
cd4a4e53 555{
cd4a4e53
AK
556 struct kvm_rmap_desc *desc;
557 struct kvm_rmap_desc *prev_desc;
4db35314 558 struct kvm_mmu_page *sp;
35149e21 559 pfn_t pfn;
290fc38d 560 unsigned long *rmapp;
cd4a4e53
AK
561 int i;
562
563 if (!is_rmap_pte(*spte))
564 return;
4db35314 565 sp = page_header(__pa(spte));
35149e21 566 pfn = spte_to_pfn(*spte);
7b52345e 567 if (*spte & shadow_accessed_mask)
35149e21 568 kvm_set_pfn_accessed(pfn);
b4231d61 569 if (is_writeble_pte(*spte))
35149e21 570 kvm_release_pfn_dirty(pfn);
b4231d61 571 else
35149e21 572 kvm_release_pfn_clean(pfn);
05da4558 573 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
290fc38d 574 if (!*rmapp) {
cd4a4e53
AK
575 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
576 BUG();
290fc38d 577 } else if (!(*rmapp & 1)) {
cd4a4e53 578 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
290fc38d 579 if ((u64 *)*rmapp != spte) {
cd4a4e53
AK
580 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
581 spte, *spte);
582 BUG();
583 }
290fc38d 584 *rmapp = 0;
cd4a4e53
AK
585 } else {
586 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
290fc38d 587 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
cd4a4e53
AK
588 prev_desc = NULL;
589 while (desc) {
590 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
591 if (desc->shadow_ptes[i] == spte) {
290fc38d 592 rmap_desc_remove_entry(rmapp,
714b93da 593 desc, i,
cd4a4e53
AK
594 prev_desc);
595 return;
596 }
597 prev_desc = desc;
598 desc = desc->more;
599 }
600 BUG();
601 }
602}
603
98348e95 604static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
374cbac0 605{
374cbac0 606 struct kvm_rmap_desc *desc;
98348e95
IE
607 struct kvm_rmap_desc *prev_desc;
608 u64 *prev_spte;
609 int i;
610
611 if (!*rmapp)
612 return NULL;
613 else if (!(*rmapp & 1)) {
614 if (!spte)
615 return (u64 *)*rmapp;
616 return NULL;
617 }
618 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
619 prev_desc = NULL;
620 prev_spte = NULL;
621 while (desc) {
622 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
623 if (prev_spte == spte)
624 return desc->shadow_ptes[i];
625 prev_spte = desc->shadow_ptes[i];
626 }
627 desc = desc->more;
628 }
629 return NULL;
630}
631
b1a36821 632static int rmap_write_protect(struct kvm *kvm, u64 gfn)
98348e95 633{
290fc38d 634 unsigned long *rmapp;
374cbac0 635 u64 *spte;
caa5b8a5 636 int write_protected = 0;
374cbac0 637
4a4c9924 638 gfn = unalias_gfn(kvm, gfn);
05da4558 639 rmapp = gfn_to_rmap(kvm, gfn, 0);
374cbac0 640
98348e95
IE
641 spte = rmap_next(kvm, rmapp, NULL);
642 while (spte) {
374cbac0 643 BUG_ON(!spte);
374cbac0 644 BUG_ON(!(*spte & PT_PRESENT_MASK));
374cbac0 645 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
caa5b8a5 646 if (is_writeble_pte(*spte)) {
9647c14c 647 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
caa5b8a5
ED
648 write_protected = 1;
649 }
9647c14c 650 spte = rmap_next(kvm, rmapp, spte);
374cbac0 651 }
855149aa 652 if (write_protected) {
35149e21 653 pfn_t pfn;
855149aa
IE
654
655 spte = rmap_next(kvm, rmapp, NULL);
35149e21
AL
656 pfn = spte_to_pfn(*spte);
657 kvm_set_pfn_dirty(pfn);
855149aa
IE
658 }
659
05da4558
MT
660 /* check for huge page mappings */
661 rmapp = gfn_to_rmap(kvm, gfn, 1);
662 spte = rmap_next(kvm, rmapp, NULL);
663 while (spte) {
664 BUG_ON(!spte);
665 BUG_ON(!(*spte & PT_PRESENT_MASK));
666 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
667 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
668 if (is_writeble_pte(*spte)) {
669 rmap_remove(kvm, spte);
670 --kvm->stat.lpages;
671 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
6597ca09 672 spte = NULL;
05da4558
MT
673 write_protected = 1;
674 }
675 spte = rmap_next(kvm, rmapp, spte);
676 }
677
b1a36821 678 return write_protected;
374cbac0
AK
679}
680
e930bffe
AA
681static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
682{
683 u64 *spte;
684 int need_tlb_flush = 0;
685
686 while ((spte = rmap_next(kvm, rmapp, NULL))) {
687 BUG_ON(!(*spte & PT_PRESENT_MASK));
688 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
689 rmap_remove(kvm, spte);
690 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
691 need_tlb_flush = 1;
692 }
693 return need_tlb_flush;
694}
695
696static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
697 int (*handler)(struct kvm *kvm, unsigned long *rmapp))
698{
699 int i;
700 int retval = 0;
701
702 /*
703 * If mmap_sem isn't taken, we can look the memslots with only
704 * the mmu_lock by skipping over the slots with userspace_addr == 0.
705 */
706 for (i = 0; i < kvm->nmemslots; i++) {
707 struct kvm_memory_slot *memslot = &kvm->memslots[i];
708 unsigned long start = memslot->userspace_addr;
709 unsigned long end;
710
711 /* mmu_lock protects userspace_addr */
712 if (!start)
713 continue;
714
715 end = start + (memslot->npages << PAGE_SHIFT);
716 if (hva >= start && hva < end) {
717 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
718 retval |= handler(kvm, &memslot->rmap[gfn_offset]);
719 retval |= handler(kvm,
720 &memslot->lpage_info[
721 gfn_offset /
722 KVM_PAGES_PER_HPAGE].rmap_pde);
723 }
724 }
725
726 return retval;
727}
728
729int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
730{
731 return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
732}
733
734static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
735{
736 u64 *spte;
737 int young = 0;
738
534e38b4
SY
739 /* always return old for EPT */
740 if (!shadow_accessed_mask)
741 return 0;
742
e930bffe
AA
743 spte = rmap_next(kvm, rmapp, NULL);
744 while (spte) {
745 int _young;
746 u64 _spte = *spte;
747 BUG_ON(!(_spte & PT_PRESENT_MASK));
748 _young = _spte & PT_ACCESSED_MASK;
749 if (_young) {
750 young = 1;
751 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
752 }
753 spte = rmap_next(kvm, rmapp, spte);
754 }
755 return young;
756}
757
758int kvm_age_hva(struct kvm *kvm, unsigned long hva)
759{
760 return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
761}
762
d6c69ee9 763#ifdef MMU_DEBUG
47ad8e68 764static int is_empty_shadow_page(u64 *spt)
6aa8b732 765{
139bdb2d
AK
766 u64 *pos;
767 u64 *end;
768
47ad8e68 769 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
3c915510 770 if (is_shadow_present_pte(*pos)) {
b8688d51 771 printk(KERN_ERR "%s: %p %llx\n", __func__,
139bdb2d 772 pos, *pos);
6aa8b732 773 return 0;
139bdb2d 774 }
6aa8b732
AK
775 return 1;
776}
d6c69ee9 777#endif
6aa8b732 778
4db35314 779static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
260746c0 780{
4db35314
AK
781 ASSERT(is_empty_shadow_page(sp->spt));
782 list_del(&sp->link);
783 __free_page(virt_to_page(sp->spt));
784 __free_page(virt_to_page(sp->gfns));
785 kfree(sp);
f05e70ac 786 ++kvm->arch.n_free_mmu_pages;
260746c0
AK
787}
788
cea0f0e7
AK
789static unsigned kvm_page_table_hashfn(gfn_t gfn)
790{
1ae0a13d 791 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
cea0f0e7
AK
792}
793
25c0de2c
AK
794static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
795 u64 *parent_pte)
6aa8b732 796{
4db35314 797 struct kvm_mmu_page *sp;
6aa8b732 798
ad312c7c
ZX
799 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
800 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
801 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
4db35314 802 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
f05e70ac 803 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
6cffe8ca 804 INIT_LIST_HEAD(&sp->oos_link);
291f26bc 805 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
4db35314
AK
806 sp->multimapped = 0;
807 sp->parent_pte = parent_pte;
f05e70ac 808 --vcpu->kvm->arch.n_free_mmu_pages;
4db35314 809 return sp;
6aa8b732
AK
810}
811
714b93da 812static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
4db35314 813 struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7
AK
814{
815 struct kvm_pte_chain *pte_chain;
816 struct hlist_node *node;
817 int i;
818
819 if (!parent_pte)
820 return;
4db35314
AK
821 if (!sp->multimapped) {
822 u64 *old = sp->parent_pte;
cea0f0e7
AK
823
824 if (!old) {
4db35314 825 sp->parent_pte = parent_pte;
cea0f0e7
AK
826 return;
827 }
4db35314 828 sp->multimapped = 1;
714b93da 829 pte_chain = mmu_alloc_pte_chain(vcpu);
4db35314
AK
830 INIT_HLIST_HEAD(&sp->parent_ptes);
831 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
832 pte_chain->parent_ptes[0] = old;
833 }
4db35314 834 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
cea0f0e7
AK
835 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
836 continue;
837 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
838 if (!pte_chain->parent_ptes[i]) {
839 pte_chain->parent_ptes[i] = parent_pte;
840 return;
841 }
842 }
714b93da 843 pte_chain = mmu_alloc_pte_chain(vcpu);
cea0f0e7 844 BUG_ON(!pte_chain);
4db35314 845 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
846 pte_chain->parent_ptes[0] = parent_pte;
847}
848
4db35314 849static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
cea0f0e7
AK
850 u64 *parent_pte)
851{
852 struct kvm_pte_chain *pte_chain;
853 struct hlist_node *node;
854 int i;
855
4db35314
AK
856 if (!sp->multimapped) {
857 BUG_ON(sp->parent_pte != parent_pte);
858 sp->parent_pte = NULL;
cea0f0e7
AK
859 return;
860 }
4db35314 861 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
cea0f0e7
AK
862 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
863 if (!pte_chain->parent_ptes[i])
864 break;
865 if (pte_chain->parent_ptes[i] != parent_pte)
866 continue;
697fe2e2
AK
867 while (i + 1 < NR_PTE_CHAIN_ENTRIES
868 && pte_chain->parent_ptes[i + 1]) {
cea0f0e7
AK
869 pte_chain->parent_ptes[i]
870 = pte_chain->parent_ptes[i + 1];
871 ++i;
872 }
873 pte_chain->parent_ptes[i] = NULL;
697fe2e2
AK
874 if (i == 0) {
875 hlist_del(&pte_chain->link);
90cb0529 876 mmu_free_pte_chain(pte_chain);
4db35314
AK
877 if (hlist_empty(&sp->parent_ptes)) {
878 sp->multimapped = 0;
879 sp->parent_pte = NULL;
697fe2e2
AK
880 }
881 }
cea0f0e7
AK
882 return;
883 }
884 BUG();
885}
886
ad8cfbe3
MT
887
888static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
889 mmu_parent_walk_fn fn)
890{
891 struct kvm_pte_chain *pte_chain;
892 struct hlist_node *node;
893 struct kvm_mmu_page *parent_sp;
894 int i;
895
896 if (!sp->multimapped && sp->parent_pte) {
897 parent_sp = page_header(__pa(sp->parent_pte));
898 fn(vcpu, parent_sp);
899 mmu_parent_walk(vcpu, parent_sp, fn);
900 return;
901 }
902 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
903 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
904 if (!pte_chain->parent_ptes[i])
905 break;
906 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
907 fn(vcpu, parent_sp);
908 mmu_parent_walk(vcpu, parent_sp, fn);
909 }
910}
911
0074ff63
MT
912static void kvm_mmu_update_unsync_bitmap(u64 *spte)
913{
914 unsigned int index;
915 struct kvm_mmu_page *sp = page_header(__pa(spte));
916
917 index = spte - sp->spt;
60c8aec6
MT
918 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
919 sp->unsync_children++;
920 WARN_ON(!sp->unsync_children);
0074ff63
MT
921}
922
923static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
924{
925 struct kvm_pte_chain *pte_chain;
926 struct hlist_node *node;
927 int i;
928
929 if (!sp->parent_pte)
930 return;
931
932 if (!sp->multimapped) {
933 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
934 return;
935 }
936
937 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
938 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
939 if (!pte_chain->parent_ptes[i])
940 break;
941 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
942 }
943}
944
945static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
946{
0074ff63
MT
947 kvm_mmu_update_parents_unsync(sp);
948 return 1;
949}
950
951static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
952 struct kvm_mmu_page *sp)
953{
954 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
955 kvm_mmu_update_parents_unsync(sp);
956}
957
d761a501
AK
958static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
959 struct kvm_mmu_page *sp)
960{
961 int i;
962
963 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
964 sp->spt[i] = shadow_trap_nonpresent_pte;
965}
966
e8bc217a
MT
967static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
968 struct kvm_mmu_page *sp)
969{
970 return 1;
971}
972
a7052897
MT
973static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
974{
975}
976
60c8aec6
MT
977#define KVM_PAGE_ARRAY_NR 16
978
979struct kvm_mmu_pages {
980 struct mmu_page_and_offset {
981 struct kvm_mmu_page *sp;
982 unsigned int idx;
983 } page[KVM_PAGE_ARRAY_NR];
984 unsigned int nr;
985};
986
0074ff63
MT
987#define for_each_unsync_children(bitmap, idx) \
988 for (idx = find_first_bit(bitmap, 512); \
989 idx < 512; \
990 idx = find_next_bit(bitmap, 512, idx+1))
991
60c8aec6
MT
992int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
993 int idx)
4731d4c7 994{
60c8aec6 995 int i;
4731d4c7 996
60c8aec6
MT
997 if (sp->unsync)
998 for (i=0; i < pvec->nr; i++)
999 if (pvec->page[i].sp == sp)
1000 return 0;
1001
1002 pvec->page[pvec->nr].sp = sp;
1003 pvec->page[pvec->nr].idx = idx;
1004 pvec->nr++;
1005 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1006}
1007
1008static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1009 struct kvm_mmu_pages *pvec)
1010{
1011 int i, ret, nr_unsync_leaf = 0;
4731d4c7 1012
0074ff63 1013 for_each_unsync_children(sp->unsync_child_bitmap, i) {
4731d4c7
MT
1014 u64 ent = sp->spt[i];
1015
87917239 1016 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
4731d4c7
MT
1017 struct kvm_mmu_page *child;
1018 child = page_header(ent & PT64_BASE_ADDR_MASK);
1019
1020 if (child->unsync_children) {
60c8aec6
MT
1021 if (mmu_pages_add(pvec, child, i))
1022 return -ENOSPC;
1023
1024 ret = __mmu_unsync_walk(child, pvec);
1025 if (!ret)
1026 __clear_bit(i, sp->unsync_child_bitmap);
1027 else if (ret > 0)
1028 nr_unsync_leaf += ret;
1029 else
4731d4c7
MT
1030 return ret;
1031 }
1032
1033 if (child->unsync) {
60c8aec6
MT
1034 nr_unsync_leaf++;
1035 if (mmu_pages_add(pvec, child, i))
1036 return -ENOSPC;
4731d4c7
MT
1037 }
1038 }
1039 }
1040
0074ff63 1041 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
4731d4c7
MT
1042 sp->unsync_children = 0;
1043
60c8aec6
MT
1044 return nr_unsync_leaf;
1045}
1046
1047static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1048 struct kvm_mmu_pages *pvec)
1049{
1050 if (!sp->unsync_children)
1051 return 0;
1052
1053 mmu_pages_add(pvec, sp, 0);
1054 return __mmu_unsync_walk(sp, pvec);
4731d4c7
MT
1055}
1056
4db35314 1057static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
cea0f0e7
AK
1058{
1059 unsigned index;
1060 struct hlist_head *bucket;
4db35314 1061 struct kvm_mmu_page *sp;
cea0f0e7
AK
1062 struct hlist_node *node;
1063
b8688d51 1064 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1ae0a13d 1065 index = kvm_page_table_hashfn(gfn);
f05e70ac 1066 bucket = &kvm->arch.mmu_page_hash[index];
4db35314 1067 hlist_for_each_entry(sp, node, bucket, hash_link)
f6e2c02b 1068 if (sp->gfn == gfn && !sp->role.direct
2e53d63a 1069 && !sp->role.invalid) {
cea0f0e7 1070 pgprintk("%s: found role %x\n",
b8688d51 1071 __func__, sp->role.word);
4db35314 1072 return sp;
cea0f0e7
AK
1073 }
1074 return NULL;
1075}
1076
6cffe8ca
MT
1077static void kvm_unlink_unsync_global(struct kvm *kvm, struct kvm_mmu_page *sp)
1078{
1079 list_del(&sp->oos_link);
1080 --kvm->stat.mmu_unsync_global;
1081}
1082
4731d4c7
MT
1083static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1084{
1085 WARN_ON(!sp->unsync);
1086 sp->unsync = 0;
6cffe8ca
MT
1087 if (sp->global)
1088 kvm_unlink_unsync_global(kvm, sp);
4731d4c7
MT
1089 --kvm->stat.mmu_unsync;
1090}
1091
1092static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1093
1094static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1095{
1096 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1097 kvm_mmu_zap_page(vcpu->kvm, sp);
1098 return 1;
1099 }
1100
b1a36821
MT
1101 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1102 kvm_flush_remote_tlbs(vcpu->kvm);
0c0f40bd 1103 kvm_unlink_unsync_page(vcpu->kvm, sp);
4731d4c7
MT
1104 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1105 kvm_mmu_zap_page(vcpu->kvm, sp);
1106 return 1;
1107 }
1108
1109 kvm_mmu_flush_tlb(vcpu);
4731d4c7
MT
1110 return 0;
1111}
1112
60c8aec6
MT
1113struct mmu_page_path {
1114 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1115 unsigned int idx[PT64_ROOT_LEVEL-1];
4731d4c7
MT
1116};
1117
60c8aec6
MT
1118#define for_each_sp(pvec, sp, parents, i) \
1119 for (i = mmu_pages_next(&pvec, &parents, -1), \
1120 sp = pvec.page[i].sp; \
1121 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1122 i = mmu_pages_next(&pvec, &parents, i))
1123
1124int mmu_pages_next(struct kvm_mmu_pages *pvec, struct mmu_page_path *parents,
1125 int i)
1126{
1127 int n;
1128
1129 for (n = i+1; n < pvec->nr; n++) {
1130 struct kvm_mmu_page *sp = pvec->page[n].sp;
1131
1132 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1133 parents->idx[0] = pvec->page[n].idx;
1134 return n;
1135 }
1136
1137 parents->parent[sp->role.level-2] = sp;
1138 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1139 }
1140
1141 return n;
1142}
1143
1144void mmu_pages_clear_parents(struct mmu_page_path *parents)
4731d4c7 1145{
60c8aec6
MT
1146 struct kvm_mmu_page *sp;
1147 unsigned int level = 0;
1148
1149 do {
1150 unsigned int idx = parents->idx[level];
4731d4c7 1151
60c8aec6
MT
1152 sp = parents->parent[level];
1153 if (!sp)
1154 return;
1155
1156 --sp->unsync_children;
1157 WARN_ON((int)sp->unsync_children < 0);
1158 __clear_bit(idx, sp->unsync_child_bitmap);
1159 level++;
1160 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
4731d4c7
MT
1161}
1162
60c8aec6
MT
1163static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1164 struct mmu_page_path *parents,
1165 struct kvm_mmu_pages *pvec)
4731d4c7 1166{
60c8aec6
MT
1167 parents->parent[parent->role.level-1] = NULL;
1168 pvec->nr = 0;
1169}
4731d4c7 1170
60c8aec6
MT
1171static void mmu_sync_children(struct kvm_vcpu *vcpu,
1172 struct kvm_mmu_page *parent)
1173{
1174 int i;
1175 struct kvm_mmu_page *sp;
1176 struct mmu_page_path parents;
1177 struct kvm_mmu_pages pages;
1178
1179 kvm_mmu_pages_init(parent, &parents, &pages);
1180 while (mmu_unsync_walk(parent, &pages)) {
b1a36821
MT
1181 int protected = 0;
1182
1183 for_each_sp(pages, sp, parents, i)
1184 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1185
1186 if (protected)
1187 kvm_flush_remote_tlbs(vcpu->kvm);
1188
60c8aec6
MT
1189 for_each_sp(pages, sp, parents, i) {
1190 kvm_sync_page(vcpu, sp);
1191 mmu_pages_clear_parents(&parents);
1192 }
4731d4c7 1193 cond_resched_lock(&vcpu->kvm->mmu_lock);
60c8aec6
MT
1194 kvm_mmu_pages_init(parent, &parents, &pages);
1195 }
4731d4c7
MT
1196}
1197
cea0f0e7
AK
1198static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1199 gfn_t gfn,
1200 gva_t gaddr,
1201 unsigned level,
f6e2c02b 1202 int direct,
41074d07 1203 unsigned access,
f7d9c7b7 1204 u64 *parent_pte)
cea0f0e7
AK
1205{
1206 union kvm_mmu_page_role role;
1207 unsigned index;
1208 unsigned quadrant;
1209 struct hlist_head *bucket;
4db35314 1210 struct kvm_mmu_page *sp;
4731d4c7 1211 struct hlist_node *node, *tmp;
cea0f0e7 1212
a770f6f2 1213 role = vcpu->arch.mmu.base_role;
cea0f0e7 1214 role.level = level;
f6e2c02b 1215 role.direct = direct;
41074d07 1216 role.access = access;
ad312c7c 1217 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
cea0f0e7
AK
1218 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1219 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1220 role.quadrant = quadrant;
1221 }
b8688d51 1222 pgprintk("%s: looking gfn %lx role %x\n", __func__,
cea0f0e7 1223 gfn, role.word);
1ae0a13d 1224 index = kvm_page_table_hashfn(gfn);
f05e70ac 1225 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4731d4c7
MT
1226 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1227 if (sp->gfn == gfn) {
1228 if (sp->unsync)
1229 if (kvm_sync_page(vcpu, sp))
1230 continue;
1231
1232 if (sp->role.word != role.word)
1233 continue;
1234
4db35314 1235 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
0074ff63
MT
1236 if (sp->unsync_children) {
1237 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1238 kvm_mmu_mark_parents_unsync(vcpu, sp);
1239 }
b8688d51 1240 pgprintk("%s: found\n", __func__);
4db35314 1241 return sp;
cea0f0e7 1242 }
dfc5aa00 1243 ++vcpu->kvm->stat.mmu_cache_miss;
4db35314
AK
1244 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1245 if (!sp)
1246 return sp;
b8688d51 1247 pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
4db35314
AK
1248 sp->gfn = gfn;
1249 sp->role = role;
e2078318 1250 sp->global = role.cr4_pge;
4db35314 1251 hlist_add_head(&sp->hash_link, bucket);
f6e2c02b 1252 if (!direct) {
b1a36821
MT
1253 if (rmap_write_protect(vcpu->kvm, gfn))
1254 kvm_flush_remote_tlbs(vcpu->kvm);
4731d4c7
MT
1255 account_shadowed(vcpu->kvm, gfn);
1256 }
131d8279
AK
1257 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1258 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1259 else
1260 nonpaging_prefetch_page(vcpu, sp);
4db35314 1261 return sp;
cea0f0e7
AK
1262}
1263
2d11123a
AK
1264static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1265 struct kvm_vcpu *vcpu, u64 addr)
1266{
1267 iterator->addr = addr;
1268 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1269 iterator->level = vcpu->arch.mmu.shadow_root_level;
1270 if (iterator->level == PT32E_ROOT_LEVEL) {
1271 iterator->shadow_addr
1272 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1273 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1274 --iterator->level;
1275 if (!iterator->shadow_addr)
1276 iterator->level = 0;
1277 }
1278}
1279
1280static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1281{
1282 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1283 return false;
1284 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1285 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1286 return true;
1287}
1288
1289static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1290{
1291 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1292 --iterator->level;
1293}
1294
90cb0529 1295static void kvm_mmu_page_unlink_children(struct kvm *kvm,
4db35314 1296 struct kvm_mmu_page *sp)
a436036b 1297{
697fe2e2
AK
1298 unsigned i;
1299 u64 *pt;
1300 u64 ent;
1301
4db35314 1302 pt = sp->spt;
697fe2e2 1303
4db35314 1304 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
697fe2e2 1305 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
c7addb90 1306 if (is_shadow_present_pte(pt[i]))
290fc38d 1307 rmap_remove(kvm, &pt[i]);
c7addb90 1308 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2
AK
1309 }
1310 return;
1311 }
1312
1313 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1314 ent = pt[i];
1315
05da4558
MT
1316 if (is_shadow_present_pte(ent)) {
1317 if (!is_large_pte(ent)) {
1318 ent &= PT64_BASE_ADDR_MASK;
1319 mmu_page_remove_parent_pte(page_header(ent),
1320 &pt[i]);
1321 } else {
1322 --kvm->stat.lpages;
1323 rmap_remove(kvm, &pt[i]);
1324 }
1325 }
c7addb90 1326 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2 1327 }
a436036b
AK
1328}
1329
4db35314 1330static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7 1331{
4db35314 1332 mmu_page_remove_parent_pte(sp, parent_pte);
a436036b
AK
1333}
1334
12b7d28f
AK
1335static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1336{
1337 int i;
1338
1339 for (i = 0; i < KVM_MAX_VCPUS; ++i)
1340 if (kvm->vcpus[i])
ad312c7c 1341 kvm->vcpus[i]->arch.last_pte_updated = NULL;
12b7d28f
AK
1342}
1343
31aa2b44 1344static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
a436036b
AK
1345{
1346 u64 *parent_pte;
1347
4db35314
AK
1348 while (sp->multimapped || sp->parent_pte) {
1349 if (!sp->multimapped)
1350 parent_pte = sp->parent_pte;
a436036b
AK
1351 else {
1352 struct kvm_pte_chain *chain;
1353
4db35314 1354 chain = container_of(sp->parent_ptes.first,
a436036b
AK
1355 struct kvm_pte_chain, link);
1356 parent_pte = chain->parent_ptes[0];
1357 }
697fe2e2 1358 BUG_ON(!parent_pte);
4db35314 1359 kvm_mmu_put_page(sp, parent_pte);
c7addb90 1360 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
a436036b 1361 }
31aa2b44
AK
1362}
1363
60c8aec6
MT
1364static int mmu_zap_unsync_children(struct kvm *kvm,
1365 struct kvm_mmu_page *parent)
4731d4c7 1366{
60c8aec6
MT
1367 int i, zapped = 0;
1368 struct mmu_page_path parents;
1369 struct kvm_mmu_pages pages;
4731d4c7 1370
60c8aec6 1371 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
4731d4c7 1372 return 0;
60c8aec6
MT
1373
1374 kvm_mmu_pages_init(parent, &parents, &pages);
1375 while (mmu_unsync_walk(parent, &pages)) {
1376 struct kvm_mmu_page *sp;
1377
1378 for_each_sp(pages, sp, parents, i) {
1379 kvm_mmu_zap_page(kvm, sp);
1380 mmu_pages_clear_parents(&parents);
1381 }
1382 zapped += pages.nr;
1383 kvm_mmu_pages_init(parent, &parents, &pages);
1384 }
1385
1386 return zapped;
4731d4c7
MT
1387}
1388
07385413 1389static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
31aa2b44 1390{
4731d4c7 1391 int ret;
31aa2b44 1392 ++kvm->stat.mmu_shadow_zapped;
4731d4c7 1393 ret = mmu_zap_unsync_children(kvm, sp);
4db35314 1394 kvm_mmu_page_unlink_children(kvm, sp);
31aa2b44 1395 kvm_mmu_unlink_parents(kvm, sp);
5b5c6a5a 1396 kvm_flush_remote_tlbs(kvm);
f6e2c02b 1397 if (!sp->role.invalid && !sp->role.direct)
5b5c6a5a 1398 unaccount_shadowed(kvm, sp->gfn);
4731d4c7
MT
1399 if (sp->unsync)
1400 kvm_unlink_unsync_page(kvm, sp);
4db35314
AK
1401 if (!sp->root_count) {
1402 hlist_del(&sp->hash_link);
1403 kvm_mmu_free_page(kvm, sp);
2e53d63a 1404 } else {
2e53d63a 1405 sp->role.invalid = 1;
5b5c6a5a 1406 list_move(&sp->link, &kvm->arch.active_mmu_pages);
2e53d63a
MT
1407 kvm_reload_remote_mmus(kvm);
1408 }
12b7d28f 1409 kvm_mmu_reset_last_pte_updated(kvm);
4731d4c7 1410 return ret;
a436036b
AK
1411}
1412
82ce2c96
IE
1413/*
1414 * Changing the number of mmu pages allocated to the vm
1415 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1416 */
1417void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1418{
1419 /*
1420 * If we set the number of mmu pages to be smaller be than the
1421 * number of actived pages , we must to free some mmu pages before we
1422 * change the value
1423 */
1424
f05e70ac 1425 if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
82ce2c96 1426 kvm_nr_mmu_pages) {
f05e70ac
ZX
1427 int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
1428 - kvm->arch.n_free_mmu_pages;
82ce2c96
IE
1429
1430 while (n_used_mmu_pages > kvm_nr_mmu_pages) {
1431 struct kvm_mmu_page *page;
1432
f05e70ac 1433 page = container_of(kvm->arch.active_mmu_pages.prev,
82ce2c96
IE
1434 struct kvm_mmu_page, link);
1435 kvm_mmu_zap_page(kvm, page);
1436 n_used_mmu_pages--;
1437 }
f05e70ac 1438 kvm->arch.n_free_mmu_pages = 0;
82ce2c96
IE
1439 }
1440 else
f05e70ac
ZX
1441 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1442 - kvm->arch.n_alloc_mmu_pages;
82ce2c96 1443
f05e70ac 1444 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
82ce2c96
IE
1445}
1446
f67a46f4 1447static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
a436036b
AK
1448{
1449 unsigned index;
1450 struct hlist_head *bucket;
4db35314 1451 struct kvm_mmu_page *sp;
a436036b
AK
1452 struct hlist_node *node, *n;
1453 int r;
1454
b8688d51 1455 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
a436036b 1456 r = 0;
1ae0a13d 1457 index = kvm_page_table_hashfn(gfn);
f05e70ac 1458 bucket = &kvm->arch.mmu_page_hash[index];
4db35314 1459 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
f6e2c02b 1460 if (sp->gfn == gfn && !sp->role.direct) {
b8688d51 1461 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
4db35314 1462 sp->role.word);
a436036b 1463 r = 1;
07385413
MT
1464 if (kvm_mmu_zap_page(kvm, sp))
1465 n = bucket->first;
a436036b
AK
1466 }
1467 return r;
cea0f0e7
AK
1468}
1469
f67a46f4 1470static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
97a0a01e 1471{
4677a3b6
AK
1472 unsigned index;
1473 struct hlist_head *bucket;
4db35314 1474 struct kvm_mmu_page *sp;
4677a3b6 1475 struct hlist_node *node, *nn;
97a0a01e 1476
4677a3b6
AK
1477 index = kvm_page_table_hashfn(gfn);
1478 bucket = &kvm->arch.mmu_page_hash[index];
1479 hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
f6e2c02b 1480 if (sp->gfn == gfn && !sp->role.direct
4677a3b6
AK
1481 && !sp->role.invalid) {
1482 pgprintk("%s: zap %lx %x\n",
1483 __func__, gfn, sp->role.word);
1484 kvm_mmu_zap_page(kvm, sp);
1485 }
97a0a01e
AK
1486 }
1487}
1488
38c335f1 1489static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
6aa8b732 1490{
38c335f1 1491 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
4db35314 1492 struct kvm_mmu_page *sp = page_header(__pa(pte));
6aa8b732 1493
291f26bc 1494 __set_bit(slot, sp->slot_bitmap);
6aa8b732
AK
1495}
1496
6844dec6
MT
1497static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1498{
1499 int i;
1500 u64 *pt = sp->spt;
1501
1502 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1503 return;
1504
1505 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1506 if (pt[i] == shadow_notrap_nonpresent_pte)
1507 set_shadow_pte(&pt[i], shadow_trap_nonpresent_pte);
1508 }
1509}
1510
039576c0
AK
1511struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1512{
72dc67a6
IE
1513 struct page *page;
1514
ad312c7c 1515 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
039576c0
AK
1516
1517 if (gpa == UNMAPPED_GVA)
1518 return NULL;
72dc67a6 1519
72dc67a6 1520 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
72dc67a6
IE
1521
1522 return page;
039576c0
AK
1523}
1524
74be52e3
SY
1525/*
1526 * The function is based on mtrr_type_lookup() in
1527 * arch/x86/kernel/cpu/mtrr/generic.c
1528 */
1529static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1530 u64 start, u64 end)
1531{
1532 int i;
1533 u64 base, mask;
1534 u8 prev_match, curr_match;
1535 int num_var_ranges = KVM_NR_VAR_MTRR;
1536
1537 if (!mtrr_state->enabled)
1538 return 0xFF;
1539
1540 /* Make end inclusive end, instead of exclusive */
1541 end--;
1542
1543 /* Look in fixed ranges. Just return the type as per start */
1544 if (mtrr_state->have_fixed && (start < 0x100000)) {
1545 int idx;
1546
1547 if (start < 0x80000) {
1548 idx = 0;
1549 idx += (start >> 16);
1550 return mtrr_state->fixed_ranges[idx];
1551 } else if (start < 0xC0000) {
1552 idx = 1 * 8;
1553 idx += ((start - 0x80000) >> 14);
1554 return mtrr_state->fixed_ranges[idx];
1555 } else if (start < 0x1000000) {
1556 idx = 3 * 8;
1557 idx += ((start - 0xC0000) >> 12);
1558 return mtrr_state->fixed_ranges[idx];
1559 }
1560 }
1561
1562 /*
1563 * Look in variable ranges
1564 * Look of multiple ranges matching this address and pick type
1565 * as per MTRR precedence
1566 */
1567 if (!(mtrr_state->enabled & 2))
1568 return mtrr_state->def_type;
1569
1570 prev_match = 0xFF;
1571 for (i = 0; i < num_var_ranges; ++i) {
1572 unsigned short start_state, end_state;
1573
1574 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1575 continue;
1576
1577 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1578 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1579 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1580 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1581
1582 start_state = ((start & mask) == (base & mask));
1583 end_state = ((end & mask) == (base & mask));
1584 if (start_state != end_state)
1585 return 0xFE;
1586
1587 if ((start & mask) != (base & mask))
1588 continue;
1589
1590 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1591 if (prev_match == 0xFF) {
1592 prev_match = curr_match;
1593 continue;
1594 }
1595
1596 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1597 curr_match == MTRR_TYPE_UNCACHABLE)
1598 return MTRR_TYPE_UNCACHABLE;
1599
1600 if ((prev_match == MTRR_TYPE_WRBACK &&
1601 curr_match == MTRR_TYPE_WRTHROUGH) ||
1602 (prev_match == MTRR_TYPE_WRTHROUGH &&
1603 curr_match == MTRR_TYPE_WRBACK)) {
1604 prev_match = MTRR_TYPE_WRTHROUGH;
1605 curr_match = MTRR_TYPE_WRTHROUGH;
1606 }
1607
1608 if (prev_match != curr_match)
1609 return MTRR_TYPE_UNCACHABLE;
1610 }
1611
1612 if (prev_match != 0xFF)
1613 return prev_match;
1614
1615 return mtrr_state->def_type;
1616}
1617
1618static u8 get_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1619{
1620 u8 mtrr;
1621
1622 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1623 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1624 if (mtrr == 0xfe || mtrr == 0xff)
1625 mtrr = MTRR_TYPE_WRBACK;
1626 return mtrr;
1627}
1628
4731d4c7
MT
1629static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1630{
1631 unsigned index;
1632 struct hlist_head *bucket;
1633 struct kvm_mmu_page *s;
1634 struct hlist_node *node, *n;
1635
1636 index = kvm_page_table_hashfn(sp->gfn);
1637 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1638 /* don't unsync if pagetable is shadowed with multiple roles */
1639 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
f6e2c02b 1640 if (s->gfn != sp->gfn || s->role.direct)
4731d4c7
MT
1641 continue;
1642 if (s->role.word != sp->role.word)
1643 return 1;
1644 }
4731d4c7
MT
1645 ++vcpu->kvm->stat.mmu_unsync;
1646 sp->unsync = 1;
6cffe8ca
MT
1647
1648 if (sp->global) {
1649 list_add(&sp->oos_link, &vcpu->kvm->arch.oos_global_pages);
1650 ++vcpu->kvm->stat.mmu_unsync_global;
1651 } else
1652 kvm_mmu_mark_parents_unsync(vcpu, sp);
1653
4731d4c7
MT
1654 mmu_convert_notrap(sp);
1655 return 0;
1656}
1657
1658static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1659 bool can_unsync)
1660{
1661 struct kvm_mmu_page *shadow;
1662
1663 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1664 if (shadow) {
1665 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1666 return 1;
1667 if (shadow->unsync)
1668 return 0;
582801a9 1669 if (can_unsync && oos_shadow)
4731d4c7
MT
1670 return kvm_unsync_page(vcpu, shadow);
1671 return 1;
1672 }
1673 return 0;
1674}
1675
1e73f9dd
MT
1676static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1677 unsigned pte_access, int user_fault,
1678 int write_fault, int dirty, int largepage,
6cffe8ca 1679 int global, gfn_t gfn, pfn_t pfn, bool speculative,
4731d4c7 1680 bool can_unsync)
1c4f1fd6
AK
1681{
1682 u64 spte;
1e73f9dd 1683 int ret = 0;
64d4d521 1684 u64 mt_mask = shadow_mt_mask;
6cffe8ca
MT
1685 struct kvm_mmu_page *sp = page_header(__pa(shadow_pte));
1686
1687 if (!global && sp->global) {
1688 sp->global = 0;
1689 if (sp->unsync) {
1690 kvm_unlink_unsync_global(vcpu->kvm, sp);
1691 kvm_mmu_mark_parents_unsync(vcpu, sp);
1692 }
1693 }
64d4d521 1694
1c4f1fd6
AK
1695 /*
1696 * We don't set the accessed bit, since we sometimes want to see
1697 * whether the guest actually used the pte (in order to detect
1698 * demand paging).
1699 */
7b52345e 1700 spte = shadow_base_present_pte | shadow_dirty_mask;
947da538 1701 if (!speculative)
3201b5d9 1702 spte |= shadow_accessed_mask;
1c4f1fd6
AK
1703 if (!dirty)
1704 pte_access &= ~ACC_WRITE_MASK;
7b52345e
SY
1705 if (pte_access & ACC_EXEC_MASK)
1706 spte |= shadow_x_mask;
1707 else
1708 spte |= shadow_nx_mask;
1c4f1fd6 1709 if (pte_access & ACC_USER_MASK)
7b52345e 1710 spte |= shadow_user_mask;
05da4558
MT
1711 if (largepage)
1712 spte |= PT_PAGE_SIZE_MASK;
64d4d521 1713 if (mt_mask) {
2aaf69dc
SY
1714 if (!kvm_is_mmio_pfn(pfn)) {
1715 mt_mask = get_memory_type(vcpu, gfn) <<
1716 kvm_x86_ops->get_mt_mask_shift();
1717 mt_mask |= VMX_EPT_IGMT_BIT;
1718 } else
1719 mt_mask = MTRR_TYPE_UNCACHABLE <<
1720 kvm_x86_ops->get_mt_mask_shift();
64d4d521
SY
1721 spte |= mt_mask;
1722 }
1c4f1fd6 1723
35149e21 1724 spte |= (u64)pfn << PAGE_SHIFT;
1c4f1fd6
AK
1725
1726 if ((pte_access & ACC_WRITE_MASK)
1727 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1c4f1fd6 1728
38187c83
MT
1729 if (largepage && has_wrprotected_page(vcpu->kvm, gfn)) {
1730 ret = 1;
1731 spte = shadow_trap_nonpresent_pte;
1732 goto set_pte;
1733 }
1734
1c4f1fd6 1735 spte |= PT_WRITABLE_MASK;
1c4f1fd6 1736
ecc5589f
MT
1737 /*
1738 * Optimization: for pte sync, if spte was writable the hash
1739 * lookup is unnecessary (and expensive). Write protection
1740 * is responsibility of mmu_get_page / kvm_sync_page.
1741 * Same reasoning can be applied to dirty page accounting.
1742 */
1743 if (!can_unsync && is_writeble_pte(*shadow_pte))
1744 goto set_pte;
1745
4731d4c7 1746 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1c4f1fd6 1747 pgprintk("%s: found shadow page for %lx, marking ro\n",
b8688d51 1748 __func__, gfn);
1e73f9dd 1749 ret = 1;
1c4f1fd6 1750 pte_access &= ~ACC_WRITE_MASK;
a378b4e6 1751 if (is_writeble_pte(spte))
1c4f1fd6 1752 spte &= ~PT_WRITABLE_MASK;
1c4f1fd6
AK
1753 }
1754 }
1755
1c4f1fd6
AK
1756 if (pte_access & ACC_WRITE_MASK)
1757 mark_page_dirty(vcpu->kvm, gfn);
1758
38187c83 1759set_pte:
1c4f1fd6 1760 set_shadow_pte(shadow_pte, spte);
1e73f9dd
MT
1761 return ret;
1762}
1763
1e73f9dd
MT
1764static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1765 unsigned pt_access, unsigned pte_access,
1766 int user_fault, int write_fault, int dirty,
6cffe8ca
MT
1767 int *ptwrite, int largepage, int global,
1768 gfn_t gfn, pfn_t pfn, bool speculative)
1e73f9dd
MT
1769{
1770 int was_rmapped = 0;
1771 int was_writeble = is_writeble_pte(*shadow_pte);
1772
1773 pgprintk("%s: spte %llx access %x write_fault %d"
1774 " user_fault %d gfn %lx\n",
1775 __func__, *shadow_pte, pt_access,
1776 write_fault, user_fault, gfn);
1777
1778 if (is_rmap_pte(*shadow_pte)) {
1779 /*
1780 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1781 * the parent of the now unreachable PTE.
1782 */
1783 if (largepage && !is_large_pte(*shadow_pte)) {
1784 struct kvm_mmu_page *child;
1785 u64 pte = *shadow_pte;
1786
1787 child = page_header(pte & PT64_BASE_ADDR_MASK);
1788 mmu_page_remove_parent_pte(child, shadow_pte);
1789 } else if (pfn != spte_to_pfn(*shadow_pte)) {
1790 pgprintk("hfn old %lx new %lx\n",
1791 spte_to_pfn(*shadow_pte), pfn);
1792 rmap_remove(vcpu->kvm, shadow_pte);
6bed6b9e
JR
1793 } else
1794 was_rmapped = 1;
1e73f9dd
MT
1795 }
1796 if (set_spte(vcpu, shadow_pte, pte_access, user_fault, write_fault,
6cffe8ca 1797 dirty, largepage, global, gfn, pfn, speculative, true)) {
1e73f9dd
MT
1798 if (write_fault)
1799 *ptwrite = 1;
a378b4e6
MT
1800 kvm_x86_ops->tlb_flush(vcpu);
1801 }
1e73f9dd
MT
1802
1803 pgprintk("%s: setting spte %llx\n", __func__, *shadow_pte);
1804 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1805 is_large_pte(*shadow_pte)? "2MB" : "4kB",
1806 is_present_pte(*shadow_pte)?"RW":"R", gfn,
1807 *shadow_pte, shadow_pte);
1808 if (!was_rmapped && is_large_pte(*shadow_pte))
05da4558
MT
1809 ++vcpu->kvm->stat.lpages;
1810
1c4f1fd6
AK
1811 page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
1812 if (!was_rmapped) {
05da4558 1813 rmap_add(vcpu, shadow_pte, gfn, largepage);
1c4f1fd6 1814 if (!is_rmap_pte(*shadow_pte))
35149e21 1815 kvm_release_pfn_clean(pfn);
75e68e60
IE
1816 } else {
1817 if (was_writeble)
35149e21 1818 kvm_release_pfn_dirty(pfn);
75e68e60 1819 else
35149e21 1820 kvm_release_pfn_clean(pfn);
1c4f1fd6 1821 }
1b7fcd32 1822 if (speculative) {
ad312c7c 1823 vcpu->arch.last_pte_updated = shadow_pte;
1b7fcd32
AK
1824 vcpu->arch.last_pte_gfn = gfn;
1825 }
1c4f1fd6
AK
1826}
1827
6aa8b732
AK
1828static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1829{
1830}
1831
9f652d21
AK
1832static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1833 int largepage, gfn_t gfn, pfn_t pfn)
140754bc 1834{
9f652d21 1835 struct kvm_shadow_walk_iterator iterator;
140754bc 1836 struct kvm_mmu_page *sp;
9f652d21 1837 int pt_write = 0;
140754bc 1838 gfn_t pseudo_gfn;
6aa8b732 1839
9f652d21
AK
1840 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1841 if (iterator.level == PT_PAGE_TABLE_LEVEL
1842 || (largepage && iterator.level == PT_DIRECTORY_LEVEL)) {
1843 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1844 0, write, 1, &pt_write,
1845 largepage, 0, gfn, pfn, false);
1846 ++vcpu->stat.pf_fixed;
1847 break;
6aa8b732
AK
1848 }
1849
9f652d21
AK
1850 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1851 pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1852 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1853 iterator.level - 1,
1854 1, ACC_ALL, iterator.sptep);
1855 if (!sp) {
1856 pgprintk("nonpaging_map: ENOMEM\n");
1857 kvm_release_pfn_clean(pfn);
1858 return -ENOMEM;
1859 }
140754bc 1860
9f652d21
AK
1861 set_shadow_pte(iterator.sptep,
1862 __pa(sp->spt)
1863 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1864 | shadow_user_mask | shadow_x_mask);
1865 }
1866 }
1867 return pt_write;
6aa8b732
AK
1868}
1869
10589a46
MT
1870static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1871{
1872 int r;
05da4558 1873 int largepage = 0;
35149e21 1874 pfn_t pfn;
e930bffe 1875 unsigned long mmu_seq;
aaee2c94 1876
05da4558
MT
1877 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
1878 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1879 largepage = 1;
1880 }
1881
e930bffe 1882 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 1883 smp_rmb();
35149e21 1884 pfn = gfn_to_pfn(vcpu->kvm, gfn);
aaee2c94 1885
d196e343 1886 /* mmio */
35149e21
AL
1887 if (is_error_pfn(pfn)) {
1888 kvm_release_pfn_clean(pfn);
d196e343
AK
1889 return 1;
1890 }
1891
aaee2c94 1892 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA
1893 if (mmu_notifier_retry(vcpu, mmu_seq))
1894 goto out_unlock;
eb787d10 1895 kvm_mmu_free_some_pages(vcpu);
6c41f428 1896 r = __direct_map(vcpu, v, write, largepage, gfn, pfn);
aaee2c94
MT
1897 spin_unlock(&vcpu->kvm->mmu_lock);
1898
aaee2c94 1899
10589a46 1900 return r;
e930bffe
AA
1901
1902out_unlock:
1903 spin_unlock(&vcpu->kvm->mmu_lock);
1904 kvm_release_pfn_clean(pfn);
1905 return 0;
10589a46
MT
1906}
1907
1908
17ac10ad
AK
1909static void mmu_free_roots(struct kvm_vcpu *vcpu)
1910{
1911 int i;
4db35314 1912 struct kvm_mmu_page *sp;
17ac10ad 1913
ad312c7c 1914 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
7b53aa56 1915 return;
aaee2c94 1916 spin_lock(&vcpu->kvm->mmu_lock);
ad312c7c
ZX
1917 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1918 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad 1919
4db35314
AK
1920 sp = page_header(root);
1921 --sp->root_count;
2e53d63a
MT
1922 if (!sp->root_count && sp->role.invalid)
1923 kvm_mmu_zap_page(vcpu->kvm, sp);
ad312c7c 1924 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
aaee2c94 1925 spin_unlock(&vcpu->kvm->mmu_lock);
17ac10ad
AK
1926 return;
1927 }
17ac10ad 1928 for (i = 0; i < 4; ++i) {
ad312c7c 1929 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad 1930
417726a3 1931 if (root) {
417726a3 1932 root &= PT64_BASE_ADDR_MASK;
4db35314
AK
1933 sp = page_header(root);
1934 --sp->root_count;
2e53d63a
MT
1935 if (!sp->root_count && sp->role.invalid)
1936 kvm_mmu_zap_page(vcpu->kvm, sp);
417726a3 1937 }
ad312c7c 1938 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 1939 }
aaee2c94 1940 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 1941 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
17ac10ad
AK
1942}
1943
1944static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
1945{
1946 int i;
cea0f0e7 1947 gfn_t root_gfn;
4db35314 1948 struct kvm_mmu_page *sp;
f6e2c02b 1949 int direct = 0;
3bb65a22 1950
ad312c7c 1951 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
17ac10ad 1952
ad312c7c
ZX
1953 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1954 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad
AK
1955
1956 ASSERT(!VALID_PAGE(root));
fb72d167 1957 if (tdp_enabled)
f6e2c02b 1958 direct = 1;
4db35314 1959 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
f6e2c02b 1960 PT64_ROOT_LEVEL, direct,
fb72d167 1961 ACC_ALL, NULL);
4db35314
AK
1962 root = __pa(sp->spt);
1963 ++sp->root_count;
ad312c7c 1964 vcpu->arch.mmu.root_hpa = root;
17ac10ad
AK
1965 return;
1966 }
f6e2c02b 1967 direct = !is_paging(vcpu);
fb72d167 1968 if (tdp_enabled)
f6e2c02b 1969 direct = 1;
17ac10ad 1970 for (i = 0; i < 4; ++i) {
ad312c7c 1971 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad
AK
1972
1973 ASSERT(!VALID_PAGE(root));
ad312c7c
ZX
1974 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
1975 if (!is_present_pte(vcpu->arch.pdptrs[i])) {
1976 vcpu->arch.mmu.pae_root[i] = 0;
417726a3
AK
1977 continue;
1978 }
ad312c7c
ZX
1979 root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
1980 } else if (vcpu->arch.mmu.root_level == 0)
cea0f0e7 1981 root_gfn = 0;
4db35314 1982 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
f6e2c02b 1983 PT32_ROOT_LEVEL, direct,
f7d9c7b7 1984 ACC_ALL, NULL);
4db35314
AK
1985 root = __pa(sp->spt);
1986 ++sp->root_count;
ad312c7c 1987 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
17ac10ad 1988 }
ad312c7c 1989 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
17ac10ad
AK
1990}
1991
0ba73cda
MT
1992static void mmu_sync_roots(struct kvm_vcpu *vcpu)
1993{
1994 int i;
1995 struct kvm_mmu_page *sp;
1996
1997 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
1998 return;
1999 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2000 hpa_t root = vcpu->arch.mmu.root_hpa;
2001 sp = page_header(root);
2002 mmu_sync_children(vcpu, sp);
2003 return;
2004 }
2005 for (i = 0; i < 4; ++i) {
2006 hpa_t root = vcpu->arch.mmu.pae_root[i];
2007
2008 if (root) {
2009 root &= PT64_BASE_ADDR_MASK;
2010 sp = page_header(root);
2011 mmu_sync_children(vcpu, sp);
2012 }
2013 }
2014}
2015
6cffe8ca
MT
2016static void mmu_sync_global(struct kvm_vcpu *vcpu)
2017{
2018 struct kvm *kvm = vcpu->kvm;
2019 struct kvm_mmu_page *sp, *n;
2020
2021 list_for_each_entry_safe(sp, n, &kvm->arch.oos_global_pages, oos_link)
2022 kvm_sync_page(vcpu, sp);
2023}
2024
0ba73cda
MT
2025void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2026{
2027 spin_lock(&vcpu->kvm->mmu_lock);
2028 mmu_sync_roots(vcpu);
6cffe8ca
MT
2029 spin_unlock(&vcpu->kvm->mmu_lock);
2030}
2031
2032void kvm_mmu_sync_global(struct kvm_vcpu *vcpu)
2033{
2034 spin_lock(&vcpu->kvm->mmu_lock);
2035 mmu_sync_global(vcpu);
0ba73cda
MT
2036 spin_unlock(&vcpu->kvm->mmu_lock);
2037}
2038
6aa8b732
AK
2039static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
2040{
2041 return vaddr;
2042}
2043
2044static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
3f3e7124 2045 u32 error_code)
6aa8b732 2046{
e833240f 2047 gfn_t gfn;
e2dec939 2048 int r;
6aa8b732 2049
b8688d51 2050 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
e2dec939
AK
2051 r = mmu_topup_memory_caches(vcpu);
2052 if (r)
2053 return r;
714b93da 2054
6aa8b732 2055 ASSERT(vcpu);
ad312c7c 2056 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 2057
e833240f 2058 gfn = gva >> PAGE_SHIFT;
6aa8b732 2059
e833240f
AK
2060 return nonpaging_map(vcpu, gva & PAGE_MASK,
2061 error_code & PFERR_WRITE_MASK, gfn);
6aa8b732
AK
2062}
2063
fb72d167
JR
2064static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2065 u32 error_code)
2066{
35149e21 2067 pfn_t pfn;
fb72d167 2068 int r;
05da4558
MT
2069 int largepage = 0;
2070 gfn_t gfn = gpa >> PAGE_SHIFT;
e930bffe 2071 unsigned long mmu_seq;
fb72d167
JR
2072
2073 ASSERT(vcpu);
2074 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2075
2076 r = mmu_topup_memory_caches(vcpu);
2077 if (r)
2078 return r;
2079
05da4558
MT
2080 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
2081 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
2082 largepage = 1;
2083 }
e930bffe 2084 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 2085 smp_rmb();
35149e21 2086 pfn = gfn_to_pfn(vcpu->kvm, gfn);
35149e21
AL
2087 if (is_error_pfn(pfn)) {
2088 kvm_release_pfn_clean(pfn);
fb72d167
JR
2089 return 1;
2090 }
2091 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA
2092 if (mmu_notifier_retry(vcpu, mmu_seq))
2093 goto out_unlock;
fb72d167
JR
2094 kvm_mmu_free_some_pages(vcpu);
2095 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
6c41f428 2096 largepage, gfn, pfn);
fb72d167 2097 spin_unlock(&vcpu->kvm->mmu_lock);
fb72d167
JR
2098
2099 return r;
e930bffe
AA
2100
2101out_unlock:
2102 spin_unlock(&vcpu->kvm->mmu_lock);
2103 kvm_release_pfn_clean(pfn);
2104 return 0;
fb72d167
JR
2105}
2106
6aa8b732
AK
2107static void nonpaging_free(struct kvm_vcpu *vcpu)
2108{
17ac10ad 2109 mmu_free_roots(vcpu);
6aa8b732
AK
2110}
2111
2112static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2113{
ad312c7c 2114 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
2115
2116 context->new_cr3 = nonpaging_new_cr3;
2117 context->page_fault = nonpaging_page_fault;
6aa8b732
AK
2118 context->gva_to_gpa = nonpaging_gva_to_gpa;
2119 context->free = nonpaging_free;
c7addb90 2120 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 2121 context->sync_page = nonpaging_sync_page;
a7052897 2122 context->invlpg = nonpaging_invlpg;
cea0f0e7 2123 context->root_level = 0;
6aa8b732 2124 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 2125 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
2126 return 0;
2127}
2128
d835dfec 2129void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
6aa8b732 2130{
1165f5fe 2131 ++vcpu->stat.tlb_flush;
cbdd1bea 2132 kvm_x86_ops->tlb_flush(vcpu);
6aa8b732
AK
2133}
2134
2135static void paging_new_cr3(struct kvm_vcpu *vcpu)
2136{
b8688d51 2137 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
cea0f0e7 2138 mmu_free_roots(vcpu);
6aa8b732
AK
2139}
2140
6aa8b732
AK
2141static void inject_page_fault(struct kvm_vcpu *vcpu,
2142 u64 addr,
2143 u32 err_code)
2144{
c3c91fee 2145 kvm_inject_page_fault(vcpu, addr, err_code);
6aa8b732
AK
2146}
2147
6aa8b732
AK
2148static void paging_free(struct kvm_vcpu *vcpu)
2149{
2150 nonpaging_free(vcpu);
2151}
2152
2153#define PTTYPE 64
2154#include "paging_tmpl.h"
2155#undef PTTYPE
2156
2157#define PTTYPE 32
2158#include "paging_tmpl.h"
2159#undef PTTYPE
2160
17ac10ad 2161static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
6aa8b732 2162{
ad312c7c 2163 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
2164
2165 ASSERT(is_pae(vcpu));
2166 context->new_cr3 = paging_new_cr3;
2167 context->page_fault = paging64_page_fault;
6aa8b732 2168 context->gva_to_gpa = paging64_gva_to_gpa;
c7addb90 2169 context->prefetch_page = paging64_prefetch_page;
e8bc217a 2170 context->sync_page = paging64_sync_page;
a7052897 2171 context->invlpg = paging64_invlpg;
6aa8b732 2172 context->free = paging_free;
17ac10ad
AK
2173 context->root_level = level;
2174 context->shadow_root_level = level;
17c3ba9d 2175 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
2176 return 0;
2177}
2178
17ac10ad
AK
2179static int paging64_init_context(struct kvm_vcpu *vcpu)
2180{
2181 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2182}
2183
6aa8b732
AK
2184static int paging32_init_context(struct kvm_vcpu *vcpu)
2185{
ad312c7c 2186 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
2187
2188 context->new_cr3 = paging_new_cr3;
2189 context->page_fault = paging32_page_fault;
6aa8b732
AK
2190 context->gva_to_gpa = paging32_gva_to_gpa;
2191 context->free = paging_free;
c7addb90 2192 context->prefetch_page = paging32_prefetch_page;
e8bc217a 2193 context->sync_page = paging32_sync_page;
a7052897 2194 context->invlpg = paging32_invlpg;
6aa8b732
AK
2195 context->root_level = PT32_ROOT_LEVEL;
2196 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 2197 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
2198 return 0;
2199}
2200
2201static int paging32E_init_context(struct kvm_vcpu *vcpu)
2202{
17ac10ad 2203 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
6aa8b732
AK
2204}
2205
fb72d167
JR
2206static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2207{
2208 struct kvm_mmu *context = &vcpu->arch.mmu;
2209
2210 context->new_cr3 = nonpaging_new_cr3;
2211 context->page_fault = tdp_page_fault;
2212 context->free = nonpaging_free;
2213 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 2214 context->sync_page = nonpaging_sync_page;
a7052897 2215 context->invlpg = nonpaging_invlpg;
67253af5 2216 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
fb72d167
JR
2217 context->root_hpa = INVALID_PAGE;
2218
2219 if (!is_paging(vcpu)) {
2220 context->gva_to_gpa = nonpaging_gva_to_gpa;
2221 context->root_level = 0;
2222 } else if (is_long_mode(vcpu)) {
2223 context->gva_to_gpa = paging64_gva_to_gpa;
2224 context->root_level = PT64_ROOT_LEVEL;
2225 } else if (is_pae(vcpu)) {
2226 context->gva_to_gpa = paging64_gva_to_gpa;
2227 context->root_level = PT32E_ROOT_LEVEL;
2228 } else {
2229 context->gva_to_gpa = paging32_gva_to_gpa;
2230 context->root_level = PT32_ROOT_LEVEL;
2231 }
2232
2233 return 0;
2234}
2235
2236static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
6aa8b732 2237{
a770f6f2
AK
2238 int r;
2239
6aa8b732 2240 ASSERT(vcpu);
ad312c7c 2241 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732
AK
2242
2243 if (!is_paging(vcpu))
a770f6f2 2244 r = nonpaging_init_context(vcpu);
a9058ecd 2245 else if (is_long_mode(vcpu))
a770f6f2 2246 r = paging64_init_context(vcpu);
6aa8b732 2247 else if (is_pae(vcpu))
a770f6f2 2248 r = paging32E_init_context(vcpu);
6aa8b732 2249 else
a770f6f2
AK
2250 r = paging32_init_context(vcpu);
2251
2252 vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
2253
2254 return r;
6aa8b732
AK
2255}
2256
fb72d167
JR
2257static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2258{
35149e21
AL
2259 vcpu->arch.update_pte.pfn = bad_pfn;
2260
fb72d167
JR
2261 if (tdp_enabled)
2262 return init_kvm_tdp_mmu(vcpu);
2263 else
2264 return init_kvm_softmmu(vcpu);
2265}
2266
6aa8b732
AK
2267static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2268{
2269 ASSERT(vcpu);
ad312c7c
ZX
2270 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2271 vcpu->arch.mmu.free(vcpu);
2272 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6aa8b732
AK
2273 }
2274}
2275
2276int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
17c3ba9d
AK
2277{
2278 destroy_kvm_mmu(vcpu);
2279 return init_kvm_mmu(vcpu);
2280}
8668a3c4 2281EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
17c3ba9d
AK
2282
2283int kvm_mmu_load(struct kvm_vcpu *vcpu)
6aa8b732 2284{
714b93da
AK
2285 int r;
2286
e2dec939 2287 r = mmu_topup_memory_caches(vcpu);
17c3ba9d
AK
2288 if (r)
2289 goto out;
aaee2c94 2290 spin_lock(&vcpu->kvm->mmu_lock);
eb787d10 2291 kvm_mmu_free_some_pages(vcpu);
17c3ba9d 2292 mmu_alloc_roots(vcpu);
0ba73cda 2293 mmu_sync_roots(vcpu);
aaee2c94 2294 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 2295 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
17c3ba9d 2296 kvm_mmu_flush_tlb(vcpu);
714b93da
AK
2297out:
2298 return r;
6aa8b732 2299}
17c3ba9d
AK
2300EXPORT_SYMBOL_GPL(kvm_mmu_load);
2301
2302void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2303{
2304 mmu_free_roots(vcpu);
2305}
6aa8b732 2306
09072daf 2307static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
4db35314 2308 struct kvm_mmu_page *sp,
ac1b714e
AK
2309 u64 *spte)
2310{
2311 u64 pte;
2312 struct kvm_mmu_page *child;
2313
2314 pte = *spte;
c7addb90 2315 if (is_shadow_present_pte(pte)) {
05da4558
MT
2316 if (sp->role.level == PT_PAGE_TABLE_LEVEL ||
2317 is_large_pte(pte))
290fc38d 2318 rmap_remove(vcpu->kvm, spte);
ac1b714e
AK
2319 else {
2320 child = page_header(pte & PT64_BASE_ADDR_MASK);
90cb0529 2321 mmu_page_remove_parent_pte(child, spte);
ac1b714e
AK
2322 }
2323 }
c7addb90 2324 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
05da4558
MT
2325 if (is_large_pte(pte))
2326 --vcpu->kvm->stat.lpages;
ac1b714e
AK
2327}
2328
0028425f 2329static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
4db35314 2330 struct kvm_mmu_page *sp,
0028425f 2331 u64 *spte,
489f1d65 2332 const void *new)
0028425f 2333{
30945387
MT
2334 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2335 if (!vcpu->arch.update_pte.largepage ||
2336 sp->role.glevels == PT32_ROOT_LEVEL) {
2337 ++vcpu->kvm->stat.mmu_pde_zapped;
2338 return;
2339 }
2340 }
0028425f 2341
4cee5764 2342 ++vcpu->kvm->stat.mmu_pte_updated;
4db35314 2343 if (sp->role.glevels == PT32_ROOT_LEVEL)
489f1d65 2344 paging32_update_pte(vcpu, sp, spte, new);
0028425f 2345 else
489f1d65 2346 paging64_update_pte(vcpu, sp, spte, new);
0028425f
AK
2347}
2348
79539cec
AK
2349static bool need_remote_flush(u64 old, u64 new)
2350{
2351 if (!is_shadow_present_pte(old))
2352 return false;
2353 if (!is_shadow_present_pte(new))
2354 return true;
2355 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2356 return true;
2357 old ^= PT64_NX_MASK;
2358 new ^= PT64_NX_MASK;
2359 return (old & ~new & PT64_PERM_MASK) != 0;
2360}
2361
2362static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2363{
2364 if (need_remote_flush(old, new))
2365 kvm_flush_remote_tlbs(vcpu->kvm);
2366 else
2367 kvm_mmu_flush_tlb(vcpu);
2368}
2369
12b7d28f
AK
2370static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2371{
ad312c7c 2372 u64 *spte = vcpu->arch.last_pte_updated;
12b7d28f 2373
7b52345e 2374 return !!(spte && (*spte & shadow_accessed_mask));
12b7d28f
AK
2375}
2376
d7824fff
AK
2377static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2378 const u8 *new, int bytes)
2379{
2380 gfn_t gfn;
2381 int r;
2382 u64 gpte = 0;
35149e21 2383 pfn_t pfn;
d7824fff 2384
05da4558
MT
2385 vcpu->arch.update_pte.largepage = 0;
2386
d7824fff
AK
2387 if (bytes != 4 && bytes != 8)
2388 return;
2389
2390 /*
2391 * Assume that the pte write on a page table of the same type
2392 * as the current vcpu paging mode. This is nearly always true
2393 * (might be false while changing modes). Note it is verified later
2394 * by update_pte().
2395 */
2396 if (is_pae(vcpu)) {
2397 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2398 if ((bytes == 4) && (gpa % 4 == 0)) {
2399 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2400 if (r)
2401 return;
2402 memcpy((void *)&gpte + (gpa % 8), new, 4);
2403 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2404 memcpy((void *)&gpte, new, 8);
2405 }
2406 } else {
2407 if ((bytes == 4) && (gpa % 4 == 0))
2408 memcpy((void *)&gpte, new, 4);
2409 }
2410 if (!is_present_pte(gpte))
2411 return;
2412 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
72dc67a6 2413
05da4558
MT
2414 if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
2415 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
2416 vcpu->arch.update_pte.largepage = 1;
2417 }
e930bffe 2418 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 2419 smp_rmb();
35149e21 2420 pfn = gfn_to_pfn(vcpu->kvm, gfn);
72dc67a6 2421
35149e21
AL
2422 if (is_error_pfn(pfn)) {
2423 kvm_release_pfn_clean(pfn);
d196e343
AK
2424 return;
2425 }
d7824fff 2426 vcpu->arch.update_pte.gfn = gfn;
35149e21 2427 vcpu->arch.update_pte.pfn = pfn;
d7824fff
AK
2428}
2429
1b7fcd32
AK
2430static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2431{
2432 u64 *spte = vcpu->arch.last_pte_updated;
2433
2434 if (spte
2435 && vcpu->arch.last_pte_gfn == gfn
2436 && shadow_accessed_mask
2437 && !(*spte & shadow_accessed_mask)
2438 && is_shadow_present_pte(*spte))
2439 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2440}
2441
09072daf 2442void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
ad218f85
MT
2443 const u8 *new, int bytes,
2444 bool guest_initiated)
da4a00f0 2445{
9b7a0325 2446 gfn_t gfn = gpa >> PAGE_SHIFT;
4db35314 2447 struct kvm_mmu_page *sp;
0e7bc4b9 2448 struct hlist_node *node, *n;
9b7a0325
AK
2449 struct hlist_head *bucket;
2450 unsigned index;
489f1d65 2451 u64 entry, gentry;
9b7a0325 2452 u64 *spte;
9b7a0325 2453 unsigned offset = offset_in_page(gpa);
0e7bc4b9 2454 unsigned pte_size;
9b7a0325 2455 unsigned page_offset;
0e7bc4b9 2456 unsigned misaligned;
fce0657f 2457 unsigned quadrant;
9b7a0325 2458 int level;
86a5ba02 2459 int flooded = 0;
ac1b714e 2460 int npte;
489f1d65 2461 int r;
9b7a0325 2462
b8688d51 2463 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
d7824fff 2464 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
aaee2c94 2465 spin_lock(&vcpu->kvm->mmu_lock);
1b7fcd32 2466 kvm_mmu_access_page(vcpu, gfn);
eb787d10 2467 kvm_mmu_free_some_pages(vcpu);
4cee5764 2468 ++vcpu->kvm->stat.mmu_pte_write;
c7addb90 2469 kvm_mmu_audit(vcpu, "pre pte write");
ad218f85
MT
2470 if (guest_initiated) {
2471 if (gfn == vcpu->arch.last_pt_write_gfn
2472 && !last_updated_pte_accessed(vcpu)) {
2473 ++vcpu->arch.last_pt_write_count;
2474 if (vcpu->arch.last_pt_write_count >= 3)
2475 flooded = 1;
2476 } else {
2477 vcpu->arch.last_pt_write_gfn = gfn;
2478 vcpu->arch.last_pt_write_count = 1;
2479 vcpu->arch.last_pte_updated = NULL;
2480 }
86a5ba02 2481 }
1ae0a13d 2482 index = kvm_page_table_hashfn(gfn);
f05e70ac 2483 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4db35314 2484 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
f6e2c02b 2485 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
9b7a0325 2486 continue;
4db35314 2487 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
0e7bc4b9 2488 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
e925c5ba 2489 misaligned |= bytes < 4;
86a5ba02 2490 if (misaligned || flooded) {
0e7bc4b9
AK
2491 /*
2492 * Misaligned accesses are too much trouble to fix
2493 * up; also, they usually indicate a page is not used
2494 * as a page table.
86a5ba02
AK
2495 *
2496 * If we're seeing too many writes to a page,
2497 * it may no longer be a page table, or we may be
2498 * forking, in which case it is better to unmap the
2499 * page.
0e7bc4b9
AK
2500 */
2501 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
4db35314 2502 gpa, bytes, sp->role.word);
07385413
MT
2503 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2504 n = bucket->first;
4cee5764 2505 ++vcpu->kvm->stat.mmu_flooded;
0e7bc4b9
AK
2506 continue;
2507 }
9b7a0325 2508 page_offset = offset;
4db35314 2509 level = sp->role.level;
ac1b714e 2510 npte = 1;
4db35314 2511 if (sp->role.glevels == PT32_ROOT_LEVEL) {
ac1b714e
AK
2512 page_offset <<= 1; /* 32->64 */
2513 /*
2514 * A 32-bit pde maps 4MB while the shadow pdes map
2515 * only 2MB. So we need to double the offset again
2516 * and zap two pdes instead of one.
2517 */
2518 if (level == PT32_ROOT_LEVEL) {
6b8d0f9b 2519 page_offset &= ~7; /* kill rounding error */
ac1b714e
AK
2520 page_offset <<= 1;
2521 npte = 2;
2522 }
fce0657f 2523 quadrant = page_offset >> PAGE_SHIFT;
9b7a0325 2524 page_offset &= ~PAGE_MASK;
4db35314 2525 if (quadrant != sp->role.quadrant)
fce0657f 2526 continue;
9b7a0325 2527 }
4db35314 2528 spte = &sp->spt[page_offset / sizeof(*spte)];
489f1d65
DE
2529 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2530 gentry = 0;
2531 r = kvm_read_guest_atomic(vcpu->kvm,
2532 gpa & ~(u64)(pte_size - 1),
2533 &gentry, pte_size);
2534 new = (const void *)&gentry;
2535 if (r < 0)
2536 new = NULL;
2537 }
ac1b714e 2538 while (npte--) {
79539cec 2539 entry = *spte;
4db35314 2540 mmu_pte_write_zap_pte(vcpu, sp, spte);
489f1d65
DE
2541 if (new)
2542 mmu_pte_write_new_pte(vcpu, sp, spte, new);
79539cec 2543 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
ac1b714e 2544 ++spte;
9b7a0325 2545 }
9b7a0325 2546 }
c7addb90 2547 kvm_mmu_audit(vcpu, "post pte write");
aaee2c94 2548 spin_unlock(&vcpu->kvm->mmu_lock);
35149e21
AL
2549 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2550 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2551 vcpu->arch.update_pte.pfn = bad_pfn;
d7824fff 2552 }
da4a00f0
AK
2553}
2554
a436036b
AK
2555int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2556{
10589a46
MT
2557 gpa_t gpa;
2558 int r;
a436036b 2559
10589a46 2560 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
10589a46 2561
aaee2c94 2562 spin_lock(&vcpu->kvm->mmu_lock);
10589a46 2563 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
aaee2c94 2564 spin_unlock(&vcpu->kvm->mmu_lock);
10589a46 2565 return r;
a436036b 2566}
577bdc49 2567EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
a436036b 2568
22d95b12 2569void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
ebeace86 2570{
f05e70ac 2571 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
4db35314 2572 struct kvm_mmu_page *sp;
ebeace86 2573
f05e70ac 2574 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
4db35314
AK
2575 struct kvm_mmu_page, link);
2576 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 2577 ++vcpu->kvm->stat.mmu_recycled;
ebeace86
AK
2578 }
2579}
ebeace86 2580
3067714c
AK
2581int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2582{
2583 int r;
2584 enum emulation_result er;
2585
ad312c7c 2586 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
3067714c
AK
2587 if (r < 0)
2588 goto out;
2589
2590 if (!r) {
2591 r = 1;
2592 goto out;
2593 }
2594
b733bfb5
AK
2595 r = mmu_topup_memory_caches(vcpu);
2596 if (r)
2597 goto out;
2598
3067714c 2599 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
3067714c
AK
2600
2601 switch (er) {
2602 case EMULATE_DONE:
2603 return 1;
2604 case EMULATE_DO_MMIO:
2605 ++vcpu->stat.mmio_exits;
2606 return 0;
2607 case EMULATE_FAIL:
2608 kvm_report_emulation_failure(vcpu, "pagetable");
2609 return 1;
2610 default:
2611 BUG();
2612 }
2613out:
3067714c
AK
2614 return r;
2615}
2616EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2617
a7052897
MT
2618void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2619{
a7052897 2620 vcpu->arch.mmu.invlpg(vcpu, gva);
a7052897
MT
2621 kvm_mmu_flush_tlb(vcpu);
2622 ++vcpu->stat.invlpg;
2623}
2624EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2625
18552672
JR
2626void kvm_enable_tdp(void)
2627{
2628 tdp_enabled = true;
2629}
2630EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2631
5f4cb662
JR
2632void kvm_disable_tdp(void)
2633{
2634 tdp_enabled = false;
2635}
2636EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2637
6aa8b732
AK
2638static void free_mmu_pages(struct kvm_vcpu *vcpu)
2639{
4db35314 2640 struct kvm_mmu_page *sp;
6aa8b732 2641
f05e70ac
ZX
2642 while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2643 sp = container_of(vcpu->kvm->arch.active_mmu_pages.next,
4db35314
AK
2644 struct kvm_mmu_page, link);
2645 kvm_mmu_zap_page(vcpu->kvm, sp);
8d2d73b9 2646 cond_resched();
f51234c2 2647 }
ad312c7c 2648 free_page((unsigned long)vcpu->arch.mmu.pae_root);
6aa8b732
AK
2649}
2650
2651static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2652{
17ac10ad 2653 struct page *page;
6aa8b732
AK
2654 int i;
2655
2656 ASSERT(vcpu);
2657
f05e70ac
ZX
2658 if (vcpu->kvm->arch.n_requested_mmu_pages)
2659 vcpu->kvm->arch.n_free_mmu_pages =
2660 vcpu->kvm->arch.n_requested_mmu_pages;
82ce2c96 2661 else
f05e70ac
ZX
2662 vcpu->kvm->arch.n_free_mmu_pages =
2663 vcpu->kvm->arch.n_alloc_mmu_pages;
17ac10ad
AK
2664 /*
2665 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2666 * Therefore we need to allocate shadow page tables in the first
2667 * 4GB of memory, which happens to fit the DMA32 zone.
2668 */
2669 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2670 if (!page)
2671 goto error_1;
ad312c7c 2672 vcpu->arch.mmu.pae_root = page_address(page);
17ac10ad 2673 for (i = 0; i < 4; ++i)
ad312c7c 2674 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 2675
6aa8b732
AK
2676 return 0;
2677
2678error_1:
2679 free_mmu_pages(vcpu);
2680 return -ENOMEM;
2681}
2682
8018c27b 2683int kvm_mmu_create(struct kvm_vcpu *vcpu)
6aa8b732 2684{
6aa8b732 2685 ASSERT(vcpu);
ad312c7c 2686 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 2687
8018c27b
IM
2688 return alloc_mmu_pages(vcpu);
2689}
6aa8b732 2690
8018c27b
IM
2691int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2692{
2693 ASSERT(vcpu);
ad312c7c 2694 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2c264957 2695
8018c27b 2696 return init_kvm_mmu(vcpu);
6aa8b732
AK
2697}
2698
2699void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2700{
2701 ASSERT(vcpu);
2702
2703 destroy_kvm_mmu(vcpu);
2704 free_mmu_pages(vcpu);
714b93da 2705 mmu_free_memory_caches(vcpu);
6aa8b732
AK
2706}
2707
90cb0529 2708void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
6aa8b732 2709{
4db35314 2710 struct kvm_mmu_page *sp;
6aa8b732 2711
2245a28f 2712 spin_lock(&kvm->mmu_lock);
f05e70ac 2713 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
6aa8b732
AK
2714 int i;
2715 u64 *pt;
2716
291f26bc 2717 if (!test_bit(slot, sp->slot_bitmap))
6aa8b732
AK
2718 continue;
2719
4db35314 2720 pt = sp->spt;
6aa8b732
AK
2721 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2722 /* avoid RMW */
9647c14c 2723 if (pt[i] & PT_WRITABLE_MASK)
6aa8b732 2724 pt[i] &= ~PT_WRITABLE_MASK;
6aa8b732 2725 }
171d595d 2726 kvm_flush_remote_tlbs(kvm);
2245a28f 2727 spin_unlock(&kvm->mmu_lock);
6aa8b732 2728}
37a7d8b0 2729
90cb0529 2730void kvm_mmu_zap_all(struct kvm *kvm)
e0fa826f 2731{
4db35314 2732 struct kvm_mmu_page *sp, *node;
e0fa826f 2733
aaee2c94 2734 spin_lock(&kvm->mmu_lock);
f05e70ac 2735 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
07385413
MT
2736 if (kvm_mmu_zap_page(kvm, sp))
2737 node = container_of(kvm->arch.active_mmu_pages.next,
2738 struct kvm_mmu_page, link);
aaee2c94 2739 spin_unlock(&kvm->mmu_lock);
e0fa826f 2740
90cb0529 2741 kvm_flush_remote_tlbs(kvm);
e0fa826f
DL
2742}
2743
8b2cf73c 2744static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
3ee16c81
IE
2745{
2746 struct kvm_mmu_page *page;
2747
2748 page = container_of(kvm->arch.active_mmu_pages.prev,
2749 struct kvm_mmu_page, link);
2750 kvm_mmu_zap_page(kvm, page);
2751}
2752
2753static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2754{
2755 struct kvm *kvm;
2756 struct kvm *kvm_freed = NULL;
2757 int cache_count = 0;
2758
2759 spin_lock(&kvm_lock);
2760
2761 list_for_each_entry(kvm, &vm_list, vm_list) {
2762 int npages;
2763
5a4c9288
MT
2764 if (!down_read_trylock(&kvm->slots_lock))
2765 continue;
3ee16c81
IE
2766 spin_lock(&kvm->mmu_lock);
2767 npages = kvm->arch.n_alloc_mmu_pages -
2768 kvm->arch.n_free_mmu_pages;
2769 cache_count += npages;
2770 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2771 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2772 cache_count--;
2773 kvm_freed = kvm;
2774 }
2775 nr_to_scan--;
2776
2777 spin_unlock(&kvm->mmu_lock);
5a4c9288 2778 up_read(&kvm->slots_lock);
3ee16c81
IE
2779 }
2780 if (kvm_freed)
2781 list_move_tail(&kvm_freed->vm_list, &vm_list);
2782
2783 spin_unlock(&kvm_lock);
2784
2785 return cache_count;
2786}
2787
2788static struct shrinker mmu_shrinker = {
2789 .shrink = mmu_shrink,
2790 .seeks = DEFAULT_SEEKS * 10,
2791};
2792
2ddfd20e 2793static void mmu_destroy_caches(void)
b5a33a75
AK
2794{
2795 if (pte_chain_cache)
2796 kmem_cache_destroy(pte_chain_cache);
2797 if (rmap_desc_cache)
2798 kmem_cache_destroy(rmap_desc_cache);
d3d25b04
AK
2799 if (mmu_page_header_cache)
2800 kmem_cache_destroy(mmu_page_header_cache);
b5a33a75
AK
2801}
2802
3ee16c81
IE
2803void kvm_mmu_module_exit(void)
2804{
2805 mmu_destroy_caches();
2806 unregister_shrinker(&mmu_shrinker);
2807}
2808
b5a33a75
AK
2809int kvm_mmu_module_init(void)
2810{
2811 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2812 sizeof(struct kvm_pte_chain),
20c2df83 2813 0, 0, NULL);
b5a33a75
AK
2814 if (!pte_chain_cache)
2815 goto nomem;
2816 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2817 sizeof(struct kvm_rmap_desc),
20c2df83 2818 0, 0, NULL);
b5a33a75
AK
2819 if (!rmap_desc_cache)
2820 goto nomem;
2821
d3d25b04
AK
2822 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2823 sizeof(struct kvm_mmu_page),
20c2df83 2824 0, 0, NULL);
d3d25b04
AK
2825 if (!mmu_page_header_cache)
2826 goto nomem;
2827
3ee16c81
IE
2828 register_shrinker(&mmu_shrinker);
2829
b5a33a75
AK
2830 return 0;
2831
2832nomem:
3ee16c81 2833 mmu_destroy_caches();
b5a33a75
AK
2834 return -ENOMEM;
2835}
2836
3ad82a7e
ZX
2837/*
2838 * Caculate mmu pages needed for kvm.
2839 */
2840unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
2841{
2842 int i;
2843 unsigned int nr_mmu_pages;
2844 unsigned int nr_pages = 0;
2845
2846 for (i = 0; i < kvm->nmemslots; i++)
2847 nr_pages += kvm->memslots[i].npages;
2848
2849 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
2850 nr_mmu_pages = max(nr_mmu_pages,
2851 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
2852
2853 return nr_mmu_pages;
2854}
2855
2f333bcb
MT
2856static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2857 unsigned len)
2858{
2859 if (len > buffer->len)
2860 return NULL;
2861 return buffer->ptr;
2862}
2863
2864static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2865 unsigned len)
2866{
2867 void *ret;
2868
2869 ret = pv_mmu_peek_buffer(buffer, len);
2870 if (!ret)
2871 return ret;
2872 buffer->ptr += len;
2873 buffer->len -= len;
2874 buffer->processed += len;
2875 return ret;
2876}
2877
2878static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
2879 gpa_t addr, gpa_t value)
2880{
2881 int bytes = 8;
2882 int r;
2883
2884 if (!is_long_mode(vcpu) && !is_pae(vcpu))
2885 bytes = 4;
2886
2887 r = mmu_topup_memory_caches(vcpu);
2888 if (r)
2889 return r;
2890
3200f405 2891 if (!emulator_write_phys(vcpu, addr, &value, bytes))
2f333bcb
MT
2892 return -EFAULT;
2893
2894 return 1;
2895}
2896
2897static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2898{
2899 kvm_x86_ops->tlb_flush(vcpu);
6ad9f15c 2900 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
2f333bcb
MT
2901 return 1;
2902}
2903
2904static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
2905{
2906 spin_lock(&vcpu->kvm->mmu_lock);
2907 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
2908 spin_unlock(&vcpu->kvm->mmu_lock);
2909 return 1;
2910}
2911
2912static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
2913 struct kvm_pv_mmu_op_buffer *buffer)
2914{
2915 struct kvm_mmu_op_header *header;
2916
2917 header = pv_mmu_peek_buffer(buffer, sizeof *header);
2918 if (!header)
2919 return 0;
2920 switch (header->op) {
2921 case KVM_MMU_OP_WRITE_PTE: {
2922 struct kvm_mmu_op_write_pte *wpte;
2923
2924 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
2925 if (!wpte)
2926 return 0;
2927 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
2928 wpte->pte_val);
2929 }
2930 case KVM_MMU_OP_FLUSH_TLB: {
2931 struct kvm_mmu_op_flush_tlb *ftlb;
2932
2933 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
2934 if (!ftlb)
2935 return 0;
2936 return kvm_pv_mmu_flush_tlb(vcpu);
2937 }
2938 case KVM_MMU_OP_RELEASE_PT: {
2939 struct kvm_mmu_op_release_pt *rpt;
2940
2941 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
2942 if (!rpt)
2943 return 0;
2944 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
2945 }
2946 default: return 0;
2947 }
2948}
2949
2950int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
2951 gpa_t addr, unsigned long *ret)
2952{
2953 int r;
6ad18fba 2954 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
2f333bcb 2955
6ad18fba
DH
2956 buffer->ptr = buffer->buf;
2957 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
2958 buffer->processed = 0;
2f333bcb 2959
6ad18fba 2960 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
2f333bcb
MT
2961 if (r)
2962 goto out;
2963
6ad18fba
DH
2964 while (buffer->len) {
2965 r = kvm_pv_mmu_op_one(vcpu, buffer);
2f333bcb
MT
2966 if (r < 0)
2967 goto out;
2968 if (r == 0)
2969 break;
2970 }
2971
2972 r = 1;
2973out:
6ad18fba 2974 *ret = buffer->processed;
2f333bcb
MT
2975 return r;
2976}
2977
37a7d8b0
AK
2978#ifdef AUDIT
2979
2980static const char *audit_msg;
2981
2982static gva_t canonicalize(gva_t gva)
2983{
2984#ifdef CONFIG_X86_64
2985 gva = (long long)(gva << 16) >> 16;
2986#endif
2987 return gva;
2988}
2989
2990static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
2991 gva_t va, int level)
2992{
2993 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
2994 int i;
2995 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
2996
2997 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
2998 u64 ent = pt[i];
2999
c7addb90 3000 if (ent == shadow_trap_nonpresent_pte)
37a7d8b0
AK
3001 continue;
3002
3003 va = canonicalize(va);
c7addb90
AK
3004 if (level > 1) {
3005 if (ent == shadow_notrap_nonpresent_pte)
3006 printk(KERN_ERR "audit: (%s) nontrapping pte"
3007 " in nonleaf level: levels %d gva %lx"
3008 " level %d pte %llx\n", audit_msg,
ad312c7c 3009 vcpu->arch.mmu.root_level, va, level, ent);
c7addb90 3010
37a7d8b0 3011 audit_mappings_page(vcpu, ent, va, level - 1);
c7addb90 3012 } else {
ad312c7c 3013 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
35149e21 3014 hpa_t hpa = (hpa_t)gpa_to_pfn(vcpu, gpa) << PAGE_SHIFT;
37a7d8b0 3015
c7addb90 3016 if (is_shadow_present_pte(ent)
37a7d8b0 3017 && (ent & PT64_BASE_ADDR_MASK) != hpa)
c7addb90
AK
3018 printk(KERN_ERR "xx audit error: (%s) levels %d"
3019 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
ad312c7c 3020 audit_msg, vcpu->arch.mmu.root_level,
d77c26fc
MD
3021 va, gpa, hpa, ent,
3022 is_shadow_present_pte(ent));
c7addb90
AK
3023 else if (ent == shadow_notrap_nonpresent_pte
3024 && !is_error_hpa(hpa))
3025 printk(KERN_ERR "audit: (%s) notrap shadow,"
3026 " valid guest gva %lx\n", audit_msg, va);
35149e21 3027 kvm_release_pfn_clean(pfn);
c7addb90 3028
37a7d8b0
AK
3029 }
3030 }
3031}
3032
3033static void audit_mappings(struct kvm_vcpu *vcpu)
3034{
1ea252af 3035 unsigned i;
37a7d8b0 3036
ad312c7c
ZX
3037 if (vcpu->arch.mmu.root_level == 4)
3038 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
37a7d8b0
AK
3039 else
3040 for (i = 0; i < 4; ++i)
ad312c7c 3041 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
37a7d8b0 3042 audit_mappings_page(vcpu,
ad312c7c 3043 vcpu->arch.mmu.pae_root[i],
37a7d8b0
AK
3044 i << 30,
3045 2);
3046}
3047
3048static int count_rmaps(struct kvm_vcpu *vcpu)
3049{
3050 int nmaps = 0;
3051 int i, j, k;
3052
3053 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3054 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
3055 struct kvm_rmap_desc *d;
3056
3057 for (j = 0; j < m->npages; ++j) {
290fc38d 3058 unsigned long *rmapp = &m->rmap[j];
37a7d8b0 3059
290fc38d 3060 if (!*rmapp)
37a7d8b0 3061 continue;
290fc38d 3062 if (!(*rmapp & 1)) {
37a7d8b0
AK
3063 ++nmaps;
3064 continue;
3065 }
290fc38d 3066 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
37a7d8b0
AK
3067 while (d) {
3068 for (k = 0; k < RMAP_EXT; ++k)
3069 if (d->shadow_ptes[k])
3070 ++nmaps;
3071 else
3072 break;
3073 d = d->more;
3074 }
3075 }
3076 }
3077 return nmaps;
3078}
3079
3080static int count_writable_mappings(struct kvm_vcpu *vcpu)
3081{
3082 int nmaps = 0;
4db35314 3083 struct kvm_mmu_page *sp;
37a7d8b0
AK
3084 int i;
3085
f05e70ac 3086 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 3087 u64 *pt = sp->spt;
37a7d8b0 3088
4db35314 3089 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
37a7d8b0
AK
3090 continue;
3091
3092 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3093 u64 ent = pt[i];
3094
3095 if (!(ent & PT_PRESENT_MASK))
3096 continue;
3097 if (!(ent & PT_WRITABLE_MASK))
3098 continue;
3099 ++nmaps;
3100 }
3101 }
3102 return nmaps;
3103}
3104
3105static void audit_rmap(struct kvm_vcpu *vcpu)
3106{
3107 int n_rmap = count_rmaps(vcpu);
3108 int n_actual = count_writable_mappings(vcpu);
3109
3110 if (n_rmap != n_actual)
3111 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
b8688d51 3112 __func__, audit_msg, n_rmap, n_actual);
37a7d8b0
AK
3113}
3114
3115static void audit_write_protection(struct kvm_vcpu *vcpu)
3116{
4db35314 3117 struct kvm_mmu_page *sp;
290fc38d
IE
3118 struct kvm_memory_slot *slot;
3119 unsigned long *rmapp;
3120 gfn_t gfn;
37a7d8b0 3121
f05e70ac 3122 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
f6e2c02b 3123 if (sp->role.direct)
37a7d8b0
AK
3124 continue;
3125
4db35314 3126 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
2843099f 3127 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
290fc38d
IE
3128 rmapp = &slot->rmap[gfn - slot->base_gfn];
3129 if (*rmapp)
37a7d8b0
AK
3130 printk(KERN_ERR "%s: (%s) shadow page has writable"
3131 " mappings: gfn %lx role %x\n",
b8688d51 3132 __func__, audit_msg, sp->gfn,
4db35314 3133 sp->role.word);
37a7d8b0
AK
3134 }
3135}
3136
3137static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3138{
3139 int olddbg = dbg;
3140
3141 dbg = 0;
3142 audit_msg = msg;
3143 audit_rmap(vcpu);
3144 audit_write_protection(vcpu);
3145 audit_mappings(vcpu);
3146 dbg = olddbg;
3147}
3148
3149#endif
This page took 0.434277 seconds and 5 git commands to generate.