[gdb/testsuite] Expect conformation question in gdb.server/solib-list.exp
[deliverable/binutils-gdb.git] / cpu / ChangeLog
CommitLineData
d73be611
DF
12020-06-25 David Faust <david.faust@oracle.com>
2
3 * bpf.cpu (f-offset16): Change type from INT to HI.
4 (dxli): Simplify memory access.
5 (dxsi): Likewise.
6 (define-endian-insn): Update c-call in semantics.
7 (dlabs) Likewise.
8 (dlind) Likewise.
9
d8740be1
JM
102020-06-02 Jose E. Marchesi <jose.marchesi@oracle.com>
11
12 * bpf.cpu (define-bpf-isa): Set base-insn-bitsize to 64.
13 * bpf.opc (bpf_print_insn): Do not set endian_code here.
14
e9bffec9
JM
152020-06-02 Jose E. Marchesi <jose.marchesi@oracle.com>
16
17 * mep.opc (print_slot_insn): Pass the insn endianness to
18 cgen_get_insn_value.
19
78c1c354
JM
202020-05-28 Jose E. Marchesi <jose.marchesi@oracle.com>
21 David Faust <david.faust@oracle.com>
22
23 * bpf.cpu (define-alu-insn-un): Add definitions of semantics.
24 (define-alu-insn-mov): Likewise.
25 (daib): Likewise.
26 (define-alu-instructions): Likewise.
27 (define-endian-insn): Likewise.
28 (define-lddw): Likewise.
29 (dlabs): Likewise.
30 (dlind): Likewise.
31 (dxli): Likewise.
32 (dxsi): Likewise.
33 (dsti): Likewise.
34 (define-ldstx-insns): Likewise.
35 (define-st-insns): Likewise.
36 (define-cond-jump-insn): Likewise.
37 (dcji): Likewise.
38 (define-condjump-insns): Likewise.
39 (define-call-insn): Likewise.
40 (ja): Likewise.
41 ("exit"): Likewise.
42 (define-atomic-insns): Likewise.
43 (sem-exchange-and-add): New macro.
44 * bpf.cpu ("brkpt"): New instruction.
45 (bpfbf): Set word-bitsize to 32 and insn-endian big.
46 (h-gpr): Prefer r0 to `a' and r6 to `ctx'.
47 (h-pc): Expand definition.
48 * bpf.opc (bpf_print_insn): Set endian_code to BIG.
49
d96bf37b
AM
502020-05-21 Alan Modra <amodra@gmail.com>
51
52 * mep.opc (mep_cgen_expand_macros_and_parse_operand): Replace
53 "if (x) free (x)" with "free (x)".
54
ae440402
SH
552020-05-19 Stafford Horne <shorne@gmail.com>
56
57 PR 25184
58 * or1k.cpu (arch or1k): Remove or64 and or64nd machs.
59 (ORBIS-MACHS, ORFPX32-MACHS): Remove pmacros.
60 (cpu or1k64bf, mach or64, mach or64nd): Remove definitions.
61 * or1kcommon.cpu (h-fdr): Remove hardware.
62 * or1korfpx.cpu (rDDF, rADF, rBDF): Remove operand definitions.
63 (float-regreg-insn): Remove lf- mnemonic -d instruction pattern.
64 (float-setflag-insn-base): Remove lf-sf mnemonic -d pattern.
65 (float-cust-insn): Remove "lf-cust" cust-num "-d" pattern.
66 (lf-rem-d, lf-itof-d, lf-ftoi-d, lf-madd-d): Remove.
67
c54a9b56
DF
682020-02-16 David Faust <david.faust@oracle.com>
69
70 * bpf.cpu (define-cond-jump-insn): Renamed from djci.
71 (dcji) New version with support for JMP32
72
44e4546f
AM
732020-02-03 Alan Modra <amodra@gmail.com>
74
75 * m32c.cpu (f-dsp-64-s16): Mask before shifting signed value.
76
b2b1453a
AM
772020-02-01 Alan Modra <amodra@gmail.com>
78
79 * frv.cpu (f-u12): Multiply rather than left shift signed values.
80 (f-label16, f-label24): Likewise.
81
0c115f84
AM
822020-01-30 Alan Modra <amodra@gmail.com>
83
84 * m32c.cpu (f-src32-rn-unprefixed-QI): Shift before inverting.
85 (f-src32-rn-prefixed-QI, f-dst32-rn-unprefixed-QI): Likewise.
86 (f-dst32-rn-prefixed-QI): Likewise.
87 (f-dsp-32-s32): Mask before shifting left.
88 (f-dsp-48-u32, f-dsp-48-s32): Likewise.
89 (f-bitbase32-16-s11-unprefixed): Multiply signed field rather than
90 shifting left.
91 (f-bitbase32-24-s11-prefixed, f-bitbase32-24-s19-prefixed): Likewise.
92 (h-gr-SI): Mask before shifting.
93
bd434cc4
JM
942020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
95
96 * bpf.cpu (define-alu-insn-un): The unary BPF instructions
97 (neg and neg32) use OP_SRC_K even if they operate only in
98 registers.
99
ae774686
NC
1002020-01-18 Nick Clifton <nickc@redhat.com>
101
102 Binutils 2.34 branch created.
103
202e762b
AM
1042020-01-13 Alan Modra <amodra@gmail.com>
105
106 * fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't
107 left shift signed values.
108
cc6aa1a6
AM
1092020-01-06 Alan Modra <amodra@gmail.com>
110
111 * m32c.cpu (f-dsp-8-u16, f-dsp-8-s16): Rearrange to mask any sign
112 bits before shifting rather than masking after shifting.
113 (f-dsp-16-u16, f-dsp-16-s16, f-dsp-32-u16, f-dsp-32-s16): Likewise.
114 (f-dsp-40-u16, f-dsp-40-s16, f-dsp-48-u16, f-dsp-48-s16): Likewise.
115 (f-dsp-64-u16, f-dsp-8-s24): Likewise.
116 (f-bitbase32-16-s19-unprefixed): Avoid signed left shift.
117
1182020-01-04 Alan Modra <amodra@gmail.com>
c9ae58fe
AM
119
120 * m32r.cpu (f-disp8): Avoid left shift of negative values.
121 (f-disp16, f-disp24): Likewise.
122
3e1056a1
AM
1232019-12-23 Alan Modra <amodra@gmail.com>
124
125 * iq2000.cpu (f-offset): Avoid left shift of negative values.
126
bcd9f578
AM
1272019-12-20 Alan Modra <amodra@gmail.com>
128
129 * or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values.
130
62e65990
AM
1312019-12-17 Alan Modra <amodra@gmail.com>
132
133 * bpf.cpu (f-imm64): Avoid signed overflow.
134
e6ced26a
AM
1352019-12-16 Alan Modra <amodra@gmail.com>
136
137 * xstormy16.cpu (f-rel12a): Avoid signed overflow.
138
1d61b032
AM
1392019-12-11 Alan Modra <amodra@gmail.com>
140
141 * epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
142 * lm32.cpu (f-branch, f-vall): Likewise.
143 * m32.cpu (f-lab-8-16): Likewise.
144
b8e61daa
AM
1452019-12-11 Alan Modra <amodra@gmail.com>
146
147 * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
148 shift left to avoid UB on left shift of negative values.
149
e042e6c3
JM
1502019-11-20 Jose E. Marchesi <jose.marchesi@oracle.com>
151
152 * bpf.cpu: Fix comment describing the 128-bit instruction format.
153
60391a25
PB
1542019-09-09 Phil Blundell <pb@pbcl.net>
155
156 binutils 2.33 branch created.
157
231097b0
JM
1582019-07-19 Jose E. Marchesi <jose.marchesi@oracle.com>
159
160 * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
161 %a and %ctx.
162
3719fd55
JM
1632019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com>
164
165 * bpf.cpu (dlabs): New pmacro.
166 (dlind): Likewise.
167
92434a14
JM
1682019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
169
170 * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
171 explicit 'dst' argument.
172
a2e4218f
SH
1732019-06-13 Stafford Horne <shorne@gmail.com>
174
175 * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
176
eb212c84
SH
1772019-06-13 Stafford Horne <shorne@gmail.com>
178
179 * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
180 (l-adrp): Improve comment.
181
d3ad6278
SH
1822019-06-13 Stafford Horne <shorne@gmail.com>
183
184 * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
185 SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
186 SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
187 (float-setflag-insn-base): New pmacro based on float-setflag-insn.
188 (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
189 float-setflag-unordered-symantics): New pmacro for instruction
190 symantics.
191 (float-setflag-insn): Update to use float-setflag-insn-base.
192 (float-setflag-unordered-insn): New pmacro for generating instructions.
193
6ce26ac7
SH
1942019-06-13 Andrey Bacherov <avbacherov@opencores.org>
195 Stafford Horne <shorne@gmail.com>
196
197 * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
198 (ORFPX-MACHS): Removed pmacro.
199 * or1k.opc (or1k_cgen_insn_supported): New function.
200 (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
201 (parse_regpair, print_regpair): New functions.
202 * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
203 and add comments.
204 (h-fdr): Update comment to indicate or64.
205 (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
206 (h-fd32r): New hardware for 64-bit fpu registers.
207 (h-i64r): New hardware for 64-bit int registers.
208 * or1korbis.cpu (f-resv-8-1): New field.
209 * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
210 (rDDF, rADF, rBDF): Update operand comment to indicate or64.
211 (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
212 (h-roff1): New hardware.
213 (double-field-and-ops mnemonic): New pmacro to generate operations
214 rDD32F, rAD32F, rBD32F, rDDI and rADI.
215 (float-regreg-insn): Update single precision generator to MACH
216 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
217 (float-setflag-insn): Update single precision generator to MACH
218 ORFPX32-MACHS. Fix double instructions from single to double
219 precision. Add generator for or32 64-bit instructions.
220 (float-cust-insn cust-num): Update single precision generator to MACH
221 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
222 (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
223 ORFPX32-MACHS.
224 (lf-rem-d): Fix operation from mod to rem.
225 (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
226 (lf-itof-d): Fix operands from single to double.
227 (lf-ftoi-d): Update operand mode from DI to WI.
228
ea195bb0
JM
2292019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
230
231 * bpf.cpu: New file.
232 * bpf.opc: Likewise.
233
f974f26c
NC
2342018-06-24 Nick Clifton <nickc@redhat.com>
235
236 2.32 branch created.
237
07f5f4c6
RH
2382018-10-05 Richard Henderson <rth@twiddle.net>
239 Stafford Horne <shorne@gmail.com>
240
241 * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
242 (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
243 (l-mul): Fix overflow support and indentation.
244 (l-mulu): Fix overflow support and indentation.
245 (l-muld, l-muldu, l-msbu, l-macu): New instructions.
246 (l-div); Remove incorrect carry behavior.
247 (l-divu): Fix carry and overflow behavior.
248 (l-mac): Add overflow support.
249 (l-msb, l-msbu): Add carry and overflow support.
250
c8e98e36
SH
2512018-10-05 Richard Henderson <rth@twiddle.net>
252
253 * or1k.opc (parse_disp26): Add support for plta() relocations.
254 (parse_disp21): New function.
255 (or1k_rclass): New enum.
256 (or1k_rtype): New enum.
257 (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
258 (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
259 (parse_imm16): Add support for the new 21bit and 13bit relocations.
260 * or1korbis.cpu (f-disp26): Don't assume SI.
261 (f-disp21): New pc-relative 21-bit 13 shifted to right.
262 (insn-opcode): Add ADRP.
263 (l-adrp): New instruction.
264
1c4f3780
RH
2652018-10-05 Richard Henderson <rth@twiddle.net>
266
267 * or1k.opc: Add RTYPE_ enum.
268 (INVALID_STORE_RELOC): New string.
269 (or1k_imm16_relocs): New array array.
270 (parse_reloc): New static function that just does the parsing.
271 (parse_imm16): New static function for generic parsing.
272 (parse_simm16): Change to just call parse_imm16.
273 (parse_simm16_split): New function.
274 (parse_uimm16): Change to call parse_imm16.
275 (parse_uimm16_split): New function.
276 * or1korbis.cpu (simm16-split): Change to use new simm16_split.
277 (uimm16-split): Change to use new uimm16_split.
278
67ce483b
AM
2792018-07-24 Alan Modra <amodra@gmail.com>
280
281 PR 23430
282 * or1kcommon.cpu (spr-reg-indices): Fix description typo.
283
84f9f8c3
AM
2842018-05-09 Sebastian Rasmussen <sebras@gmail.com>
285
286 * or1kcommon.cpu (spr-reg-info): Typo fix.
287
a6743a54
AM
2882018-03-03 Alan Modra <amodra@gmail.com>
289
290 * frv.opc: Include opintl.h.
291 (add_next_to_vliw): Use opcodes_error_handler to print error.
292 Standardize error message.
293 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
294
faf766e3
NC
2952018-01-13 Nick Clifton <nickc@redhat.com>
296
297 2.30 branch created.
298
4ea0266c
SH
2992017-03-15 Stafford Horne <shorne@gmail.com>
300
301 * or1kcommon.cpu: Add pc set semantics to also update ppc.
302
b781683b
AM
3032016-10-06 Alan Modra <amodra@gmail.com>
304
305 * mep.opc (expand_string): Add fall through comment.
306
439baf71
AM
3072016-03-03 Alan Modra <amodra@gmail.com>
308
309 * fr30.cpu (f-m4): Replace bogus comment with a better guess
310 at what is really going on.
311
62de1c63
AM
3122016-03-02 Alan Modra <amodra@gmail.com>
313
314 * fr30.cpu (f-m4): Replace -1 << 4 with -16.
315
b89807c6
AB
3162016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
317
318 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
319 a constant to better align disassembler output.
320
018dc9be
SK
3212014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
322
323 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
324
c151b1c6
AM
3252014-06-12 Alan Modra <amodra@gmail.com>
326
327 * or1k.opc: Whitespace fixes.
328
999b995d
SK
3292014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
330
331 * or1korbis.cpu (h-atomic-reserve): New hardware.
332 (h-atomic-address): Likewise.
333 (insn-opcode): Add opcodes for LWA and SWA.
334 (atomic-reserve): New operand.
335 (atomic-address): Likewise.
336 (l-lwa, l-swa): New instructions.
337 (l-lbs): Fix typo in comment.
338 (store-insn): Clear atomic reserve on store to atomic-address.
339 Fix register names in fmt field.
340
73589c9d
CS
3412014-04-22 Christian Svensson <blue@cmd.nu>
342
343 * openrisc.cpu: Delete.
344 * openrisc.opc: Delete.
345 * or1k.cpu: New file.
346 * or1k.opc: New file.
347 * or1kcommon.cpu: New file.
348 * or1korbis.cpu: New file.
349 * or1korfpx.cpu: New file.
350
594d8fa8
MF
3512013-12-07 Mike Frysinger <vapier@gentoo.org>
352
353 * epiphany.opc: Remove +x file mode.
354
87a8d6cb
NC
3552013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
356
357 PR binutils/15241
358 * lm32.cpu (Control and status registers): Add CFG2, PSW,
359 TLBVADDR, TLBPADDR and TLBBADVADDR.
360
02a79b89
JR
3612012-11-30 Oleg Raikhman <oleg@adapteva.com>
362 Joern Rennecke <joern.rennecke@embecosm.com>
363
364 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
365 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
366 (testset-insn): Add NO_DIS attribute to t.l.
367 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
368 (move-insns): Add NO-DIS attribute to cmov.l.
369 (op-mmr-movts): Add NO-DIS attribute to movts.l.
370 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
371 (op-rrr): Add NO-DIS attribute to .l.
372 (shift-rrr): Add NO-DIS attribute to .l.
373 (op-shift-rri): Add NO-DIS attribute to i32.l.
374 (bitrl, movtl): Add NO-DIS attribute.
375 (op-iextrrr): Add NO-DIS attribute to .l
376 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
377 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
378
a597d2d3
AM
3792012-02-27 Alan Modra <amodra@gmail.com>
380
381 * mt.opc (print_dollarhex): Trim values to 32 bits.
382
5011093d
NC
3832011-12-15 Nick Clifton <nickc@redhat.com>
384
385 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
386 hosts.
387
fd936b4c
JR
3882011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
389
390 * epiphany.opc (parse_branch_addr): Fix type of valuep.
391 Cast value before printing it as a long.
392 (parse_postindex): Fix type of valuep.
393
cfb8c092
NC
3942011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
395
396 * cpu/epiphany.cpu: New file.
397 * cpu/epiphany.opc: New file.
398
dc15e575
NC
3992011-08-22 Nick Clifton <nickc@redhat.com>
400
401 * fr30.cpu: Newly contributed file.
402 * fr30.opc: Likewise.
403 * ip2k.cpu: Likewise.
404 * ip2k.opc: Likewise.
405 * mep-avc.cpu: Likewise.
406 * mep-avc2.cpu: Likewise.
407 * mep-c5.cpu: Likewise.
408 * mep-core.cpu: Likewise.
409 * mep-default.cpu: Likewise.
410 * mep-ext-cop.cpu: Likewise.
411 * mep-fmax.cpu: Likewise.
412 * mep-h1.cpu: Likewise.
413 * mep-ivc2.cpu: Likewise.
414 * mep-rhcop.cpu: Likewise.
415 * mep-sample-ucidsp.cpu: Likewise.
416 * mep.cpu: Likewise.
417 * mep.opc: Likewise.
418 * openrisc.cpu: Likewise.
419 * openrisc.opc: Likewise.
420 * xstormy16.cpu: Likewise.
421 * xstormy16.opc: Likewise.
422
9ccb8af9
AM
4232010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
424
425 * frv.opc: #undef DEBUG.
426
21375995
DD
4272010-07-03 DJ Delorie <dj@delorie.com>
428
429 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
430
5ff58fb0
DE
4312010-02-11 Doug Evans <dje@sebabeach.org>
432
433 * m32r.cpu (HASH-PREFIX): Delete.
434 (duhpo, dshpo): New pmacros.
435 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
436 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
437 attribute, define with dshpo.
438 (uimm24): Delete HASH-PREFIX attribute.
439 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
440 (print_signed_with_hash_prefix): New function.
441 (print_unsigned_with_hash_prefix): New function.
442 * xc16x.cpu (dowh): New pmacro.
443 (upof16): Define with dowh, specify print handler.
444 (qbit, qlobit, qhibit): Ditto.
445 (upag16): Ditto.
446 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
447 (print_with_dot_prefix): New functions.
448 (print_with_pof_prefix, print_with_pag_prefix): New functions.
449
3fa5b97b
DE
4502010-01-24 Doug Evans <dje@sebabeach.org>
451
452 * frv.cpu (floating-point-conversion): Update call to fp conv op.
453 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
454 conditional-floating-point-conversion, ne-floating-point-conversion,
455 float-parallel-mul-add-double-semantics): Ditto.
456
fe8afbc4
DE
4572010-01-05 Doug Evans <dje@sebabeach.org>
458
459 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
460 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
461
caaf56fb
DE
4622010-01-02 Doug Evans <dje@sebabeach.org>
463
464 * m32c.opc (parse_signed16): Fix typo.
465
91d6fa6a
NC
4662009-12-11 Nick Clifton <nickc@redhat.com>
467
468 * frv.opc: Fix shadowed variable warnings.
469 * m32c.opc: Fix shadowed variable warnings.
470
ec84cc2b
DE
4712009-11-14 Doug Evans <dje@sebabeach.org>
472
473 Must use VOID expression in VOID context.
474 * xc16x.cpu (mov4): Fix mode of `sequence'.
475 (mov9, mov10): Ditto.
476 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
477 (callr, callseg, calls, trap, rets, reti): Ditto.
478 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
479 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
480 (exts, exts1, extsr, extsr1, prior): Ditto.
481
ac1e9eca
DE
4822009-10-23 Doug Evans <dje@sebabeach.org>
483
484 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
485 cgen-ops.h -> cgen/basic-ops.h.
486
b4744b17
AM
4872009-09-25 Alan Modra <amodra@bigpond.net.au>
488
489 * m32r.cpu (stb-plus): Typo fix.
490
ab5f875d
DE
4912009-09-23 Doug Evans <dje@sebabeach.org>
492
493 * m32r.cpu (sth-plus): Fix address mode and calculation.
494 (stb-plus): Ditto.
495 (clrpsw): Fix mask calculation.
496 (bset, bclr, btst): Make mode in bit calculation match expression.
497
498 * xc16x.cpu (rtl-version): Set to 0.8.
499 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
500 make uppercase. Remove unnecessary name-prefix spec.
501 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
502 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
503 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
504 (h-cr): New hardware.
505 (muls): Comment out parts that won't compile, add fixme.
506 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
507 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
508 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
509
0aaaf7c3
DE
5102009-07-16 Doug Evans <dje@sebabeach.org>
511
512 * cpu/simplify.inc (*): One line doc strings don't need \n.
513 (df): Invoke define-full-ifield instead of claiming it's an alias.
514 (dno): Define.
515 (dnop): Mark as deprecated.
516
1998a8e0
AM
5172009-06-22 Alan Modra <amodra@bigpond.net.au>
518
519 * m32c.opc (parse_lab_5_3): Use correct enum.
520
6347aad8
HPN
5212009-01-07 Hans-Peter Nilsson <hp@axis.com>
522
523 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
524 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
525 (media-arith-sat-semantics): Explicitly sign- or zero-extend
526 arguments of "operation" to DI using "mode" and the new pmacros.
527
2c06b7a6
HPN
5282009-01-03 Hans-Peter Nilsson <hp@axis.com>
529
530 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
531 of number 2, PID.
532
84e94c90
NC
5332008-12-23 Jon Beniston <jon@beniston.com>
534
535 * lm32.cpu: New file.
536 * lm32.opc: New file.
537
90518ff4
AM
5382008-01-29 Alan Modra <amodra@bigpond.net.au>
539
540 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
541 to source.
542
a69f60de
HPN
5432007-10-22 Hans-Peter Nilsson <hp@axis.com>
544
545 * cris.cpu (movs, movu): Use result of extension operation when
546 updating flags.
547
9b201bb5
NC
5482007-07-04 Nick Clifton <nickc@redhat.com>
549
550 * cris.cpu: Update copyright notice to refer to GPLv3.
551 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
552 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
553 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
554 xc16x.opc: Likewise.
555 * iq2000.cpu: Fix copyright notice to refer to FSF.
556
53289dcd
MS
5572007-04-30 Mark Salter <msalter@sadr.localdomain>
558
559 * frv.cpu (spr-names): Support new coprocessor SPR registers.
560
f6da2ec2
NC
5612007-04-20 Nick Clifton <nickc@redhat.com>
562
563 * xc16x.cpu: Restore after accidentally overwriting this file with
564 xc16x.opc.
565
144f4bc6
DD
5662007-03-29 DJ Delorie <dj@redhat.com>
567
568 * m32c.cpu (Imm-8-s4n): Fix print hook.
569 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
570 (arith-jnz-imm4-dst-defn): Make relaxable.
571 (arith-jnz16-imm4-dst-defn): Fix encodings.
572
75b06e7b
DD
5732007-03-20 DJ Delorie <dj@redhat.com>
574
575 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
576 mem20): New.
577 (src16-16-20-An-relative-*): New.
578 (dst16-*-20-An-relative-*): New.
579 (dst16-16-16sa-*): New
580 (dst16-16-16ar-*): New
581 (dst32-16-16sa-Unprefixed-*): New
582 (jsri): Fix operands.
583 (setzx): Fix encoding.
72f4393d 584
a5da764d
AM
5852007-03-08 Alan Modra <amodra@bigpond.net.au>
586
587 * m32r.opc: Formatting.
588
b497d0b0
NC
5892006-05-22 Nick Clifton <nickc@redhat.com>
590
591 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
592
e78efa90
DD
5932006-04-10 DJ Delorie <dj@redhat.com>
594
595 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
596 decides if this function accepts symbolic constants or not.
597 (parse_signed_bitbase): Likewise.
598 (parse_unsigned_bitbase8): Pass the new parameter.
599 (parse_unsigned_bitbase11): Likewise.
600 (parse_unsigned_bitbase16): Likewise.
601 (parse_unsigned_bitbase19): Likewise.
602 (parse_unsigned_bitbase27): Likewise.
603 (parse_signed_bitbase8): Likewise.
604 (parse_signed_bitbase11): Likewise.
605 (parse_signed_bitbase19): Likewise.
72f4393d 606
8d0e2679
DD
6072006-03-13 DJ Delorie <dj@redhat.com>
608
43aa3bb1
DD
609 * m32c.cpu (Bit3-S): New.
610 (btst:s): New.
611 * m32c.opc (parse_bit3_S): New.
612
8d0e2679
DD
613 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
614 (btst): Add optional :G suffix for MACH32.
615 (or.b:S): New.
616 (pop.w:G): Add optional :G suffix for MACH16.
617 (push.b.imm): Fix syntax.
618
253d272c
DD
6192006-03-10 DJ Delorie <dj@redhat.com>
620
621 * m32c.cpu (mul.l): New.
622 (mulu.l): New.
623
c7d41dc5
NC
6242006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
625
626 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
627 an error message otherwise.
628 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
629 Fix up comments to correctly describe the functions.
630
6772dd07
DD
6312006-02-24 DJ Delorie <dj@redhat.com>
632
633 * m32c.cpu (RL_TYPE): New attribute, with macros.
634 (Lab-8-24): Add RELAX.
635 (unary-insn-defn-g, binary-arith-imm-dst-defn,
636 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
637 (binary-arith-src-dst-defn): Add 2ADDR attribute.
638 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
639 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
640 attribute.
641 (jsri16, jsri32): Add 1ADDR attribute.
642 (jsr32.w, jsr32.a): Add JUMP attribute.
72f4393d 643
d70c5fc7 6442006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
72f4393d
L
645 Anil Paranjape <anilp1@kpitcummins.com>
646 Shilin Shakti <shilins@kpitcummins.com>
d70c5fc7
NC
647
648 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
649 description.
650 * xc16x.opc: New file containing supporting XC16C routines.
651
8536c657
NC
6522006-02-10 Nick Clifton <nickc@redhat.com>
653
654 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
655
458f7770
DD
6562006-01-06 DJ Delorie <dj@redhat.com>
657
658 * m32c.cpu (mov.w:q): Fix mode.
659 (push32.b.imm): Likewise, for the comment.
660
d031aafb
NS
6612005-12-16 Nathan Sidwell <nathan@codesourcery.com>
662
663 Second part of ms1 to mt renaming.
664 * mt.cpu (define-arch, define-isa): Set name to mt.
665 (define-mach): Adjust.
666 * mt.opc (CGEN_ASM_HASH): Update.
667 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
668 (parse_loopsize, parse_imm16): Adjust.
669
eda87aba
DD
6702005-12-13 DJ Delorie <dj@redhat.com>
671
672 * m32c.cpu (jsri): Fix order so register names aren't treated as
673 symbols.
674 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
675 indexwd, indexws): Fix encodings.
676
4970f871
NS
6772005-12-12 Nathan Sidwell <nathan@codesourcery.com>
678
679 * mt.cpu: Rename from ms1.cpu.
680 * mt.opc: Rename from ms1.opc.
681
48ad8298
HPN
6822005-12-06 Hans-Peter Nilsson <hp@axis.com>
683
684 * cris.cpu (simplecris-common-writable-specregs)
685 (simplecris-common-readable-specregs): Split from
686 simplecris-common-specregs. All users changed.
687 (cris-implemented-writable-specregs-v0)
688 (cris-implemented-readable-specregs-v0): Similar from
689 cris-implemented-specregs-v0.
690 (cris-implemented-writable-specregs-v3)
691 (cris-implemented-readable-specregs-v3)
692 (cris-implemented-writable-specregs-v8)
693 (cris-implemented-readable-specregs-v8)
694 (cris-implemented-writable-specregs-v10)
695 (cris-implemented-readable-specregs-v10)
696 (cris-implemented-writable-specregs-v32)
697 (cris-implemented-readable-specregs-v32): Similar.
698 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
699 insns and specializations.
700
6f84a2a6
NS
7012005-11-08 Nathan Sidwell <nathan@codesourcery.com>
702
703 Add ms2
704 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
705 model.
706 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
707 f-cb2incr, f-rc3): New fields.
708 (LOOP): New instruction.
709 (JAL-HAZARD): New hazard.
710 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
711 New operands.
712 (mul, muli, dbnz, iflush): Enable for ms2
713 (jal, reti): Has JAL-HAZARD.
714 (ldctxt, ldfb, stfb): Only ms1.
715 (fbcb): Only ms1,ms1-003.
716 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
717 fbcbincrs, mfbcbincrs): Enable for ms2.
718 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
719 * ms1.opc (parse_loopsize): New.
720 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
721 (print_pcrel): New.
722
95b96521
DB
7232005-10-28 Dave Brolley <brolley@redhat.com>
724
725 Contribute the following change:
726 2003-09-24 Dave Brolley <brolley@redhat.com>
727
728 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
729 CGEN_ATTR_VALUE_TYPE.
730 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
731 Use cgen_bitset_intersect_p.
732
c6552317
DD
7332005-10-27 DJ Delorie <dj@redhat.com>
734
735 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
736 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
737 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
738 imm operand is needed.
739 (adjnz, sbjnz): Pass the right operands.
740 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
741 unary-insn): Add -g variants for opcodes that need to support :G.
742 (not.BW:G, push.BW:G): Call it.
743 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
744 stzx16-imm8-imm8-abs16): Fix operand typos.
745 * m32c.opc (m32c_asm_hash): Support bnCND.
746 (parse_signed4n, print_signed4n): New.
72f4393d 747
f75eb1c0
DD
7482005-10-26 DJ Delorie <dj@redhat.com>
749
750 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
751 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
752 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
753 dsp8[sp] is signed.
754 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
755 (mov.BW:S r0,r1): Fix typo r1l->r1.
756 (tst): Allow :G suffix.
757 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
758
e277c00b
AM
7592005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
760
761 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
762
92e0a941
DD
7632005-10-25 DJ Delorie <dj@redhat.com>
764
765 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
766 making one a macro of the other.
767
a1a280bb
DD
7682005-10-21 DJ Delorie <dj@redhat.com>
769
770 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
771 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
772 indexld, indexls): .w variants have `1' bit.
773 (rot32.b): QI, not SI.
774 (rot32.w): HI, not SI.
775 (xchg16): HI for .w variant.
776
e74eb924
NC
7772005-10-19 Nick Clifton <nickc@redhat.com>
778
779 * m32r.opc (parse_slo16): Fix bad application of previous patch.
780
5e03663f
NC
7812005-10-18 Andreas Schwab <schwab@suse.de>
782
783 * m32r.opc (parse_slo16): Better version of previous patch.
784
ab7c9a26
NC
7852005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
786
787 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
788 size.
789
fd54057a
DD
7902005-07-25 DJ Delorie <dj@redhat.com>
791
792 * m32c.opc (parse_unsigned8): Add %dsp8().
793 (parse_signed8): Add %hi8().
794 (parse_unsigned16): Add %dsp16().
795 (parse_signed16): Add %lo16() and %hi16().
796 (parse_lab_5_3): Make valuep a bfd_vma *.
797
85da3a56
NC
7982005-07-18 Nick Clifton <nickc@redhat.com>
799
800 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
801 components.
802 (f-lab32-jmp-s): Fix insertion sequence.
803 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
804 (Dsp-40-s8): Make parameter be signed.
805 (Dsp-40-s16): Likewise.
806 (Dsp-48-s8): Likewise.
807 (Dsp-48-s16): Likewise.
808 (Imm-13-u3): Likewise. (Despite its name!)
809 (BitBase16-16-s8): Make the parameter be unsigned.
810 (BitBase16-8-u11-S): Likewise.
811 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
812 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
813 relaxation.
814
815 * m32c.opc: Fix formatting.
816 Use safe-ctype.h instead of ctype.h
817 Move duplicated code sequences into a macro.
818 Fix compile time warnings about signedness mismatches.
819 Remove dead code.
820 (parse_lab_5_3): New parser function.
72f4393d 821
aa260854
JB
8222005-07-16 Jim Blandy <jimb@redhat.com>
823
824 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
825 to represent isa sets.
826
0a665bfd
JB
8272005-07-15 Jim Blandy <jimb@redhat.com>
828
829 * m32c.cpu, m32c.opc: Fix copyright.
830
49f58d10
JB
8312005-07-14 Jim Blandy <jimb@redhat.com>
832
833 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
834
0e6b69be
AM
8352005-07-14 Alan Modra <amodra@bigpond.net.au>
836
837 * ms1.opc (print_dollarhex): Correct format string.
838
f9210e37
AM
8392005-07-06 Alan Modra <amodra@bigpond.net.au>
840
841 * iq2000.cpu: Include from binutils cpu dir.
842
3ec2b351
NC
8432005-07-05 Nick Clifton <nickc@redhat.com>
844
845 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
846 unsigned in order to avoid compile time warnings about sign
847 conflicts.
848
849 * ms1.opc (parse_*): Likewise.
850 (parse_imm16): Use a "void *" as it is passed both signed and
851 unsigned arguments.
852
47b0e7ad
NC
8532005-07-01 Nick Clifton <nickc@redhat.com>
854
855 * frv.opc: Update to ISO C90 function declaration style.
856 * iq2000.opc: Likewise.
857 * m32r.opc: Likewise.
858 * sh.opc: Likewise.
859
b081650b
DB
8602005-06-15 Dave Brolley <brolley@redhat.com>
861
862 Contributed by Red Hat.
863 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
864 * ms1.opc: New file. Written by Stan Cox.
865
e172dbf8
NC
8662005-05-10 Nick Clifton <nickc@redhat.com>
867
868 * Update the address and phone number of the FSF organization in
869 the GPL notices in the following files:
870 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
871 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
872 sh64-media.cpu, simplify.inc
873
b2d52a48
AM
8742005-02-24 Alan Modra <amodra@bigpond.net.au>
875
876 * frv.opc (parse_A): Warning fix.
877
33b71eeb
NC
8782005-02-23 Nick Clifton <nickc@redhat.com>
879
880 * frv.opc: Fixed compile time warnings about differing signed'ness
881 of pointers passed to functions.
882 * m32r.opc: Likewise.
883
bc18c937
NC
8842005-02-11 Nick Clifton <nickc@redhat.com>
885
886 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
887 'bfd_vma *' in order avoid compile time warning message.
888
46da9a19
HPN
8892005-01-28 Hans-Peter Nilsson <hp@axis.com>
890
891 * cris.cpu (mstep): Add missing insn.
892
90219bd0
AO
8932005-01-25 Alexandre Oliva <aoliva@redhat.com>
894
895 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
896 * frv.cpu: Add support for TLS annotations in loads and calll.
897 * frv.opc (parse_symbolic_address): New.
898 (parse_ldd_annotation): New.
899 (parse_call_annotation): New.
900 (parse_ld_annotation): New.
901 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
902 Introduce TLS relocations.
903 (parse_d12, parse_s12, parse_u12): Likewise.
904 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
905 (parse_call_label, print_at): New.
906
c3d75c30
HPN
9072004-12-21 Mikael Starvik <starvik@axis.com>
908
909 * cris.cpu (cris-set-mem): Correct integral write semantics.
910
68800d83
HPN
9112004-11-29 Hans-Peter Nilsson <hp@axis.com>
912
913 * cris.cpu: New file.
914
4bd1d37b
NC
9152004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
916
917 * iq2000.cpu: Added quotes around macro arguments so that they
918 will work with newer versions of guile.
919
4030fa5a
NC
9202004-10-27 Nick Clifton <nickc@redhat.com>
921
922 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
923 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
924 operand.
925 * iq2000.cpu (dnop index): Rename to _index to avoid complications
926 with guile.
927
ac28a1cb
RS
9282004-08-27 Richard Sandiford <rsandifo@redhat.com>
929
930 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
931
dc4c54bb
NC
9322004-05-15 Nick Clifton <nickc@redhat.com>
933
934 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
935
f4453dfa
NC
9362004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
937
938 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
939
676a64f4
RS
9402004-03-01 Richard Sandiford <rsandifo@redhat.com>
941
942 * frv.cpu (define-arch frv): Add fr450 mach.
943 (define-mach fr450): New.
944 (define-model fr450): New. Add profile units to every fr450 insn.
945 (define-attr UNIT): Add MDCUTSSI.
946 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
947 (define-attr AUDIO): New boolean.
948 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
949 (f-LRA-null, f-TLBPR-null): New fields.
950 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
951 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
952 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
953 (LRA-null, TLBPR-null): New macros.
954 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
955 (load-real-address): New macro.
956 (lrai, lrad, tlbpr): New instructions.
957 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
958 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
959 (mdcutssi): Change UNIT attribute to MDCUTSSI.
960 (media-low-clear-semantics, media-scope-limit-semantics)
961 (media-quad-limit, media-quad-shift): New macros.
962 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
963 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
964 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
965 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
966 (fr450_unit_mapping): New array.
967 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
968 for new MDCUTSSI unit.
969 (fr450_check_insn_major_constraints): New function.
970 (check_insn_major_constraints): Use it.
971
c7a48b9a
RS
9722004-03-01 Richard Sandiford <rsandifo@redhat.com>
973
974 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
975 (scutss): Change unit to I0.
976 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
977 (mqsaths): Fix FR400-MAJOR categorization.
978 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
979 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
980 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
981 combinations.
982
8ae0baa2
RS
9832004-03-01 Richard Sandiford <rsandifo@redhat.com>
984
985 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
986 (rstb, rsth, rst, rstd, rstq): Delete.
987 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
988
8ee9a8b2
NC
9892004-02-23 Nick Clifton <nickc@redhat.com>
990
991 * Apply these patches from Renesas:
992
993 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
994
995 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
996 disassembling codes for 0x*2 addresses.
997
998 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
999
1000 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
1001
1002 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1003
1004 * cpu/m32r.cpu : Add new model m32r2.
1005 Add new instructions.
1006 Replace occurrances of 'Mitsubishi' with 'Renesas'.
1007 Changed PIPE attr of push from O to OS.
1008 Care for Little-endian of M32R.
1009 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
1010 Care for Little-endian of M32R.
1011 (parse_slo16): signed extension for value.
1012
299d901c
AC
10132004-02-20 Andrew Cagney <cagney@redhat.com>
1014
e866a257
AC
1015 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
1016 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
1017
299d901c
AC
1018 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
1019 written by Ben Elliston.
1020
cb10e79a
RS
10212004-01-14 Richard Sandiford <rsandifo@redhat.com>
1022
1023 * frv.cpu (UNIT): Add IACC.
1024 (iacc-multiply-r-r): Use it.
1025 * frv.opc (fr400_unit_mapping): Add entry for IACC.
1026 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
1027
d4e4dc14
AO
10282004-01-06 Alexandre Oliva <aoliva@redhat.com>
1029
1030 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1031 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
1032 cut&paste errors in shifting/truncating numerical operands.
1033 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
1034 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1035 (parse_uslo16): Likewise.
1036 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1037 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1038 (parse_s12): Likewise.
1039 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1040 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
1041 (parse_uslo16): Likewise.
1042 (parse_uhi16): Parse gothi and gotfuncdeschi.
1043 (parse_d12): Parse got12 and gotfuncdesc12.
1044 (parse_s12): Likewise.
1045
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DB
10462003-10-10 Dave Brolley <brolley@redhat.com>
1047
1048 * frv.cpu (dnpmop): New p-macro.
1049 (GRdoublek): Use dnpmop.
1050 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
1051 (store-double-r-r): Use (.sym regtype doublek).
1052 (r-store-double): Ditto.
1053 (store-double-r-r-u): Ditto.
1054 (conditional-store-double): Ditto.
1055 (conditional-store-double-u): Ditto.
1056 (store-double-r-simm): Ditto.
1057 (fmovs): Assign to UNIT FMALL.
1058
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DB
10592003-10-06 Dave Brolley <brolley@redhat.com>
1060
1061 * frv.cpu, frv.opc: Add support for fr550.
1062
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DB
10632003-09-24 Dave Brolley <brolley@redhat.com>
1064
1065 * frv.cpu (u-commit): New modelling unit for fr500.
1066 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
1067 (commit-r): Use u-commit model for fr500.
1068 (commit): Ditto.
1069 (conditional-float-binary-op): Take profiling data as an argument.
1070 Update callers.
1071 (ne-float-binary-op): Ditto.
1072
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MS
10732003-09-19 Michael Snyder <msnyder@redhat.com>
1074
1075 * frv.cpu (nldqi): Delete unimplemented instruction.
1076
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DB
10772003-09-12 Dave Brolley <brolley@redhat.com>
1078
1079 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
1080 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
1081 frv_ref_SI to get input register referenced for profiling.
1082 (clear-ne-flag-all): Pass insn profiling in as an argument.
1083 (clrgr,clrfr,clrga,clrfa): Add profiling information.
1084
6f18ad70
MS
10852003-09-11 Michael Snyder <msnyder@redhat.com>
1086
1087 * frv.cpu: Typographical corrections.
1088
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DB
10892003-09-09 Dave Brolley <brolley@redhat.com>
1090
1091 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
1092 (conditional-media-dual-complex, media-quad-complex): Likewise.
1093
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DB
10942003-09-04 Dave Brolley <brolley@redhat.com>
1095
1096 * frv.cpu (register-transfer): Pass in all attributes in on argument.
1097 Update all callers.
1098 (conditional-register-transfer): Ditto.
1099 (cache-preload): Ditto.
1100 (floating-point-conversion): Ditto.
1101 (floating-point-neg): Ditto.
1102 (float-abs): Ditto.
1103 (float-binary-op-s): Ditto.
1104 (conditional-float-binary-op): Ditto.
1105 (ne-float-binary-op): Ditto.
1106 (float-dual-arith): Ditto.
1107 (ne-float-dual-arith): Ditto.
1108
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11092003-09-03 Dave Brolley <brolley@redhat.com>
1110
1111 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
1112 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
1113 MCLRACC-1.
1114 (A): Removed operand.
1115 (A0,A1): New operands replace operand A.
1116 (mnop): Now a real insn
1117 (mclracc): Removed insn.
1118 (mclracc-0, mclracc-1): New insns replace mclracc.
1119 (all insns): Use new UNIT attributes.
1120
6d9ab561
NC
11212003-08-21 Nick Clifton <nickc@redhat.com>
1122
1123 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
1124 and u-media-dual-btoh with output parameter.
1125 (cmbtoh): Add profiling hack.
1126
741a7751
NC
11272003-08-19 Michael Snyder <msnyder@redhat.com>
1128
1129 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
1130
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11312003-06-10 Doug Evans <dje@sebabeach.org>
1132
1133 * frv.cpu: Add IDOC attribute.
1134
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AC
11352003-06-06 Andrew Cagney <cagney@redhat.com>
1136
1137 Contributed by Red Hat.
1138 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
1139 Stan Cox, and Frank Ch. Eigler.
1140 * iq2000.opc: New file. Written by Ben Elliston, Frank
1141 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
1142 * iq2000m.cpu: New file. Written by Jeff Johnston.
1143 * iq10.cpu: New file. Written by Jeff Johnston.
1144
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NC
11452003-06-05 Nick Clifton <nickc@redhat.com>
1146
1147 * frv.cpu (FRintieven): New operand. An even-numbered only
1148 version of the FRinti operand.
1149 (FRintjeven): Likewise for FRintj.
1150 (FRintkeven): Likewise for FRintk.
1151 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1152 media-quad-arith-sat-semantics, media-quad-arith-sat,
1153 conditional-media-quad-arith-sat, mdunpackh,
1154 media-quad-multiply-semantics, media-quad-multiply,
1155 conditional-media-quad-multiply, media-quad-complex-i,
1156 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1157 conditional-media-quad-multiply-acc, munpackh,
1158 media-quad-multiply-cross-acc-semantics, mdpackh,
1159 media-quad-multiply-cross-acc, mbtoh-semantics,
1160 media-quad-cross-multiply-cross-acc-semantics,
1161 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1162 media-quad-cross-multiply-acc-semantics, cmbtoh,
1163 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1164 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1165 cmhtob): Use new operands.
1166 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
0e6b69be 1167 (parse_even_register): New function.
36c3ae24 1168
75798298
NC
11692003-06-03 Nick Clifton <nickc@redhat.com>
1170
1171 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1172 immediate value not unsigned.
1173
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AC
11742003-06-03 Andrew Cagney <cagney@redhat.com>
1175
1176 Contributed by Red Hat.
1177 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
1178 and Eric Christopher.
1179 * frv.opc: New file. Written by Catherine Moore, and Dave
1180 Brolley.
1181 * simplify.inc: New file. Written by Doug Evans.
1182
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11832003-05-02 Andrew Cagney <cagney@redhat.com>
1184
1185 * New file.
1186
1187\f
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1188Copyright (C) 2003-2012 Free Software Foundation, Inc.
1189
1190Copying and distribution of this file, with or without modification,
1191are permitted in any medium without royalty provided the copyright
1192notice and this notice are preserved.
1193
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1194Local Variables:
1195mode: change-log
1196left-margin: 8
1197fill-column: 74
1198version-control: never
1199End:
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