[ARC] Update ld tests.
[deliverable/binutils-gdb.git] / cpu / ChangeLog
CommitLineData
07f5f4c6
RH
12018-10-05 Richard Henderson <rth@twiddle.net>
2 Stafford Horne <shorne@gmail.com>
3
4 * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
5 (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
6 (l-mul): Fix overflow support and indentation.
7 (l-mulu): Fix overflow support and indentation.
8 (l-muld, l-muldu, l-msbu, l-macu): New instructions.
9 (l-div); Remove incorrect carry behavior.
10 (l-divu): Fix carry and overflow behavior.
11 (l-mac): Add overflow support.
12 (l-msb, l-msbu): Add carry and overflow support.
13
c8e98e36
SH
142018-10-05 Richard Henderson <rth@twiddle.net>
15
16 * or1k.opc (parse_disp26): Add support for plta() relocations.
17 (parse_disp21): New function.
18 (or1k_rclass): New enum.
19 (or1k_rtype): New enum.
20 (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
21 (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
22 (parse_imm16): Add support for the new 21bit and 13bit relocations.
23 * or1korbis.cpu (f-disp26): Don't assume SI.
24 (f-disp21): New pc-relative 21-bit 13 shifted to right.
25 (insn-opcode): Add ADRP.
26 (l-adrp): New instruction.
27
1c4f3780
RH
282018-10-05 Richard Henderson <rth@twiddle.net>
29
30 * or1k.opc: Add RTYPE_ enum.
31 (INVALID_STORE_RELOC): New string.
32 (or1k_imm16_relocs): New array array.
33 (parse_reloc): New static function that just does the parsing.
34 (parse_imm16): New static function for generic parsing.
35 (parse_simm16): Change to just call parse_imm16.
36 (parse_simm16_split): New function.
37 (parse_uimm16): Change to call parse_imm16.
38 (parse_uimm16_split): New function.
39 * or1korbis.cpu (simm16-split): Change to use new simm16_split.
40 (uimm16-split): Change to use new uimm16_split.
41
67ce483b
AM
422018-07-24 Alan Modra <amodra@gmail.com>
43
44 PR 23430
45 * or1kcommon.cpu (spr-reg-indices): Fix description typo.
46
84f9f8c3
AM
472018-05-09 Sebastian Rasmussen <sebras@gmail.com>
48
49 * or1kcommon.cpu (spr-reg-info): Typo fix.
50
a6743a54
AM
512018-03-03 Alan Modra <amodra@gmail.com>
52
53 * frv.opc: Include opintl.h.
54 (add_next_to_vliw): Use opcodes_error_handler to print error.
55 Standardize error message.
56 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
57
faf766e3
NC
582018-01-13 Nick Clifton <nickc@redhat.com>
59
60 2.30 branch created.
61
4ea0266c
SH
622017-03-15 Stafford Horne <shorne@gmail.com>
63
64 * or1kcommon.cpu: Add pc set semantics to also update ppc.
65
b781683b
AM
662016-10-06 Alan Modra <amodra@gmail.com>
67
68 * mep.opc (expand_string): Add fall through comment.
69
439baf71
AM
702016-03-03 Alan Modra <amodra@gmail.com>
71
72 * fr30.cpu (f-m4): Replace bogus comment with a better guess
73 at what is really going on.
74
62de1c63
AM
752016-03-02 Alan Modra <amodra@gmail.com>
76
77 * fr30.cpu (f-m4): Replace -1 << 4 with -16.
78
b89807c6
AB
792016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
80
81 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
82 a constant to better align disassembler output.
83
018dc9be
SK
842014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
85
86 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
87
c151b1c6
AM
882014-06-12 Alan Modra <amodra@gmail.com>
89
90 * or1k.opc: Whitespace fixes.
91
999b995d
SK
922014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
93
94 * or1korbis.cpu (h-atomic-reserve): New hardware.
95 (h-atomic-address): Likewise.
96 (insn-opcode): Add opcodes for LWA and SWA.
97 (atomic-reserve): New operand.
98 (atomic-address): Likewise.
99 (l-lwa, l-swa): New instructions.
100 (l-lbs): Fix typo in comment.
101 (store-insn): Clear atomic reserve on store to atomic-address.
102 Fix register names in fmt field.
103
73589c9d
CS
1042014-04-22 Christian Svensson <blue@cmd.nu>
105
106 * openrisc.cpu: Delete.
107 * openrisc.opc: Delete.
108 * or1k.cpu: New file.
109 * or1k.opc: New file.
110 * or1kcommon.cpu: New file.
111 * or1korbis.cpu: New file.
112 * or1korfpx.cpu: New file.
113
594d8fa8
MF
1142013-12-07 Mike Frysinger <vapier@gentoo.org>
115
116 * epiphany.opc: Remove +x file mode.
117
87a8d6cb
NC
1182013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
119
120 PR binutils/15241
121 * lm32.cpu (Control and status registers): Add CFG2, PSW,
122 TLBVADDR, TLBPADDR and TLBBADVADDR.
123
02a79b89
JR
1242012-11-30 Oleg Raikhman <oleg@adapteva.com>
125 Joern Rennecke <joern.rennecke@embecosm.com>
126
127 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
128 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
129 (testset-insn): Add NO_DIS attribute to t.l.
130 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
131 (move-insns): Add NO-DIS attribute to cmov.l.
132 (op-mmr-movts): Add NO-DIS attribute to movts.l.
133 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
134 (op-rrr): Add NO-DIS attribute to .l.
135 (shift-rrr): Add NO-DIS attribute to .l.
136 (op-shift-rri): Add NO-DIS attribute to i32.l.
137 (bitrl, movtl): Add NO-DIS attribute.
138 (op-iextrrr): Add NO-DIS attribute to .l
139 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
140 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
141
a597d2d3
AM
1422012-02-27 Alan Modra <amodra@gmail.com>
143
144 * mt.opc (print_dollarhex): Trim values to 32 bits.
145
5011093d
NC
1462011-12-15 Nick Clifton <nickc@redhat.com>
147
148 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
149 hosts.
150
fd936b4c
JR
1512011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
152
153 * epiphany.opc (parse_branch_addr): Fix type of valuep.
154 Cast value before printing it as a long.
155 (parse_postindex): Fix type of valuep.
156
cfb8c092
NC
1572011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
158
159 * cpu/epiphany.cpu: New file.
160 * cpu/epiphany.opc: New file.
161
dc15e575
NC
1622011-08-22 Nick Clifton <nickc@redhat.com>
163
164 * fr30.cpu: Newly contributed file.
165 * fr30.opc: Likewise.
166 * ip2k.cpu: Likewise.
167 * ip2k.opc: Likewise.
168 * mep-avc.cpu: Likewise.
169 * mep-avc2.cpu: Likewise.
170 * mep-c5.cpu: Likewise.
171 * mep-core.cpu: Likewise.
172 * mep-default.cpu: Likewise.
173 * mep-ext-cop.cpu: Likewise.
174 * mep-fmax.cpu: Likewise.
175 * mep-h1.cpu: Likewise.
176 * mep-ivc2.cpu: Likewise.
177 * mep-rhcop.cpu: Likewise.
178 * mep-sample-ucidsp.cpu: Likewise.
179 * mep.cpu: Likewise.
180 * mep.opc: Likewise.
181 * openrisc.cpu: Likewise.
182 * openrisc.opc: Likewise.
183 * xstormy16.cpu: Likewise.
184 * xstormy16.opc: Likewise.
185
9ccb8af9
AM
1862010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
187
188 * frv.opc: #undef DEBUG.
189
21375995
DD
1902010-07-03 DJ Delorie <dj@delorie.com>
191
192 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
193
5ff58fb0
DE
1942010-02-11 Doug Evans <dje@sebabeach.org>
195
196 * m32r.cpu (HASH-PREFIX): Delete.
197 (duhpo, dshpo): New pmacros.
198 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
199 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
200 attribute, define with dshpo.
201 (uimm24): Delete HASH-PREFIX attribute.
202 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
203 (print_signed_with_hash_prefix): New function.
204 (print_unsigned_with_hash_prefix): New function.
205 * xc16x.cpu (dowh): New pmacro.
206 (upof16): Define with dowh, specify print handler.
207 (qbit, qlobit, qhibit): Ditto.
208 (upag16): Ditto.
209 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
210 (print_with_dot_prefix): New functions.
211 (print_with_pof_prefix, print_with_pag_prefix): New functions.
212
3fa5b97b
DE
2132010-01-24 Doug Evans <dje@sebabeach.org>
214
215 * frv.cpu (floating-point-conversion): Update call to fp conv op.
216 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
217 conditional-floating-point-conversion, ne-floating-point-conversion,
218 float-parallel-mul-add-double-semantics): Ditto.
219
fe8afbc4
DE
2202010-01-05 Doug Evans <dje@sebabeach.org>
221
222 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
223 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
224
caaf56fb
DE
2252010-01-02 Doug Evans <dje@sebabeach.org>
226
227 * m32c.opc (parse_signed16): Fix typo.
228
91d6fa6a
NC
2292009-12-11 Nick Clifton <nickc@redhat.com>
230
231 * frv.opc: Fix shadowed variable warnings.
232 * m32c.opc: Fix shadowed variable warnings.
233
ec84cc2b
DE
2342009-11-14 Doug Evans <dje@sebabeach.org>
235
236 Must use VOID expression in VOID context.
237 * xc16x.cpu (mov4): Fix mode of `sequence'.
238 (mov9, mov10): Ditto.
239 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
240 (callr, callseg, calls, trap, rets, reti): Ditto.
241 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
242 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
243 (exts, exts1, extsr, extsr1, prior): Ditto.
244
ac1e9eca
DE
2452009-10-23 Doug Evans <dje@sebabeach.org>
246
247 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
248 cgen-ops.h -> cgen/basic-ops.h.
249
b4744b17
AM
2502009-09-25 Alan Modra <amodra@bigpond.net.au>
251
252 * m32r.cpu (stb-plus): Typo fix.
253
ab5f875d
DE
2542009-09-23 Doug Evans <dje@sebabeach.org>
255
256 * m32r.cpu (sth-plus): Fix address mode and calculation.
257 (stb-plus): Ditto.
258 (clrpsw): Fix mask calculation.
259 (bset, bclr, btst): Make mode in bit calculation match expression.
260
261 * xc16x.cpu (rtl-version): Set to 0.8.
262 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
263 make uppercase. Remove unnecessary name-prefix spec.
264 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
265 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
266 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
267 (h-cr): New hardware.
268 (muls): Comment out parts that won't compile, add fixme.
269 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
270 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
271 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
272
0aaaf7c3
DE
2732009-07-16 Doug Evans <dje@sebabeach.org>
274
275 * cpu/simplify.inc (*): One line doc strings don't need \n.
276 (df): Invoke define-full-ifield instead of claiming it's an alias.
277 (dno): Define.
278 (dnop): Mark as deprecated.
279
1998a8e0
AM
2802009-06-22 Alan Modra <amodra@bigpond.net.au>
281
282 * m32c.opc (parse_lab_5_3): Use correct enum.
283
6347aad8
HPN
2842009-01-07 Hans-Peter Nilsson <hp@axis.com>
285
286 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
287 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
288 (media-arith-sat-semantics): Explicitly sign- or zero-extend
289 arguments of "operation" to DI using "mode" and the new pmacros.
290
2c06b7a6
HPN
2912009-01-03 Hans-Peter Nilsson <hp@axis.com>
292
293 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
294 of number 2, PID.
295
84e94c90
NC
2962008-12-23 Jon Beniston <jon@beniston.com>
297
298 * lm32.cpu: New file.
299 * lm32.opc: New file.
300
90518ff4
AM
3012008-01-29 Alan Modra <amodra@bigpond.net.au>
302
303 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
304 to source.
305
a69f60de
HPN
3062007-10-22 Hans-Peter Nilsson <hp@axis.com>
307
308 * cris.cpu (movs, movu): Use result of extension operation when
309 updating flags.
310
9b201bb5
NC
3112007-07-04 Nick Clifton <nickc@redhat.com>
312
313 * cris.cpu: Update copyright notice to refer to GPLv3.
314 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
315 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
316 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
317 xc16x.opc: Likewise.
318 * iq2000.cpu: Fix copyright notice to refer to FSF.
319
53289dcd
MS
3202007-04-30 Mark Salter <msalter@sadr.localdomain>
321
322 * frv.cpu (spr-names): Support new coprocessor SPR registers.
323
f6da2ec2
NC
3242007-04-20 Nick Clifton <nickc@redhat.com>
325
326 * xc16x.cpu: Restore after accidentally overwriting this file with
327 xc16x.opc.
328
144f4bc6
DD
3292007-03-29 DJ Delorie <dj@redhat.com>
330
331 * m32c.cpu (Imm-8-s4n): Fix print hook.
332 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
333 (arith-jnz-imm4-dst-defn): Make relaxable.
334 (arith-jnz16-imm4-dst-defn): Fix encodings.
335
75b06e7b
DD
3362007-03-20 DJ Delorie <dj@redhat.com>
337
338 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
339 mem20): New.
340 (src16-16-20-An-relative-*): New.
341 (dst16-*-20-An-relative-*): New.
342 (dst16-16-16sa-*): New
343 (dst16-16-16ar-*): New
344 (dst32-16-16sa-Unprefixed-*): New
345 (jsri): Fix operands.
346 (setzx): Fix encoding.
72f4393d 347
a5da764d
AM
3482007-03-08 Alan Modra <amodra@bigpond.net.au>
349
350 * m32r.opc: Formatting.
351
b497d0b0
NC
3522006-05-22 Nick Clifton <nickc@redhat.com>
353
354 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
355
e78efa90
DD
3562006-04-10 DJ Delorie <dj@redhat.com>
357
358 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
359 decides if this function accepts symbolic constants or not.
360 (parse_signed_bitbase): Likewise.
361 (parse_unsigned_bitbase8): Pass the new parameter.
362 (parse_unsigned_bitbase11): Likewise.
363 (parse_unsigned_bitbase16): Likewise.
364 (parse_unsigned_bitbase19): Likewise.
365 (parse_unsigned_bitbase27): Likewise.
366 (parse_signed_bitbase8): Likewise.
367 (parse_signed_bitbase11): Likewise.
368 (parse_signed_bitbase19): Likewise.
72f4393d 369
8d0e2679
DD
3702006-03-13 DJ Delorie <dj@redhat.com>
371
43aa3bb1
DD
372 * m32c.cpu (Bit3-S): New.
373 (btst:s): New.
374 * m32c.opc (parse_bit3_S): New.
375
8d0e2679
DD
376 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
377 (btst): Add optional :G suffix for MACH32.
378 (or.b:S): New.
379 (pop.w:G): Add optional :G suffix for MACH16.
380 (push.b.imm): Fix syntax.
381
253d272c
DD
3822006-03-10 DJ Delorie <dj@redhat.com>
383
384 * m32c.cpu (mul.l): New.
385 (mulu.l): New.
386
c7d41dc5
NC
3872006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
388
389 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
390 an error message otherwise.
391 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
392 Fix up comments to correctly describe the functions.
393
6772dd07
DD
3942006-02-24 DJ Delorie <dj@redhat.com>
395
396 * m32c.cpu (RL_TYPE): New attribute, with macros.
397 (Lab-8-24): Add RELAX.
398 (unary-insn-defn-g, binary-arith-imm-dst-defn,
399 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
400 (binary-arith-src-dst-defn): Add 2ADDR attribute.
401 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
402 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
403 attribute.
404 (jsri16, jsri32): Add 1ADDR attribute.
405 (jsr32.w, jsr32.a): Add JUMP attribute.
72f4393d 406
d70c5fc7 4072006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
72f4393d
L
408 Anil Paranjape <anilp1@kpitcummins.com>
409 Shilin Shakti <shilins@kpitcummins.com>
d70c5fc7
NC
410
411 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
412 description.
413 * xc16x.opc: New file containing supporting XC16C routines.
414
8536c657
NC
4152006-02-10 Nick Clifton <nickc@redhat.com>
416
417 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
418
458f7770
DD
4192006-01-06 DJ Delorie <dj@redhat.com>
420
421 * m32c.cpu (mov.w:q): Fix mode.
422 (push32.b.imm): Likewise, for the comment.
423
d031aafb
NS
4242005-12-16 Nathan Sidwell <nathan@codesourcery.com>
425
426 Second part of ms1 to mt renaming.
427 * mt.cpu (define-arch, define-isa): Set name to mt.
428 (define-mach): Adjust.
429 * mt.opc (CGEN_ASM_HASH): Update.
430 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
431 (parse_loopsize, parse_imm16): Adjust.
432
eda87aba
DD
4332005-12-13 DJ Delorie <dj@redhat.com>
434
435 * m32c.cpu (jsri): Fix order so register names aren't treated as
436 symbols.
437 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
438 indexwd, indexws): Fix encodings.
439
4970f871
NS
4402005-12-12 Nathan Sidwell <nathan@codesourcery.com>
441
442 * mt.cpu: Rename from ms1.cpu.
443 * mt.opc: Rename from ms1.opc.
444
48ad8298
HPN
4452005-12-06 Hans-Peter Nilsson <hp@axis.com>
446
447 * cris.cpu (simplecris-common-writable-specregs)
448 (simplecris-common-readable-specregs): Split from
449 simplecris-common-specregs. All users changed.
450 (cris-implemented-writable-specregs-v0)
451 (cris-implemented-readable-specregs-v0): Similar from
452 cris-implemented-specregs-v0.
453 (cris-implemented-writable-specregs-v3)
454 (cris-implemented-readable-specregs-v3)
455 (cris-implemented-writable-specregs-v8)
456 (cris-implemented-readable-specregs-v8)
457 (cris-implemented-writable-specregs-v10)
458 (cris-implemented-readable-specregs-v10)
459 (cris-implemented-writable-specregs-v32)
460 (cris-implemented-readable-specregs-v32): Similar.
461 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
462 insns and specializations.
463
6f84a2a6
NS
4642005-11-08 Nathan Sidwell <nathan@codesourcery.com>
465
466 Add ms2
467 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
468 model.
469 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
470 f-cb2incr, f-rc3): New fields.
471 (LOOP): New instruction.
472 (JAL-HAZARD): New hazard.
473 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
474 New operands.
475 (mul, muli, dbnz, iflush): Enable for ms2
476 (jal, reti): Has JAL-HAZARD.
477 (ldctxt, ldfb, stfb): Only ms1.
478 (fbcb): Only ms1,ms1-003.
479 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
480 fbcbincrs, mfbcbincrs): Enable for ms2.
481 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
482 * ms1.opc (parse_loopsize): New.
483 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
484 (print_pcrel): New.
485
95b96521
DB
4862005-10-28 Dave Brolley <brolley@redhat.com>
487
488 Contribute the following change:
489 2003-09-24 Dave Brolley <brolley@redhat.com>
490
491 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
492 CGEN_ATTR_VALUE_TYPE.
493 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
494 Use cgen_bitset_intersect_p.
495
c6552317
DD
4962005-10-27 DJ Delorie <dj@redhat.com>
497
498 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
499 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
500 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
501 imm operand is needed.
502 (adjnz, sbjnz): Pass the right operands.
503 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
504 unary-insn): Add -g variants for opcodes that need to support :G.
505 (not.BW:G, push.BW:G): Call it.
506 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
507 stzx16-imm8-imm8-abs16): Fix operand typos.
508 * m32c.opc (m32c_asm_hash): Support bnCND.
509 (parse_signed4n, print_signed4n): New.
72f4393d 510
f75eb1c0
DD
5112005-10-26 DJ Delorie <dj@redhat.com>
512
513 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
514 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
515 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
516 dsp8[sp] is signed.
517 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
518 (mov.BW:S r0,r1): Fix typo r1l->r1.
519 (tst): Allow :G suffix.
520 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
521
e277c00b
AM
5222005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
523
524 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
525
92e0a941
DD
5262005-10-25 DJ Delorie <dj@redhat.com>
527
528 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
529 making one a macro of the other.
530
a1a280bb
DD
5312005-10-21 DJ Delorie <dj@redhat.com>
532
533 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
534 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
535 indexld, indexls): .w variants have `1' bit.
536 (rot32.b): QI, not SI.
537 (rot32.w): HI, not SI.
538 (xchg16): HI for .w variant.
539
e74eb924
NC
5402005-10-19 Nick Clifton <nickc@redhat.com>
541
542 * m32r.opc (parse_slo16): Fix bad application of previous patch.
543
5e03663f
NC
5442005-10-18 Andreas Schwab <schwab@suse.de>
545
546 * m32r.opc (parse_slo16): Better version of previous patch.
547
ab7c9a26
NC
5482005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
549
550 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
551 size.
552
fd54057a
DD
5532005-07-25 DJ Delorie <dj@redhat.com>
554
555 * m32c.opc (parse_unsigned8): Add %dsp8().
556 (parse_signed8): Add %hi8().
557 (parse_unsigned16): Add %dsp16().
558 (parse_signed16): Add %lo16() and %hi16().
559 (parse_lab_5_3): Make valuep a bfd_vma *.
560
85da3a56
NC
5612005-07-18 Nick Clifton <nickc@redhat.com>
562
563 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
564 components.
565 (f-lab32-jmp-s): Fix insertion sequence.
566 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
567 (Dsp-40-s8): Make parameter be signed.
568 (Dsp-40-s16): Likewise.
569 (Dsp-48-s8): Likewise.
570 (Dsp-48-s16): Likewise.
571 (Imm-13-u3): Likewise. (Despite its name!)
572 (BitBase16-16-s8): Make the parameter be unsigned.
573 (BitBase16-8-u11-S): Likewise.
574 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
575 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
576 relaxation.
577
578 * m32c.opc: Fix formatting.
579 Use safe-ctype.h instead of ctype.h
580 Move duplicated code sequences into a macro.
581 Fix compile time warnings about signedness mismatches.
582 Remove dead code.
583 (parse_lab_5_3): New parser function.
72f4393d 584
aa260854
JB
5852005-07-16 Jim Blandy <jimb@redhat.com>
586
587 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
588 to represent isa sets.
589
0a665bfd
JB
5902005-07-15 Jim Blandy <jimb@redhat.com>
591
592 * m32c.cpu, m32c.opc: Fix copyright.
593
49f58d10
JB
5942005-07-14 Jim Blandy <jimb@redhat.com>
595
596 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
597
0e6b69be
AM
5982005-07-14 Alan Modra <amodra@bigpond.net.au>
599
600 * ms1.opc (print_dollarhex): Correct format string.
601
f9210e37
AM
6022005-07-06 Alan Modra <amodra@bigpond.net.au>
603
604 * iq2000.cpu: Include from binutils cpu dir.
605
3ec2b351
NC
6062005-07-05 Nick Clifton <nickc@redhat.com>
607
608 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
609 unsigned in order to avoid compile time warnings about sign
610 conflicts.
611
612 * ms1.opc (parse_*): Likewise.
613 (parse_imm16): Use a "void *" as it is passed both signed and
614 unsigned arguments.
615
47b0e7ad
NC
6162005-07-01 Nick Clifton <nickc@redhat.com>
617
618 * frv.opc: Update to ISO C90 function declaration style.
619 * iq2000.opc: Likewise.
620 * m32r.opc: Likewise.
621 * sh.opc: Likewise.
622
b081650b
DB
6232005-06-15 Dave Brolley <brolley@redhat.com>
624
625 Contributed by Red Hat.
626 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
627 * ms1.opc: New file. Written by Stan Cox.
628
e172dbf8
NC
6292005-05-10 Nick Clifton <nickc@redhat.com>
630
631 * Update the address and phone number of the FSF organization in
632 the GPL notices in the following files:
633 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
634 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
635 sh64-media.cpu, simplify.inc
636
b2d52a48
AM
6372005-02-24 Alan Modra <amodra@bigpond.net.au>
638
639 * frv.opc (parse_A): Warning fix.
640
33b71eeb
NC
6412005-02-23 Nick Clifton <nickc@redhat.com>
642
643 * frv.opc: Fixed compile time warnings about differing signed'ness
644 of pointers passed to functions.
645 * m32r.opc: Likewise.
646
bc18c937
NC
6472005-02-11 Nick Clifton <nickc@redhat.com>
648
649 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
650 'bfd_vma *' in order avoid compile time warning message.
651
46da9a19
HPN
6522005-01-28 Hans-Peter Nilsson <hp@axis.com>
653
654 * cris.cpu (mstep): Add missing insn.
655
90219bd0
AO
6562005-01-25 Alexandre Oliva <aoliva@redhat.com>
657
658 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
659 * frv.cpu: Add support for TLS annotations in loads and calll.
660 * frv.opc (parse_symbolic_address): New.
661 (parse_ldd_annotation): New.
662 (parse_call_annotation): New.
663 (parse_ld_annotation): New.
664 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
665 Introduce TLS relocations.
666 (parse_d12, parse_s12, parse_u12): Likewise.
667 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
668 (parse_call_label, print_at): New.
669
c3d75c30
HPN
6702004-12-21 Mikael Starvik <starvik@axis.com>
671
672 * cris.cpu (cris-set-mem): Correct integral write semantics.
673
68800d83
HPN
6742004-11-29 Hans-Peter Nilsson <hp@axis.com>
675
676 * cris.cpu: New file.
677
4bd1d37b
NC
6782004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
679
680 * iq2000.cpu: Added quotes around macro arguments so that they
681 will work with newer versions of guile.
682
4030fa5a
NC
6832004-10-27 Nick Clifton <nickc@redhat.com>
684
685 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
686 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
687 operand.
688 * iq2000.cpu (dnop index): Rename to _index to avoid complications
689 with guile.
690
ac28a1cb
RS
6912004-08-27 Richard Sandiford <rsandifo@redhat.com>
692
693 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
694
dc4c54bb
NC
6952004-05-15 Nick Clifton <nickc@redhat.com>
696
697 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
698
f4453dfa
NC
6992004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
700
701 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
702
676a64f4
RS
7032004-03-01 Richard Sandiford <rsandifo@redhat.com>
704
705 * frv.cpu (define-arch frv): Add fr450 mach.
706 (define-mach fr450): New.
707 (define-model fr450): New. Add profile units to every fr450 insn.
708 (define-attr UNIT): Add MDCUTSSI.
709 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
710 (define-attr AUDIO): New boolean.
711 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
712 (f-LRA-null, f-TLBPR-null): New fields.
713 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
714 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
715 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
716 (LRA-null, TLBPR-null): New macros.
717 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
718 (load-real-address): New macro.
719 (lrai, lrad, tlbpr): New instructions.
720 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
721 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
722 (mdcutssi): Change UNIT attribute to MDCUTSSI.
723 (media-low-clear-semantics, media-scope-limit-semantics)
724 (media-quad-limit, media-quad-shift): New macros.
725 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
726 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
727 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
728 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
729 (fr450_unit_mapping): New array.
730 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
731 for new MDCUTSSI unit.
732 (fr450_check_insn_major_constraints): New function.
733 (check_insn_major_constraints): Use it.
734
c7a48b9a
RS
7352004-03-01 Richard Sandiford <rsandifo@redhat.com>
736
737 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
738 (scutss): Change unit to I0.
739 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
740 (mqsaths): Fix FR400-MAJOR categorization.
741 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
742 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
743 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
744 combinations.
745
8ae0baa2
RS
7462004-03-01 Richard Sandiford <rsandifo@redhat.com>
747
748 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
749 (rstb, rsth, rst, rstd, rstq): Delete.
750 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
751
8ee9a8b2
NC
7522004-02-23 Nick Clifton <nickc@redhat.com>
753
754 * Apply these patches from Renesas:
755
756 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
757
758 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
759 disassembling codes for 0x*2 addresses.
760
761 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
762
763 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
764
765 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
766
767 * cpu/m32r.cpu : Add new model m32r2.
768 Add new instructions.
769 Replace occurrances of 'Mitsubishi' with 'Renesas'.
770 Changed PIPE attr of push from O to OS.
771 Care for Little-endian of M32R.
772 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
773 Care for Little-endian of M32R.
774 (parse_slo16): signed extension for value.
775
299d901c
AC
7762004-02-20 Andrew Cagney <cagney@redhat.com>
777
e866a257
AC
778 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
779 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
780
299d901c
AC
781 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
782 written by Ben Elliston.
783
cb10e79a
RS
7842004-01-14 Richard Sandiford <rsandifo@redhat.com>
785
786 * frv.cpu (UNIT): Add IACC.
787 (iacc-multiply-r-r): Use it.
788 * frv.opc (fr400_unit_mapping): Add entry for IACC.
789 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
790
d4e4dc14
AO
7912004-01-06 Alexandre Oliva <aoliva@redhat.com>
792
793 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
794 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
795 cut&paste errors in shifting/truncating numerical operands.
796 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
797 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
798 (parse_uslo16): Likewise.
799 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
800 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
801 (parse_s12): Likewise.
802 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
803 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
804 (parse_uslo16): Likewise.
805 (parse_uhi16): Parse gothi and gotfuncdeschi.
806 (parse_d12): Parse got12 and gotfuncdesc12.
807 (parse_s12): Likewise.
808
1340b9a9
DB
8092003-10-10 Dave Brolley <brolley@redhat.com>
810
811 * frv.cpu (dnpmop): New p-macro.
812 (GRdoublek): Use dnpmop.
813 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
814 (store-double-r-r): Use (.sym regtype doublek).
815 (r-store-double): Ditto.
816 (store-double-r-r-u): Ditto.
817 (conditional-store-double): Ditto.
818 (conditional-store-double-u): Ditto.
819 (store-double-r-simm): Ditto.
820 (fmovs): Assign to UNIT FMALL.
821
ac7c07ac
DB
8222003-10-06 Dave Brolley <brolley@redhat.com>
823
824 * frv.cpu, frv.opc: Add support for fr550.
825
d0312406
DB
8262003-09-24 Dave Brolley <brolley@redhat.com>
827
828 * frv.cpu (u-commit): New modelling unit for fr500.
829 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
830 (commit-r): Use u-commit model for fr500.
831 (commit): Ditto.
832 (conditional-float-binary-op): Take profiling data as an argument.
833 Update callers.
834 (ne-float-binary-op): Ditto.
835
c6945302
MS
8362003-09-19 Michael Snyder <msnyder@redhat.com>
837
838 * frv.cpu (nldqi): Delete unimplemented instruction.
839
23600bb3
DB
8402003-09-12 Dave Brolley <brolley@redhat.com>
841
842 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
843 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
844 frv_ref_SI to get input register referenced for profiling.
845 (clear-ne-flag-all): Pass insn profiling in as an argument.
846 (clrgr,clrfr,clrga,clrfa): Add profiling information.
847
6f18ad70
MS
8482003-09-11 Michael Snyder <msnyder@redhat.com>
849
850 * frv.cpu: Typographical corrections.
851
96486995
DB
8522003-09-09 Dave Brolley <brolley@redhat.com>
853
854 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
855 (conditional-media-dual-complex, media-quad-complex): Likewise.
856
0457efce
DB
8572003-09-04 Dave Brolley <brolley@redhat.com>
858
859 * frv.cpu (register-transfer): Pass in all attributes in on argument.
860 Update all callers.
861 (conditional-register-transfer): Ditto.
862 (cache-preload): Ditto.
863 (floating-point-conversion): Ditto.
864 (floating-point-neg): Ditto.
865 (float-abs): Ditto.
866 (float-binary-op-s): Ditto.
867 (conditional-float-binary-op): Ditto.
868 (ne-float-binary-op): Ditto.
869 (float-dual-arith): Ditto.
870 (ne-float-dual-arith): Ditto.
871
8caa9169
DB
8722003-09-03 Dave Brolley <brolley@redhat.com>
873
874 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
875 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
876 MCLRACC-1.
877 (A): Removed operand.
878 (A0,A1): New operands replace operand A.
879 (mnop): Now a real insn
880 (mclracc): Removed insn.
881 (mclracc-0, mclracc-1): New insns replace mclracc.
882 (all insns): Use new UNIT attributes.
883
6d9ab561
NC
8842003-08-21 Nick Clifton <nickc@redhat.com>
885
886 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
887 and u-media-dual-btoh with output parameter.
888 (cmbtoh): Add profiling hack.
889
741a7751
NC
8902003-08-19 Michael Snyder <msnyder@redhat.com>
891
892 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
893
5b5b78da
DE
8942003-06-10 Doug Evans <dje@sebabeach.org>
895
896 * frv.cpu: Add IDOC attribute.
897
539ee71a
AC
8982003-06-06 Andrew Cagney <cagney@redhat.com>
899
900 Contributed by Red Hat.
901 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
902 Stan Cox, and Frank Ch. Eigler.
903 * iq2000.opc: New file. Written by Ben Elliston, Frank
904 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
905 * iq2000m.cpu: New file. Written by Jeff Johnston.
906 * iq10.cpu: New file. Written by Jeff Johnston.
907
36c3ae24
NC
9082003-06-05 Nick Clifton <nickc@redhat.com>
909
910 * frv.cpu (FRintieven): New operand. An even-numbered only
911 version of the FRinti operand.
912 (FRintjeven): Likewise for FRintj.
913 (FRintkeven): Likewise for FRintk.
914 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
915 media-quad-arith-sat-semantics, media-quad-arith-sat,
916 conditional-media-quad-arith-sat, mdunpackh,
917 media-quad-multiply-semantics, media-quad-multiply,
918 conditional-media-quad-multiply, media-quad-complex-i,
919 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
920 conditional-media-quad-multiply-acc, munpackh,
921 media-quad-multiply-cross-acc-semantics, mdpackh,
922 media-quad-multiply-cross-acc, mbtoh-semantics,
923 media-quad-cross-multiply-cross-acc-semantics,
924 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
925 media-quad-cross-multiply-acc-semantics, cmbtoh,
926 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
927 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
928 cmhtob): Use new operands.
929 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
0e6b69be 930 (parse_even_register): New function.
36c3ae24 931
75798298
NC
9322003-06-03 Nick Clifton <nickc@redhat.com>
933
934 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
935 immediate value not unsigned.
936
9aab5aa3
AC
9372003-06-03 Andrew Cagney <cagney@redhat.com>
938
939 Contributed by Red Hat.
940 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
941 and Eric Christopher.
942 * frv.opc: New file. Written by Catherine Moore, and Dave
943 Brolley.
944 * simplify.inc: New file. Written by Doug Evans.
945
2739f79a
AC
9462003-05-02 Andrew Cagney <cagney@redhat.com>
947
948 * New file.
949
950\f
752937aa
NC
951Copyright (C) 2003-2012 Free Software Foundation, Inc.
952
953Copying and distribution of this file, with or without modification,
954are permitted in any medium without royalty provided the copyright
955notice and this notice are preserved.
956
2739f79a
AC
957Local Variables:
958mode: change-log
959left-margin: 8
960fill-column: 74
961version-control: never
962End:
This page took 0.884626 seconds and 4 git commands to generate.