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gdbserver/linux-low: turn 'arch_setup' into a method
[deliverable/binutils-gdb.git] / cpu / ChangeLog
CommitLineData
44e4546f
AM		 12020-02-03 Alan Modra <amodra@gmail.com>
2
3 * m32c.cpu (f-dsp-64-s16): Mask before shifting signed value.
4
b2b1453a
AM		 52020-02-01 Alan Modra <amodra@gmail.com>
6
7 * frv.cpu (f-u12): Multiply rather than left shift signed values.
8 (f-label16, f-label24): Likewise.
9
0c115f84
AM		 102020-01-30 Alan Modra <amodra@gmail.com>
11
12 * m32c.cpu (f-src32-rn-unprefixed-QI): Shift before inverting.
13 (f-src32-rn-prefixed-QI, f-dst32-rn-unprefixed-QI): Likewise.
14 (f-dst32-rn-prefixed-QI): Likewise.
15 (f-dsp-32-s32): Mask before shifting left.
16 (f-dsp-48-u32, f-dsp-48-s32): Likewise.
17 (f-bitbase32-16-s11-unprefixed): Multiply signed field rather than
18 shifting left.
19 (f-bitbase32-24-s11-prefixed, f-bitbase32-24-s19-prefixed): Likewise.
20 (h-gr-SI): Mask before shifting.
21
bd434cc4
JM		 222020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
23
24 * bpf.cpu (define-alu-insn-un): The unary BPF instructions
25 (neg and neg32) use OP_SRC_K even if they operate only in
26 registers.
27
ae774686
NC		 282020-01-18 Nick Clifton <nickc@redhat.com>
29
30 Binutils 2.34 branch created.
31
202e762b
AM		 322020-01-13 Alan Modra <amodra@gmail.com>
33
34 * fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't
35 left shift signed values.
36
cc6aa1a6
AM		 372020-01-06 Alan Modra <amodra@gmail.com>
38
39 * m32c.cpu (f-dsp-8-u16, f-dsp-8-s16): Rearrange to mask any sign
40 bits before shifting rather than masking after shifting.
41 (f-dsp-16-u16, f-dsp-16-s16, f-dsp-32-u16, f-dsp-32-s16): Likewise.
42 (f-dsp-40-u16, f-dsp-40-s16, f-dsp-48-u16, f-dsp-48-s16): Likewise.
43 (f-dsp-64-u16, f-dsp-8-s24): Likewise.
44 (f-bitbase32-16-s19-unprefixed): Avoid signed left shift.
45
462020-01-04 Alan Modra <amodra@gmail.com>
c9ae58fe
AM		 47
48 * m32r.cpu (f-disp8): Avoid left shift of negative values.
49 (f-disp16, f-disp24): Likewise.
50
3e1056a1
AM		 512019-12-23 Alan Modra <amodra@gmail.com>
52
53 * iq2000.cpu (f-offset): Avoid left shift of negative values.
54
bcd9f578
AM		 552019-12-20 Alan Modra <amodra@gmail.com>
56
57 * or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values.
58
62e65990
AM		 592019-12-17 Alan Modra <amodra@gmail.com>
60
61 * bpf.cpu (f-imm64): Avoid signed overflow.
62
e6ced26a
AM		 632019-12-16 Alan Modra <amodra@gmail.com>
64
65 * xstormy16.cpu (f-rel12a): Avoid signed overflow.
66
1d61b032
AM		 672019-12-11 Alan Modra <amodra@gmail.com>
68
69 * epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
70 * lm32.cpu (f-branch, f-vall): Likewise.
71 * m32.cpu (f-lab-8-16): Likewise.
72
b8e61daa
AM		 732019-12-11 Alan Modra <amodra@gmail.com>
74
75 * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
76 shift left to avoid UB on left shift of negative values.
77
e042e6c3
JM		 782019-11-20 Jose E. Marchesi <jose.marchesi@oracle.com>
79
80 * bpf.cpu: Fix comment describing the 128-bit instruction format.
81
60391a25
PB		 822019-09-09 Phil Blundell <pb@pbcl.net>
83
84 binutils 2.33 branch created.
85
231097b0
JM		 862019-07-19 Jose E. Marchesi <jose.marchesi@oracle.com>
87
88 * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
89 %a and %ctx.
90
3719fd55
JM		 912019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com>
92
93 * bpf.cpu (dlabs): New pmacro.
94 (dlind): Likewise.
95
92434a14
JM		 962019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
97
98 * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
99 explicit 'dst' argument.
100
a2e4218f
SH		 1012019-06-13 Stafford Horne <shorne@gmail.com>
102
103 * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
104
eb212c84
SH		 1052019-06-13 Stafford Horne <shorne@gmail.com>
106
107 * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
108 (l-adrp): Improve comment.
109
d3ad6278
SH		 1102019-06-13 Stafford Horne <shorne@gmail.com>
111
112 * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
113 SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
114 SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
115 (float-setflag-insn-base): New pmacro based on float-setflag-insn.
116 (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
117 float-setflag-unordered-symantics): New pmacro for instruction
118 symantics.
119 (float-setflag-insn): Update to use float-setflag-insn-base.
120 (float-setflag-unordered-insn): New pmacro for generating instructions.
121
6ce26ac7
SH		 1222019-06-13 Andrey Bacherov <avbacherov@opencores.org>
123 Stafford Horne <shorne@gmail.com>
124
125 * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
126 (ORFPX-MACHS): Removed pmacro.
127 * or1k.opc (or1k_cgen_insn_supported): New function.
128 (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
129 (parse_regpair, print_regpair): New functions.
130 * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
131 and add comments.
132 (h-fdr): Update comment to indicate or64.
133 (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
134 (h-fd32r): New hardware for 64-bit fpu registers.
135 (h-i64r): New hardware for 64-bit int registers.
136 * or1korbis.cpu (f-resv-8-1): New field.
137 * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
138 (rDDF, rADF, rBDF): Update operand comment to indicate or64.
139 (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
140 (h-roff1): New hardware.
141 (double-field-and-ops mnemonic): New pmacro to generate operations
142 rDD32F, rAD32F, rBD32F, rDDI and rADI.
143 (float-regreg-insn): Update single precision generator to MACH
144 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
145 (float-setflag-insn): Update single precision generator to MACH
146 ORFPX32-MACHS. Fix double instructions from single to double
147 precision. Add generator for or32 64-bit instructions.
148 (float-cust-insn cust-num): Update single precision generator to MACH
149 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
150 (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
151 ORFPX32-MACHS.
152 (lf-rem-d): Fix operation from mod to rem.
153 (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
154 (lf-itof-d): Fix operands from single to double.
155 (lf-ftoi-d): Update operand mode from DI to WI.
156
ea195bb0
JM		 1572019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
158
159 * bpf.cpu: New file.
160 * bpf.opc: Likewise.
161
f974f26c
NC		 1622018-06-24 Nick Clifton <nickc@redhat.com>
163
164 2.32 branch created.
165
07f5f4c6
RH		 1662018-10-05 Richard Henderson <rth@twiddle.net>
167 Stafford Horne <shorne@gmail.com>
168
169 * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
170 (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
171 (l-mul): Fix overflow support and indentation.
172 (l-mulu): Fix overflow support and indentation.
173 (l-muld, l-muldu, l-msbu, l-macu): New instructions.
174 (l-div); Remove incorrect carry behavior.
175 (l-divu): Fix carry and overflow behavior.
176 (l-mac): Add overflow support.
177 (l-msb, l-msbu): Add carry and overflow support.
178
c8e98e36
SH		 1792018-10-05 Richard Henderson <rth@twiddle.net>
180
181 * or1k.opc (parse_disp26): Add support for plta() relocations.
182 (parse_disp21): New function.
183 (or1k_rclass): New enum.
184 (or1k_rtype): New enum.
185 (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
186 (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
187 (parse_imm16): Add support for the new 21bit and 13bit relocations.
188 * or1korbis.cpu (f-disp26): Don't assume SI.
189 (f-disp21): New pc-relative 21-bit 13 shifted to right.
190 (insn-opcode): Add ADRP.
191 (l-adrp): New instruction.
192
1c4f3780
RH		 1932018-10-05 Richard Henderson <rth@twiddle.net>
194
195 * or1k.opc: Add RTYPE_ enum.
196 (INVALID_STORE_RELOC): New string.
197 (or1k_imm16_relocs): New array array.
198 (parse_reloc): New static function that just does the parsing.
199 (parse_imm16): New static function for generic parsing.
200 (parse_simm16): Change to just call parse_imm16.
201 (parse_simm16_split): New function.
202 (parse_uimm16): Change to call parse_imm16.
203 (parse_uimm16_split): New function.
204 * or1korbis.cpu (simm16-split): Change to use new simm16_split.
205 (uimm16-split): Change to use new uimm16_split.
206
67ce483b
AM		 2072018-07-24 Alan Modra <amodra@gmail.com>
208
209 PR 23430
210 * or1kcommon.cpu (spr-reg-indices): Fix description typo.
211
84f9f8c3
AM		 2122018-05-09 Sebastian Rasmussen <sebras@gmail.com>
213
214 * or1kcommon.cpu (spr-reg-info): Typo fix.
215
a6743a54
AM		 2162018-03-03 Alan Modra <amodra@gmail.com>
217
218 * frv.opc: Include opintl.h.
219 (add_next_to_vliw): Use opcodes_error_handler to print error.
220 Standardize error message.
221 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
222
faf766e3
NC		 2232018-01-13 Nick Clifton <nickc@redhat.com>
224
225 2.30 branch created.
226
4ea0266c
SH		 2272017-03-15 Stafford Horne <shorne@gmail.com>
228
229 * or1kcommon.cpu: Add pc set semantics to also update ppc.
230
b781683b
AM		 2312016-10-06 Alan Modra <amodra@gmail.com>
232
233 * mep.opc (expand_string): Add fall through comment.
234
439baf71
AM		 2352016-03-03 Alan Modra <amodra@gmail.com>
236
237 * fr30.cpu (f-m4): Replace bogus comment with a better guess
238 at what is really going on.
239
62de1c63
AM		 2402016-03-02 Alan Modra <amodra@gmail.com>
241
242 * fr30.cpu (f-m4): Replace -1 << 4 with -16.
243
b89807c6
AB		 2442016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
245
246 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
247 a constant to better align disassembler output.
248
018dc9be
SK		 2492014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
250
251 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
252
c151b1c6
AM		 2532014-06-12 Alan Modra <amodra@gmail.com>
254
255 * or1k.opc: Whitespace fixes.
256
999b995d
SK		 2572014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
258
259 * or1korbis.cpu (h-atomic-reserve): New hardware.
260 (h-atomic-address): Likewise.
261 (insn-opcode): Add opcodes for LWA and SWA.
262 (atomic-reserve): New operand.
263 (atomic-address): Likewise.
264 (l-lwa, l-swa): New instructions.
265 (l-lbs): Fix typo in comment.
266 (store-insn): Clear atomic reserve on store to atomic-address.
267 Fix register names in fmt field.
268
73589c9d
CS		 2692014-04-22 Christian Svensson <blue@cmd.nu>
270
271 * openrisc.cpu: Delete.
272 * openrisc.opc: Delete.
273 * or1k.cpu: New file.
274 * or1k.opc: New file.
275 * or1kcommon.cpu: New file.
276 * or1korbis.cpu: New file.
277 * or1korfpx.cpu: New file.
278
594d8fa8
MF		 2792013-12-07 Mike Frysinger <vapier@gentoo.org>
280
281 * epiphany.opc: Remove +x file mode.
282
87a8d6cb
NC		 2832013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
284
285 PR binutils/15241
286 * lm32.cpu (Control and status registers): Add CFG2, PSW,
287 TLBVADDR, TLBPADDR and TLBBADVADDR.
288
02a79b89
JR		 2892012-11-30 Oleg Raikhman <oleg@adapteva.com>
290 Joern Rennecke <joern.rennecke@embecosm.com>
291
292 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
293 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
294 (testset-insn): Add NO_DIS attribute to t.l.
295 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
296 (move-insns): Add NO-DIS attribute to cmov.l.
297 (op-mmr-movts): Add NO-DIS attribute to movts.l.
298 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
299 (op-rrr): Add NO-DIS attribute to .l.
300 (shift-rrr): Add NO-DIS attribute to .l.
301 (op-shift-rri): Add NO-DIS attribute to i32.l.
302 (bitrl, movtl): Add NO-DIS attribute.
303 (op-iextrrr): Add NO-DIS attribute to .l
304 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
305 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
306
a597d2d3
AM		 3072012-02-27 Alan Modra <amodra@gmail.com>
308
309 * mt.opc (print_dollarhex): Trim values to 32 bits.
310
5011093d
NC		 3112011-12-15 Nick Clifton <nickc@redhat.com>
312
313 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
314 hosts.
315
fd936b4c
JR		 3162011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
317
318 * epiphany.opc (parse_branch_addr): Fix type of valuep.
319 Cast value before printing it as a long.
320 (parse_postindex): Fix type of valuep.
321
cfb8c092
NC		 3222011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
323
324 * cpu/epiphany.cpu: New file.
325 * cpu/epiphany.opc: New file.
326
dc15e575
NC		 3272011-08-22 Nick Clifton <nickc@redhat.com>
328
329 * fr30.cpu: Newly contributed file.
330 * fr30.opc: Likewise.
331 * ip2k.cpu: Likewise.
332 * ip2k.opc: Likewise.
333 * mep-avc.cpu: Likewise.
334 * mep-avc2.cpu: Likewise.
335 * mep-c5.cpu: Likewise.
336 * mep-core.cpu: Likewise.
337 * mep-default.cpu: Likewise.
338 * mep-ext-cop.cpu: Likewise.
339 * mep-fmax.cpu: Likewise.
340 * mep-h1.cpu: Likewise.
341 * mep-ivc2.cpu: Likewise.
342 * mep-rhcop.cpu: Likewise.
343 * mep-sample-ucidsp.cpu: Likewise.
344 * mep.cpu: Likewise.
345 * mep.opc: Likewise.
346 * openrisc.cpu: Likewise.
347 * openrisc.opc: Likewise.
348 * xstormy16.cpu: Likewise.
349 * xstormy16.opc: Likewise.
350
9ccb8af9
AM		 3512010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
352
353 * frv.opc: #undef DEBUG.
354
21375995
DD		 3552010-07-03 DJ Delorie <dj@delorie.com>
356
357 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
358
5ff58fb0
DE		 3592010-02-11 Doug Evans <dje@sebabeach.org>
360
361 * m32r.cpu (HASH-PREFIX): Delete.
362 (duhpo, dshpo): New pmacros.
363 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
364 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
365 attribute, define with dshpo.
366 (uimm24): Delete HASH-PREFIX attribute.
367 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
368 (print_signed_with_hash_prefix): New function.
369 (print_unsigned_with_hash_prefix): New function.
370 * xc16x.cpu (dowh): New pmacro.
371 (upof16): Define with dowh, specify print handler.
372 (qbit, qlobit, qhibit): Ditto.
373 (upag16): Ditto.
374 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
375 (print_with_dot_prefix): New functions.
376 (print_with_pof_prefix, print_with_pag_prefix): New functions.
377
3fa5b97b
DE		 3782010-01-24 Doug Evans <dje@sebabeach.org>
379
380 * frv.cpu (floating-point-conversion): Update call to fp conv op.
381 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
382 conditional-floating-point-conversion, ne-floating-point-conversion,
383 float-parallel-mul-add-double-semantics): Ditto.
384
fe8afbc4
DE		 3852010-01-05 Doug Evans <dje@sebabeach.org>
386
387 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
388 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
389
caaf56fb
DE		 3902010-01-02 Doug Evans <dje@sebabeach.org>
391
392 * m32c.opc (parse_signed16): Fix typo.
393
91d6fa6a
NC		 3942009-12-11 Nick Clifton <nickc@redhat.com>
395
396 * frv.opc: Fix shadowed variable warnings.
397 * m32c.opc: Fix shadowed variable warnings.
398
ec84cc2b
DE		 3992009-11-14 Doug Evans <dje@sebabeach.org>
400
401 Must use VOID expression in VOID context.
402 * xc16x.cpu (mov4): Fix mode of `sequence'.
403 (mov9, mov10): Ditto.
404 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
405 (callr, callseg, calls, trap, rets, reti): Ditto.
406 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
407 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
408 (exts, exts1, extsr, extsr1, prior): Ditto.
409
ac1e9eca
DE		 4102009-10-23 Doug Evans <dje@sebabeach.org>
411
412 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
413 cgen-ops.h -> cgen/basic-ops.h.
414
b4744b17
AM		 4152009-09-25 Alan Modra <amodra@bigpond.net.au>
416
417 * m32r.cpu (stb-plus): Typo fix.
418
ab5f875d
DE		 4192009-09-23 Doug Evans <dje@sebabeach.org>
420
421 * m32r.cpu (sth-plus): Fix address mode and calculation.
422 (stb-plus): Ditto.
423 (clrpsw): Fix mask calculation.
424 (bset, bclr, btst): Make mode in bit calculation match expression.
425
426 * xc16x.cpu (rtl-version): Set to 0.8.
427 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
428 make uppercase. Remove unnecessary name-prefix spec.
429 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
430 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
431 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
432 (h-cr): New hardware.
433 (muls): Comment out parts that won't compile, add fixme.
434 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
435 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
436 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
437
0aaaf7c3
DE		 4382009-07-16 Doug Evans <dje@sebabeach.org>
439
440 * cpu/simplify.inc (*): One line doc strings don't need \n.
441 (df): Invoke define-full-ifield instead of claiming it's an alias.
442 (dno): Define.
443 (dnop): Mark as deprecated.
444
1998a8e0
AM		 4452009-06-22 Alan Modra <amodra@bigpond.net.au>
446
447 * m32c.opc (parse_lab_5_3): Use correct enum.
448
6347aad8
HPN		 4492009-01-07 Hans-Peter Nilsson <hp@axis.com>
450
451 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
452 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
453 (media-arith-sat-semantics): Explicitly sign- or zero-extend
454 arguments of "operation" to DI using "mode" and the new pmacros.
455
2c06b7a6
HPN		 4562009-01-03 Hans-Peter Nilsson <hp@axis.com>
457
458 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
459 of number 2, PID.
460
84e94c90
NC		 4612008-12-23 Jon Beniston <jon@beniston.com>
462
463 * lm32.cpu: New file.
464 * lm32.opc: New file.
465
90518ff4
AM		 4662008-01-29 Alan Modra <amodra@bigpond.net.au>
467
468 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
469 to source.
470
a69f60de
HPN		 4712007-10-22 Hans-Peter Nilsson <hp@axis.com>
472
473 * cris.cpu (movs, movu): Use result of extension operation when
474 updating flags.
475
9b201bb5
NC		 4762007-07-04 Nick Clifton <nickc@redhat.com>
477
478 * cris.cpu: Update copyright notice to refer to GPLv3.
479 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
480 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
481 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
482 xc16x.opc: Likewise.
483 * iq2000.cpu: Fix copyright notice to refer to FSF.
484
53289dcd
MS		 4852007-04-30 Mark Salter <msalter@sadr.localdomain>
486
487 * frv.cpu (spr-names): Support new coprocessor SPR registers.
488
f6da2ec2
NC		 4892007-04-20 Nick Clifton <nickc@redhat.com>
490
491 * xc16x.cpu: Restore after accidentally overwriting this file with
492 xc16x.opc.
493
144f4bc6
DD		 4942007-03-29 DJ Delorie <dj@redhat.com>
495
496 * m32c.cpu (Imm-8-s4n): Fix print hook.
497 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
498 (arith-jnz-imm4-dst-defn): Make relaxable.
499 (arith-jnz16-imm4-dst-defn): Fix encodings.
500
75b06e7b
DD		 5012007-03-20 DJ Delorie <dj@redhat.com>
502
503 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
504 mem20): New.
505 (src16-16-20-An-relative-*): New.
506 (dst16-*-20-An-relative-*): New.
507 (dst16-16-16sa-*): New
508 (dst16-16-16ar-*): New
509 (dst32-16-16sa-Unprefixed-*): New
510 (jsri): Fix operands.
511 (setzx): Fix encoding.
72f4393d 512
a5da764d
AM		 5132007-03-08 Alan Modra <amodra@bigpond.net.au>
514
515 * m32r.opc: Formatting.
516
b497d0b0
NC		 5172006-05-22 Nick Clifton <nickc@redhat.com>
518
519 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
520
e78efa90
DD		 5212006-04-10 DJ Delorie <dj@redhat.com>
522
523 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
524 decides if this function accepts symbolic constants or not.
525 (parse_signed_bitbase): Likewise.
526 (parse_unsigned_bitbase8): Pass the new parameter.
527 (parse_unsigned_bitbase11): Likewise.
528 (parse_unsigned_bitbase16): Likewise.
529 (parse_unsigned_bitbase19): Likewise.
530 (parse_unsigned_bitbase27): Likewise.
531 (parse_signed_bitbase8): Likewise.
532 (parse_signed_bitbase11): Likewise.
533 (parse_signed_bitbase19): Likewise.
72f4393d 534
8d0e2679
DD		 5352006-03-13 DJ Delorie <dj@redhat.com>
536
43aa3bb1
DD		 537 * m32c.cpu (Bit3-S): New.
538 (btst:s): New.
539 * m32c.opc (parse_bit3_S): New.
540
8d0e2679
DD		 541 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
542 (btst): Add optional :G suffix for MACH32.
543 (or.b:S): New.
544 (pop.w:G): Add optional :G suffix for MACH16.
545 (push.b.imm): Fix syntax.
546
253d272c
DD		 5472006-03-10 DJ Delorie <dj@redhat.com>
548
549 * m32c.cpu (mul.l): New.
550 (mulu.l): New.
551
c7d41dc5
NC		 5522006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
553
554 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
555 an error message otherwise.
556 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
557 Fix up comments to correctly describe the functions.
558
6772dd07
DD		 5592006-02-24 DJ Delorie <dj@redhat.com>
560
561 * m32c.cpu (RL_TYPE): New attribute, with macros.
562 (Lab-8-24): Add RELAX.
563 (unary-insn-defn-g, binary-arith-imm-dst-defn,
564 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
565 (binary-arith-src-dst-defn): Add 2ADDR attribute.
566 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
567 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
568 attribute.
569 (jsri16, jsri32): Add 1ADDR attribute.
570 (jsr32.w, jsr32.a): Add JUMP attribute.
72f4393d 571
d70c5fc7 5722006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
72f4393d
L		 573 Anil Paranjape <anilp1@kpitcummins.com>
574 Shilin Shakti <shilins@kpitcummins.com>
d70c5fc7
NC		 575
576 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
577 description.
578 * xc16x.opc: New file containing supporting XC16C routines.
579
8536c657
NC		 5802006-02-10 Nick Clifton <nickc@redhat.com>
581
582 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
583
458f7770
DD		 5842006-01-06 DJ Delorie <dj@redhat.com>
585
586 * m32c.cpu (mov.w:q): Fix mode.
587 (push32.b.imm): Likewise, for the comment.
588
d031aafb
NS		 5892005-12-16 Nathan Sidwell <nathan@codesourcery.com>
590
591 Second part of ms1 to mt renaming.
592 * mt.cpu (define-arch, define-isa): Set name to mt.
593 (define-mach): Adjust.
594 * mt.opc (CGEN_ASM_HASH): Update.
595 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
596 (parse_loopsize, parse_imm16): Adjust.
597
eda87aba
DD		 5982005-12-13 DJ Delorie <dj@redhat.com>
599
600 * m32c.cpu (jsri): Fix order so register names aren't treated as
601 symbols.
602 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
603 indexwd, indexws): Fix encodings.
604
4970f871
NS		 6052005-12-12 Nathan Sidwell <nathan@codesourcery.com>
606
607 * mt.cpu: Rename from ms1.cpu.
608 * mt.opc: Rename from ms1.opc.
609
48ad8298
HPN		 6102005-12-06 Hans-Peter Nilsson <hp@axis.com>
611
612 * cris.cpu (simplecris-common-writable-specregs)
613 (simplecris-common-readable-specregs): Split from
614 simplecris-common-specregs. All users changed.
615 (cris-implemented-writable-specregs-v0)
616 (cris-implemented-readable-specregs-v0): Similar from
617 cris-implemented-specregs-v0.
618 (cris-implemented-writable-specregs-v3)
619 (cris-implemented-readable-specregs-v3)
620 (cris-implemented-writable-specregs-v8)
621 (cris-implemented-readable-specregs-v8)
622 (cris-implemented-writable-specregs-v10)
623 (cris-implemented-readable-specregs-v10)
624 (cris-implemented-writable-specregs-v32)
625 (cris-implemented-readable-specregs-v32): Similar.
626 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
627 insns and specializations.
628
6f84a2a6
NS		 6292005-11-08 Nathan Sidwell <nathan@codesourcery.com>
630
631 Add ms2
632 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
633 model.
634 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
635 f-cb2incr, f-rc3): New fields.
636 (LOOP): New instruction.
637 (JAL-HAZARD): New hazard.
638 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
639 New operands.
640 (mul, muli, dbnz, iflush): Enable for ms2
641 (jal, reti): Has JAL-HAZARD.
642 (ldctxt, ldfb, stfb): Only ms1.
643 (fbcb): Only ms1,ms1-003.
644 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
645 fbcbincrs, mfbcbincrs): Enable for ms2.
646 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
647 * ms1.opc (parse_loopsize): New.
648 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
649 (print_pcrel): New.
650
95b96521
DB		 6512005-10-28 Dave Brolley <brolley@redhat.com>
652
653 Contribute the following change:
654 2003-09-24 Dave Brolley <brolley@redhat.com>
655
656 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
657 CGEN_ATTR_VALUE_TYPE.
658 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
659 Use cgen_bitset_intersect_p.
660
c6552317
DD		 6612005-10-27 DJ Delorie <dj@redhat.com>
662
663 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
664 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
665 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
666 imm operand is needed.
667 (adjnz, sbjnz): Pass the right operands.
668 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
669 unary-insn): Add -g variants for opcodes that need to support :G.
670 (not.BW:G, push.BW:G): Call it.
671 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
672 stzx16-imm8-imm8-abs16): Fix operand typos.
673 * m32c.opc (m32c_asm_hash): Support bnCND.
674 (parse_signed4n, print_signed4n): New.
72f4393d 675
f75eb1c0
DD		 6762005-10-26 DJ Delorie <dj@redhat.com>
677
678 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
679 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
680 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
681 dsp8[sp] is signed.
682 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
683 (mov.BW:S r0,r1): Fix typo r1l->r1.
684 (tst): Allow :G suffix.
685 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
686
e277c00b
AM		 6872005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
688
689 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
690
92e0a941
DD		 6912005-10-25 DJ Delorie <dj@redhat.com>
692
693 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
694 making one a macro of the other.
695
a1a280bb
DD		 6962005-10-21 DJ Delorie <dj@redhat.com>
697
698 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
699 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
700 indexld, indexls): .w variants have `1' bit.
701 (rot32.b): QI, not SI.
702 (rot32.w): HI, not SI.
703 (xchg16): HI for .w variant.
704
e74eb924
NC		 7052005-10-19 Nick Clifton <nickc@redhat.com>
706
707 * m32r.opc (parse_slo16): Fix bad application of previous patch.
708
5e03663f
NC		 7092005-10-18 Andreas Schwab <schwab@suse.de>
710
711 * m32r.opc (parse_slo16): Better version of previous patch.
712
ab7c9a26
NC		 7132005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
714
715 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
716 size.
717
fd54057a
DD		 7182005-07-25 DJ Delorie <dj@redhat.com>
719
720 * m32c.opc (parse_unsigned8): Add %dsp8().
721 (parse_signed8): Add %hi8().
722 (parse_unsigned16): Add %dsp16().
723 (parse_signed16): Add %lo16() and %hi16().
724 (parse_lab_5_3): Make valuep a bfd_vma *.
725
85da3a56
NC		 7262005-07-18 Nick Clifton <nickc@redhat.com>
727
728 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
729 components.
730 (f-lab32-jmp-s): Fix insertion sequence.
731 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
732 (Dsp-40-s8): Make parameter be signed.
733 (Dsp-40-s16): Likewise.
734 (Dsp-48-s8): Likewise.
735 (Dsp-48-s16): Likewise.
736 (Imm-13-u3): Likewise. (Despite its name!)
737 (BitBase16-16-s8): Make the parameter be unsigned.
738 (BitBase16-8-u11-S): Likewise.
739 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
740 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
741 relaxation.
742
743 * m32c.opc: Fix formatting.
744 Use safe-ctype.h instead of ctype.h
745 Move duplicated code sequences into a macro.
746 Fix compile time warnings about signedness mismatches.
747 Remove dead code.
748 (parse_lab_5_3): New parser function.
72f4393d 749
aa260854
JB		 7502005-07-16 Jim Blandy <jimb@redhat.com>
751
752 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
753 to represent isa sets.
754
0a665bfd
JB		 7552005-07-15 Jim Blandy <jimb@redhat.com>
756
757 * m32c.cpu, m32c.opc: Fix copyright.
758
49f58d10
JB		 7592005-07-14 Jim Blandy <jimb@redhat.com>
760
761 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
762
0e6b69be
AM		 7632005-07-14 Alan Modra <amodra@bigpond.net.au>
764
765 * ms1.opc (print_dollarhex): Correct format string.
766
f9210e37
AM		 7672005-07-06 Alan Modra <amodra@bigpond.net.au>
768
769 * iq2000.cpu: Include from binutils cpu dir.
770
3ec2b351
NC		 7712005-07-05 Nick Clifton <nickc@redhat.com>
772
773 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
774 unsigned in order to avoid compile time warnings about sign
775 conflicts.
776
777 * ms1.opc (parse_*): Likewise.
778 (parse_imm16): Use a "void *" as it is passed both signed and
779 unsigned arguments.
780
47b0e7ad
NC		 7812005-07-01 Nick Clifton <nickc@redhat.com>
782
783 * frv.opc: Update to ISO C90 function declaration style.
784 * iq2000.opc: Likewise.
785 * m32r.opc: Likewise.
786 * sh.opc: Likewise.
787
b081650b
DB		 7882005-06-15 Dave Brolley <brolley@redhat.com>
789
790 Contributed by Red Hat.
791 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
792 * ms1.opc: New file. Written by Stan Cox.
793
e172dbf8
NC		 7942005-05-10 Nick Clifton <nickc@redhat.com>
795
796 * Update the address and phone number of the FSF organization in
797 the GPL notices in the following files:
798 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
799 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
800 sh64-media.cpu, simplify.inc
801
b2d52a48
AM		 8022005-02-24 Alan Modra <amodra@bigpond.net.au>
803
804 * frv.opc (parse_A): Warning fix.
805
33b71eeb
NC		 8062005-02-23 Nick Clifton <nickc@redhat.com>
807
808 * frv.opc: Fixed compile time warnings about differing signed'ness
809 of pointers passed to functions.
810 * m32r.opc: Likewise.
811
bc18c937
NC		 8122005-02-11 Nick Clifton <nickc@redhat.com>
813
814 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
815 'bfd_vma *' in order avoid compile time warning message.
816
46da9a19
HPN		 8172005-01-28 Hans-Peter Nilsson <hp@axis.com>
818
819 * cris.cpu (mstep): Add missing insn.
820
90219bd0
AO		 8212005-01-25 Alexandre Oliva <aoliva@redhat.com>
822
823 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
824 * frv.cpu: Add support for TLS annotations in loads and calll.
825 * frv.opc (parse_symbolic_address): New.
826 (parse_ldd_annotation): New.
827 (parse_call_annotation): New.
828 (parse_ld_annotation): New.
829 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
830 Introduce TLS relocations.
831 (parse_d12, parse_s12, parse_u12): Likewise.
832 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
833 (parse_call_label, print_at): New.
834
c3d75c30
HPN		 8352004-12-21 Mikael Starvik <starvik@axis.com>
836
837 * cris.cpu (cris-set-mem): Correct integral write semantics.
838
68800d83
HPN		 8392004-11-29 Hans-Peter Nilsson <hp@axis.com>
840
841 * cris.cpu: New file.
842
4bd1d37b
NC		 8432004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
844
845 * iq2000.cpu: Added quotes around macro arguments so that they
846 will work with newer versions of guile.
847
4030fa5a
NC		 8482004-10-27 Nick Clifton <nickc@redhat.com>
849
850 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
851 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
852 operand.
853 * iq2000.cpu (dnop index): Rename to _index to avoid complications
854 with guile.
855
ac28a1cb
RS		 8562004-08-27 Richard Sandiford <rsandifo@redhat.com>
857
858 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
859
dc4c54bb
NC		 8602004-05-15 Nick Clifton <nickc@redhat.com>
861
862 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
863
f4453dfa
NC		 8642004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
865
866 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
867
676a64f4
RS		 8682004-03-01 Richard Sandiford <rsandifo@redhat.com>
869
870 * frv.cpu (define-arch frv): Add fr450 mach.
871 (define-mach fr450): New.
872 (define-model fr450): New. Add profile units to every fr450 insn.
873 (define-attr UNIT): Add MDCUTSSI.
874 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
875 (define-attr AUDIO): New boolean.
876 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
877 (f-LRA-null, f-TLBPR-null): New fields.
878 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
879 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
880 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
881 (LRA-null, TLBPR-null): New macros.
882 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
883 (load-real-address): New macro.
884 (lrai, lrad, tlbpr): New instructions.
885 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
886 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
887 (mdcutssi): Change UNIT attribute to MDCUTSSI.
888 (media-low-clear-semantics, media-scope-limit-semantics)
889 (media-quad-limit, media-quad-shift): New macros.
890 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
891 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
892 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
893 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
894 (fr450_unit_mapping): New array.
895 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
896 for new MDCUTSSI unit.
897 (fr450_check_insn_major_constraints): New function.
898 (check_insn_major_constraints): Use it.
899
c7a48b9a
RS		 9002004-03-01 Richard Sandiford <rsandifo@redhat.com>
901
902 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
903 (scutss): Change unit to I0.
904 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
905 (mqsaths): Fix FR400-MAJOR categorization.
906 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
907 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
908 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
909 combinations.
910
8ae0baa2
RS		 9112004-03-01 Richard Sandiford <rsandifo@redhat.com>
912
913 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
914 (rstb, rsth, rst, rstd, rstq): Delete.
915 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
916
8ee9a8b2
NC		 9172004-02-23 Nick Clifton <nickc@redhat.com>
918
919 * Apply these patches from Renesas:
920
921 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
922
923 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
924 disassembling codes for 0x*2 addresses.
925
926 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
927
928 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
929
930 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
931
932 * cpu/m32r.cpu : Add new model m32r2.
933 Add new instructions.
934 Replace occurrances of 'Mitsubishi' with 'Renesas'.
935 Changed PIPE attr of push from O to OS.
936 Care for Little-endian of M32R.
937 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
938 Care for Little-endian of M32R.
939 (parse_slo16): signed extension for value.
940
299d901c
AC		 9412004-02-20 Andrew Cagney <cagney@redhat.com>
942
e866a257
AC		 943 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
944 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
945
299d901c
AC		 946 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
947 written by Ben Elliston.
948
cb10e79a
RS		 9492004-01-14 Richard Sandiford <rsandifo@redhat.com>
950
951 * frv.cpu (UNIT): Add IACC.
952 (iacc-multiply-r-r): Use it.
953 * frv.opc (fr400_unit_mapping): Add entry for IACC.
954 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
955
d4e4dc14
AO		 9562004-01-06 Alexandre Oliva <aoliva@redhat.com>
957
958 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
959 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
960 cut&paste errors in shifting/truncating numerical operands.
961 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
962 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
963 (parse_uslo16): Likewise.
964 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
965 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
966 (parse_s12): Likewise.
967 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
968 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
969 (parse_uslo16): Likewise.
970 (parse_uhi16): Parse gothi and gotfuncdeschi.
971 (parse_d12): Parse got12 and gotfuncdesc12.
972 (parse_s12): Likewise.
973
1340b9a9
DB		 9742003-10-10 Dave Brolley <brolley@redhat.com>
975
976 * frv.cpu (dnpmop): New p-macro.
977 (GRdoublek): Use dnpmop.
978 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
979 (store-double-r-r): Use (.sym regtype doublek).
980 (r-store-double): Ditto.
981 (store-double-r-r-u): Ditto.
982 (conditional-store-double): Ditto.
983 (conditional-store-double-u): Ditto.
984 (store-double-r-simm): Ditto.
985 (fmovs): Assign to UNIT FMALL.
986
ac7c07ac
DB		 9872003-10-06 Dave Brolley <brolley@redhat.com>
988
989 * frv.cpu, frv.opc: Add support for fr550.
990
d0312406
DB		 9912003-09-24 Dave Brolley <brolley@redhat.com>
992
993 * frv.cpu (u-commit): New modelling unit for fr500.
994 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
995 (commit-r): Use u-commit model for fr500.
996 (commit): Ditto.
997 (conditional-float-binary-op): Take profiling data as an argument.
998 Update callers.
999 (ne-float-binary-op): Ditto.
1000
c6945302
MS		 10012003-09-19 Michael Snyder <msnyder@redhat.com>
1002
1003 * frv.cpu (nldqi): Delete unimplemented instruction.
1004
23600bb3
DB		 10052003-09-12 Dave Brolley <brolley@redhat.com>
1006
1007 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
1008 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
1009 frv_ref_SI to get input register referenced for profiling.
1010 (clear-ne-flag-all): Pass insn profiling in as an argument.
1011 (clrgr,clrfr,clrga,clrfa): Add profiling information.
1012
6f18ad70
MS		 10132003-09-11 Michael Snyder <msnyder@redhat.com>
1014
1015 * frv.cpu: Typographical corrections.
1016
96486995
DB		 10172003-09-09 Dave Brolley <brolley@redhat.com>
1018
1019 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
1020 (conditional-media-dual-complex, media-quad-complex): Likewise.
1021
0457efce
DB		 10222003-09-04 Dave Brolley <brolley@redhat.com>
1023
1024 * frv.cpu (register-transfer): Pass in all attributes in on argument.
1025 Update all callers.
1026 (conditional-register-transfer): Ditto.
1027 (cache-preload): Ditto.
1028 (floating-point-conversion): Ditto.
1029 (floating-point-neg): Ditto.
1030 (float-abs): Ditto.
1031 (float-binary-op-s): Ditto.
1032 (conditional-float-binary-op): Ditto.
1033 (ne-float-binary-op): Ditto.
1034 (float-dual-arith): Ditto.
1035 (ne-float-dual-arith): Ditto.
1036
8caa9169
DB		 10372003-09-03 Dave Brolley <brolley@redhat.com>
1038
1039 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
1040 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
1041 MCLRACC-1.
1042 (A): Removed operand.
1043 (A0,A1): New operands replace operand A.
1044 (mnop): Now a real insn
1045 (mclracc): Removed insn.
1046 (mclracc-0, mclracc-1): New insns replace mclracc.
1047 (all insns): Use new UNIT attributes.
1048
6d9ab561
NC		 10492003-08-21 Nick Clifton <nickc@redhat.com>
1050
1051 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
1052 and u-media-dual-btoh with output parameter.
1053 (cmbtoh): Add profiling hack.
1054
741a7751
NC		 10552003-08-19 Michael Snyder <msnyder@redhat.com>
1056
1057 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
1058
5b5b78da
DE		 10592003-06-10 Doug Evans <dje@sebabeach.org>
1060
1061 * frv.cpu: Add IDOC attribute.
1062
539ee71a
AC		 10632003-06-06 Andrew Cagney <cagney@redhat.com>
1064
1065 Contributed by Red Hat.
1066 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
1067 Stan Cox, and Frank Ch. Eigler.
1068 * iq2000.opc: New file. Written by Ben Elliston, Frank
1069 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
1070 * iq2000m.cpu: New file. Written by Jeff Johnston.
1071 * iq10.cpu: New file. Written by Jeff Johnston.
1072
36c3ae24
NC		 10732003-06-05 Nick Clifton <nickc@redhat.com>
1074
1075 * frv.cpu (FRintieven): New operand. An even-numbered only
1076 version of the FRinti operand.
1077 (FRintjeven): Likewise for FRintj.
1078 (FRintkeven): Likewise for FRintk.
1079 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1080 media-quad-arith-sat-semantics, media-quad-arith-sat,
1081 conditional-media-quad-arith-sat, mdunpackh,
1082 media-quad-multiply-semantics, media-quad-multiply,
1083 conditional-media-quad-multiply, media-quad-complex-i,
1084 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1085 conditional-media-quad-multiply-acc, munpackh,
1086 media-quad-multiply-cross-acc-semantics, mdpackh,
1087 media-quad-multiply-cross-acc, mbtoh-semantics,
1088 media-quad-cross-multiply-cross-acc-semantics,
1089 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1090 media-quad-cross-multiply-acc-semantics, cmbtoh,
1091 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1092 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1093 cmhtob): Use new operands.
1094 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
0e6b69be 1095 (parse_even_register): New function.
36c3ae24 1096
75798298
NC		 10972003-06-03 Nick Clifton <nickc@redhat.com>
1098
1099 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1100 immediate value not unsigned.
1101
9aab5aa3
AC		 11022003-06-03 Andrew Cagney <cagney@redhat.com>
1103
1104 Contributed by Red Hat.
1105 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
1106 and Eric Christopher.
1107 * frv.opc: New file. Written by Catherine Moore, and Dave
1108 Brolley.
1109 * simplify.inc: New file. Written by Doug Evans.
1110
2739f79a
AC		 11112003-05-02 Andrew Cagney <cagney@redhat.com>
1112
1113 * New file.
1114
1115\f
752937aa
NC		 1116Copyright (C) 2003-2012 Free Software Foundation, Inc.
1117
1118Copying and distribution of this file, with or without modification,
1119are permitted in any medium without royalty provided the copyright
1120notice and this notice are preserved.
1121
2739f79a
AC		 1122Local Variables:
1123mode: change-log
1124left-margin: 8
1125fill-column: 74
1126version-control: never
1127End:
GDB Binutils - Deliverables
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