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x86: further refine SSE check (SSE4a, SHA, GFNI)
[deliverable/binutils-gdb.git] / cpu / ChangeLog
CommitLineData
b8e61daa
AM		 12019-12-11 Alan Modra <amodra@gmail.com>
2
3 * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
4 shift left to avoid UB on left shift of negative values.
5
e042e6c3
JM		 62019-11-20 Jose E. Marchesi <jose.marchesi@oracle.com>
7
8 * bpf.cpu: Fix comment describing the 128-bit instruction format.
9
60391a25
PB		 102019-09-09 Phil Blundell <pb@pbcl.net>
11
12 binutils 2.33 branch created.
13
231097b0
JM		 142019-07-19 Jose E. Marchesi <jose.marchesi@oracle.com>
15
16 * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
17 %a and %ctx.
18
3719fd55
JM		 192019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com>
20
21 * bpf.cpu (dlabs): New pmacro.
22 (dlind): Likewise.
23
92434a14
JM		 242019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
25
26 * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
27 explicit 'dst' argument.
28
a2e4218f
SH		 292019-06-13 Stafford Horne <shorne@gmail.com>
30
31 * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
32
eb212c84
SH		 332019-06-13 Stafford Horne <shorne@gmail.com>
34
35 * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
36 (l-adrp): Improve comment.
37
d3ad6278
SH		 382019-06-13 Stafford Horne <shorne@gmail.com>
39
40 * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
41 SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
42 SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
43 (float-setflag-insn-base): New pmacro based on float-setflag-insn.
44 (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
45 float-setflag-unordered-symantics): New pmacro for instruction
46 symantics.
47 (float-setflag-insn): Update to use float-setflag-insn-base.
48 (float-setflag-unordered-insn): New pmacro for generating instructions.
49
6ce26ac7
SH		 502019-06-13 Andrey Bacherov <avbacherov@opencores.org>
51 Stafford Horne <shorne@gmail.com>
52
53 * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
54 (ORFPX-MACHS): Removed pmacro.
55 * or1k.opc (or1k_cgen_insn_supported): New function.
56 (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
57 (parse_regpair, print_regpair): New functions.
58 * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
59 and add comments.
60 (h-fdr): Update comment to indicate or64.
61 (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
62 (h-fd32r): New hardware for 64-bit fpu registers.
63 (h-i64r): New hardware for 64-bit int registers.
64 * or1korbis.cpu (f-resv-8-1): New field.
65 * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
66 (rDDF, rADF, rBDF): Update operand comment to indicate or64.
67 (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
68 (h-roff1): New hardware.
69 (double-field-and-ops mnemonic): New pmacro to generate operations
70 rDD32F, rAD32F, rBD32F, rDDI and rADI.
71 (float-regreg-insn): Update single precision generator to MACH
72 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
73 (float-setflag-insn): Update single precision generator to MACH
74 ORFPX32-MACHS. Fix double instructions from single to double
75 precision. Add generator for or32 64-bit instructions.
76 (float-cust-insn cust-num): Update single precision generator to MACH
77 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
78 (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
79 ORFPX32-MACHS.
80 (lf-rem-d): Fix operation from mod to rem.
81 (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
82 (lf-itof-d): Fix operands from single to double.
83 (lf-ftoi-d): Update operand mode from DI to WI.
84
ea195bb0
JM		 852019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
86
87 * bpf.cpu: New file.
88 * bpf.opc: Likewise.
89
f974f26c
NC		 902018-06-24 Nick Clifton <nickc@redhat.com>
91
92 2.32 branch created.
93
07f5f4c6
RH		 942018-10-05 Richard Henderson <rth@twiddle.net>
95 Stafford Horne <shorne@gmail.com>
96
97 * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
98 (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
99 (l-mul): Fix overflow support and indentation.
100 (l-mulu): Fix overflow support and indentation.
101 (l-muld, l-muldu, l-msbu, l-macu): New instructions.
102 (l-div); Remove incorrect carry behavior.
103 (l-divu): Fix carry and overflow behavior.
104 (l-mac): Add overflow support.
105 (l-msb, l-msbu): Add carry and overflow support.
106
c8e98e36
SH		 1072018-10-05 Richard Henderson <rth@twiddle.net>
108
109 * or1k.opc (parse_disp26): Add support for plta() relocations.
110 (parse_disp21): New function.
111 (or1k_rclass): New enum.
112 (or1k_rtype): New enum.
113 (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
114 (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
115 (parse_imm16): Add support for the new 21bit and 13bit relocations.
116 * or1korbis.cpu (f-disp26): Don't assume SI.
117 (f-disp21): New pc-relative 21-bit 13 shifted to right.
118 (insn-opcode): Add ADRP.
119 (l-adrp): New instruction.
120
1c4f3780
RH		 1212018-10-05 Richard Henderson <rth@twiddle.net>
122
123 * or1k.opc: Add RTYPE_ enum.
124 (INVALID_STORE_RELOC): New string.
125 (or1k_imm16_relocs): New array array.
126 (parse_reloc): New static function that just does the parsing.
127 (parse_imm16): New static function for generic parsing.
128 (parse_simm16): Change to just call parse_imm16.
129 (parse_simm16_split): New function.
130 (parse_uimm16): Change to call parse_imm16.
131 (parse_uimm16_split): New function.
132 * or1korbis.cpu (simm16-split): Change to use new simm16_split.
133 (uimm16-split): Change to use new uimm16_split.
134
67ce483b
AM		 1352018-07-24 Alan Modra <amodra@gmail.com>
136
137 PR 23430
138 * or1kcommon.cpu (spr-reg-indices): Fix description typo.
139
84f9f8c3
AM		 1402018-05-09 Sebastian Rasmussen <sebras@gmail.com>
141
142 * or1kcommon.cpu (spr-reg-info): Typo fix.
143
a6743a54
AM		 1442018-03-03 Alan Modra <amodra@gmail.com>
145
146 * frv.opc: Include opintl.h.
147 (add_next_to_vliw): Use opcodes_error_handler to print error.
148 Standardize error message.
149 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
150
faf766e3
NC		 1512018-01-13 Nick Clifton <nickc@redhat.com>
152
153 2.30 branch created.
154
4ea0266c
SH		 1552017-03-15 Stafford Horne <shorne@gmail.com>
156
157 * or1kcommon.cpu: Add pc set semantics to also update ppc.
158
b781683b
AM		 1592016-10-06 Alan Modra <amodra@gmail.com>
160
161 * mep.opc (expand_string): Add fall through comment.
162
439baf71
AM		 1632016-03-03 Alan Modra <amodra@gmail.com>
164
165 * fr30.cpu (f-m4): Replace bogus comment with a better guess
166 at what is really going on.
167
62de1c63
AM		 1682016-03-02 Alan Modra <amodra@gmail.com>
169
170 * fr30.cpu (f-m4): Replace -1 << 4 with -16.
171
b89807c6
AB		 1722016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
173
174 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
175 a constant to better align disassembler output.
176
018dc9be
SK		 1772014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
178
179 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
180
c151b1c6
AM		 1812014-06-12 Alan Modra <amodra@gmail.com>
182
183 * or1k.opc: Whitespace fixes.
184
999b995d
SK		 1852014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
186
187 * or1korbis.cpu (h-atomic-reserve): New hardware.
188 (h-atomic-address): Likewise.
189 (insn-opcode): Add opcodes for LWA and SWA.
190 (atomic-reserve): New operand.
191 (atomic-address): Likewise.
192 (l-lwa, l-swa): New instructions.
193 (l-lbs): Fix typo in comment.
194 (store-insn): Clear atomic reserve on store to atomic-address.
195 Fix register names in fmt field.
196
73589c9d
CS		 1972014-04-22 Christian Svensson <blue@cmd.nu>
198
199 * openrisc.cpu: Delete.
200 * openrisc.opc: Delete.
201 * or1k.cpu: New file.
202 * or1k.opc: New file.
203 * or1kcommon.cpu: New file.
204 * or1korbis.cpu: New file.
205 * or1korfpx.cpu: New file.
206
594d8fa8
MF		 2072013-12-07 Mike Frysinger <vapier@gentoo.org>
208
209 * epiphany.opc: Remove +x file mode.
210
87a8d6cb
NC		 2112013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
212
213 PR binutils/15241
214 * lm32.cpu (Control and status registers): Add CFG2, PSW,
215 TLBVADDR, TLBPADDR and TLBBADVADDR.
216
02a79b89
JR		 2172012-11-30 Oleg Raikhman <oleg@adapteva.com>
218 Joern Rennecke <joern.rennecke@embecosm.com>
219
220 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
221 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
222 (testset-insn): Add NO_DIS attribute to t.l.
223 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
224 (move-insns): Add NO-DIS attribute to cmov.l.
225 (op-mmr-movts): Add NO-DIS attribute to movts.l.
226 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
227 (op-rrr): Add NO-DIS attribute to .l.
228 (shift-rrr): Add NO-DIS attribute to .l.
229 (op-shift-rri): Add NO-DIS attribute to i32.l.
230 (bitrl, movtl): Add NO-DIS attribute.
231 (op-iextrrr): Add NO-DIS attribute to .l
232 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
233 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
234
a597d2d3
AM		 2352012-02-27 Alan Modra <amodra@gmail.com>
236
237 * mt.opc (print_dollarhex): Trim values to 32 bits.
238
5011093d
NC		 2392011-12-15 Nick Clifton <nickc@redhat.com>
240
241 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
242 hosts.
243
fd936b4c
JR		 2442011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
245
246 * epiphany.opc (parse_branch_addr): Fix type of valuep.
247 Cast value before printing it as a long.
248 (parse_postindex): Fix type of valuep.
249
cfb8c092
NC		 2502011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
251
252 * cpu/epiphany.cpu: New file.
253 * cpu/epiphany.opc: New file.
254
dc15e575
NC		 2552011-08-22 Nick Clifton <nickc@redhat.com>
256
257 * fr30.cpu: Newly contributed file.
258 * fr30.opc: Likewise.
259 * ip2k.cpu: Likewise.
260 * ip2k.opc: Likewise.
261 * mep-avc.cpu: Likewise.
262 * mep-avc2.cpu: Likewise.
263 * mep-c5.cpu: Likewise.
264 * mep-core.cpu: Likewise.
265 * mep-default.cpu: Likewise.
266 * mep-ext-cop.cpu: Likewise.
267 * mep-fmax.cpu: Likewise.
268 * mep-h1.cpu: Likewise.
269 * mep-ivc2.cpu: Likewise.
270 * mep-rhcop.cpu: Likewise.
271 * mep-sample-ucidsp.cpu: Likewise.
272 * mep.cpu: Likewise.
273 * mep.opc: Likewise.
274 * openrisc.cpu: Likewise.
275 * openrisc.opc: Likewise.
276 * xstormy16.cpu: Likewise.
277 * xstormy16.opc: Likewise.
278
9ccb8af9
AM		 2792010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
280
281 * frv.opc: #undef DEBUG.
282
21375995
DD		 2832010-07-03 DJ Delorie <dj@delorie.com>
284
285 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
286
5ff58fb0
DE		 2872010-02-11 Doug Evans <dje@sebabeach.org>
288
289 * m32r.cpu (HASH-PREFIX): Delete.
290 (duhpo, dshpo): New pmacros.
291 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
292 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
293 attribute, define with dshpo.
294 (uimm24): Delete HASH-PREFIX attribute.
295 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
296 (print_signed_with_hash_prefix): New function.
297 (print_unsigned_with_hash_prefix): New function.
298 * xc16x.cpu (dowh): New pmacro.
299 (upof16): Define with dowh, specify print handler.
300 (qbit, qlobit, qhibit): Ditto.
301 (upag16): Ditto.
302 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
303 (print_with_dot_prefix): New functions.
304 (print_with_pof_prefix, print_with_pag_prefix): New functions.
305
3fa5b97b
DE		 3062010-01-24 Doug Evans <dje@sebabeach.org>
307
308 * frv.cpu (floating-point-conversion): Update call to fp conv op.
309 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
310 conditional-floating-point-conversion, ne-floating-point-conversion,
311 float-parallel-mul-add-double-semantics): Ditto.
312
fe8afbc4
DE		 3132010-01-05 Doug Evans <dje@sebabeach.org>
314
315 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
316 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
317
caaf56fb
DE		 3182010-01-02 Doug Evans <dje@sebabeach.org>
319
320 * m32c.opc (parse_signed16): Fix typo.
321
91d6fa6a
NC		 3222009-12-11 Nick Clifton <nickc@redhat.com>
323
324 * frv.opc: Fix shadowed variable warnings.
325 * m32c.opc: Fix shadowed variable warnings.
326
ec84cc2b
DE		 3272009-11-14 Doug Evans <dje@sebabeach.org>
328
329 Must use VOID expression in VOID context.
330 * xc16x.cpu (mov4): Fix mode of `sequence'.
331 (mov9, mov10): Ditto.
332 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
333 (callr, callseg, calls, trap, rets, reti): Ditto.
334 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
335 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
336 (exts, exts1, extsr, extsr1, prior): Ditto.
337
ac1e9eca
DE		 3382009-10-23 Doug Evans <dje@sebabeach.org>
339
340 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
341 cgen-ops.h -> cgen/basic-ops.h.
342
b4744b17
AM		 3432009-09-25 Alan Modra <amodra@bigpond.net.au>
344
345 * m32r.cpu (stb-plus): Typo fix.
346
ab5f875d
DE		 3472009-09-23 Doug Evans <dje@sebabeach.org>
348
349 * m32r.cpu (sth-plus): Fix address mode and calculation.
350 (stb-plus): Ditto.
351 (clrpsw): Fix mask calculation.
352 (bset, bclr, btst): Make mode in bit calculation match expression.
353
354 * xc16x.cpu (rtl-version): Set to 0.8.
355 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
356 make uppercase. Remove unnecessary name-prefix spec.
357 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
358 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
359 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
360 (h-cr): New hardware.
361 (muls): Comment out parts that won't compile, add fixme.
362 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
363 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
364 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
365
0aaaf7c3
DE		 3662009-07-16 Doug Evans <dje@sebabeach.org>
367
368 * cpu/simplify.inc (*): One line doc strings don't need \n.
369 (df): Invoke define-full-ifield instead of claiming it's an alias.
370 (dno): Define.
371 (dnop): Mark as deprecated.
372
1998a8e0
AM		 3732009-06-22 Alan Modra <amodra@bigpond.net.au>
374
375 * m32c.opc (parse_lab_5_3): Use correct enum.
376
6347aad8
HPN		 3772009-01-07 Hans-Peter Nilsson <hp@axis.com>
378
379 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
380 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
381 (media-arith-sat-semantics): Explicitly sign- or zero-extend
382 arguments of "operation" to DI using "mode" and the new pmacros.
383
2c06b7a6
HPN		 3842009-01-03 Hans-Peter Nilsson <hp@axis.com>
385
386 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
387 of number 2, PID.
388
84e94c90
NC		 3892008-12-23 Jon Beniston <jon@beniston.com>
390
391 * lm32.cpu: New file.
392 * lm32.opc: New file.
393
90518ff4
AM		 3942008-01-29 Alan Modra <amodra@bigpond.net.au>
395
396 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
397 to source.
398
a69f60de
HPN		 3992007-10-22 Hans-Peter Nilsson <hp@axis.com>
400
401 * cris.cpu (movs, movu): Use result of extension operation when
402 updating flags.
403
9b201bb5
NC		 4042007-07-04 Nick Clifton <nickc@redhat.com>
405
406 * cris.cpu: Update copyright notice to refer to GPLv3.
407 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
408 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
409 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
410 xc16x.opc: Likewise.
411 * iq2000.cpu: Fix copyright notice to refer to FSF.
412
53289dcd
MS		 4132007-04-30 Mark Salter <msalter@sadr.localdomain>
414
415 * frv.cpu (spr-names): Support new coprocessor SPR registers.
416
f6da2ec2
NC		 4172007-04-20 Nick Clifton <nickc@redhat.com>
418
419 * xc16x.cpu: Restore after accidentally overwriting this file with
420 xc16x.opc.
421
144f4bc6
DD		 4222007-03-29 DJ Delorie <dj@redhat.com>
423
424 * m32c.cpu (Imm-8-s4n): Fix print hook.
425 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
426 (arith-jnz-imm4-dst-defn): Make relaxable.
427 (arith-jnz16-imm4-dst-defn): Fix encodings.
428
75b06e7b
DD		 4292007-03-20 DJ Delorie <dj@redhat.com>
430
431 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
432 mem20): New.
433 (src16-16-20-An-relative-*): New.
434 (dst16-*-20-An-relative-*): New.
435 (dst16-16-16sa-*): New
436 (dst16-16-16ar-*): New
437 (dst32-16-16sa-Unprefixed-*): New
438 (jsri): Fix operands.
439 (setzx): Fix encoding.
72f4393d 440
a5da764d
AM		 4412007-03-08 Alan Modra <amodra@bigpond.net.au>
442
443 * m32r.opc: Formatting.
444
b497d0b0
NC		 4452006-05-22 Nick Clifton <nickc@redhat.com>
446
447 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
448
e78efa90
DD		 4492006-04-10 DJ Delorie <dj@redhat.com>
450
451 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
452 decides if this function accepts symbolic constants or not.
453 (parse_signed_bitbase): Likewise.
454 (parse_unsigned_bitbase8): Pass the new parameter.
455 (parse_unsigned_bitbase11): Likewise.
456 (parse_unsigned_bitbase16): Likewise.
457 (parse_unsigned_bitbase19): Likewise.
458 (parse_unsigned_bitbase27): Likewise.
459 (parse_signed_bitbase8): Likewise.
460 (parse_signed_bitbase11): Likewise.
461 (parse_signed_bitbase19): Likewise.
72f4393d 462
8d0e2679
DD		 4632006-03-13 DJ Delorie <dj@redhat.com>
464
43aa3bb1
DD		 465 * m32c.cpu (Bit3-S): New.
466 (btst:s): New.
467 * m32c.opc (parse_bit3_S): New.
468
8d0e2679
DD		 469 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
470 (btst): Add optional :G suffix for MACH32.
471 (or.b:S): New.
472 (pop.w:G): Add optional :G suffix for MACH16.
473 (push.b.imm): Fix syntax.
474
253d272c
DD		 4752006-03-10 DJ Delorie <dj@redhat.com>
476
477 * m32c.cpu (mul.l): New.
478 (mulu.l): New.
479
c7d41dc5
NC		 4802006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
481
482 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
483 an error message otherwise.
484 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
485 Fix up comments to correctly describe the functions.
486
6772dd07
DD		 4872006-02-24 DJ Delorie <dj@redhat.com>
488
489 * m32c.cpu (RL_TYPE): New attribute, with macros.
490 (Lab-8-24): Add RELAX.
491 (unary-insn-defn-g, binary-arith-imm-dst-defn,
492 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
493 (binary-arith-src-dst-defn): Add 2ADDR attribute.
494 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
495 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
496 attribute.
497 (jsri16, jsri32): Add 1ADDR attribute.
498 (jsr32.w, jsr32.a): Add JUMP attribute.
72f4393d 499
d70c5fc7 5002006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
72f4393d
L		 501 Anil Paranjape <anilp1@kpitcummins.com>
502 Shilin Shakti <shilins@kpitcummins.com>
d70c5fc7
NC		 503
504 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
505 description.
506 * xc16x.opc: New file containing supporting XC16C routines.
507
8536c657
NC		 5082006-02-10 Nick Clifton <nickc@redhat.com>
509
510 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
511
458f7770
DD		 5122006-01-06 DJ Delorie <dj@redhat.com>
513
514 * m32c.cpu (mov.w:q): Fix mode.
515 (push32.b.imm): Likewise, for the comment.
516
d031aafb
NS		 5172005-12-16 Nathan Sidwell <nathan@codesourcery.com>
518
519 Second part of ms1 to mt renaming.
520 * mt.cpu (define-arch, define-isa): Set name to mt.
521 (define-mach): Adjust.
522 * mt.opc (CGEN_ASM_HASH): Update.
523 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
524 (parse_loopsize, parse_imm16): Adjust.
525
eda87aba
DD		 5262005-12-13 DJ Delorie <dj@redhat.com>
527
528 * m32c.cpu (jsri): Fix order so register names aren't treated as
529 symbols.
530 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
531 indexwd, indexws): Fix encodings.
532
4970f871
NS		 5332005-12-12 Nathan Sidwell <nathan@codesourcery.com>
534
535 * mt.cpu: Rename from ms1.cpu.
536 * mt.opc: Rename from ms1.opc.
537
48ad8298
HPN		 5382005-12-06 Hans-Peter Nilsson <hp@axis.com>
539
540 * cris.cpu (simplecris-common-writable-specregs)
541 (simplecris-common-readable-specregs): Split from
542 simplecris-common-specregs. All users changed.
543 (cris-implemented-writable-specregs-v0)
544 (cris-implemented-readable-specregs-v0): Similar from
545 cris-implemented-specregs-v0.
546 (cris-implemented-writable-specregs-v3)
547 (cris-implemented-readable-specregs-v3)
548 (cris-implemented-writable-specregs-v8)
549 (cris-implemented-readable-specregs-v8)
550 (cris-implemented-writable-specregs-v10)
551 (cris-implemented-readable-specregs-v10)
552 (cris-implemented-writable-specregs-v32)
553 (cris-implemented-readable-specregs-v32): Similar.
554 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
555 insns and specializations.
556
6f84a2a6
NS		 5572005-11-08 Nathan Sidwell <nathan@codesourcery.com>
558
559 Add ms2
560 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
561 model.
562 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
563 f-cb2incr, f-rc3): New fields.
564 (LOOP): New instruction.
565 (JAL-HAZARD): New hazard.
566 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
567 New operands.
568 (mul, muli, dbnz, iflush): Enable for ms2
569 (jal, reti): Has JAL-HAZARD.
570 (ldctxt, ldfb, stfb): Only ms1.
571 (fbcb): Only ms1,ms1-003.
572 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
573 fbcbincrs, mfbcbincrs): Enable for ms2.
574 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
575 * ms1.opc (parse_loopsize): New.
576 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
577 (print_pcrel): New.
578
95b96521
DB		 5792005-10-28 Dave Brolley <brolley@redhat.com>
580
581 Contribute the following change:
582 2003-09-24 Dave Brolley <brolley@redhat.com>
583
584 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
585 CGEN_ATTR_VALUE_TYPE.
586 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
587 Use cgen_bitset_intersect_p.
588
c6552317
DD		 5892005-10-27 DJ Delorie <dj@redhat.com>
590
591 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
592 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
593 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
594 imm operand is needed.
595 (adjnz, sbjnz): Pass the right operands.
596 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
597 unary-insn): Add -g variants for opcodes that need to support :G.
598 (not.BW:G, push.BW:G): Call it.
599 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
600 stzx16-imm8-imm8-abs16): Fix operand typos.
601 * m32c.opc (m32c_asm_hash): Support bnCND.
602 (parse_signed4n, print_signed4n): New.
72f4393d 603
f75eb1c0
DD		 6042005-10-26 DJ Delorie <dj@redhat.com>
605
606 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
607 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
608 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
609 dsp8[sp] is signed.
610 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
611 (mov.BW:S r0,r1): Fix typo r1l->r1.
612 (tst): Allow :G suffix.
613 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
614
e277c00b
AM		 6152005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
616
617 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
618
92e0a941
DD		 6192005-10-25 DJ Delorie <dj@redhat.com>
620
621 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
622 making one a macro of the other.
623
a1a280bb
DD		 6242005-10-21 DJ Delorie <dj@redhat.com>
625
626 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
627 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
628 indexld, indexls): .w variants have `1' bit.
629 (rot32.b): QI, not SI.
630 (rot32.w): HI, not SI.
631 (xchg16): HI for .w variant.
632
e74eb924
NC		 6332005-10-19 Nick Clifton <nickc@redhat.com>
634
635 * m32r.opc (parse_slo16): Fix bad application of previous patch.
636
5e03663f
NC		 6372005-10-18 Andreas Schwab <schwab@suse.de>
638
639 * m32r.opc (parse_slo16): Better version of previous patch.
640
ab7c9a26
NC		 6412005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
642
643 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
644 size.
645
fd54057a
DD		 6462005-07-25 DJ Delorie <dj@redhat.com>
647
648 * m32c.opc (parse_unsigned8): Add %dsp8().
649 (parse_signed8): Add %hi8().
650 (parse_unsigned16): Add %dsp16().
651 (parse_signed16): Add %lo16() and %hi16().
652 (parse_lab_5_3): Make valuep a bfd_vma *.
653
85da3a56
NC		 6542005-07-18 Nick Clifton <nickc@redhat.com>
655
656 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
657 components.
658 (f-lab32-jmp-s): Fix insertion sequence.
659 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
660 (Dsp-40-s8): Make parameter be signed.
661 (Dsp-40-s16): Likewise.
662 (Dsp-48-s8): Likewise.
663 (Dsp-48-s16): Likewise.
664 (Imm-13-u3): Likewise. (Despite its name!)
665 (BitBase16-16-s8): Make the parameter be unsigned.
666 (BitBase16-8-u11-S): Likewise.
667 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
668 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
669 relaxation.
670
671 * m32c.opc: Fix formatting.
672 Use safe-ctype.h instead of ctype.h
673 Move duplicated code sequences into a macro.
674 Fix compile time warnings about signedness mismatches.
675 Remove dead code.
676 (parse_lab_5_3): New parser function.
72f4393d 677
aa260854
JB		 6782005-07-16 Jim Blandy <jimb@redhat.com>
679
680 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
681 to represent isa sets.
682
0a665bfd
JB		 6832005-07-15 Jim Blandy <jimb@redhat.com>
684
685 * m32c.cpu, m32c.opc: Fix copyright.
686
49f58d10
JB		 6872005-07-14 Jim Blandy <jimb@redhat.com>
688
689 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
690
0e6b69be
AM		 6912005-07-14 Alan Modra <amodra@bigpond.net.au>
692
693 * ms1.opc (print_dollarhex): Correct format string.
694
f9210e37
AM		 6952005-07-06 Alan Modra <amodra@bigpond.net.au>
696
697 * iq2000.cpu: Include from binutils cpu dir.
698
3ec2b351
NC		 6992005-07-05 Nick Clifton <nickc@redhat.com>
700
701 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
702 unsigned in order to avoid compile time warnings about sign
703 conflicts.
704
705 * ms1.opc (parse_*): Likewise.
706 (parse_imm16): Use a "void *" as it is passed both signed and
707 unsigned arguments.
708
47b0e7ad
NC		 7092005-07-01 Nick Clifton <nickc@redhat.com>
710
711 * frv.opc: Update to ISO C90 function declaration style.
712 * iq2000.opc: Likewise.
713 * m32r.opc: Likewise.
714 * sh.opc: Likewise.
715
b081650b
DB		 7162005-06-15 Dave Brolley <brolley@redhat.com>
717
718 Contributed by Red Hat.
719 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
720 * ms1.opc: New file. Written by Stan Cox.
721
e172dbf8
NC		 7222005-05-10 Nick Clifton <nickc@redhat.com>
723
724 * Update the address and phone number of the FSF organization in
725 the GPL notices in the following files:
726 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
727 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
728 sh64-media.cpu, simplify.inc
729
b2d52a48
AM		 7302005-02-24 Alan Modra <amodra@bigpond.net.au>
731
732 * frv.opc (parse_A): Warning fix.
733
33b71eeb
NC		 7342005-02-23 Nick Clifton <nickc@redhat.com>
735
736 * frv.opc: Fixed compile time warnings about differing signed'ness
737 of pointers passed to functions.
738 * m32r.opc: Likewise.
739
bc18c937
NC		 7402005-02-11 Nick Clifton <nickc@redhat.com>
741
742 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
743 'bfd_vma *' in order avoid compile time warning message.
744
46da9a19
HPN		 7452005-01-28 Hans-Peter Nilsson <hp@axis.com>
746
747 * cris.cpu (mstep): Add missing insn.
748
90219bd0
AO		 7492005-01-25 Alexandre Oliva <aoliva@redhat.com>
750
751 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
752 * frv.cpu: Add support for TLS annotations in loads and calll.
753 * frv.opc (parse_symbolic_address): New.
754 (parse_ldd_annotation): New.
755 (parse_call_annotation): New.
756 (parse_ld_annotation): New.
757 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
758 Introduce TLS relocations.
759 (parse_d12, parse_s12, parse_u12): Likewise.
760 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
761 (parse_call_label, print_at): New.
762
c3d75c30
HPN		 7632004-12-21 Mikael Starvik <starvik@axis.com>
764
765 * cris.cpu (cris-set-mem): Correct integral write semantics.
766
68800d83
HPN		 7672004-11-29 Hans-Peter Nilsson <hp@axis.com>
768
769 * cris.cpu: New file.
770
4bd1d37b
NC		 7712004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
772
773 * iq2000.cpu: Added quotes around macro arguments so that they
774 will work with newer versions of guile.
775
4030fa5a
NC		 7762004-10-27 Nick Clifton <nickc@redhat.com>
777
778 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
779 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
780 operand.
781 * iq2000.cpu (dnop index): Rename to _index to avoid complications
782 with guile.
783
ac28a1cb
RS		 7842004-08-27 Richard Sandiford <rsandifo@redhat.com>
785
786 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
787
dc4c54bb
NC		 7882004-05-15 Nick Clifton <nickc@redhat.com>
789
790 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
791
f4453dfa
NC		 7922004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
793
794 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
795
676a64f4
RS		 7962004-03-01 Richard Sandiford <rsandifo@redhat.com>
797
798 * frv.cpu (define-arch frv): Add fr450 mach.
799 (define-mach fr450): New.
800 (define-model fr450): New. Add profile units to every fr450 insn.
801 (define-attr UNIT): Add MDCUTSSI.
802 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
803 (define-attr AUDIO): New boolean.
804 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
805 (f-LRA-null, f-TLBPR-null): New fields.
806 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
807 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
808 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
809 (LRA-null, TLBPR-null): New macros.
810 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
811 (load-real-address): New macro.
812 (lrai, lrad, tlbpr): New instructions.
813 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
814 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
815 (mdcutssi): Change UNIT attribute to MDCUTSSI.
816 (media-low-clear-semantics, media-scope-limit-semantics)
817 (media-quad-limit, media-quad-shift): New macros.
818 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
819 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
820 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
821 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
822 (fr450_unit_mapping): New array.
823 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
824 for new MDCUTSSI unit.
825 (fr450_check_insn_major_constraints): New function.
826 (check_insn_major_constraints): Use it.
827
c7a48b9a
RS		 8282004-03-01 Richard Sandiford <rsandifo@redhat.com>
829
830 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
831 (scutss): Change unit to I0.
832 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
833 (mqsaths): Fix FR400-MAJOR categorization.
834 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
835 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
836 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
837 combinations.
838
8ae0baa2
RS		 8392004-03-01 Richard Sandiford <rsandifo@redhat.com>
840
841 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
842 (rstb, rsth, rst, rstd, rstq): Delete.
843 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
844
8ee9a8b2
NC		 8452004-02-23 Nick Clifton <nickc@redhat.com>
846
847 * Apply these patches from Renesas:
848
849 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
850
851 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
852 disassembling codes for 0x*2 addresses.
853
854 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
855
856 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
857
858 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
859
860 * cpu/m32r.cpu : Add new model m32r2.
861 Add new instructions.
862 Replace occurrances of 'Mitsubishi' with 'Renesas'.
863 Changed PIPE attr of push from O to OS.
864 Care for Little-endian of M32R.
865 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
866 Care for Little-endian of M32R.
867 (parse_slo16): signed extension for value.
868
299d901c
AC		 8692004-02-20 Andrew Cagney <cagney@redhat.com>
870
e866a257
AC		 871 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
872 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
873
299d901c
AC		 874 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
875 written by Ben Elliston.
876
cb10e79a
RS		 8772004-01-14 Richard Sandiford <rsandifo@redhat.com>
878
879 * frv.cpu (UNIT): Add IACC.
880 (iacc-multiply-r-r): Use it.
881 * frv.opc (fr400_unit_mapping): Add entry for IACC.
882 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
883
d4e4dc14
AO		 8842004-01-06 Alexandre Oliva <aoliva@redhat.com>
885
886 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
887 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
888 cut&paste errors in shifting/truncating numerical operands.
889 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
890 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
891 (parse_uslo16): Likewise.
892 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
893 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
894 (parse_s12): Likewise.
895 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
896 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
897 (parse_uslo16): Likewise.
898 (parse_uhi16): Parse gothi and gotfuncdeschi.
899 (parse_d12): Parse got12 and gotfuncdesc12.
900 (parse_s12): Likewise.
901
1340b9a9
DB		 9022003-10-10 Dave Brolley <brolley@redhat.com>
903
904 * frv.cpu (dnpmop): New p-macro.
905 (GRdoublek): Use dnpmop.
906 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
907 (store-double-r-r): Use (.sym regtype doublek).
908 (r-store-double): Ditto.
909 (store-double-r-r-u): Ditto.
910 (conditional-store-double): Ditto.
911 (conditional-store-double-u): Ditto.
912 (store-double-r-simm): Ditto.
913 (fmovs): Assign to UNIT FMALL.
914
ac7c07ac
DB		 9152003-10-06 Dave Brolley <brolley@redhat.com>
916
917 * frv.cpu, frv.opc: Add support for fr550.
918
d0312406
DB		 9192003-09-24 Dave Brolley <brolley@redhat.com>
920
921 * frv.cpu (u-commit): New modelling unit for fr500.
922 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
923 (commit-r): Use u-commit model for fr500.
924 (commit): Ditto.
925 (conditional-float-binary-op): Take profiling data as an argument.
926 Update callers.
927 (ne-float-binary-op): Ditto.
928
c6945302
MS		 9292003-09-19 Michael Snyder <msnyder@redhat.com>
930
931 * frv.cpu (nldqi): Delete unimplemented instruction.
932
23600bb3
DB		 9332003-09-12 Dave Brolley <brolley@redhat.com>
934
935 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
936 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
937 frv_ref_SI to get input register referenced for profiling.
938 (clear-ne-flag-all): Pass insn profiling in as an argument.
939 (clrgr,clrfr,clrga,clrfa): Add profiling information.
940
6f18ad70
MS		 9412003-09-11 Michael Snyder <msnyder@redhat.com>
942
943 * frv.cpu: Typographical corrections.
944
96486995
DB		 9452003-09-09 Dave Brolley <brolley@redhat.com>
946
947 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
948 (conditional-media-dual-complex, media-quad-complex): Likewise.
949
0457efce
DB		 9502003-09-04 Dave Brolley <brolley@redhat.com>
951
952 * frv.cpu (register-transfer): Pass in all attributes in on argument.
953 Update all callers.
954 (conditional-register-transfer): Ditto.
955 (cache-preload): Ditto.
956 (floating-point-conversion): Ditto.
957 (floating-point-neg): Ditto.
958 (float-abs): Ditto.
959 (float-binary-op-s): Ditto.
960 (conditional-float-binary-op): Ditto.
961 (ne-float-binary-op): Ditto.
962 (float-dual-arith): Ditto.
963 (ne-float-dual-arith): Ditto.
964
8caa9169
DB		 9652003-09-03 Dave Brolley <brolley@redhat.com>
966
967 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
968 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
969 MCLRACC-1.
970 (A): Removed operand.
971 (A0,A1): New operands replace operand A.
972 (mnop): Now a real insn
973 (mclracc): Removed insn.
974 (mclracc-0, mclracc-1): New insns replace mclracc.
975 (all insns): Use new UNIT attributes.
976
6d9ab561
NC		 9772003-08-21 Nick Clifton <nickc@redhat.com>
978
979 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
980 and u-media-dual-btoh with output parameter.
981 (cmbtoh): Add profiling hack.
982
741a7751
NC		 9832003-08-19 Michael Snyder <msnyder@redhat.com>
984
985 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
986
5b5b78da
DE		 9872003-06-10 Doug Evans <dje@sebabeach.org>
988
989 * frv.cpu: Add IDOC attribute.
990
539ee71a
AC		 9912003-06-06 Andrew Cagney <cagney@redhat.com>
992
993 Contributed by Red Hat.
994 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
995 Stan Cox, and Frank Ch. Eigler.
996 * iq2000.opc: New file. Written by Ben Elliston, Frank
997 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
998 * iq2000m.cpu: New file. Written by Jeff Johnston.
999 * iq10.cpu: New file. Written by Jeff Johnston.
1000
36c3ae24
NC		 10012003-06-05 Nick Clifton <nickc@redhat.com>
1002
1003 * frv.cpu (FRintieven): New operand. An even-numbered only
1004 version of the FRinti operand.
1005 (FRintjeven): Likewise for FRintj.
1006 (FRintkeven): Likewise for FRintk.
1007 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1008 media-quad-arith-sat-semantics, media-quad-arith-sat,
1009 conditional-media-quad-arith-sat, mdunpackh,
1010 media-quad-multiply-semantics, media-quad-multiply,
1011 conditional-media-quad-multiply, media-quad-complex-i,
1012 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1013 conditional-media-quad-multiply-acc, munpackh,
1014 media-quad-multiply-cross-acc-semantics, mdpackh,
1015 media-quad-multiply-cross-acc, mbtoh-semantics,
1016 media-quad-cross-multiply-cross-acc-semantics,
1017 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1018 media-quad-cross-multiply-acc-semantics, cmbtoh,
1019 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1020 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1021 cmhtob): Use new operands.
1022 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
0e6b69be 1023 (parse_even_register): New function.
36c3ae24 1024
75798298
NC		 10252003-06-03 Nick Clifton <nickc@redhat.com>
1026
1027 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1028 immediate value not unsigned.
1029
9aab5aa3
AC		 10302003-06-03 Andrew Cagney <cagney@redhat.com>
1031
1032 Contributed by Red Hat.
1033 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
1034 and Eric Christopher.
1035 * frv.opc: New file. Written by Catherine Moore, and Dave
1036 Brolley.
1037 * simplify.inc: New file. Written by Doug Evans.
1038
2739f79a
AC		 10392003-05-02 Andrew Cagney <cagney@redhat.com>
1040
1041 * New file.
1042
1043\f
752937aa
NC		 1044Copyright (C) 2003-2012 Free Software Foundation, Inc.
1045
1046Copying and distribution of this file, with or without modification,
1047are permitted in any medium without royalty provided the copyright
1048notice and this notice are preserved.
1049
2739f79a
AC		 1050Local Variables:
1051mode: change-log
1052left-margin: 8
1053fill-column: 74
1054version-control: never
1055End:
GDB Binutils - Deliverables
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