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231097b0
JM		 12019-07-19 Jose E. Marchesi <jose.marchesi@oracle.com>
2
3 * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
4 %a and %ctx.
5
3719fd55
JM		 62019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com>
7
8 * bpf.cpu (dlabs): New pmacro.
9 (dlind): Likewise.
10
92434a14
JM		 112019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
12
13 * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
14 explicit 'dst' argument.
15
a2e4218f
SH		 162019-06-13 Stafford Horne <shorne@gmail.com>
17
18 * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
19
eb212c84
SH		 202019-06-13 Stafford Horne <shorne@gmail.com>
21
22 * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
23 (l-adrp): Improve comment.
24
d3ad6278
SH		 252019-06-13 Stafford Horne <shorne@gmail.com>
26
27 * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
28 SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
29 SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
30 (float-setflag-insn-base): New pmacro based on float-setflag-insn.
31 (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
32 float-setflag-unordered-symantics): New pmacro for instruction
33 symantics.
34 (float-setflag-insn): Update to use float-setflag-insn-base.
35 (float-setflag-unordered-insn): New pmacro for generating instructions.
36
6ce26ac7
SH		 372019-06-13 Andrey Bacherov <avbacherov@opencores.org>
38 Stafford Horne <shorne@gmail.com>
39
40 * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
41 (ORFPX-MACHS): Removed pmacro.
42 * or1k.opc (or1k_cgen_insn_supported): New function.
43 (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
44 (parse_regpair, print_regpair): New functions.
45 * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
46 and add comments.
47 (h-fdr): Update comment to indicate or64.
48 (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
49 (h-fd32r): New hardware for 64-bit fpu registers.
50 (h-i64r): New hardware for 64-bit int registers.
51 * or1korbis.cpu (f-resv-8-1): New field.
52 * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
53 (rDDF, rADF, rBDF): Update operand comment to indicate or64.
54 (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
55 (h-roff1): New hardware.
56 (double-field-and-ops mnemonic): New pmacro to generate operations
57 rDD32F, rAD32F, rBD32F, rDDI and rADI.
58 (float-regreg-insn): Update single precision generator to MACH
59 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
60 (float-setflag-insn): Update single precision generator to MACH
61 ORFPX32-MACHS. Fix double instructions from single to double
62 precision. Add generator for or32 64-bit instructions.
63 (float-cust-insn cust-num): Update single precision generator to MACH
64 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
65 (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
66 ORFPX32-MACHS.
67 (lf-rem-d): Fix operation from mod to rem.
68 (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
69 (lf-itof-d): Fix operands from single to double.
70 (lf-ftoi-d): Update operand mode from DI to WI.
71
ea195bb0
JM		 722019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
73
74 * bpf.cpu: New file.
75 * bpf.opc: Likewise.
76
f974f26c
NC		 772018-06-24 Nick Clifton <nickc@redhat.com>
78
79 2.32 branch created.
80
07f5f4c6
RH		 812018-10-05 Richard Henderson <rth@twiddle.net>
82 Stafford Horne <shorne@gmail.com>
83
84 * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
85 (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
86 (l-mul): Fix overflow support and indentation.
87 (l-mulu): Fix overflow support and indentation.
88 (l-muld, l-muldu, l-msbu, l-macu): New instructions.
89 (l-div); Remove incorrect carry behavior.
90 (l-divu): Fix carry and overflow behavior.
91 (l-mac): Add overflow support.
92 (l-msb, l-msbu): Add carry and overflow support.
93
c8e98e36
SH		 942018-10-05 Richard Henderson <rth@twiddle.net>
95
96 * or1k.opc (parse_disp26): Add support for plta() relocations.
97 (parse_disp21): New function.
98 (or1k_rclass): New enum.
99 (or1k_rtype): New enum.
100 (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
101 (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
102 (parse_imm16): Add support for the new 21bit and 13bit relocations.
103 * or1korbis.cpu (f-disp26): Don't assume SI.
104 (f-disp21): New pc-relative 21-bit 13 shifted to right.
105 (insn-opcode): Add ADRP.
106 (l-adrp): New instruction.
107
1c4f3780
RH		 1082018-10-05 Richard Henderson <rth@twiddle.net>
109
110 * or1k.opc: Add RTYPE_ enum.
111 (INVALID_STORE_RELOC): New string.
112 (or1k_imm16_relocs): New array array.
113 (parse_reloc): New static function that just does the parsing.
114 (parse_imm16): New static function for generic parsing.
115 (parse_simm16): Change to just call parse_imm16.
116 (parse_simm16_split): New function.
117 (parse_uimm16): Change to call parse_imm16.
118 (parse_uimm16_split): New function.
119 * or1korbis.cpu (simm16-split): Change to use new simm16_split.
120 (uimm16-split): Change to use new uimm16_split.
121
67ce483b
AM		 1222018-07-24 Alan Modra <amodra@gmail.com>
123
124 PR 23430
125 * or1kcommon.cpu (spr-reg-indices): Fix description typo.
126
84f9f8c3
AM		 1272018-05-09 Sebastian Rasmussen <sebras@gmail.com>
128
129 * or1kcommon.cpu (spr-reg-info): Typo fix.
130
a6743a54
AM		 1312018-03-03 Alan Modra <amodra@gmail.com>
132
133 * frv.opc: Include opintl.h.
134 (add_next_to_vliw): Use opcodes_error_handler to print error.
135 Standardize error message.
136 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
137
faf766e3
NC		 1382018-01-13 Nick Clifton <nickc@redhat.com>
139
140 2.30 branch created.
141
4ea0266c
SH		 1422017-03-15 Stafford Horne <shorne@gmail.com>
143
144 * or1kcommon.cpu: Add pc set semantics to also update ppc.
145
b781683b
AM		 1462016-10-06 Alan Modra <amodra@gmail.com>
147
148 * mep.opc (expand_string): Add fall through comment.
149
439baf71
AM		 1502016-03-03 Alan Modra <amodra@gmail.com>
151
152 * fr30.cpu (f-m4): Replace bogus comment with a better guess
153 at what is really going on.
154
62de1c63
AM		 1552016-03-02 Alan Modra <amodra@gmail.com>
156
157 * fr30.cpu (f-m4): Replace -1 << 4 with -16.
158
b89807c6
AB		 1592016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
160
161 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
162 a constant to better align disassembler output.
163
018dc9be
SK		 1642014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
165
166 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
167
c151b1c6
AM		 1682014-06-12 Alan Modra <amodra@gmail.com>
169
170 * or1k.opc: Whitespace fixes.
171
999b995d
SK		 1722014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
173
174 * or1korbis.cpu (h-atomic-reserve): New hardware.
175 (h-atomic-address): Likewise.
176 (insn-opcode): Add opcodes for LWA and SWA.
177 (atomic-reserve): New operand.
178 (atomic-address): Likewise.
179 (l-lwa, l-swa): New instructions.
180 (l-lbs): Fix typo in comment.
181 (store-insn): Clear atomic reserve on store to atomic-address.
182 Fix register names in fmt field.
183
73589c9d
CS		 1842014-04-22 Christian Svensson <blue@cmd.nu>
185
186 * openrisc.cpu: Delete.
187 * openrisc.opc: Delete.
188 * or1k.cpu: New file.
189 * or1k.opc: New file.
190 * or1kcommon.cpu: New file.
191 * or1korbis.cpu: New file.
192 * or1korfpx.cpu: New file.
193
594d8fa8
MF		 1942013-12-07 Mike Frysinger <vapier@gentoo.org>
195
196 * epiphany.opc: Remove +x file mode.
197
87a8d6cb
NC		 1982013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
199
200 PR binutils/15241
201 * lm32.cpu (Control and status registers): Add CFG2, PSW,
202 TLBVADDR, TLBPADDR and TLBBADVADDR.
203
02a79b89
JR		 2042012-11-30 Oleg Raikhman <oleg@adapteva.com>
205 Joern Rennecke <joern.rennecke@embecosm.com>
206
207 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
208 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
209 (testset-insn): Add NO_DIS attribute to t.l.
210 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
211 (move-insns): Add NO-DIS attribute to cmov.l.
212 (op-mmr-movts): Add NO-DIS attribute to movts.l.
213 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
214 (op-rrr): Add NO-DIS attribute to .l.
215 (shift-rrr): Add NO-DIS attribute to .l.
216 (op-shift-rri): Add NO-DIS attribute to i32.l.
217 (bitrl, movtl): Add NO-DIS attribute.
218 (op-iextrrr): Add NO-DIS attribute to .l
219 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
220 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
221
a597d2d3
AM		 2222012-02-27 Alan Modra <amodra@gmail.com>
223
224 * mt.opc (print_dollarhex): Trim values to 32 bits.
225
5011093d
NC		 2262011-12-15 Nick Clifton <nickc@redhat.com>
227
228 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
229 hosts.
230
fd936b4c
JR		 2312011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
232
233 * epiphany.opc (parse_branch_addr): Fix type of valuep.
234 Cast value before printing it as a long.
235 (parse_postindex): Fix type of valuep.
236
cfb8c092
NC		 2372011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
238
239 * cpu/epiphany.cpu: New file.
240 * cpu/epiphany.opc: New file.
241
dc15e575
NC		 2422011-08-22 Nick Clifton <nickc@redhat.com>
243
244 * fr30.cpu: Newly contributed file.
245 * fr30.opc: Likewise.
246 * ip2k.cpu: Likewise.
247 * ip2k.opc: Likewise.
248 * mep-avc.cpu: Likewise.
249 * mep-avc2.cpu: Likewise.
250 * mep-c5.cpu: Likewise.
251 * mep-core.cpu: Likewise.
252 * mep-default.cpu: Likewise.
253 * mep-ext-cop.cpu: Likewise.
254 * mep-fmax.cpu: Likewise.
255 * mep-h1.cpu: Likewise.
256 * mep-ivc2.cpu: Likewise.
257 * mep-rhcop.cpu: Likewise.
258 * mep-sample-ucidsp.cpu: Likewise.
259 * mep.cpu: Likewise.
260 * mep.opc: Likewise.
261 * openrisc.cpu: Likewise.
262 * openrisc.opc: Likewise.
263 * xstormy16.cpu: Likewise.
264 * xstormy16.opc: Likewise.
265
9ccb8af9
AM		 2662010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
267
268 * frv.opc: #undef DEBUG.
269
21375995
DD		 2702010-07-03 DJ Delorie <dj@delorie.com>
271
272 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
273
5ff58fb0
DE		 2742010-02-11 Doug Evans <dje@sebabeach.org>
275
276 * m32r.cpu (HASH-PREFIX): Delete.
277 (duhpo, dshpo): New pmacros.
278 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
279 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
280 attribute, define with dshpo.
281 (uimm24): Delete HASH-PREFIX attribute.
282 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
283 (print_signed_with_hash_prefix): New function.
284 (print_unsigned_with_hash_prefix): New function.
285 * xc16x.cpu (dowh): New pmacro.
286 (upof16): Define with dowh, specify print handler.
287 (qbit, qlobit, qhibit): Ditto.
288 (upag16): Ditto.
289 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
290 (print_with_dot_prefix): New functions.
291 (print_with_pof_prefix, print_with_pag_prefix): New functions.
292
3fa5b97b
DE		 2932010-01-24 Doug Evans <dje@sebabeach.org>
294
295 * frv.cpu (floating-point-conversion): Update call to fp conv op.
296 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
297 conditional-floating-point-conversion, ne-floating-point-conversion,
298 float-parallel-mul-add-double-semantics): Ditto.
299
fe8afbc4
DE		 3002010-01-05 Doug Evans <dje@sebabeach.org>
301
302 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
303 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
304
caaf56fb
DE		 3052010-01-02 Doug Evans <dje@sebabeach.org>
306
307 * m32c.opc (parse_signed16): Fix typo.
308
91d6fa6a
NC		 3092009-12-11 Nick Clifton <nickc@redhat.com>
310
311 * frv.opc: Fix shadowed variable warnings.
312 * m32c.opc: Fix shadowed variable warnings.
313
ec84cc2b
DE		 3142009-11-14 Doug Evans <dje@sebabeach.org>
315
316 Must use VOID expression in VOID context.
317 * xc16x.cpu (mov4): Fix mode of `sequence'.
318 (mov9, mov10): Ditto.
319 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
320 (callr, callseg, calls, trap, rets, reti): Ditto.
321 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
322 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
323 (exts, exts1, extsr, extsr1, prior): Ditto.
324
ac1e9eca
DE		 3252009-10-23 Doug Evans <dje@sebabeach.org>
326
327 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
328 cgen-ops.h -> cgen/basic-ops.h.
329
b4744b17
AM		 3302009-09-25 Alan Modra <amodra@bigpond.net.au>
331
332 * m32r.cpu (stb-plus): Typo fix.
333
ab5f875d
DE		 3342009-09-23 Doug Evans <dje@sebabeach.org>
335
336 * m32r.cpu (sth-plus): Fix address mode and calculation.
337 (stb-plus): Ditto.
338 (clrpsw): Fix mask calculation.
339 (bset, bclr, btst): Make mode in bit calculation match expression.
340
341 * xc16x.cpu (rtl-version): Set to 0.8.
342 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
343 make uppercase. Remove unnecessary name-prefix spec.
344 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
345 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
346 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
347 (h-cr): New hardware.
348 (muls): Comment out parts that won't compile, add fixme.
349 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
350 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
351 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
352
0aaaf7c3
DE		 3532009-07-16 Doug Evans <dje@sebabeach.org>
354
355 * cpu/simplify.inc (*): One line doc strings don't need \n.
356 (df): Invoke define-full-ifield instead of claiming it's an alias.
357 (dno): Define.
358 (dnop): Mark as deprecated.
359
1998a8e0
AM		 3602009-06-22 Alan Modra <amodra@bigpond.net.au>
361
362 * m32c.opc (parse_lab_5_3): Use correct enum.
363
6347aad8
HPN		 3642009-01-07 Hans-Peter Nilsson <hp@axis.com>
365
366 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
367 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
368 (media-arith-sat-semantics): Explicitly sign- or zero-extend
369 arguments of "operation" to DI using "mode" and the new pmacros.
370
2c06b7a6
HPN		 3712009-01-03 Hans-Peter Nilsson <hp@axis.com>
372
373 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
374 of number 2, PID.
375
84e94c90
NC		 3762008-12-23 Jon Beniston <jon@beniston.com>
377
378 * lm32.cpu: New file.
379 * lm32.opc: New file.
380
90518ff4
AM		 3812008-01-29 Alan Modra <amodra@bigpond.net.au>
382
383 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
384 to source.
385
a69f60de
HPN		 3862007-10-22 Hans-Peter Nilsson <hp@axis.com>
387
388 * cris.cpu (movs, movu): Use result of extension operation when
389 updating flags.
390
9b201bb5
NC		 3912007-07-04 Nick Clifton <nickc@redhat.com>
392
393 * cris.cpu: Update copyright notice to refer to GPLv3.
394 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
395 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
396 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
397 xc16x.opc: Likewise.
398 * iq2000.cpu: Fix copyright notice to refer to FSF.
399
53289dcd
MS		 4002007-04-30 Mark Salter <msalter@sadr.localdomain>
401
402 * frv.cpu (spr-names): Support new coprocessor SPR registers.
403
f6da2ec2
NC		 4042007-04-20 Nick Clifton <nickc@redhat.com>
405
406 * xc16x.cpu: Restore after accidentally overwriting this file with
407 xc16x.opc.
408
144f4bc6
DD		 4092007-03-29 DJ Delorie <dj@redhat.com>
410
411 * m32c.cpu (Imm-8-s4n): Fix print hook.
412 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
413 (arith-jnz-imm4-dst-defn): Make relaxable.
414 (arith-jnz16-imm4-dst-defn): Fix encodings.
415
75b06e7b
DD		 4162007-03-20 DJ Delorie <dj@redhat.com>
417
418 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
419 mem20): New.
420 (src16-16-20-An-relative-*): New.
421 (dst16-*-20-An-relative-*): New.
422 (dst16-16-16sa-*): New
423 (dst16-16-16ar-*): New
424 (dst32-16-16sa-Unprefixed-*): New
425 (jsri): Fix operands.
426 (setzx): Fix encoding.
72f4393d 427
a5da764d
AM		 4282007-03-08 Alan Modra <amodra@bigpond.net.au>
429
430 * m32r.opc: Formatting.
431
b497d0b0
NC		 4322006-05-22 Nick Clifton <nickc@redhat.com>
433
434 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
435
e78efa90
DD		 4362006-04-10 DJ Delorie <dj@redhat.com>
437
438 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
439 decides if this function accepts symbolic constants or not.
440 (parse_signed_bitbase): Likewise.
441 (parse_unsigned_bitbase8): Pass the new parameter.
442 (parse_unsigned_bitbase11): Likewise.
443 (parse_unsigned_bitbase16): Likewise.
444 (parse_unsigned_bitbase19): Likewise.
445 (parse_unsigned_bitbase27): Likewise.
446 (parse_signed_bitbase8): Likewise.
447 (parse_signed_bitbase11): Likewise.
448 (parse_signed_bitbase19): Likewise.
72f4393d 449
8d0e2679
DD		 4502006-03-13 DJ Delorie <dj@redhat.com>
451
43aa3bb1
DD		 452 * m32c.cpu (Bit3-S): New.
453 (btst:s): New.
454 * m32c.opc (parse_bit3_S): New.
455
8d0e2679
DD		 456 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
457 (btst): Add optional :G suffix for MACH32.
458 (or.b:S): New.
459 (pop.w:G): Add optional :G suffix for MACH16.
460 (push.b.imm): Fix syntax.
461
253d272c
DD		 4622006-03-10 DJ Delorie <dj@redhat.com>
463
464 * m32c.cpu (mul.l): New.
465 (mulu.l): New.
466
c7d41dc5
NC		 4672006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
468
469 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
470 an error message otherwise.
471 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
472 Fix up comments to correctly describe the functions.
473
6772dd07
DD		 4742006-02-24 DJ Delorie <dj@redhat.com>
475
476 * m32c.cpu (RL_TYPE): New attribute, with macros.
477 (Lab-8-24): Add RELAX.
478 (unary-insn-defn-g, binary-arith-imm-dst-defn,
479 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
480 (binary-arith-src-dst-defn): Add 2ADDR attribute.
481 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
482 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
483 attribute.
484 (jsri16, jsri32): Add 1ADDR attribute.
485 (jsr32.w, jsr32.a): Add JUMP attribute.
72f4393d 486
d70c5fc7 4872006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
72f4393d
L		 488 Anil Paranjape <anilp1@kpitcummins.com>
489 Shilin Shakti <shilins@kpitcummins.com>
d70c5fc7
NC		 490
491 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
492 description.
493 * xc16x.opc: New file containing supporting XC16C routines.
494
8536c657
NC		 4952006-02-10 Nick Clifton <nickc@redhat.com>
496
497 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
498
458f7770
DD		 4992006-01-06 DJ Delorie <dj@redhat.com>
500
501 * m32c.cpu (mov.w:q): Fix mode.
502 (push32.b.imm): Likewise, for the comment.
503
d031aafb
NS		 5042005-12-16 Nathan Sidwell <nathan@codesourcery.com>
505
506 Second part of ms1 to mt renaming.
507 * mt.cpu (define-arch, define-isa): Set name to mt.
508 (define-mach): Adjust.
509 * mt.opc (CGEN_ASM_HASH): Update.
510 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
511 (parse_loopsize, parse_imm16): Adjust.
512
eda87aba
DD		 5132005-12-13 DJ Delorie <dj@redhat.com>
514
515 * m32c.cpu (jsri): Fix order so register names aren't treated as
516 symbols.
517 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
518 indexwd, indexws): Fix encodings.
519
4970f871
NS		 5202005-12-12 Nathan Sidwell <nathan@codesourcery.com>
521
522 * mt.cpu: Rename from ms1.cpu.
523 * mt.opc: Rename from ms1.opc.
524
48ad8298
HPN		 5252005-12-06 Hans-Peter Nilsson <hp@axis.com>
526
527 * cris.cpu (simplecris-common-writable-specregs)
528 (simplecris-common-readable-specregs): Split from
529 simplecris-common-specregs. All users changed.
530 (cris-implemented-writable-specregs-v0)
531 (cris-implemented-readable-specregs-v0): Similar from
532 cris-implemented-specregs-v0.
533 (cris-implemented-writable-specregs-v3)
534 (cris-implemented-readable-specregs-v3)
535 (cris-implemented-writable-specregs-v8)
536 (cris-implemented-readable-specregs-v8)
537 (cris-implemented-writable-specregs-v10)
538 (cris-implemented-readable-specregs-v10)
539 (cris-implemented-writable-specregs-v32)
540 (cris-implemented-readable-specregs-v32): Similar.
541 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
542 insns and specializations.
543
6f84a2a6
NS		 5442005-11-08 Nathan Sidwell <nathan@codesourcery.com>
545
546 Add ms2
547 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
548 model.
549 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
550 f-cb2incr, f-rc3): New fields.
551 (LOOP): New instruction.
552 (JAL-HAZARD): New hazard.
553 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
554 New operands.
555 (mul, muli, dbnz, iflush): Enable for ms2
556 (jal, reti): Has JAL-HAZARD.
557 (ldctxt, ldfb, stfb): Only ms1.
558 (fbcb): Only ms1,ms1-003.
559 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
560 fbcbincrs, mfbcbincrs): Enable for ms2.
561 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
562 * ms1.opc (parse_loopsize): New.
563 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
564 (print_pcrel): New.
565
95b96521
DB		 5662005-10-28 Dave Brolley <brolley@redhat.com>
567
568 Contribute the following change:
569 2003-09-24 Dave Brolley <brolley@redhat.com>
570
571 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
572 CGEN_ATTR_VALUE_TYPE.
573 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
574 Use cgen_bitset_intersect_p.
575
c6552317
DD		 5762005-10-27 DJ Delorie <dj@redhat.com>
577
578 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
579 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
580 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
581 imm operand is needed.
582 (adjnz, sbjnz): Pass the right operands.
583 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
584 unary-insn): Add -g variants for opcodes that need to support :G.
585 (not.BW:G, push.BW:G): Call it.
586 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
587 stzx16-imm8-imm8-abs16): Fix operand typos.
588 * m32c.opc (m32c_asm_hash): Support bnCND.
589 (parse_signed4n, print_signed4n): New.
72f4393d 590
f75eb1c0
DD		 5912005-10-26 DJ Delorie <dj@redhat.com>
592
593 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
594 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
595 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
596 dsp8[sp] is signed.
597 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
598 (mov.BW:S r0,r1): Fix typo r1l->r1.
599 (tst): Allow :G suffix.
600 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
601
e277c00b
AM		 6022005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
603
604 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
605
92e0a941
DD		 6062005-10-25 DJ Delorie <dj@redhat.com>
607
608 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
609 making one a macro of the other.
610
a1a280bb
DD		 6112005-10-21 DJ Delorie <dj@redhat.com>
612
613 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
614 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
615 indexld, indexls): .w variants have `1' bit.
616 (rot32.b): QI, not SI.
617 (rot32.w): HI, not SI.
618 (xchg16): HI for .w variant.
619
e74eb924
NC		 6202005-10-19 Nick Clifton <nickc@redhat.com>
621
622 * m32r.opc (parse_slo16): Fix bad application of previous patch.
623
5e03663f
NC		 6242005-10-18 Andreas Schwab <schwab@suse.de>
625
626 * m32r.opc (parse_slo16): Better version of previous patch.
627
ab7c9a26
NC		 6282005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
629
630 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
631 size.
632
fd54057a
DD		 6332005-07-25 DJ Delorie <dj@redhat.com>
634
635 * m32c.opc (parse_unsigned8): Add %dsp8().
636 (parse_signed8): Add %hi8().
637 (parse_unsigned16): Add %dsp16().
638 (parse_signed16): Add %lo16() and %hi16().
639 (parse_lab_5_3): Make valuep a bfd_vma *.
640
85da3a56
NC		 6412005-07-18 Nick Clifton <nickc@redhat.com>
642
643 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
644 components.
645 (f-lab32-jmp-s): Fix insertion sequence.
646 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
647 (Dsp-40-s8): Make parameter be signed.
648 (Dsp-40-s16): Likewise.
649 (Dsp-48-s8): Likewise.
650 (Dsp-48-s16): Likewise.
651 (Imm-13-u3): Likewise. (Despite its name!)
652 (BitBase16-16-s8): Make the parameter be unsigned.
653 (BitBase16-8-u11-S): Likewise.
654 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
655 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
656 relaxation.
657
658 * m32c.opc: Fix formatting.
659 Use safe-ctype.h instead of ctype.h
660 Move duplicated code sequences into a macro.
661 Fix compile time warnings about signedness mismatches.
662 Remove dead code.
663 (parse_lab_5_3): New parser function.
72f4393d 664
aa260854
JB		 6652005-07-16 Jim Blandy <jimb@redhat.com>
666
667 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
668 to represent isa sets.
669
0a665bfd
JB		 6702005-07-15 Jim Blandy <jimb@redhat.com>
671
672 * m32c.cpu, m32c.opc: Fix copyright.
673
49f58d10
JB		 6742005-07-14 Jim Blandy <jimb@redhat.com>
675
676 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
677
0e6b69be
AM		 6782005-07-14 Alan Modra <amodra@bigpond.net.au>
679
680 * ms1.opc (print_dollarhex): Correct format string.
681
f9210e37
AM		 6822005-07-06 Alan Modra <amodra@bigpond.net.au>
683
684 * iq2000.cpu: Include from binutils cpu dir.
685
3ec2b351
NC		 6862005-07-05 Nick Clifton <nickc@redhat.com>
687
688 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
689 unsigned in order to avoid compile time warnings about sign
690 conflicts.
691
692 * ms1.opc (parse_*): Likewise.
693 (parse_imm16): Use a "void *" as it is passed both signed and
694 unsigned arguments.
695
47b0e7ad
NC		 6962005-07-01 Nick Clifton <nickc@redhat.com>
697
698 * frv.opc: Update to ISO C90 function declaration style.
699 * iq2000.opc: Likewise.
700 * m32r.opc: Likewise.
701 * sh.opc: Likewise.
702
b081650b
DB		 7032005-06-15 Dave Brolley <brolley@redhat.com>
704
705 Contributed by Red Hat.
706 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
707 * ms1.opc: New file. Written by Stan Cox.
708
e172dbf8
NC		 7092005-05-10 Nick Clifton <nickc@redhat.com>
710
711 * Update the address and phone number of the FSF organization in
712 the GPL notices in the following files:
713 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
714 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
715 sh64-media.cpu, simplify.inc
716
b2d52a48
AM		 7172005-02-24 Alan Modra <amodra@bigpond.net.au>
718
719 * frv.opc (parse_A): Warning fix.
720
33b71eeb
NC		 7212005-02-23 Nick Clifton <nickc@redhat.com>
722
723 * frv.opc: Fixed compile time warnings about differing signed'ness
724 of pointers passed to functions.
725 * m32r.opc: Likewise.
726
bc18c937
NC		 7272005-02-11 Nick Clifton <nickc@redhat.com>
728
729 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
730 'bfd_vma *' in order avoid compile time warning message.
731
46da9a19
HPN		 7322005-01-28 Hans-Peter Nilsson <hp@axis.com>
733
734 * cris.cpu (mstep): Add missing insn.
735
90219bd0
AO		 7362005-01-25 Alexandre Oliva <aoliva@redhat.com>
737
738 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
739 * frv.cpu: Add support for TLS annotations in loads and calll.
740 * frv.opc (parse_symbolic_address): New.
741 (parse_ldd_annotation): New.
742 (parse_call_annotation): New.
743 (parse_ld_annotation): New.
744 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
745 Introduce TLS relocations.
746 (parse_d12, parse_s12, parse_u12): Likewise.
747 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
748 (parse_call_label, print_at): New.
749
c3d75c30
HPN		 7502004-12-21 Mikael Starvik <starvik@axis.com>
751
752 * cris.cpu (cris-set-mem): Correct integral write semantics.
753
68800d83
HPN		 7542004-11-29 Hans-Peter Nilsson <hp@axis.com>
755
756 * cris.cpu: New file.
757
4bd1d37b
NC		 7582004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
759
760 * iq2000.cpu: Added quotes around macro arguments so that they
761 will work with newer versions of guile.
762
4030fa5a
NC		 7632004-10-27 Nick Clifton <nickc@redhat.com>
764
765 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
766 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
767 operand.
768 * iq2000.cpu (dnop index): Rename to _index to avoid complications
769 with guile.
770
ac28a1cb
RS		 7712004-08-27 Richard Sandiford <rsandifo@redhat.com>
772
773 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
774
dc4c54bb
NC		 7752004-05-15 Nick Clifton <nickc@redhat.com>
776
777 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
778
f4453dfa
NC		 7792004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
780
781 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
782
676a64f4
RS		 7832004-03-01 Richard Sandiford <rsandifo@redhat.com>
784
785 * frv.cpu (define-arch frv): Add fr450 mach.
786 (define-mach fr450): New.
787 (define-model fr450): New. Add profile units to every fr450 insn.
788 (define-attr UNIT): Add MDCUTSSI.
789 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
790 (define-attr AUDIO): New boolean.
791 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
792 (f-LRA-null, f-TLBPR-null): New fields.
793 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
794 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
795 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
796 (LRA-null, TLBPR-null): New macros.
797 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
798 (load-real-address): New macro.
799 (lrai, lrad, tlbpr): New instructions.
800 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
801 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
802 (mdcutssi): Change UNIT attribute to MDCUTSSI.
803 (media-low-clear-semantics, media-scope-limit-semantics)
804 (media-quad-limit, media-quad-shift): New macros.
805 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
806 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
807 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
808 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
809 (fr450_unit_mapping): New array.
810 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
811 for new MDCUTSSI unit.
812 (fr450_check_insn_major_constraints): New function.
813 (check_insn_major_constraints): Use it.
814
c7a48b9a
RS		 8152004-03-01 Richard Sandiford <rsandifo@redhat.com>
816
817 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
818 (scutss): Change unit to I0.
819 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
820 (mqsaths): Fix FR400-MAJOR categorization.
821 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
822 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
823 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
824 combinations.
825
8ae0baa2
RS		 8262004-03-01 Richard Sandiford <rsandifo@redhat.com>
827
828 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
829 (rstb, rsth, rst, rstd, rstq): Delete.
830 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
831
8ee9a8b2
NC		 8322004-02-23 Nick Clifton <nickc@redhat.com>
833
834 * Apply these patches from Renesas:
835
836 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
837
838 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
839 disassembling codes for 0x*2 addresses.
840
841 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
842
843 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
844
845 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
846
847 * cpu/m32r.cpu : Add new model m32r2.
848 Add new instructions.
849 Replace occurrances of 'Mitsubishi' with 'Renesas'.
850 Changed PIPE attr of push from O to OS.
851 Care for Little-endian of M32R.
852 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
853 Care for Little-endian of M32R.
854 (parse_slo16): signed extension for value.
855
299d901c
AC		 8562004-02-20 Andrew Cagney <cagney@redhat.com>
857
e866a257
AC		 858 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
859 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
860
299d901c
AC		 861 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
862 written by Ben Elliston.
863
cb10e79a
RS		 8642004-01-14 Richard Sandiford <rsandifo@redhat.com>
865
866 * frv.cpu (UNIT): Add IACC.
867 (iacc-multiply-r-r): Use it.
868 * frv.opc (fr400_unit_mapping): Add entry for IACC.
869 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
870
d4e4dc14
AO		 8712004-01-06 Alexandre Oliva <aoliva@redhat.com>
872
873 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
874 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
875 cut&paste errors in shifting/truncating numerical operands.
876 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
877 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
878 (parse_uslo16): Likewise.
879 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
880 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
881 (parse_s12): Likewise.
882 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
883 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
884 (parse_uslo16): Likewise.
885 (parse_uhi16): Parse gothi and gotfuncdeschi.
886 (parse_d12): Parse got12 and gotfuncdesc12.
887 (parse_s12): Likewise.
888
1340b9a9
DB		 8892003-10-10 Dave Brolley <brolley@redhat.com>
890
891 * frv.cpu (dnpmop): New p-macro.
892 (GRdoublek): Use dnpmop.
893 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
894 (store-double-r-r): Use (.sym regtype doublek).
895 (r-store-double): Ditto.
896 (store-double-r-r-u): Ditto.
897 (conditional-store-double): Ditto.
898 (conditional-store-double-u): Ditto.
899 (store-double-r-simm): Ditto.
900 (fmovs): Assign to UNIT FMALL.
901
ac7c07ac
DB		 9022003-10-06 Dave Brolley <brolley@redhat.com>
903
904 * frv.cpu, frv.opc: Add support for fr550.
905
d0312406
DB		 9062003-09-24 Dave Brolley <brolley@redhat.com>
907
908 * frv.cpu (u-commit): New modelling unit for fr500.
909 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
910 (commit-r): Use u-commit model for fr500.
911 (commit): Ditto.
912 (conditional-float-binary-op): Take profiling data as an argument.
913 Update callers.
914 (ne-float-binary-op): Ditto.
915
c6945302
MS		 9162003-09-19 Michael Snyder <msnyder@redhat.com>
917
918 * frv.cpu (nldqi): Delete unimplemented instruction.
919
23600bb3
DB		 9202003-09-12 Dave Brolley <brolley@redhat.com>
921
922 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
923 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
924 frv_ref_SI to get input register referenced for profiling.
925 (clear-ne-flag-all): Pass insn profiling in as an argument.
926 (clrgr,clrfr,clrga,clrfa): Add profiling information.
927
6f18ad70
MS		 9282003-09-11 Michael Snyder <msnyder@redhat.com>
929
930 * frv.cpu: Typographical corrections.
931
96486995
DB		 9322003-09-09 Dave Brolley <brolley@redhat.com>
933
934 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
935 (conditional-media-dual-complex, media-quad-complex): Likewise.
936
0457efce
DB		 9372003-09-04 Dave Brolley <brolley@redhat.com>
938
939 * frv.cpu (register-transfer): Pass in all attributes in on argument.
940 Update all callers.
941 (conditional-register-transfer): Ditto.
942 (cache-preload): Ditto.
943 (floating-point-conversion): Ditto.
944 (floating-point-neg): Ditto.
945 (float-abs): Ditto.
946 (float-binary-op-s): Ditto.
947 (conditional-float-binary-op): Ditto.
948 (ne-float-binary-op): Ditto.
949 (float-dual-arith): Ditto.
950 (ne-float-dual-arith): Ditto.
951
8caa9169
DB		 9522003-09-03 Dave Brolley <brolley@redhat.com>
953
954 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
955 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
956 MCLRACC-1.
957 (A): Removed operand.
958 (A0,A1): New operands replace operand A.
959 (mnop): Now a real insn
960 (mclracc): Removed insn.
961 (mclracc-0, mclracc-1): New insns replace mclracc.
962 (all insns): Use new UNIT attributes.
963
6d9ab561
NC		 9642003-08-21 Nick Clifton <nickc@redhat.com>
965
966 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
967 and u-media-dual-btoh with output parameter.
968 (cmbtoh): Add profiling hack.
969
741a7751
NC		 9702003-08-19 Michael Snyder <msnyder@redhat.com>
971
972 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
973
5b5b78da
DE		 9742003-06-10 Doug Evans <dje@sebabeach.org>
975
976 * frv.cpu: Add IDOC attribute.
977
539ee71a
AC		 9782003-06-06 Andrew Cagney <cagney@redhat.com>
979
980 Contributed by Red Hat.
981 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
982 Stan Cox, and Frank Ch. Eigler.
983 * iq2000.opc: New file. Written by Ben Elliston, Frank
984 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
985 * iq2000m.cpu: New file. Written by Jeff Johnston.
986 * iq10.cpu: New file. Written by Jeff Johnston.
987
36c3ae24
NC		 9882003-06-05 Nick Clifton <nickc@redhat.com>
989
990 * frv.cpu (FRintieven): New operand. An even-numbered only
991 version of the FRinti operand.
992 (FRintjeven): Likewise for FRintj.
993 (FRintkeven): Likewise for FRintk.
994 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
995 media-quad-arith-sat-semantics, media-quad-arith-sat,
996 conditional-media-quad-arith-sat, mdunpackh,
997 media-quad-multiply-semantics, media-quad-multiply,
998 conditional-media-quad-multiply, media-quad-complex-i,
999 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1000 conditional-media-quad-multiply-acc, munpackh,
1001 media-quad-multiply-cross-acc-semantics, mdpackh,
1002 media-quad-multiply-cross-acc, mbtoh-semantics,
1003 media-quad-cross-multiply-cross-acc-semantics,
1004 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1005 media-quad-cross-multiply-acc-semantics, cmbtoh,
1006 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1007 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1008 cmhtob): Use new operands.
1009 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
0e6b69be 1010 (parse_even_register): New function.
36c3ae24 1011
75798298
NC		 10122003-06-03 Nick Clifton <nickc@redhat.com>
1013
1014 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1015 immediate value not unsigned.
1016
9aab5aa3
AC		 10172003-06-03 Andrew Cagney <cagney@redhat.com>
1018
1019 Contributed by Red Hat.
1020 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
1021 and Eric Christopher.
1022 * frv.opc: New file. Written by Catherine Moore, and Dave
1023 Brolley.
1024 * simplify.inc: New file. Written by Doug Evans.
1025
2739f79a
AC		 10262003-05-02 Andrew Cagney <cagney@redhat.com>
1027
1028 * New file.
1029
1030\f
752937aa
NC		 1031Copyright (C) 2003-2012 Free Software Foundation, Inc.
1032
1033Copying and distribution of this file, with or without modification,
1034are permitted in any medium without royalty provided the copyright
1035notice and this notice are preserved.
1036
2739f79a
AC		 1037Local Variables:
1038mode: change-log
1039left-margin: 8
1040fill-column: 74
1041version-control: never
1042End:
GDB Binutils - Deliverables
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