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[PATCH v3] aarch64: Emit jump slot for conditional branch to undefined symbols
[deliverable/binutils-gdb.git] / cpu / ChangeLog
CommitLineData
c54a9b56
DF		 12020-02-16 David Faust <david.faust@oracle.com>
2
3 * bpf.cpu (define-cond-jump-insn): Renamed from djci.
4 (dcji) New version with support for JMP32
5
44e4546f
AM		 62020-02-03 Alan Modra <amodra@gmail.com>
7
8 * m32c.cpu (f-dsp-64-s16): Mask before shifting signed value.
9
b2b1453a
AM		 102020-02-01 Alan Modra <amodra@gmail.com>
11
12 * frv.cpu (f-u12): Multiply rather than left shift signed values.
13 (f-label16, f-label24): Likewise.
14
0c115f84
AM		 152020-01-30 Alan Modra <amodra@gmail.com>
16
17 * m32c.cpu (f-src32-rn-unprefixed-QI): Shift before inverting.
18 (f-src32-rn-prefixed-QI, f-dst32-rn-unprefixed-QI): Likewise.
19 (f-dst32-rn-prefixed-QI): Likewise.
20 (f-dsp-32-s32): Mask before shifting left.
21 (f-dsp-48-u32, f-dsp-48-s32): Likewise.
22 (f-bitbase32-16-s11-unprefixed): Multiply signed field rather than
23 shifting left.
24 (f-bitbase32-24-s11-prefixed, f-bitbase32-24-s19-prefixed): Likewise.
25 (h-gr-SI): Mask before shifting.
26
bd434cc4
JM		 272020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
28
29 * bpf.cpu (define-alu-insn-un): The unary BPF instructions
30 (neg and neg32) use OP_SRC_K even if they operate only in
31 registers.
32
ae774686
NC		 332020-01-18 Nick Clifton <nickc@redhat.com>
34
35 Binutils 2.34 branch created.
36
202e762b
AM		 372020-01-13 Alan Modra <amodra@gmail.com>
38
39 * fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't
40 left shift signed values.
41
cc6aa1a6
AM		 422020-01-06 Alan Modra <amodra@gmail.com>
43
44 * m32c.cpu (f-dsp-8-u16, f-dsp-8-s16): Rearrange to mask any sign
45 bits before shifting rather than masking after shifting.
46 (f-dsp-16-u16, f-dsp-16-s16, f-dsp-32-u16, f-dsp-32-s16): Likewise.
47 (f-dsp-40-u16, f-dsp-40-s16, f-dsp-48-u16, f-dsp-48-s16): Likewise.
48 (f-dsp-64-u16, f-dsp-8-s24): Likewise.
49 (f-bitbase32-16-s19-unprefixed): Avoid signed left shift.
50
512020-01-04 Alan Modra <amodra@gmail.com>
c9ae58fe
AM		 52
53 * m32r.cpu (f-disp8): Avoid left shift of negative values.
54 (f-disp16, f-disp24): Likewise.
55
3e1056a1
AM		 562019-12-23 Alan Modra <amodra@gmail.com>
57
58 * iq2000.cpu (f-offset): Avoid left shift of negative values.
59
bcd9f578
AM		 602019-12-20 Alan Modra <amodra@gmail.com>
61
62 * or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values.
63
62e65990
AM		 642019-12-17 Alan Modra <amodra@gmail.com>
65
66 * bpf.cpu (f-imm64): Avoid signed overflow.
67
e6ced26a
AM		 682019-12-16 Alan Modra <amodra@gmail.com>
69
70 * xstormy16.cpu (f-rel12a): Avoid signed overflow.
71
1d61b032
AM		 722019-12-11 Alan Modra <amodra@gmail.com>
73
74 * epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
75 * lm32.cpu (f-branch, f-vall): Likewise.
76 * m32.cpu (f-lab-8-16): Likewise.
77
b8e61daa
AM		 782019-12-11 Alan Modra <amodra@gmail.com>
79
80 * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
81 shift left to avoid UB on left shift of negative values.
82
e042e6c3
JM		 832019-11-20 Jose E. Marchesi <jose.marchesi@oracle.com>
84
85 * bpf.cpu: Fix comment describing the 128-bit instruction format.
86
60391a25
PB		 872019-09-09 Phil Blundell <pb@pbcl.net>
88
89 binutils 2.33 branch created.
90
231097b0
JM		 912019-07-19 Jose E. Marchesi <jose.marchesi@oracle.com>
92
93 * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
94 %a and %ctx.
95
3719fd55
JM		 962019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com>
97
98 * bpf.cpu (dlabs): New pmacro.
99 (dlind): Likewise.
100
92434a14
JM		 1012019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
102
103 * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
104 explicit 'dst' argument.
105
a2e4218f
SH		 1062019-06-13 Stafford Horne <shorne@gmail.com>
107
108 * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
109
eb212c84
SH		 1102019-06-13 Stafford Horne <shorne@gmail.com>
111
112 * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
113 (l-adrp): Improve comment.
114
d3ad6278
SH		 1152019-06-13 Stafford Horne <shorne@gmail.com>
116
117 * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
118 SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
119 SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
120 (float-setflag-insn-base): New pmacro based on float-setflag-insn.
121 (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
122 float-setflag-unordered-symantics): New pmacro for instruction
123 symantics.
124 (float-setflag-insn): Update to use float-setflag-insn-base.
125 (float-setflag-unordered-insn): New pmacro for generating instructions.
126
6ce26ac7
SH		 1272019-06-13 Andrey Bacherov <avbacherov@opencores.org>
128 Stafford Horne <shorne@gmail.com>
129
130 * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
131 (ORFPX-MACHS): Removed pmacro.
132 * or1k.opc (or1k_cgen_insn_supported): New function.
133 (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
134 (parse_regpair, print_regpair): New functions.
135 * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
136 and add comments.
137 (h-fdr): Update comment to indicate or64.
138 (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
139 (h-fd32r): New hardware for 64-bit fpu registers.
140 (h-i64r): New hardware for 64-bit int registers.
141 * or1korbis.cpu (f-resv-8-1): New field.
142 * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
143 (rDDF, rADF, rBDF): Update operand comment to indicate or64.
144 (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
145 (h-roff1): New hardware.
146 (double-field-and-ops mnemonic): New pmacro to generate operations
147 rDD32F, rAD32F, rBD32F, rDDI and rADI.
148 (float-regreg-insn): Update single precision generator to MACH
149 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
150 (float-setflag-insn): Update single precision generator to MACH
151 ORFPX32-MACHS. Fix double instructions from single to double
152 precision. Add generator for or32 64-bit instructions.
153 (float-cust-insn cust-num): Update single precision generator to MACH
154 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
155 (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
156 ORFPX32-MACHS.
157 (lf-rem-d): Fix operation from mod to rem.
158 (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
159 (lf-itof-d): Fix operands from single to double.
160 (lf-ftoi-d): Update operand mode from DI to WI.
161
ea195bb0
JM		 1622019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
163
164 * bpf.cpu: New file.
165 * bpf.opc: Likewise.
166
f974f26c
NC		 1672018-06-24 Nick Clifton <nickc@redhat.com>
168
169 2.32 branch created.
170
07f5f4c6
RH		 1712018-10-05 Richard Henderson <rth@twiddle.net>
172 Stafford Horne <shorne@gmail.com>
173
174 * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
175 (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
176 (l-mul): Fix overflow support and indentation.
177 (l-mulu): Fix overflow support and indentation.
178 (l-muld, l-muldu, l-msbu, l-macu): New instructions.
179 (l-div); Remove incorrect carry behavior.
180 (l-divu): Fix carry and overflow behavior.
181 (l-mac): Add overflow support.
182 (l-msb, l-msbu): Add carry and overflow support.
183
c8e98e36
SH		 1842018-10-05 Richard Henderson <rth@twiddle.net>
185
186 * or1k.opc (parse_disp26): Add support for plta() relocations.
187 (parse_disp21): New function.
188 (or1k_rclass): New enum.
189 (or1k_rtype): New enum.
190 (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
191 (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
192 (parse_imm16): Add support for the new 21bit and 13bit relocations.
193 * or1korbis.cpu (f-disp26): Don't assume SI.
194 (f-disp21): New pc-relative 21-bit 13 shifted to right.
195 (insn-opcode): Add ADRP.
196 (l-adrp): New instruction.
197
1c4f3780
RH		 1982018-10-05 Richard Henderson <rth@twiddle.net>
199
200 * or1k.opc: Add RTYPE_ enum.
201 (INVALID_STORE_RELOC): New string.
202 (or1k_imm16_relocs): New array array.
203 (parse_reloc): New static function that just does the parsing.
204 (parse_imm16): New static function for generic parsing.
205 (parse_simm16): Change to just call parse_imm16.
206 (parse_simm16_split): New function.
207 (parse_uimm16): Change to call parse_imm16.
208 (parse_uimm16_split): New function.
209 * or1korbis.cpu (simm16-split): Change to use new simm16_split.
210 (uimm16-split): Change to use new uimm16_split.
211
67ce483b
AM		 2122018-07-24 Alan Modra <amodra@gmail.com>
213
214 PR 23430
215 * or1kcommon.cpu (spr-reg-indices): Fix description typo.
216
84f9f8c3
AM		 2172018-05-09 Sebastian Rasmussen <sebras@gmail.com>
218
219 * or1kcommon.cpu (spr-reg-info): Typo fix.
220
a6743a54
AM		 2212018-03-03 Alan Modra <amodra@gmail.com>
222
223 * frv.opc: Include opintl.h.
224 (add_next_to_vliw): Use opcodes_error_handler to print error.
225 Standardize error message.
226 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
227
faf766e3
NC		 2282018-01-13 Nick Clifton <nickc@redhat.com>
229
230 2.30 branch created.
231
4ea0266c
SH		 2322017-03-15 Stafford Horne <shorne@gmail.com>
233
234 * or1kcommon.cpu: Add pc set semantics to also update ppc.
235
b781683b
AM		 2362016-10-06 Alan Modra <amodra@gmail.com>
237
238 * mep.opc (expand_string): Add fall through comment.
239
439baf71
AM		 2402016-03-03 Alan Modra <amodra@gmail.com>
241
242 * fr30.cpu (f-m4): Replace bogus comment with a better guess
243 at what is really going on.
244
62de1c63
AM		 2452016-03-02 Alan Modra <amodra@gmail.com>
246
247 * fr30.cpu (f-m4): Replace -1 << 4 with -16.
248
b89807c6
AB		 2492016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
250
251 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
252 a constant to better align disassembler output.
253
018dc9be
SK		 2542014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
255
256 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
257
c151b1c6
AM		 2582014-06-12 Alan Modra <amodra@gmail.com>
259
260 * or1k.opc: Whitespace fixes.
261
999b995d
SK		 2622014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
263
264 * or1korbis.cpu (h-atomic-reserve): New hardware.
265 (h-atomic-address): Likewise.
266 (insn-opcode): Add opcodes for LWA and SWA.
267 (atomic-reserve): New operand.
268 (atomic-address): Likewise.
269 (l-lwa, l-swa): New instructions.
270 (l-lbs): Fix typo in comment.
271 (store-insn): Clear atomic reserve on store to atomic-address.
272 Fix register names in fmt field.
273
73589c9d
CS		 2742014-04-22 Christian Svensson <blue@cmd.nu>
275
276 * openrisc.cpu: Delete.
277 * openrisc.opc: Delete.
278 * or1k.cpu: New file.
279 * or1k.opc: New file.
280 * or1kcommon.cpu: New file.
281 * or1korbis.cpu: New file.
282 * or1korfpx.cpu: New file.
283
594d8fa8
MF		 2842013-12-07 Mike Frysinger <vapier@gentoo.org>
285
286 * epiphany.opc: Remove +x file mode.
287
87a8d6cb
NC		 2882013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
289
290 PR binutils/15241
291 * lm32.cpu (Control and status registers): Add CFG2, PSW,
292 TLBVADDR, TLBPADDR and TLBBADVADDR.
293
02a79b89
JR		 2942012-11-30 Oleg Raikhman <oleg@adapteva.com>
295 Joern Rennecke <joern.rennecke@embecosm.com>
296
297 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
298 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
299 (testset-insn): Add NO_DIS attribute to t.l.
300 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
301 (move-insns): Add NO-DIS attribute to cmov.l.
302 (op-mmr-movts): Add NO-DIS attribute to movts.l.
303 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
304 (op-rrr): Add NO-DIS attribute to .l.
305 (shift-rrr): Add NO-DIS attribute to .l.
306 (op-shift-rri): Add NO-DIS attribute to i32.l.
307 (bitrl, movtl): Add NO-DIS attribute.
308 (op-iextrrr): Add NO-DIS attribute to .l
309 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
310 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
311
a597d2d3
AM		 3122012-02-27 Alan Modra <amodra@gmail.com>
313
314 * mt.opc (print_dollarhex): Trim values to 32 bits.
315
5011093d
NC		 3162011-12-15 Nick Clifton <nickc@redhat.com>
317
318 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
319 hosts.
320
fd936b4c
JR		 3212011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
322
323 * epiphany.opc (parse_branch_addr): Fix type of valuep.
324 Cast value before printing it as a long.
325 (parse_postindex): Fix type of valuep.
326
cfb8c092
NC		 3272011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
328
329 * cpu/epiphany.cpu: New file.
330 * cpu/epiphany.opc: New file.
331
dc15e575
NC		 3322011-08-22 Nick Clifton <nickc@redhat.com>
333
334 * fr30.cpu: Newly contributed file.
335 * fr30.opc: Likewise.
336 * ip2k.cpu: Likewise.
337 * ip2k.opc: Likewise.
338 * mep-avc.cpu: Likewise.
339 * mep-avc2.cpu: Likewise.
340 * mep-c5.cpu: Likewise.
341 * mep-core.cpu: Likewise.
342 * mep-default.cpu: Likewise.
343 * mep-ext-cop.cpu: Likewise.
344 * mep-fmax.cpu: Likewise.
345 * mep-h1.cpu: Likewise.
346 * mep-ivc2.cpu: Likewise.
347 * mep-rhcop.cpu: Likewise.
348 * mep-sample-ucidsp.cpu: Likewise.
349 * mep.cpu: Likewise.
350 * mep.opc: Likewise.
351 * openrisc.cpu: Likewise.
352 * openrisc.opc: Likewise.
353 * xstormy16.cpu: Likewise.
354 * xstormy16.opc: Likewise.
355
9ccb8af9
AM		 3562010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
357
358 * frv.opc: #undef DEBUG.
359
21375995
DD		 3602010-07-03 DJ Delorie <dj@delorie.com>
361
362 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
363
5ff58fb0
DE		 3642010-02-11 Doug Evans <dje@sebabeach.org>
365
366 * m32r.cpu (HASH-PREFIX): Delete.
367 (duhpo, dshpo): New pmacros.
368 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
369 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
370 attribute, define with dshpo.
371 (uimm24): Delete HASH-PREFIX attribute.
372 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
373 (print_signed_with_hash_prefix): New function.
374 (print_unsigned_with_hash_prefix): New function.
375 * xc16x.cpu (dowh): New pmacro.
376 (upof16): Define with dowh, specify print handler.
377 (qbit, qlobit, qhibit): Ditto.
378 (upag16): Ditto.
379 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
380 (print_with_dot_prefix): New functions.
381 (print_with_pof_prefix, print_with_pag_prefix): New functions.
382
3fa5b97b
DE		 3832010-01-24 Doug Evans <dje@sebabeach.org>
384
385 * frv.cpu (floating-point-conversion): Update call to fp conv op.
386 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
387 conditional-floating-point-conversion, ne-floating-point-conversion,
388 float-parallel-mul-add-double-semantics): Ditto.
389
fe8afbc4
DE		 3902010-01-05 Doug Evans <dje@sebabeach.org>
391
392 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
393 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
394
caaf56fb
DE		 3952010-01-02 Doug Evans <dje@sebabeach.org>
396
397 * m32c.opc (parse_signed16): Fix typo.
398
91d6fa6a
NC		 3992009-12-11 Nick Clifton <nickc@redhat.com>
400
401 * frv.opc: Fix shadowed variable warnings.
402 * m32c.opc: Fix shadowed variable warnings.
403
ec84cc2b
DE		 4042009-11-14 Doug Evans <dje@sebabeach.org>
405
406 Must use VOID expression in VOID context.
407 * xc16x.cpu (mov4): Fix mode of `sequence'.
408 (mov9, mov10): Ditto.
409 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
410 (callr, callseg, calls, trap, rets, reti): Ditto.
411 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
412 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
413 (exts, exts1, extsr, extsr1, prior): Ditto.
414
ac1e9eca
DE		 4152009-10-23 Doug Evans <dje@sebabeach.org>
416
417 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
418 cgen-ops.h -> cgen/basic-ops.h.
419
b4744b17
AM		 4202009-09-25 Alan Modra <amodra@bigpond.net.au>
421
422 * m32r.cpu (stb-plus): Typo fix.
423
ab5f875d
DE		 4242009-09-23 Doug Evans <dje@sebabeach.org>
425
426 * m32r.cpu (sth-plus): Fix address mode and calculation.
427 (stb-plus): Ditto.
428 (clrpsw): Fix mask calculation.
429 (bset, bclr, btst): Make mode in bit calculation match expression.
430
431 * xc16x.cpu (rtl-version): Set to 0.8.
432 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
433 make uppercase. Remove unnecessary name-prefix spec.
434 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
435 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
436 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
437 (h-cr): New hardware.
438 (muls): Comment out parts that won't compile, add fixme.
439 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
440 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
441 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
442
0aaaf7c3
DE		 4432009-07-16 Doug Evans <dje@sebabeach.org>
444
445 * cpu/simplify.inc (*): One line doc strings don't need \n.
446 (df): Invoke define-full-ifield instead of claiming it's an alias.
447 (dno): Define.
448 (dnop): Mark as deprecated.
449
1998a8e0
AM		 4502009-06-22 Alan Modra <amodra@bigpond.net.au>
451
452 * m32c.opc (parse_lab_5_3): Use correct enum.
453
6347aad8
HPN		 4542009-01-07 Hans-Peter Nilsson <hp@axis.com>
455
456 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
457 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
458 (media-arith-sat-semantics): Explicitly sign- or zero-extend
459 arguments of "operation" to DI using "mode" and the new pmacros.
460
2c06b7a6
HPN		 4612009-01-03 Hans-Peter Nilsson <hp@axis.com>
462
463 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
464 of number 2, PID.
465
84e94c90
NC		 4662008-12-23 Jon Beniston <jon@beniston.com>
467
468 * lm32.cpu: New file.
469 * lm32.opc: New file.
470
90518ff4
AM		 4712008-01-29 Alan Modra <amodra@bigpond.net.au>
472
473 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
474 to source.
475
a69f60de
HPN		 4762007-10-22 Hans-Peter Nilsson <hp@axis.com>
477
478 * cris.cpu (movs, movu): Use result of extension operation when
479 updating flags.
480
9b201bb5
NC		 4812007-07-04 Nick Clifton <nickc@redhat.com>
482
483 * cris.cpu: Update copyright notice to refer to GPLv3.
484 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
485 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
486 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
487 xc16x.opc: Likewise.
488 * iq2000.cpu: Fix copyright notice to refer to FSF.
489
53289dcd
MS		 4902007-04-30 Mark Salter <msalter@sadr.localdomain>
491
492 * frv.cpu (spr-names): Support new coprocessor SPR registers.
493
f6da2ec2
NC		 4942007-04-20 Nick Clifton <nickc@redhat.com>
495
496 * xc16x.cpu: Restore after accidentally overwriting this file with
497 xc16x.opc.
498
144f4bc6
DD		 4992007-03-29 DJ Delorie <dj@redhat.com>
500
501 * m32c.cpu (Imm-8-s4n): Fix print hook.
502 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
503 (arith-jnz-imm4-dst-defn): Make relaxable.
504 (arith-jnz16-imm4-dst-defn): Fix encodings.
505
75b06e7b
DD		 5062007-03-20 DJ Delorie <dj@redhat.com>
507
508 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
509 mem20): New.
510 (src16-16-20-An-relative-*): New.
511 (dst16-*-20-An-relative-*): New.
512 (dst16-16-16sa-*): New
513 (dst16-16-16ar-*): New
514 (dst32-16-16sa-Unprefixed-*): New
515 (jsri): Fix operands.
516 (setzx): Fix encoding.
72f4393d 517
a5da764d
AM		 5182007-03-08 Alan Modra <amodra@bigpond.net.au>
519
520 * m32r.opc: Formatting.
521
b497d0b0
NC		 5222006-05-22 Nick Clifton <nickc@redhat.com>
523
524 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
525
e78efa90
DD		 5262006-04-10 DJ Delorie <dj@redhat.com>
527
528 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
529 decides if this function accepts symbolic constants or not.
530 (parse_signed_bitbase): Likewise.
531 (parse_unsigned_bitbase8): Pass the new parameter.
532 (parse_unsigned_bitbase11): Likewise.
533 (parse_unsigned_bitbase16): Likewise.
534 (parse_unsigned_bitbase19): Likewise.
535 (parse_unsigned_bitbase27): Likewise.
536 (parse_signed_bitbase8): Likewise.
537 (parse_signed_bitbase11): Likewise.
538 (parse_signed_bitbase19): Likewise.
72f4393d 539
8d0e2679
DD		 5402006-03-13 DJ Delorie <dj@redhat.com>
541
43aa3bb1
DD		 542 * m32c.cpu (Bit3-S): New.
543 (btst:s): New.
544 * m32c.opc (parse_bit3_S): New.
545
8d0e2679
DD		 546 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
547 (btst): Add optional :G suffix for MACH32.
548 (or.b:S): New.
549 (pop.w:G): Add optional :G suffix for MACH16.
550 (push.b.imm): Fix syntax.
551
253d272c
DD		 5522006-03-10 DJ Delorie <dj@redhat.com>
553
554 * m32c.cpu (mul.l): New.
555 (mulu.l): New.
556
c7d41dc5
NC		 5572006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
558
559 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
560 an error message otherwise.
561 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
562 Fix up comments to correctly describe the functions.
563
6772dd07
DD		 5642006-02-24 DJ Delorie <dj@redhat.com>
565
566 * m32c.cpu (RL_TYPE): New attribute, with macros.
567 (Lab-8-24): Add RELAX.
568 (unary-insn-defn-g, binary-arith-imm-dst-defn,
569 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
570 (binary-arith-src-dst-defn): Add 2ADDR attribute.
571 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
572 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
573 attribute.
574 (jsri16, jsri32): Add 1ADDR attribute.
575 (jsr32.w, jsr32.a): Add JUMP attribute.
72f4393d 576
d70c5fc7 5772006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
72f4393d
L		 578 Anil Paranjape <anilp1@kpitcummins.com>
579 Shilin Shakti <shilins@kpitcummins.com>
d70c5fc7
NC		 580
581 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
582 description.
583 * xc16x.opc: New file containing supporting XC16C routines.
584
8536c657
NC		 5852006-02-10 Nick Clifton <nickc@redhat.com>
586
587 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
588
458f7770
DD		 5892006-01-06 DJ Delorie <dj@redhat.com>
590
591 * m32c.cpu (mov.w:q): Fix mode.
592 (push32.b.imm): Likewise, for the comment.
593
d031aafb
NS		 5942005-12-16 Nathan Sidwell <nathan@codesourcery.com>
595
596 Second part of ms1 to mt renaming.
597 * mt.cpu (define-arch, define-isa): Set name to mt.
598 (define-mach): Adjust.
599 * mt.opc (CGEN_ASM_HASH): Update.
600 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
601 (parse_loopsize, parse_imm16): Adjust.
602
eda87aba
DD		 6032005-12-13 DJ Delorie <dj@redhat.com>
604
605 * m32c.cpu (jsri): Fix order so register names aren't treated as
606 symbols.
607 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
608 indexwd, indexws): Fix encodings.
609
4970f871
NS		 6102005-12-12 Nathan Sidwell <nathan@codesourcery.com>
611
612 * mt.cpu: Rename from ms1.cpu.
613 * mt.opc: Rename from ms1.opc.
614
48ad8298
HPN		 6152005-12-06 Hans-Peter Nilsson <hp@axis.com>
616
617 * cris.cpu (simplecris-common-writable-specregs)
618 (simplecris-common-readable-specregs): Split from
619 simplecris-common-specregs. All users changed.
620 (cris-implemented-writable-specregs-v0)
621 (cris-implemented-readable-specregs-v0): Similar from
622 cris-implemented-specregs-v0.
623 (cris-implemented-writable-specregs-v3)
624 (cris-implemented-readable-specregs-v3)
625 (cris-implemented-writable-specregs-v8)
626 (cris-implemented-readable-specregs-v8)
627 (cris-implemented-writable-specregs-v10)
628 (cris-implemented-readable-specregs-v10)
629 (cris-implemented-writable-specregs-v32)
630 (cris-implemented-readable-specregs-v32): Similar.
631 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
632 insns and specializations.
633
6f84a2a6
NS		 6342005-11-08 Nathan Sidwell <nathan@codesourcery.com>
635
636 Add ms2
637 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
638 model.
639 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
640 f-cb2incr, f-rc3): New fields.
641 (LOOP): New instruction.
642 (JAL-HAZARD): New hazard.
643 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
644 New operands.
645 (mul, muli, dbnz, iflush): Enable for ms2
646 (jal, reti): Has JAL-HAZARD.
647 (ldctxt, ldfb, stfb): Only ms1.
648 (fbcb): Only ms1,ms1-003.
649 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
650 fbcbincrs, mfbcbincrs): Enable for ms2.
651 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
652 * ms1.opc (parse_loopsize): New.
653 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
654 (print_pcrel): New.
655
95b96521
DB		 6562005-10-28 Dave Brolley <brolley@redhat.com>
657
658 Contribute the following change:
659 2003-09-24 Dave Brolley <brolley@redhat.com>
660
661 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
662 CGEN_ATTR_VALUE_TYPE.
663 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
664 Use cgen_bitset_intersect_p.
665
c6552317
DD		 6662005-10-27 DJ Delorie <dj@redhat.com>
667
668 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
669 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
670 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
671 imm operand is needed.
672 (adjnz, sbjnz): Pass the right operands.
673 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
674 unary-insn): Add -g variants for opcodes that need to support :G.
675 (not.BW:G, push.BW:G): Call it.
676 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
677 stzx16-imm8-imm8-abs16): Fix operand typos.
678 * m32c.opc (m32c_asm_hash): Support bnCND.
679 (parse_signed4n, print_signed4n): New.
72f4393d 680
f75eb1c0
DD		 6812005-10-26 DJ Delorie <dj@redhat.com>
682
683 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
684 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
685 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
686 dsp8[sp] is signed.
687 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
688 (mov.BW:S r0,r1): Fix typo r1l->r1.
689 (tst): Allow :G suffix.
690 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
691
e277c00b
AM		 6922005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
693
694 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
695
92e0a941
DD		 6962005-10-25 DJ Delorie <dj@redhat.com>
697
698 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
699 making one a macro of the other.
700
a1a280bb
DD		 7012005-10-21 DJ Delorie <dj@redhat.com>
702
703 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
704 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
705 indexld, indexls): .w variants have `1' bit.
706 (rot32.b): QI, not SI.
707 (rot32.w): HI, not SI.
708 (xchg16): HI for .w variant.
709
e74eb924
NC		 7102005-10-19 Nick Clifton <nickc@redhat.com>
711
712 * m32r.opc (parse_slo16): Fix bad application of previous patch.
713
5e03663f
NC		 7142005-10-18 Andreas Schwab <schwab@suse.de>
715
716 * m32r.opc (parse_slo16): Better version of previous patch.
717
ab7c9a26
NC		 7182005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
719
720 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
721 size.
722
fd54057a
DD		 7232005-07-25 DJ Delorie <dj@redhat.com>
724
725 * m32c.opc (parse_unsigned8): Add %dsp8().
726 (parse_signed8): Add %hi8().
727 (parse_unsigned16): Add %dsp16().
728 (parse_signed16): Add %lo16() and %hi16().
729 (parse_lab_5_3): Make valuep a bfd_vma *.
730
85da3a56
NC		 7312005-07-18 Nick Clifton <nickc@redhat.com>
732
733 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
734 components.
735 (f-lab32-jmp-s): Fix insertion sequence.
736 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
737 (Dsp-40-s8): Make parameter be signed.
738 (Dsp-40-s16): Likewise.
739 (Dsp-48-s8): Likewise.
740 (Dsp-48-s16): Likewise.
741 (Imm-13-u3): Likewise. (Despite its name!)
742 (BitBase16-16-s8): Make the parameter be unsigned.
743 (BitBase16-8-u11-S): Likewise.
744 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
745 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
746 relaxation.
747
748 * m32c.opc: Fix formatting.
749 Use safe-ctype.h instead of ctype.h
750 Move duplicated code sequences into a macro.
751 Fix compile time warnings about signedness mismatches.
752 Remove dead code.
753 (parse_lab_5_3): New parser function.
72f4393d 754
aa260854
JB		 7552005-07-16 Jim Blandy <jimb@redhat.com>
756
757 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
758 to represent isa sets.
759
0a665bfd
JB		 7602005-07-15 Jim Blandy <jimb@redhat.com>
761
762 * m32c.cpu, m32c.opc: Fix copyright.
763
49f58d10
JB		 7642005-07-14 Jim Blandy <jimb@redhat.com>
765
766 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
767
0e6b69be
AM		 7682005-07-14 Alan Modra <amodra@bigpond.net.au>
769
770 * ms1.opc (print_dollarhex): Correct format string.
771
f9210e37
AM		 7722005-07-06 Alan Modra <amodra@bigpond.net.au>
773
774 * iq2000.cpu: Include from binutils cpu dir.
775
3ec2b351
NC		 7762005-07-05 Nick Clifton <nickc@redhat.com>
777
778 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
779 unsigned in order to avoid compile time warnings about sign
780 conflicts.
781
782 * ms1.opc (parse_*): Likewise.
783 (parse_imm16): Use a "void *" as it is passed both signed and
784 unsigned arguments.
785
47b0e7ad
NC		 7862005-07-01 Nick Clifton <nickc@redhat.com>
787
788 * frv.opc: Update to ISO C90 function declaration style.
789 * iq2000.opc: Likewise.
790 * m32r.opc: Likewise.
791 * sh.opc: Likewise.
792
b081650b
DB		 7932005-06-15 Dave Brolley <brolley@redhat.com>
794
795 Contributed by Red Hat.
796 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
797 * ms1.opc: New file. Written by Stan Cox.
798
e172dbf8
NC		 7992005-05-10 Nick Clifton <nickc@redhat.com>
800
801 * Update the address and phone number of the FSF organization in
802 the GPL notices in the following files:
803 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
804 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
805 sh64-media.cpu, simplify.inc
806
b2d52a48
AM		 8072005-02-24 Alan Modra <amodra@bigpond.net.au>
808
809 * frv.opc (parse_A): Warning fix.
810
33b71eeb
NC		 8112005-02-23 Nick Clifton <nickc@redhat.com>
812
813 * frv.opc: Fixed compile time warnings about differing signed'ness
814 of pointers passed to functions.
815 * m32r.opc: Likewise.
816
bc18c937
NC		 8172005-02-11 Nick Clifton <nickc@redhat.com>
818
819 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
820 'bfd_vma *' in order avoid compile time warning message.
821
46da9a19
HPN		 8222005-01-28 Hans-Peter Nilsson <hp@axis.com>
823
824 * cris.cpu (mstep): Add missing insn.
825
90219bd0
AO		 8262005-01-25 Alexandre Oliva <aoliva@redhat.com>
827
828 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
829 * frv.cpu: Add support for TLS annotations in loads and calll.
830 * frv.opc (parse_symbolic_address): New.
831 (parse_ldd_annotation): New.
832 (parse_call_annotation): New.
833 (parse_ld_annotation): New.
834 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
835 Introduce TLS relocations.
836 (parse_d12, parse_s12, parse_u12): Likewise.
837 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
838 (parse_call_label, print_at): New.
839
c3d75c30
HPN		 8402004-12-21 Mikael Starvik <starvik@axis.com>
841
842 * cris.cpu (cris-set-mem): Correct integral write semantics.
843
68800d83
HPN		 8442004-11-29 Hans-Peter Nilsson <hp@axis.com>
845
846 * cris.cpu: New file.
847
4bd1d37b
NC		 8482004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
849
850 * iq2000.cpu: Added quotes around macro arguments so that they
851 will work with newer versions of guile.
852
4030fa5a
NC		 8532004-10-27 Nick Clifton <nickc@redhat.com>
854
855 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
856 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
857 operand.
858 * iq2000.cpu (dnop index): Rename to _index to avoid complications
859 with guile.
860
ac28a1cb
RS		 8612004-08-27 Richard Sandiford <rsandifo@redhat.com>
862
863 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
864
dc4c54bb
NC		 8652004-05-15 Nick Clifton <nickc@redhat.com>
866
867 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
868
f4453dfa
NC		 8692004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
870
871 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
872
676a64f4
RS		 8732004-03-01 Richard Sandiford <rsandifo@redhat.com>
874
875 * frv.cpu (define-arch frv): Add fr450 mach.
876 (define-mach fr450): New.
877 (define-model fr450): New. Add profile units to every fr450 insn.
878 (define-attr UNIT): Add MDCUTSSI.
879 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
880 (define-attr AUDIO): New boolean.
881 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
882 (f-LRA-null, f-TLBPR-null): New fields.
883 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
884 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
885 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
886 (LRA-null, TLBPR-null): New macros.
887 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
888 (load-real-address): New macro.
889 (lrai, lrad, tlbpr): New instructions.
890 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
891 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
892 (mdcutssi): Change UNIT attribute to MDCUTSSI.
893 (media-low-clear-semantics, media-scope-limit-semantics)
894 (media-quad-limit, media-quad-shift): New macros.
895 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
896 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
897 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
898 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
899 (fr450_unit_mapping): New array.
900 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
901 for new MDCUTSSI unit.
902 (fr450_check_insn_major_constraints): New function.
903 (check_insn_major_constraints): Use it.
904
c7a48b9a
RS		 9052004-03-01 Richard Sandiford <rsandifo@redhat.com>
906
907 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
908 (scutss): Change unit to I0.
909 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
910 (mqsaths): Fix FR400-MAJOR categorization.
911 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
912 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
913 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
914 combinations.
915
8ae0baa2
RS		 9162004-03-01 Richard Sandiford <rsandifo@redhat.com>
917
918 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
919 (rstb, rsth, rst, rstd, rstq): Delete.
920 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
921
8ee9a8b2
NC		 9222004-02-23 Nick Clifton <nickc@redhat.com>
923
924 * Apply these patches from Renesas:
925
926 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
927
928 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
929 disassembling codes for 0x*2 addresses.
930
931 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
932
933 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
934
935 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
936
937 * cpu/m32r.cpu : Add new model m32r2.
938 Add new instructions.
939 Replace occurrances of 'Mitsubishi' with 'Renesas'.
940 Changed PIPE attr of push from O to OS.
941 Care for Little-endian of M32R.
942 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
943 Care for Little-endian of M32R.
944 (parse_slo16): signed extension for value.
945
299d901c
AC		 9462004-02-20 Andrew Cagney <cagney@redhat.com>
947
e866a257
AC		 948 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
949 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
950
299d901c
AC		 951 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
952 written by Ben Elliston.
953
cb10e79a
RS		 9542004-01-14 Richard Sandiford <rsandifo@redhat.com>
955
956 * frv.cpu (UNIT): Add IACC.
957 (iacc-multiply-r-r): Use it.
958 * frv.opc (fr400_unit_mapping): Add entry for IACC.
959 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
960
d4e4dc14
AO		 9612004-01-06 Alexandre Oliva <aoliva@redhat.com>
962
963 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
964 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
965 cut&paste errors in shifting/truncating numerical operands.
966 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
967 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
968 (parse_uslo16): Likewise.
969 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
970 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
971 (parse_s12): Likewise.
972 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
973 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
974 (parse_uslo16): Likewise.
975 (parse_uhi16): Parse gothi and gotfuncdeschi.
976 (parse_d12): Parse got12 and gotfuncdesc12.
977 (parse_s12): Likewise.
978
1340b9a9
DB		 9792003-10-10 Dave Brolley <brolley@redhat.com>
980
981 * frv.cpu (dnpmop): New p-macro.
982 (GRdoublek): Use dnpmop.
983 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
984 (store-double-r-r): Use (.sym regtype doublek).
985 (r-store-double): Ditto.
986 (store-double-r-r-u): Ditto.
987 (conditional-store-double): Ditto.
988 (conditional-store-double-u): Ditto.
989 (store-double-r-simm): Ditto.
990 (fmovs): Assign to UNIT FMALL.
991
ac7c07ac
DB		 9922003-10-06 Dave Brolley <brolley@redhat.com>
993
994 * frv.cpu, frv.opc: Add support for fr550.
995
d0312406
DB		 9962003-09-24 Dave Brolley <brolley@redhat.com>
997
998 * frv.cpu (u-commit): New modelling unit for fr500.
999 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
1000 (commit-r): Use u-commit model for fr500.
1001 (commit): Ditto.
1002 (conditional-float-binary-op): Take profiling data as an argument.
1003 Update callers.
1004 (ne-float-binary-op): Ditto.
1005
c6945302
MS		 10062003-09-19 Michael Snyder <msnyder@redhat.com>
1007
1008 * frv.cpu (nldqi): Delete unimplemented instruction.
1009
23600bb3
DB		 10102003-09-12 Dave Brolley <brolley@redhat.com>
1011
1012 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
1013 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
1014 frv_ref_SI to get input register referenced for profiling.
1015 (clear-ne-flag-all): Pass insn profiling in as an argument.
1016 (clrgr,clrfr,clrga,clrfa): Add profiling information.
1017
6f18ad70
MS		 10182003-09-11 Michael Snyder <msnyder@redhat.com>
1019
1020 * frv.cpu: Typographical corrections.
1021
96486995
DB		 10222003-09-09 Dave Brolley <brolley@redhat.com>
1023
1024 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
1025 (conditional-media-dual-complex, media-quad-complex): Likewise.
1026
0457efce
DB		 10272003-09-04 Dave Brolley <brolley@redhat.com>
1028
1029 * frv.cpu (register-transfer): Pass in all attributes in on argument.
1030 Update all callers.
1031 (conditional-register-transfer): Ditto.
1032 (cache-preload): Ditto.
1033 (floating-point-conversion): Ditto.
1034 (floating-point-neg): Ditto.
1035 (float-abs): Ditto.
1036 (float-binary-op-s): Ditto.
1037 (conditional-float-binary-op): Ditto.
1038 (ne-float-binary-op): Ditto.
1039 (float-dual-arith): Ditto.
1040 (ne-float-dual-arith): Ditto.
1041
8caa9169
DB		 10422003-09-03 Dave Brolley <brolley@redhat.com>
1043
1044 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
1045 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
1046 MCLRACC-1.
1047 (A): Removed operand.
1048 (A0,A1): New operands replace operand A.
1049 (mnop): Now a real insn
1050 (mclracc): Removed insn.
1051 (mclracc-0, mclracc-1): New insns replace mclracc.
1052 (all insns): Use new UNIT attributes.
1053
6d9ab561
NC		 10542003-08-21 Nick Clifton <nickc@redhat.com>
1055
1056 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
1057 and u-media-dual-btoh with output parameter.
1058 (cmbtoh): Add profiling hack.
1059
741a7751
NC		 10602003-08-19 Michael Snyder <msnyder@redhat.com>
1061
1062 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
1063
5b5b78da
DE		 10642003-06-10 Doug Evans <dje@sebabeach.org>
1065
1066 * frv.cpu: Add IDOC attribute.
1067
539ee71a
AC		 10682003-06-06 Andrew Cagney <cagney@redhat.com>
1069
1070 Contributed by Red Hat.
1071 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
1072 Stan Cox, and Frank Ch. Eigler.
1073 * iq2000.opc: New file. Written by Ben Elliston, Frank
1074 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
1075 * iq2000m.cpu: New file. Written by Jeff Johnston.
1076 * iq10.cpu: New file. Written by Jeff Johnston.
1077
36c3ae24
NC		 10782003-06-05 Nick Clifton <nickc@redhat.com>
1079
1080 * frv.cpu (FRintieven): New operand. An even-numbered only
1081 version of the FRinti operand.
1082 (FRintjeven): Likewise for FRintj.
1083 (FRintkeven): Likewise for FRintk.
1084 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1085 media-quad-arith-sat-semantics, media-quad-arith-sat,
1086 conditional-media-quad-arith-sat, mdunpackh,
1087 media-quad-multiply-semantics, media-quad-multiply,
1088 conditional-media-quad-multiply, media-quad-complex-i,
1089 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1090 conditional-media-quad-multiply-acc, munpackh,
1091 media-quad-multiply-cross-acc-semantics, mdpackh,
1092 media-quad-multiply-cross-acc, mbtoh-semantics,
1093 media-quad-cross-multiply-cross-acc-semantics,
1094 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1095 media-quad-cross-multiply-acc-semantics, cmbtoh,
1096 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1097 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1098 cmhtob): Use new operands.
1099 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
0e6b69be 1100 (parse_even_register): New function.
36c3ae24 1101
75798298
NC		 11022003-06-03 Nick Clifton <nickc@redhat.com>
1103
1104 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1105 immediate value not unsigned.
1106
9aab5aa3
AC		 11072003-06-03 Andrew Cagney <cagney@redhat.com>
1108
1109 Contributed by Red Hat.
1110 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
1111 and Eric Christopher.
1112 * frv.opc: New file. Written by Catherine Moore, and Dave
1113 Brolley.
1114 * simplify.inc: New file. Written by Doug Evans.
1115
2739f79a
AC		 11162003-05-02 Andrew Cagney <cagney@redhat.com>
1117
1118 * New file.
1119
1120\f
752937aa
NC		 1121Copyright (C) 2003-2012 Free Software Foundation, Inc.
1122
1123Copying and distribution of this file, with or without modification,
1124are permitted in any medium without royalty provided the copyright
1125notice and this notice are preserved.
1126
2739f79a
AC		 1127Local Variables:
1128mode: change-log
1129left-margin: 8
1130fill-column: 74
1131version-control: never
1132End:
GDB Binutils - Deliverables
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