[media] s5p-fimc: Ensure proper s_stream() call order in the ISP datapaths
[deliverable/linux.git] / drivers / media / platform / s5p-fimc / fimc-mdevice.c
CommitLineData
d3953223
SN
1/*
2 * S5P/EXYNOS4 SoC series camera host interface media device driver
3 *
7b43a6f3
SN
4 * Copyright (C) 2011 - 2012 Samsung Electronics Co., Ltd.
5 * Sylwester Nawrocki <s.nawrocki@samsung.com>
d3953223
SN
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published
9 * by the Free Software Foundation, either version 2 of the License,
10 * or (at your option) any later version.
11 */
12
13#include <linux/bug.h>
14#include <linux/device.h>
15#include <linux/errno.h>
16#include <linux/i2c.h>
17#include <linux/kernel.h>
18#include <linux/list.h>
19#include <linux/module.h>
e2985a26
SN
20#include <linux/of.h>
21#include <linux/of_platform.h>
22#include <linux/of_device.h>
23#include <linux/of_i2c.h>
d3953223
SN
24#include <linux/platform_device.h>
25#include <linux/pm_runtime.h>
26#include <linux/types.h>
27#include <linux/slab.h>
131b6c61 28#include <media/v4l2-ctrls.h>
e2985a26 29#include <media/v4l2-of.h>
d3953223 30#include <media/media-device.h>
b9ee31e6 31#include <media/s5p_fimc.h>
d3953223
SN
32
33#include "fimc-core.h"
0f735f52 34#include "fimc-lite.h"
d3953223
SN
35#include "fimc-mdevice.h"
36#include "mipi-csis.h"
37
38static int __fimc_md_set_camclk(struct fimc_md *fmd,
39 struct fimc_sensor_info *s_info,
40 bool on);
41/**
42 * fimc_pipeline_prepare - update pipeline information with subdevice pointers
39bb6df6 43 * @me: media entity terminating the pipeline
d3953223
SN
44 *
45 * Caller holds the graph mutex.
46 */
b9ee31e6
SN
47static void fimc_pipeline_prepare(struct fimc_pipeline *p,
48 struct media_entity *me)
d3953223 49{
d3953223 50 struct v4l2_subdev *sd;
0f735f52 51 int i;
d3953223 52
0f735f52
SN
53 for (i = 0; i < IDX_MAX; i++)
54 p->subdevs[i] = NULL;
d3953223 55
0f735f52 56 while (1) {
39bb6df6
SN
57 struct media_pad *pad = NULL;
58
59 /* Find remote source pad */
60 for (i = 0; i < me->num_pads; i++) {
61 struct media_pad *spad = &me->pads[i];
62 if (!(spad->flags & MEDIA_PAD_FL_SINK))
63 continue;
64 pad = media_entity_remote_source(spad);
65 if (pad)
66 break;
67 }
0f735f52 68
0f735f52
SN
69 if (pad == NULL ||
70 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
71 break;
0f735f52
SN
72 sd = media_entity_to_v4l2_subdev(pad->entity);
73
74 switch (sd->grp_id) {
588c87be
SN
75 case GRP_ID_FIMC_IS_SENSOR:
76 case GRP_ID_SENSOR:
0f735f52
SN
77 p->subdevs[IDX_SENSOR] = sd;
78 break;
588c87be 79 case GRP_ID_CSIS:
0f735f52
SN
80 p->subdevs[IDX_CSIS] = sd;
81 break;
588c87be 82 case GRP_ID_FLITE:
4af81310
SN
83 p->subdevs[IDX_FLITE] = sd;
84 break;
588c87be 85 case GRP_ID_FIMC:
0f735f52
SN
86 /* No need to control FIMC subdev through subdev ops */
87 break;
88 default:
89 pr_warn("%s: Unknown subdev grp_id: %#x\n",
90 __func__, sd->grp_id);
91 }
39bb6df6
SN
92 me = &sd->entity;
93 if (me->num_pads == 1)
94 break;
d3953223
SN
95 }
96}
97
98/**
99 * __subdev_set_power - change power state of a single subdev
100 * @sd: subdevice to change power state for
101 * @on: 1 to enable power or 0 to disable
102 *
103 * Return result of s_power subdev operation or -ENXIO if sd argument
104 * is NULL. Return 0 if the subdevice does not implement s_power.
105 */
106static int __subdev_set_power(struct v4l2_subdev *sd, int on)
107{
108 int *use_count;
109 int ret;
110
111 if (sd == NULL)
112 return -ENXIO;
113
114 use_count = &sd->entity.use_count;
115 if (on && (*use_count)++ > 0)
116 return 0;
117 else if (!on && (*use_count == 0 || --(*use_count) > 0))
118 return 0;
119 ret = v4l2_subdev_call(sd, core, s_power, on);
120
121 return ret != -ENOIOCTLCMD ? ret : 0;
122}
123
124/**
125 * fimc_pipeline_s_power - change power state of all pipeline subdevs
126 * @fimc: fimc device terminating the pipeline
0f735f52 127 * @state: true to power on, false to power off
d3953223 128 *
0f735f52 129 * Needs to be called with the graph mutex held.
d3953223 130 */
b9ee31e6 131static int fimc_pipeline_s_power(struct fimc_pipeline *p, bool state)
d3953223 132{
0f735f52
SN
133 unsigned int i;
134 int ret;
d3953223 135
0f735f52 136 if (p->subdevs[IDX_SENSOR] == NULL)
d3953223
SN
137 return -ENXIO;
138
0f735f52
SN
139 for (i = 0; i < IDX_MAX; i++) {
140 unsigned int idx = state ? (IDX_MAX - 1) - i : i;
141
142 ret = __subdev_set_power(p->subdevs[idx], state);
143 if (ret < 0 && ret != -ENXIO)
d3953223 144 return ret;
d3953223
SN
145 }
146
0f735f52 147 return 0;
d3953223
SN
148}
149
150/**
b9ee31e6
SN
151 * __fimc_pipeline_open - update the pipeline information, enable power
152 * of all pipeline subdevs and the sensor clock
d3953223 153 * @me: media entity to start graph walk with
056f4f30 154 * @prepare: true to walk the current pipeline and acquire all subdevs
d3953223 155 *
740ad921 156 * Called with the graph mutex held.
d3953223 157 */
b9ee31e6 158static int __fimc_pipeline_open(struct fimc_pipeline *p,
056f4f30 159 struct media_entity *me, bool prepare)
d3953223 160{
056f4f30
SN
161 struct fimc_md *fmd = entity_to_fimc_mdev(me);
162 struct v4l2_subdev *sd;
d3953223
SN
163 int ret;
164
056f4f30
SN
165 if (WARN_ON(p == NULL || me == NULL))
166 return -EINVAL;
167
168 if (prepare)
0f735f52
SN
169 fimc_pipeline_prepare(p, me);
170
056f4f30
SN
171 sd = p->subdevs[IDX_SENSOR];
172 if (sd == NULL)
d3953223 173 return -EINVAL;
0f735f52 174
056f4f30
SN
175 /* Disable PXLASYNC clock if this pipeline includes FIMC-IS */
176 if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) {
177 ret = clk_prepare_enable(fmd->wbclk[CLK_IDX_WB_B]);
178 if (ret < 0)
179 return ret;
180 }
181 ret = fimc_md_set_camclk(sd, true);
182 if (ret < 0)
183 goto err_wbclk;
184
185 ret = fimc_pipeline_s_power(p, 1);
186 if (!ret)
187 return 0;
0f735f52 188
056f4f30
SN
189 fimc_md_set_camclk(sd, false);
190
191err_wbclk:
192 if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP])
193 clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
194
195 return ret;
d3953223
SN
196}
197
d3953223 198/**
b9ee31e6 199 * __fimc_pipeline_close - disable the sensor clock and pipeline power
d3953223
SN
200 * @fimc: fimc device terminating the pipeline
201 *
740ad921 202 * Disable power of all subdevs and turn the external sensor clock off.
d3953223 203 */
b9ee31e6 204static int __fimc_pipeline_close(struct fimc_pipeline *p)
d3953223 205{
056f4f30
SN
206 struct v4l2_subdev *sd = p ? p->subdevs[IDX_SENSOR] : NULL;
207 struct fimc_md *fmd;
d3953223
SN
208 int ret = 0;
209
056f4f30 210 if (WARN_ON(sd == NULL))
740ad921
SN
211 return -EINVAL;
212
0f735f52
SN
213 if (p->subdevs[IDX_SENSOR]) {
214 ret = fimc_pipeline_s_power(p, 0);
056f4f30 215 fimc_md_set_camclk(sd, false);
d3953223 216 }
056f4f30
SN
217
218 fmd = entity_to_fimc_mdev(&sd->entity);
219
220 /* Disable PXLASYNC clock if this pipeline includes FIMC-IS */
221 if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP])
222 clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
223
d3953223
SN
224 return ret == -ENXIO ? 0 : ret;
225}
226
d3953223 227/**
8d274e7c 228 * __fimc_pipeline_s_stream - call s_stream() on pipeline subdevs
0f735f52 229 * @pipeline: video pipeline structure
8d274e7c 230 * @on: passed as the s_stream() callback argument
d3953223 231 */
740ad921 232static int __fimc_pipeline_s_stream(struct fimc_pipeline *p, bool on)
d3953223 233{
8d274e7c
SN
234 static const u8 seq[2][IDX_MAX] = {
235 { IDX_FIMC, IDX_SENSOR, IDX_IS_ISP, IDX_CSIS, IDX_FLITE },
236 { IDX_CSIS, IDX_FLITE, IDX_FIMC, IDX_SENSOR, IDX_IS_ISP },
237 };
238 int i, ret = 0;
d3953223 239
0f735f52 240 if (p->subdevs[IDX_SENSOR] == NULL)
d3953223
SN
241 return -ENODEV;
242
0f735f52 243 for (i = 0; i < IDX_MAX; i++) {
8d274e7c 244 unsigned int idx = seq[on][i];
0f735f52
SN
245
246 ret = v4l2_subdev_call(p->subdevs[idx], video, s_stream, on);
247
248 if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV)
8d274e7c 249 goto error;
0f735f52 250 }
0f735f52 251 return 0;
8d274e7c
SN
252error:
253 for (; i >= 0; i--) {
254 unsigned int idx = seq[on][i];
255 v4l2_subdev_call(p->subdevs[idx], video, s_stream, !on);
256 }
257 return ret;
d3953223 258}
b9ee31e6
SN
259
260/* Media pipeline operations for the FIMC/FIMC-LITE video device driver */
261static const struct fimc_pipeline_ops fimc_pipeline_ops = {
740ad921
SN
262 .open = __fimc_pipeline_open,
263 .close = __fimc_pipeline_close,
264 .set_stream = __fimc_pipeline_s_stream,
b9ee31e6 265};
d3953223
SN
266
267/*
268 * Sensor subdevice helper functions
269 */
270static struct v4l2_subdev *fimc_md_register_sensor(struct fimc_md *fmd,
271 struct fimc_sensor_info *s_info)
272{
273 struct i2c_adapter *adapter;
274 struct v4l2_subdev *sd = NULL;
275
276 if (!s_info || !fmd)
277 return NULL;
88fa8311
SN
278 /*
279 * If FIMC bus type is not Writeback FIFO assume it is same
280 * as sensor_bus_type.
281 */
282 s_info->pdata.fimc_bus_type = s_info->pdata.sensor_bus_type;
d3953223 283
6612a082 284 adapter = i2c_get_adapter(s_info->pdata.i2c_bus_num);
ecd9acbf
SN
285 if (!adapter) {
286 v4l2_warn(&fmd->v4l2_dev,
287 "Failed to get I2C adapter %d, deferring probe\n",
6612a082 288 s_info->pdata.i2c_bus_num);
ecd9acbf
SN
289 return ERR_PTR(-EPROBE_DEFER);
290 }
d3953223 291 sd = v4l2_i2c_new_subdev_board(&fmd->v4l2_dev, adapter,
6612a082 292 s_info->pdata.board_info, NULL);
d3953223 293 if (IS_ERR_OR_NULL(sd)) {
7acde02a 294 i2c_put_adapter(adapter);
ecd9acbf
SN
295 v4l2_warn(&fmd->v4l2_dev,
296 "Failed to acquire subdev %s, deferring probe\n",
6612a082 297 s_info->pdata.board_info->type);
ecd9acbf 298 return ERR_PTR(-EPROBE_DEFER);
d3953223
SN
299 }
300 v4l2_set_subdev_hostdata(sd, s_info);
588c87be 301 sd->grp_id = GRP_ID_SENSOR;
d3953223
SN
302
303 v4l2_info(&fmd->v4l2_dev, "Registered sensor subdevice %s\n",
2b13f7d4 304 sd->name);
d3953223
SN
305 return sd;
306}
307
308static void fimc_md_unregister_sensor(struct v4l2_subdev *sd)
309{
310 struct i2c_client *client = v4l2_get_subdevdata(sd);
7acde02a 311 struct i2c_adapter *adapter;
d3953223
SN
312
313 if (!client)
314 return;
315 v4l2_device_unregister_subdev(sd);
2b13f7d4
SN
316
317 if (!client->dev.of_node) {
318 adapter = client->adapter;
319 i2c_unregister_device(client);
320 if (adapter)
321 i2c_put_adapter(adapter);
322 }
d3953223
SN
323}
324
e2985a26 325#ifdef CONFIG_OF
2b13f7d4
SN
326/* Register I2C client subdev associated with @node. */
327static int fimc_md_of_add_sensor(struct fimc_md *fmd,
328 struct device_node *node, int index)
329{
330 struct fimc_sensor_info *si;
331 struct i2c_client *client;
332 struct v4l2_subdev *sd;
333 int ret;
334
335 if (WARN_ON(index >= ARRAY_SIZE(fmd->sensor)))
336 return -EINVAL;
337 si = &fmd->sensor[index];
338
339 client = of_find_i2c_device_by_node(node);
340 if (!client)
341 return -EPROBE_DEFER;
342
343 device_lock(&client->dev);
344
345 if (!client->driver ||
346 !try_module_get(client->driver->driver.owner)) {
347 ret = -EPROBE_DEFER;
348 v4l2_info(&fmd->v4l2_dev, "No driver found for %s\n",
349 node->full_name);
350 goto dev_put;
351 }
352
353 /* Enable sensor's master clock */
354 ret = __fimc_md_set_camclk(fmd, si, true);
355 if (ret < 0)
356 goto mod_put;
357 sd = i2c_get_clientdata(client);
358
359 ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
360 __fimc_md_set_camclk(fmd, si, false);
361 if (ret < 0)
362 goto mod_put;
363
364 v4l2_set_subdev_hostdata(sd, si);
365 sd->grp_id = GRP_ID_SENSOR;
366 si->subdev = sd;
367 v4l2_info(&fmd->v4l2_dev, "Registered sensor subdevice: %s (%d)\n",
368 sd->name, fmd->num_sensors);
369 fmd->num_sensors++;
370
371mod_put:
372 module_put(client->driver->driver.owner);
373dev_put:
374 device_unlock(&client->dev);
375 put_device(&client->dev);
376 return ret;
377}
378
379/* Parse port node and register as a sub-device any sensor specified there. */
380static int fimc_md_parse_port_node(struct fimc_md *fmd,
381 struct device_node *port,
382 unsigned int index)
383{
384 struct device_node *rem, *ep, *np;
385 struct fimc_source_info *pd;
386 struct v4l2_of_endpoint endpoint;
387 int ret;
388 u32 val;
389
390 pd = &fmd->sensor[index].pdata;
391
392 /* Assume here a port node can have only one endpoint node. */
393 ep = of_get_next_child(port, NULL);
394 if (!ep)
395 return 0;
396
397 v4l2_of_parse_endpoint(ep, &endpoint);
398 if (WARN_ON(endpoint.port == 0) || index >= FIMC_MAX_SENSORS)
399 return -EINVAL;
400
401 pd->mux_id = (endpoint.port - 1) & 0x1;
402
403 rem = v4l2_of_get_remote_port_parent(ep);
404 of_node_put(ep);
405 if (rem == NULL) {
406 v4l2_info(&fmd->v4l2_dev, "Remote device at %s not found\n",
407 ep->full_name);
408 return 0;
409 }
410 if (!of_property_read_u32(rem, "samsung,camclk-out", &val))
411 pd->clk_id = val;
412
413 if (!of_property_read_u32(rem, "clock-frequency", &val))
414 pd->clk_frequency = val;
415
416 if (pd->clk_frequency == 0) {
417 v4l2_err(&fmd->v4l2_dev, "Wrong clock frequency at node %s\n",
418 rem->full_name);
419 of_node_put(rem);
420 return -EINVAL;
421 }
422
423 if (fimc_input_is_parallel(endpoint.port)) {
424 if (endpoint.bus_type == V4L2_MBUS_PARALLEL)
425 pd->sensor_bus_type = FIMC_BUS_TYPE_ITU_601;
426 else
427 pd->sensor_bus_type = FIMC_BUS_TYPE_ITU_656;
428 pd->flags = endpoint.bus.parallel.flags;
429 } else if (fimc_input_is_mipi_csi(endpoint.port)) {
430 /*
431 * MIPI CSI-2: only input mux selection and
432 * the sensor's clock frequency is needed.
433 */
434 pd->sensor_bus_type = FIMC_BUS_TYPE_MIPI_CSI2;
435 } else {
436 v4l2_err(&fmd->v4l2_dev, "Wrong port id (%u) at node %s\n",
437 endpoint.port, rem->full_name);
438 }
439 /*
440 * For FIMC-IS handled sensors, that are placed under i2c-isp device
441 * node, FIMC is connected to the FIMC-IS through its ISP Writeback
442 * input. Sensors are attached to the FIMC-LITE hostdata interface
443 * directly or through MIPI-CSIS, depending on the external media bus
444 * used. This needs to be handled in a more reliable way, not by just
445 * checking parent's node name.
446 */
447 np = of_get_parent(rem);
448
449 if (np && !of_node_cmp(np->name, "i2c-isp"))
450 pd->fimc_bus_type = FIMC_BUS_TYPE_ISP_WRITEBACK;
451 else
452 pd->fimc_bus_type = pd->sensor_bus_type;
453
454 ret = fimc_md_of_add_sensor(fmd, rem, index);
455 of_node_put(rem);
456
457 return ret;
458}
459
460/* Register all SoC external sub-devices */
461static int fimc_md_of_sensors_register(struct fimc_md *fmd,
462 struct device_node *np)
463{
464 struct device_node *parent = fmd->pdev->dev.of_node;
465 struct device_node *node, *ports;
466 int index = 0;
467 int ret;
468
469 /* Attach sensors linked to MIPI CSI-2 receivers */
470 for_each_available_child_of_node(parent, node) {
471 struct device_node *port;
472
473 if (of_node_cmp(node->name, "csis"))
474 continue;
475 /* The csis node can have only port subnode. */
476 port = of_get_next_child(node, NULL);
477 if (!port)
478 continue;
479
480 ret = fimc_md_parse_port_node(fmd, port, index);
481 if (ret < 0)
482 return ret;
483 index++;
484 }
485
486 /* Attach sensors listed in the parallel-ports node */
487 ports = of_get_child_by_name(parent, "parallel-ports");
488 if (!ports)
489 return 0;
490
491 for_each_child_of_node(ports, node) {
492 ret = fimc_md_parse_port_node(fmd, node, index);
493 if (ret < 0)
494 break;
495 index++;
496 }
497
498 return 0;
499}
500
e2985a26
SN
501static int __of_get_csis_id(struct device_node *np)
502{
503 u32 reg = 0;
504
505 np = of_get_child_by_name(np, "port");
506 if (!np)
507 return -EINVAL;
508 of_property_read_u32(np, "reg", &reg);
509 return reg - FIMC_INPUT_MIPI_CSI2_0;
510}
511#else
2b13f7d4 512#define fimc_md_of_sensors_register(fmd, np) (-ENOSYS)
e2985a26
SN
513#define __of_get_csis_id(np) (-ENOSYS)
514#endif
515
d3953223
SN
516static int fimc_md_register_sensor_entities(struct fimc_md *fmd)
517{
518 struct s5p_platform_fimc *pdata = fmd->pdev->dev.platform_data;
2b13f7d4 519 struct device_node *of_node = fmd->pdev->dev.of_node;
2b13f7d4
SN
520 int num_clients = 0;
521 int ret, i;
d3953223
SN
522
523 /*
524 * Runtime resume one of the FIMC entities to make sure
525 * the sclk_cam clocks are not globally disabled.
526 */
3e20c345 527 if (!fmd->pmf)
d3953223 528 return -ENXIO;
2b13f7d4 529
3e20c345 530 ret = pm_runtime_get_sync(fmd->pmf);
d3953223
SN
531 if (ret < 0)
532 return ret;
533
2b13f7d4
SN
534 if (of_node) {
535 fmd->num_sensors = 0;
536 ret = fimc_md_of_sensors_register(fmd, of_node);
537 } else if (pdata) {
538 WARN_ON(pdata->num_clients > ARRAY_SIZE(fmd->sensor));
539 num_clients = min_t(u32, pdata->num_clients,
540 ARRAY_SIZE(fmd->sensor));
541 fmd->num_sensors = num_clients;
d3953223 542
2b13f7d4
SN
543 for (i = 0; i < num_clients; i++) {
544 struct v4l2_subdev *sd;
ecd9acbf 545
2b13f7d4
SN
546 fmd->sensor[i].pdata = pdata->source_info[i];
547 ret = __fimc_md_set_camclk(fmd, &fmd->sensor[i], true);
548 if (ret)
549 break;
550 sd = fimc_md_register_sensor(fmd, &fmd->sensor[i]);
551 ret = __fimc_md_set_camclk(fmd, &fmd->sensor[i], false);
552
553 if (IS_ERR(sd)) {
554 fmd->sensor[i].subdev = NULL;
555 ret = PTR_ERR(sd);
556 break;
557 }
ecd9acbf 558 fmd->sensor[i].subdev = sd;
2b13f7d4
SN
559 if (ret)
560 break;
ecd9acbf 561 }
d3953223 562 }
2b13f7d4 563
3e20c345 564 pm_runtime_put(fmd->pmf);
d3953223
SN
565 return ret;
566}
567
568/*
7b43a6f3 569 * MIPI-CSIS, FIMC and FIMC-LITE platform devices registration.
d3953223 570 */
7b43a6f3
SN
571
572static int register_fimc_lite_entity(struct fimc_md *fmd,
573 struct fimc_lite *fimc_lite)
d3953223 574{
8163ec0b 575 struct v4l2_subdev *sd;
afd7348c 576 int ret;
4af81310 577
7b43a6f3
SN
578 if (WARN_ON(fimc_lite->index >= FIMC_LITE_MAX_DEVS ||
579 fmd->fimc_lite[fimc_lite->index]))
580 return -EBUSY;
d3953223 581
7b43a6f3
SN
582 sd = &fimc_lite->subdev;
583 sd->grp_id = GRP_ID_FLITE;
97d66c47 584 v4l2_set_subdev_hostdata(sd, (void *)&fimc_pipeline_ops);
693f5c40
SN
585
586 ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
7b43a6f3
SN
587 if (!ret)
588 fmd->fimc_lite[fimc_lite->index] = fimc_lite;
589 else
590 v4l2_err(&fmd->v4l2_dev, "Failed to register FIMC.LITE%d\n",
591 fimc_lite->index);
592 return ret;
d3953223
SN
593}
594
7b43a6f3 595static int register_fimc_entity(struct fimc_md *fmd, struct fimc_dev *fimc)
4af81310 596{
7b43a6f3 597 struct v4l2_subdev *sd;
4af81310
SN
598 int ret;
599
7b43a6f3
SN
600 if (WARN_ON(fimc->id >= FIMC_MAX_DEVS || fmd->fimc[fimc->id]))
601 return -EBUSY;
4af81310 602
7b43a6f3
SN
603 sd = &fimc->vid_cap.subdev;
604 sd->grp_id = GRP_ID_FIMC;
605 v4l2_set_subdev_hostdata(sd, (void *)&fimc_pipeline_ops);
4af81310 606
7b43a6f3
SN
607 ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
608 if (!ret) {
3e20c345
SN
609 if (!fmd->pmf && fimc->pdev)
610 fmd->pmf = &fimc->pdev->dev;
7b43a6f3
SN
611 fmd->fimc[fimc->id] = fimc;
612 fimc->vid_cap.user_subdev_api = fmd->user_subdev_api;
613 } else {
614 v4l2_err(&fmd->v4l2_dev, "Failed to register FIMC.%d (%d)\n",
615 fimc->id, ret);
4af81310 616 }
7b43a6f3 617 return ret;
4af81310
SN
618}
619
7b43a6f3
SN
620static int register_csis_entity(struct fimc_md *fmd,
621 struct platform_device *pdev,
622 struct v4l2_subdev *sd)
d3953223 623{
7b43a6f3 624 struct device_node *node = pdev->dev.of_node;
d3953223
SN
625 int id, ret;
626
e2985a26 627 id = node ? __of_get_csis_id(node) : max(0, pdev->id);
7b43a6f3 628
e2985a26
SN
629 if (WARN_ON(id < 0 || id >= CSIS_MAX_ENTITIES))
630 return -ENOENT;
7b43a6f3 631
e2985a26
SN
632 if (WARN_ON(fmd->csis[id].sd))
633 return -EBUSY;
d3953223 634
588c87be 635 sd->grp_id = GRP_ID_CSIS;
d3953223 636 ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
afd7348c
SN
637 if (!ret)
638 fmd->csis[id].sd = sd;
639 else
d3953223 640 v4l2_err(&fmd->v4l2_dev,
7b43a6f3 641 "Failed to register MIPI-CSIS.%d (%d)\n", id, ret);
d3953223
SN
642 return ret;
643}
644
7b43a6f3
SN
645static int fimc_md_register_platform_entity(struct fimc_md *fmd,
646 struct platform_device *pdev,
647 int plat_entity)
d3953223 648{
7b43a6f3
SN
649 struct device *dev = &pdev->dev;
650 int ret = -EPROBE_DEFER;
651 void *drvdata;
652
653 /* Lock to ensure dev->driver won't change. */
654 device_lock(dev);
655
656 if (!dev->driver || !try_module_get(dev->driver->owner))
657 goto dev_unlock;
658
659 drvdata = dev_get_drvdata(dev);
660 /* Some subdev didn't probe succesfully id drvdata is NULL */
661 if (drvdata) {
662 switch (plat_entity) {
663 case IDX_FIMC:
664 ret = register_fimc_entity(fmd, drvdata);
665 break;
666 case IDX_FLITE:
667 ret = register_fimc_lite_entity(fmd, drvdata);
ecd9acbf 668 break;
7b43a6f3
SN
669 case IDX_CSIS:
670 ret = register_csis_entity(fmd, pdev, drvdata);
671 break;
672 default:
673 ret = -ENODEV;
ecd9acbf
SN
674 }
675 }
d3953223 676
7b43a6f3
SN
677 module_put(dev->driver->owner);
678dev_unlock:
679 device_unlock(dev);
680 if (ret == -EPROBE_DEFER)
681 dev_info(&fmd->pdev->dev, "deferring %s device registration\n",
682 dev_name(dev));
683 else if (ret < 0)
684 dev_err(&fmd->pdev->dev, "%s device registration failed (%d)\n",
685 dev_name(dev), ret);
686 return ret;
687}
688
689static int fimc_md_pdev_match(struct device *dev, void *data)
690{
691 struct platform_device *pdev = to_platform_device(dev);
692 int plat_entity = -1;
693 int ret;
694 char *p;
695
696 if (!get_device(dev))
697 return -ENODEV;
698
699 if (!strcmp(pdev->name, CSIS_DRIVER_NAME)) {
700 plat_entity = IDX_CSIS;
701 } else if (!strcmp(pdev->name, FIMC_LITE_DRV_NAME)) {
702 plat_entity = IDX_FLITE;
703 } else {
704 p = strstr(pdev->name, "fimc");
705 if (p && *(p + 4) == 0)
706 plat_entity = IDX_FIMC;
ecd9acbf
SN
707 }
708
7b43a6f3
SN
709 if (plat_entity >= 0)
710 ret = fimc_md_register_platform_entity(data, pdev,
711 plat_entity);
712 put_device(dev);
713 return 0;
d3953223
SN
714}
715
e2985a26
SN
716/* Register FIMC, FIMC-LITE and CSIS media entities */
717#ifdef CONFIG_OF
718static int fimc_md_register_of_platform_entities(struct fimc_md *fmd,
719 struct device_node *parent)
720{
721 struct device_node *node;
722 int ret = 0;
723
724 for_each_available_child_of_node(parent, node) {
725 struct platform_device *pdev;
726 int plat_entity = -1;
727
728 pdev = of_find_device_by_node(node);
729 if (!pdev)
730 continue;
731
732 /* If driver of any entity isn't ready try all again later. */
733 if (!strcmp(node->name, CSIS_OF_NODE_NAME))
734 plat_entity = IDX_CSIS;
735 else if (!strcmp(node->name, FIMC_LITE_OF_NODE_NAME))
736 plat_entity = IDX_FLITE;
737 else if (!strcmp(node->name, FIMC_OF_NODE_NAME) &&
738 !of_property_read_bool(node, "samsung,lcd-wb"))
739 plat_entity = IDX_FIMC;
740
741 if (plat_entity >= 0)
742 ret = fimc_md_register_platform_entity(fmd, pdev,
743 plat_entity);
744 put_device(&pdev->dev);
745 if (ret < 0)
746 break;
747 }
748
749 return ret;
750}
751#else
752#define fimc_md_register_of_platform_entities(fmd, node) (-ENOSYS)
753#endif
754
d3953223
SN
755static void fimc_md_unregister_entities(struct fimc_md *fmd)
756{
757 int i;
758
759 for (i = 0; i < FIMC_MAX_DEVS; i++) {
760 if (fmd->fimc[i] == NULL)
761 continue;
693f5c40 762 v4l2_device_unregister_subdev(&fmd->fimc[i]->vid_cap.subdev);
b9ee31e6 763 fmd->fimc[i]->pipeline_ops = NULL;
d3953223
SN
764 fmd->fimc[i] = NULL;
765 }
4af81310
SN
766 for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) {
767 if (fmd->fimc_lite[i] == NULL)
768 continue;
769 v4l2_device_unregister_subdev(&fmd->fimc_lite[i]->subdev);
248ac368 770 fmd->fimc_lite[i]->pipeline_ops = NULL;
4af81310
SN
771 fmd->fimc_lite[i] = NULL;
772 }
d3953223
SN
773 for (i = 0; i < CSIS_MAX_ENTITIES; i++) {
774 if (fmd->csis[i].sd == NULL)
775 continue;
776 v4l2_device_unregister_subdev(fmd->csis[i].sd);
ecd9acbf 777 module_put(fmd->csis[i].sd->owner);
d3953223
SN
778 fmd->csis[i].sd = NULL;
779 }
780 for (i = 0; i < fmd->num_sensors; i++) {
781 if (fmd->sensor[i].subdev == NULL)
782 continue;
783 fimc_md_unregister_sensor(fmd->sensor[i].subdev);
784 fmd->sensor[i].subdev = NULL;
785 }
7b43a6f3 786 v4l2_info(&fmd->v4l2_dev, "Unregistered all entities\n");
d3953223
SN
787}
788
d3953223
SN
789/**
790 * __fimc_md_create_fimc_links - create links to all FIMC entities
791 * @fmd: fimc media device
792 * @source: the source entity to create links to all fimc entities from
793 * @sensor: sensor subdev linked to FIMC[fimc_id] entity, may be null
794 * @pad: the source entity pad index
d0da3c35 795 * @link_mask: bitmask of the fimc devices for which link should be enabled
d3953223 796 */
4af81310
SN
797static int __fimc_md_create_fimc_sink_links(struct fimc_md *fmd,
798 struct media_entity *source,
799 struct v4l2_subdev *sensor,
d0da3c35 800 int pad, int link_mask)
d3953223 801{
56bc911a 802 struct fimc_sensor_info *s_info = NULL;
d3953223 803 struct media_entity *sink;
4af81310 804 unsigned int flags = 0;
237e0265 805 int ret, i;
d3953223
SN
806
807 for (i = 0; i < FIMC_MAX_DEVS; i++) {
808 if (!fmd->fimc[i])
4af81310 809 continue;
d3953223
SN
810 /*
811 * Some FIMC variants are not fitted with camera capture
812 * interface. Skip creating a link from sensor for those.
813 */
4af81310 814 if (!fmd->fimc[i]->variant->has_cam_if)
d3953223
SN
815 continue;
816
d0da3c35 817 flags = ((1 << i) & link_mask) ? MEDIA_LNK_FL_ENABLED : 0;
4af81310 818
693f5c40 819 sink = &fmd->fimc[i]->vid_cap.subdev.entity;
237e0265 820 ret = media_entity_create_link(source, pad, sink,
88fa8311 821 FIMC_SD_PAD_SINK_CAM, flags);
d3953223
SN
822 if (ret)
823 return ret;
824
237e0265
SN
825 /* Notify FIMC capture subdev entity */
826 ret = media_entity_call(sink, link_setup, &sink->pads[0],
827 &source->pads[pad], flags);
828 if (ret)
829 break;
830
542fb082 831 v4l2_info(&fmd->v4l2_dev, "created link [%s] %c> [%s]\n",
d3953223
SN
832 source->name, flags ? '=' : '-', sink->name);
833
4af81310 834 if (flags == 0 || sensor == NULL)
d3953223
SN
835 continue;
836 s_info = v4l2_get_subdev_hostdata(sensor);
837 if (!WARN_ON(s_info == NULL)) {
838 unsigned long irq_flags;
839 spin_lock_irqsave(&fmd->slock, irq_flags);
840 s_info->host = fmd->fimc[i];
841 spin_unlock_irqrestore(&fmd->slock, irq_flags);
842 }
843 }
4af81310
SN
844
845 for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) {
846 if (!fmd->fimc_lite[i])
847 continue;
848
d0da3c35
SN
849 if (link_mask & (1 << (i + FIMC_MAX_DEVS)))
850 flags = MEDIA_LNK_FL_ENABLED;
851 else
852 flags = 0;
4af81310
SN
853
854 sink = &fmd->fimc_lite[i]->subdev.entity;
855 ret = media_entity_create_link(source, pad, sink,
856 FLITE_SD_PAD_SINK, flags);
857 if (ret)
858 return ret;
859
860 /* Notify FIMC-LITE subdev entity */
861 ret = media_entity_call(sink, link_setup, &sink->pads[0],
862 &source->pads[pad], flags);
863 if (ret)
864 break;
865
969e877c 866 v4l2_info(&fmd->v4l2_dev, "created link [%s] %c> [%s]\n",
4af81310
SN
867 source->name, flags ? '=' : '-', sink->name);
868 }
d3953223
SN
869 return 0;
870}
871
4af81310
SN
872/* Create links from FIMC-LITE source pads to other entities */
873static int __fimc_md_create_flite_source_links(struct fimc_md *fmd)
874{
875 struct media_entity *source, *sink;
876 unsigned int flags = MEDIA_LNK_FL_ENABLED;
a26860bd 877 int i, ret = 0;
4af81310
SN
878
879 for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) {
880 struct fimc_lite *fimc = fmd->fimc_lite[i];
881 if (fimc == NULL)
882 continue;
883 source = &fimc->subdev.entity;
1bcd7041 884 sink = &fimc->vfd.entity;
4af81310 885 /* FIMC-LITE's subdev and video node */
6319d6a0 886 ret = media_entity_create_link(source, FLITE_SD_PAD_SOURCE_DMA,
4af81310
SN
887 sink, 0, flags);
888 if (ret)
889 break;
890 /* TODO: create links to other entities */
891 }
892
893 return ret;
894}
895
d3953223
SN
896/**
897 * fimc_md_create_links - create default links between registered entities
898 *
899 * Parallel interface sensor entities are connected directly to FIMC capture
900 * entities. The sensors using MIPI CSIS bus are connected through immutable
901 * link with CSI receiver entity specified by mux_id. Any registered CSIS
902 * entity has a link to each registered FIMC capture entity. Enabled links
903 * are created by default between each subsequent registered sensor and
904 * subsequent FIMC capture entity. The number of default active links is
905 * determined by the number of available sensors or FIMC entities,
906 * whichever is less.
907 */
908static int fimc_md_create_links(struct fimc_md *fmd)
909{
a8697ec8 910 struct v4l2_subdev *csi_sensors[CSIS_MAX_ENTITIES] = { NULL };
d3953223 911 struct v4l2_subdev *sensor, *csis;
56bc911a 912 struct fimc_source_info *pdata;
d3953223 913 struct fimc_sensor_info *s_info;
237e0265 914 struct media_entity *source, *sink;
d0da3c35
SN
915 int i, pad, fimc_id = 0, ret = 0;
916 u32 flags, link_mask = 0;
d3953223
SN
917
918 for (i = 0; i < fmd->num_sensors; i++) {
919 if (fmd->sensor[i].subdev == NULL)
920 continue;
921
922 sensor = fmd->sensor[i].subdev;
923 s_info = v4l2_get_subdev_hostdata(sensor);
6612a082 924 if (!s_info)
d3953223
SN
925 continue;
926
927 source = NULL;
6612a082 928 pdata = &s_info->pdata;
d3953223 929
56bc911a
SN
930 switch (pdata->sensor_bus_type) {
931 case FIMC_BUS_TYPE_MIPI_CSI2:
d3953223
SN
932 if (WARN(pdata->mux_id >= CSIS_MAX_ENTITIES,
933 "Wrong CSI channel id: %d\n", pdata->mux_id))
934 return -EINVAL;
935
936 csis = fmd->csis[pdata->mux_id].sd;
937 if (WARN(csis == NULL,
938 "MIPI-CSI interface specified "
939 "but s5p-csis module is not loaded!\n"))
d12392ec 940 return -EINVAL;
d3953223 941
1c9f5bd7
AH
942 pad = sensor->entity.num_pads - 1;
943 ret = media_entity_create_link(&sensor->entity, pad,
d3953223
SN
944 &csis->entity, CSIS_PAD_SINK,
945 MEDIA_LNK_FL_IMMUTABLE |
946 MEDIA_LNK_FL_ENABLED);
947 if (ret)
948 return ret;
949
969e877c 950 v4l2_info(&fmd->v4l2_dev, "created link [%s] => [%s]\n",
d3953223
SN
951 sensor->entity.name, csis->entity.name);
952
4af81310 953 source = NULL;
5d33ee92 954 csi_sensors[pdata->mux_id] = sensor;
d3953223
SN
955 break;
956
56bc911a 957 case FIMC_BUS_TYPE_ITU_601...FIMC_BUS_TYPE_ITU_656:
d3953223
SN
958 source = &sensor->entity;
959 pad = 0;
960 break;
961
962 default:
963 v4l2_err(&fmd->v4l2_dev, "Wrong bus_type: %x\n",
56bc911a 964 pdata->sensor_bus_type);
d3953223
SN
965 return -EINVAL;
966 }
967 if (source == NULL)
968 continue;
969
d0da3c35 970 link_mask = 1 << fimc_id++;
4af81310 971 ret = __fimc_md_create_fimc_sink_links(fmd, source, sensor,
d0da3c35 972 pad, link_mask);
4af81310
SN
973 }
974
a8697ec8 975 for (i = 0; i < CSIS_MAX_ENTITIES; i++) {
4af81310
SN
976 if (fmd->csis[i].sd == NULL)
977 continue;
978 source = &fmd->csis[i].sd->entity;
979 pad = CSIS_PAD_SOURCE;
5d33ee92 980 sensor = csi_sensors[i];
4af81310 981
d0da3c35 982 link_mask = 1 << fimc_id++;
5d33ee92 983 ret = __fimc_md_create_fimc_sink_links(fmd, source, sensor,
d0da3c35 984 pad, link_mask);
d3953223 985 }
4af81310 986
237e0265
SN
987 /* Create immutable links between each FIMC's subdev and video node */
988 flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
989 for (i = 0; i < FIMC_MAX_DEVS; i++) {
990 if (!fmd->fimc[i])
991 continue;
693f5c40 992 source = &fmd->fimc[i]->vid_cap.subdev.entity;
31d34d9b 993 sink = &fmd->fimc[i]->vid_cap.vfd.entity;
237e0265
SN
994 ret = media_entity_create_link(source, FIMC_SD_PAD_SOURCE,
995 sink, 0, flags);
996 if (ret)
997 break;
998 }
999
4af81310 1000 return __fimc_md_create_flite_source_links(fmd);
d3953223
SN
1001}
1002
1003/*
056f4f30 1004 * The peripheral sensor and CAM_BLK (PIXELASYNCMx) clocks management.
d3953223 1005 */
0e23cbbe
SN
1006static void fimc_md_put_clocks(struct fimc_md *fmd)
1007{
1008 int i = FIMC_MAX_CAMCLKS;
1009
1010 while (--i >= 0) {
1011 if (IS_ERR(fmd->camclk[i].clock))
1012 continue;
1013 clk_unprepare(fmd->camclk[i].clock);
1014 clk_put(fmd->camclk[i].clock);
1015 fmd->camclk[i].clock = ERR_PTR(-EINVAL);
1016 }
056f4f30
SN
1017
1018 /* Writeback (PIXELASYNCMx) clocks */
1019 for (i = 0; i < FIMC_MAX_WBCLKS; i++) {
1020 if (IS_ERR(fmd->wbclk[i]))
1021 continue;
1022 clk_put(fmd->wbclk[i]);
1023 fmd->wbclk[i] = ERR_PTR(-EINVAL);
1024 }
0e23cbbe
SN
1025}
1026
d3953223
SN
1027static int fimc_md_get_clocks(struct fimc_md *fmd)
1028{
0e23cbbe 1029 struct device *dev = NULL;
d3953223
SN
1030 char clk_name[32];
1031 struct clk *clock;
0e23cbbe
SN
1032 int ret, i;
1033
1034 for (i = 0; i < FIMC_MAX_CAMCLKS; i++)
1035 fmd->camclk[i].clock = ERR_PTR(-EINVAL);
1036
1037 if (fmd->pdev->dev.of_node)
1038 dev = &fmd->pdev->dev;
d3953223
SN
1039
1040 for (i = 0; i < FIMC_MAX_CAMCLKS; i++) {
1041 snprintf(clk_name, sizeof(clk_name), "sclk_cam%u", i);
0e23cbbe
SN
1042 clock = clk_get(dev, clk_name);
1043
dc3ae328 1044 if (IS_ERR(clock)) {
0e23cbbe
SN
1045 dev_err(&fmd->pdev->dev, "Failed to get clock: %s\n",
1046 clk_name);
1047 ret = PTR_ERR(clock);
1048 break;
1049 }
1050 ret = clk_prepare(clock);
1051 if (ret < 0) {
1052 clk_put(clock);
1053 fmd->camclk[i].clock = ERR_PTR(-EINVAL);
1054 break;
d3953223
SN
1055 }
1056 fmd->camclk[i].clock = clock;
1057 }
0e23cbbe
SN
1058 if (ret)
1059 fimc_md_put_clocks(fmd);
d3953223 1060
056f4f30
SN
1061 if (!fmd->use_isp)
1062 return 0;
1063 /*
1064 * For now get only PIXELASYNCM1 clock (Writeback B/ISP),
1065 * leave PIXELASYNCM0 out for the LCD Writeback driver.
1066 */
1067 fmd->wbclk[CLK_IDX_WB_A] = ERR_PTR(-EINVAL);
1068
1069 for (i = CLK_IDX_WB_B; i < FIMC_MAX_WBCLKS; i++) {
1070 snprintf(clk_name, sizeof(clk_name), "pxl_async%u", i);
1071 clock = clk_get(dev, clk_name);
1072 if (IS_ERR(clock)) {
1073 v4l2_err(&fmd->v4l2_dev, "Failed to get clock: %s\n",
1074 clk_name);
1075 ret = PTR_ERR(clock);
1076 break;
1077 }
1078 fmd->wbclk[i] = clock;
1079 }
1080 if (ret)
1081 fimc_md_put_clocks(fmd);
1082
0e23cbbe 1083 return ret;
d3953223
SN
1084}
1085
1086static int __fimc_md_set_camclk(struct fimc_md *fmd,
e3fc82e8
SN
1087 struct fimc_sensor_info *s_info,
1088 bool on)
d3953223 1089{
56bc911a 1090 struct fimc_source_info *pdata = &s_info->pdata;
d3953223
SN
1091 struct fimc_camclk_info *camclk;
1092 int ret = 0;
1093
3e20c345 1094 if (WARN_ON(pdata->clk_id >= FIMC_MAX_CAMCLKS) || !fmd || !fmd->pmf)
d3953223
SN
1095 return -EINVAL;
1096
d3953223
SN
1097 camclk = &fmd->camclk[pdata->clk_id];
1098
e3fc82e8
SN
1099 dbg("camclk %d, f: %lu, use_count: %d, on: %d",
1100 pdata->clk_id, pdata->clk_frequency, camclk->use_count, on);
d3953223
SN
1101
1102 if (on) {
1103 if (camclk->use_count > 0 &&
1104 camclk->frequency != pdata->clk_frequency)
1105 return -EINVAL;
1106
1107 if (camclk->use_count++ == 0) {
1108 clk_set_rate(camclk->clock, pdata->clk_frequency);
1109 camclk->frequency = pdata->clk_frequency;
3e20c345
SN
1110 ret = pm_runtime_get_sync(fmd->pmf);
1111 if (ret < 0)
1112 return ret;
d3953223 1113 ret = clk_enable(camclk->clock);
e3fc82e8
SN
1114 dbg("Enabled camclk %d: f: %lu", pdata->clk_id,
1115 clk_get_rate(camclk->clock));
d3953223 1116 }
d3953223
SN
1117 return ret;
1118 }
1119
1120 if (WARN_ON(camclk->use_count == 0))
1121 return 0;
1122
1123 if (--camclk->use_count == 0) {
1124 clk_disable(camclk->clock);
3e20c345 1125 pm_runtime_put(fmd->pmf);
d3953223
SN
1126 dbg("Disabled camclk %d", pdata->clk_id);
1127 }
1128 return ret;
1129}
1130
1131/**
1132 * fimc_md_set_camclk - peripheral sensor clock setup
1133 * @sd: sensor subdev to configure sclk_cam clock for
1134 * @on: 1 to enable or 0 to disable the clock
1135 *
1136 * There are 2 separate clock outputs available in the SoC for external
1137 * image processors. These clocks are shared between all registered FIMC
1138 * devices to which sensors can be attached, either directly or through
1139 * the MIPI CSI receiver. The clock is allowed here to be used by
1140 * multiple sensors concurrently if they use same frequency.
d3953223
SN
1141 * This function should only be called when the graph mutex is held.
1142 */
1143int fimc_md_set_camclk(struct v4l2_subdev *sd, bool on)
1144{
1145 struct fimc_sensor_info *s_info = v4l2_get_subdev_hostdata(sd);
1146 struct fimc_md *fmd = entity_to_fimc_mdev(&sd->entity);
1147
1148 return __fimc_md_set_camclk(fmd, s_info, on);
1149}
1150
1151static int fimc_md_link_notify(struct media_pad *source,
1152 struct media_pad *sink, u32 flags)
1153{
4af81310
SN
1154 struct fimc_lite *fimc_lite = NULL;
1155 struct fimc_dev *fimc = NULL;
0f735f52 1156 struct fimc_pipeline *pipeline;
237e0265 1157 struct v4l2_subdev *sd;
740ad921 1158 struct mutex *lock;
d3953223 1159 int ret = 0;
740ad921 1160 int ref_count;
d3953223 1161
237e0265 1162 if (media_entity_type(sink->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
d3953223
SN
1163 return 0;
1164
237e0265 1165 sd = media_entity_to_v4l2_subdev(sink->entity);
d3953223 1166
0f735f52 1167 switch (sd->grp_id) {
588c87be 1168 case GRP_ID_FLITE:
4af81310 1169 fimc_lite = v4l2_get_subdevdata(sd);
740ad921
SN
1170 if (WARN_ON(fimc_lite == NULL))
1171 return 0;
4af81310 1172 pipeline = &fimc_lite->pipeline;
740ad921 1173 lock = &fimc_lite->lock;
4af81310 1174 break;
588c87be 1175 case GRP_ID_FIMC:
0f735f52 1176 fimc = v4l2_get_subdevdata(sd);
740ad921
SN
1177 if (WARN_ON(fimc == NULL))
1178 return 0;
0f735f52 1179 pipeline = &fimc->pipeline;
740ad921 1180 lock = &fimc->lock;
0f735f52
SN
1181 break;
1182 default:
1183 return 0;
1184 }
131b6c61 1185
0f735f52 1186 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
740ad921
SN
1187 int i;
1188 mutex_lock(lock);
b9ee31e6 1189 ret = __fimc_pipeline_close(pipeline);
740ad921
SN
1190 for (i = 0; i < IDX_MAX; i++)
1191 pipeline->subdevs[i] = NULL;
1192 if (fimc)
0f735f52 1193 fimc_ctrls_delete(fimc->vid_cap.ctx);
740ad921 1194 mutex_unlock(lock);
d3953223
SN
1195 return ret;
1196 }
1197 /*
1198 * Link activation. Enable power of pipeline elements only if the
1199 * pipeline is already in use, i.e. its video node is opened.
131b6c61 1200 * Recreate the controls destroyed during the link deactivation.
d3953223 1201 */
740ad921
SN
1202 mutex_lock(lock);
1203
1204 ref_count = fimc ? fimc->vid_cap.refcnt : fimc_lite->ref_count;
1205 if (ref_count > 0)
1206 ret = __fimc_pipeline_open(pipeline, source->entity, true);
1207 if (!ret && fimc)
1208 ret = fimc_capture_ctrls_create(fimc);
1209
1210 mutex_unlock(lock);
d3953223
SN
1211 return ret ? -EPIPE : ret;
1212}
1213
1214static ssize_t fimc_md_sysfs_show(struct device *dev,
1215 struct device_attribute *attr, char *buf)
1216{
1217 struct platform_device *pdev = to_platform_device(dev);
1218 struct fimc_md *fmd = platform_get_drvdata(pdev);
1219
1220 if (fmd->user_subdev_api)
1221 return strlcpy(buf, "Sub-device API (sub-dev)\n", PAGE_SIZE);
1222
1223 return strlcpy(buf, "V4L2 video node only API (vid-dev)\n", PAGE_SIZE);
1224}
1225
1226static ssize_t fimc_md_sysfs_store(struct device *dev,
1227 struct device_attribute *attr,
1228 const char *buf, size_t count)
1229{
1230 struct platform_device *pdev = to_platform_device(dev);
1231 struct fimc_md *fmd = platform_get_drvdata(pdev);
1232 bool subdev_api;
1233 int i;
1234
1235 if (!strcmp(buf, "vid-dev\n"))
1236 subdev_api = false;
1237 else if (!strcmp(buf, "sub-dev\n"))
1238 subdev_api = true;
1239 else
1240 return count;
1241
1242 fmd->user_subdev_api = subdev_api;
1243 for (i = 0; i < FIMC_MAX_DEVS; i++)
1244 if (fmd->fimc[i])
1245 fmd->fimc[i]->vid_cap.user_subdev_api = subdev_api;
1246 return count;
1247}
1248/*
1249 * This device attribute is to select video pipeline configuration method.
1250 * There are following valid values:
1251 * vid-dev - for V4L2 video node API only, subdevice will be configured
1252 * by the host driver.
1253 * sub-dev - for media controller API, subdevs must be configured in user
1254 * space before starting streaming.
1255 */
1256static DEVICE_ATTR(subdev_conf_mode, S_IWUSR | S_IRUGO,
1257 fimc_md_sysfs_show, fimc_md_sysfs_store);
1258
4163851f
SN
1259static int fimc_md_get_pinctrl(struct fimc_md *fmd)
1260{
1261 struct device *dev = &fmd->pdev->dev;
1262 struct fimc_pinctrl *pctl = &fmd->pinctl;
1263
1264 pctl->pinctrl = devm_pinctrl_get(dev);
1265 if (IS_ERR(pctl->pinctrl))
1266 return PTR_ERR(pctl->pinctrl);
1267
1268 pctl->state_default = pinctrl_lookup_state(pctl->pinctrl,
1269 PINCTRL_STATE_DEFAULT);
1270 if (IS_ERR(pctl->state_default))
1271 return PTR_ERR(pctl->state_default);
1272
1273 pctl->state_idle = pinctrl_lookup_state(pctl->pinctrl,
1274 PINCTRL_STATE_IDLE);
1275 return 0;
1276}
1277
ecd9acbf 1278static int fimc_md_probe(struct platform_device *pdev)
d3953223 1279{
e2985a26 1280 struct device *dev = &pdev->dev;
d3953223
SN
1281 struct v4l2_device *v4l2_dev;
1282 struct fimc_md *fmd;
1283 int ret;
1284
e2985a26 1285 fmd = devm_kzalloc(dev, sizeof(*fmd), GFP_KERNEL);
d3953223
SN
1286 if (!fmd)
1287 return -ENOMEM;
1288
1289 spin_lock_init(&fmd->slock);
1290 fmd->pdev = pdev;
1291
1292 strlcpy(fmd->media_dev.model, "SAMSUNG S5P FIMC",
1293 sizeof(fmd->media_dev.model));
1294 fmd->media_dev.link_notify = fimc_md_link_notify;
e2985a26 1295 fmd->media_dev.dev = dev;
d3953223
SN
1296
1297 v4l2_dev = &fmd->v4l2_dev;
1298 v4l2_dev->mdev = &fmd->media_dev;
e1d72f4d 1299 v4l2_dev->notify = fimc_sensor_notify;
e2985a26 1300 strlcpy(v4l2_dev->name, "s5p-fimc-md", sizeof(v4l2_dev->name));
d3953223 1301
e2985a26 1302 ret = v4l2_device_register(dev, &fmd->v4l2_dev);
d3953223
SN
1303 if (ret < 0) {
1304 v4l2_err(v4l2_dev, "Failed to register v4l2_device: %d\n", ret);
6d91a51a 1305 return ret;
d3953223
SN
1306 }
1307 ret = media_device_register(&fmd->media_dev);
1308 if (ret < 0) {
1309 v4l2_err(v4l2_dev, "Failed to register media device: %d\n", ret);
693f5c40 1310 goto err_md;
d3953223
SN
1311 }
1312 ret = fimc_md_get_clocks(fmd);
1313 if (ret)
693f5c40 1314 goto err_clk;
d3953223 1315
e2985a26 1316 fmd->user_subdev_api = (dev->of_node != NULL);
693f5c40
SN
1317
1318 /* Protect the media graph while we're registering entities */
1319 mutex_lock(&fmd->media_dev.graph_mutex);
1320
4163851f
SN
1321 ret = fimc_md_get_pinctrl(fmd);
1322 if (ret < 0) {
1323 if (ret != EPROBE_DEFER)
1324 dev_err(dev, "Failed to get pinctrl: %d\n", ret);
1325 goto err_unlock;
1326 }
1327
e2985a26
SN
1328 if (dev->of_node)
1329 ret = fimc_md_register_of_platform_entities(fmd, dev->of_node);
1330 else
1331 ret = bus_for_each_dev(&platform_bus_type, NULL, fmd,
1332 fimc_md_pdev_match);
d3953223 1333 if (ret)
693f5c40 1334 goto err_unlock;
d3953223 1335
2b13f7d4 1336 if (dev->platform_data || dev->of_node) {
5cbf6f16
SN
1337 ret = fimc_md_register_sensor_entities(fmd);
1338 if (ret)
693f5c40 1339 goto err_unlock;
5cbf6f16 1340 }
e2985a26 1341
d3953223
SN
1342 ret = fimc_md_create_links(fmd);
1343 if (ret)
693f5c40 1344 goto err_unlock;
d3953223
SN
1345 ret = v4l2_device_register_subdev_nodes(&fmd->v4l2_dev);
1346 if (ret)
693f5c40 1347 goto err_unlock;
d3953223
SN
1348
1349 ret = device_create_file(&pdev->dev, &dev_attr_subdev_conf_mode);
693f5c40
SN
1350 if (ret)
1351 goto err_unlock;
1352
1353 platform_set_drvdata(pdev, fmd);
1354 mutex_unlock(&fmd->media_dev.graph_mutex);
1355 return 0;
1356
1357err_unlock:
1358 mutex_unlock(&fmd->media_dev.graph_mutex);
1359err_clk:
d3953223
SN
1360 media_device_unregister(&fmd->media_dev);
1361 fimc_md_put_clocks(fmd);
1362 fimc_md_unregister_entities(fmd);
693f5c40 1363err_md:
d3953223 1364 v4l2_device_unregister(&fmd->v4l2_dev);
d3953223
SN
1365 return ret;
1366}
1367
4c62e976 1368static int fimc_md_remove(struct platform_device *pdev)
d3953223
SN
1369{
1370 struct fimc_md *fmd = platform_get_drvdata(pdev);
1371
1372 if (!fmd)
1373 return 0;
1374 device_remove_file(&pdev->dev, &dev_attr_subdev_conf_mode);
1375 fimc_md_unregister_entities(fmd);
1376 media_device_unregister(&fmd->media_dev);
1377 fimc_md_put_clocks(fmd);
d3953223
SN
1378 return 0;
1379}
1380
e2985a26
SN
1381static struct platform_device_id fimc_driver_ids[] __always_unused = {
1382 { .name = "s5p-fimc-md" },
1383 { },
1384};
1385MODULE_DEVICE_TABLE(platform, fimc_driver_ids);
1386
1387static const struct of_device_id fimc_md_of_match[] = {
1388 { .compatible = "samsung,fimc" },
1389 { },
1390};
1391MODULE_DEVICE_TABLE(of, fimc_md_of_match);
1392
d3953223
SN
1393static struct platform_driver fimc_md_driver = {
1394 .probe = fimc_md_probe,
4c62e976 1395 .remove = fimc_md_remove,
d3953223 1396 .driver = {
e2985a26
SN
1397 .of_match_table = of_match_ptr(fimc_md_of_match),
1398 .name = "s5p-fimc-md",
1399 .owner = THIS_MODULE,
d3953223
SN
1400 }
1401};
1402
7e566be2 1403static int __init fimc_md_init(void)
d3953223
SN
1404{
1405 int ret;
ecd9acbf 1406
d3953223
SN
1407 request_module("s5p-csis");
1408 ret = fimc_register_driver();
1409 if (ret)
1410 return ret;
ecd9acbf 1411
d3953223
SN
1412 return platform_driver_register(&fimc_md_driver);
1413}
7e566be2
SK
1414
1415static void __exit fimc_md_exit(void)
d3953223
SN
1416{
1417 platform_driver_unregister(&fimc_md_driver);
1418 fimc_unregister_driver();
1419}
1420
1421module_init(fimc_md_init);
1422module_exit(fimc_md_exit);
1423
1424MODULE_AUTHOR("Sylwester Nawrocki <s.nawrocki@samsung.com>");
1425MODULE_DESCRIPTION("S5P FIMC camera host interface/video postprocessor driver");
1426MODULE_LICENSE("GPL");
1427MODULE_VERSION("2.0.1");
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