ubsan: fr30: left shift of negative value
[deliverable/binutils-gdb.git] / cpu / ChangeLog
CommitLineData
202e762b
AM
12020-01-13 Alan Modra <amodra@gmail.com>
2
3 * fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't
4 left shift signed values.
5
cc6aa1a6
AM
62020-01-06 Alan Modra <amodra@gmail.com>
7
8 * m32c.cpu (f-dsp-8-u16, f-dsp-8-s16): Rearrange to mask any sign
9 bits before shifting rather than masking after shifting.
10 (f-dsp-16-u16, f-dsp-16-s16, f-dsp-32-u16, f-dsp-32-s16): Likewise.
11 (f-dsp-40-u16, f-dsp-40-s16, f-dsp-48-u16, f-dsp-48-s16): Likewise.
12 (f-dsp-64-u16, f-dsp-8-s24): Likewise.
13 (f-bitbase32-16-s19-unprefixed): Avoid signed left shift.
14
152020-01-04 Alan Modra <amodra@gmail.com>
c9ae58fe
AM
16
17 * m32r.cpu (f-disp8): Avoid left shift of negative values.
18 (f-disp16, f-disp24): Likewise.
19
3e1056a1
AM
202019-12-23 Alan Modra <amodra@gmail.com>
21
22 * iq2000.cpu (f-offset): Avoid left shift of negative values.
23
bcd9f578
AM
242019-12-20 Alan Modra <amodra@gmail.com>
25
26 * or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values.
27
62e65990
AM
282019-12-17 Alan Modra <amodra@gmail.com>
29
30 * bpf.cpu (f-imm64): Avoid signed overflow.
31
e6ced26a
AM
322019-12-16 Alan Modra <amodra@gmail.com>
33
34 * xstormy16.cpu (f-rel12a): Avoid signed overflow.
35
1d61b032
AM
362019-12-11 Alan Modra <amodra@gmail.com>
37
38 * epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
39 * lm32.cpu (f-branch, f-vall): Likewise.
40 * m32.cpu (f-lab-8-16): Likewise.
41
b8e61daa
AM
422019-12-11 Alan Modra <amodra@gmail.com>
43
44 * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
45 shift left to avoid UB on left shift of negative values.
46
e042e6c3
JM
472019-11-20 Jose E. Marchesi <jose.marchesi@oracle.com>
48
49 * bpf.cpu: Fix comment describing the 128-bit instruction format.
50
60391a25
PB
512019-09-09 Phil Blundell <pb@pbcl.net>
52
53 binutils 2.33 branch created.
54
231097b0
JM
552019-07-19 Jose E. Marchesi <jose.marchesi@oracle.com>
56
57 * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
58 %a and %ctx.
59
3719fd55
JM
602019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com>
61
62 * bpf.cpu (dlabs): New pmacro.
63 (dlind): Likewise.
64
92434a14
JM
652019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
66
67 * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
68 explicit 'dst' argument.
69
a2e4218f
SH
702019-06-13 Stafford Horne <shorne@gmail.com>
71
72 * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
73
eb212c84
SH
742019-06-13 Stafford Horne <shorne@gmail.com>
75
76 * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
77 (l-adrp): Improve comment.
78
d3ad6278
SH
792019-06-13 Stafford Horne <shorne@gmail.com>
80
81 * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
82 SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
83 SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
84 (float-setflag-insn-base): New pmacro based on float-setflag-insn.
85 (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
86 float-setflag-unordered-symantics): New pmacro for instruction
87 symantics.
88 (float-setflag-insn): Update to use float-setflag-insn-base.
89 (float-setflag-unordered-insn): New pmacro for generating instructions.
90
6ce26ac7
SH
912019-06-13 Andrey Bacherov <avbacherov@opencores.org>
92 Stafford Horne <shorne@gmail.com>
93
94 * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
95 (ORFPX-MACHS): Removed pmacro.
96 * or1k.opc (or1k_cgen_insn_supported): New function.
97 (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
98 (parse_regpair, print_regpair): New functions.
99 * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
100 and add comments.
101 (h-fdr): Update comment to indicate or64.
102 (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
103 (h-fd32r): New hardware for 64-bit fpu registers.
104 (h-i64r): New hardware for 64-bit int registers.
105 * or1korbis.cpu (f-resv-8-1): New field.
106 * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
107 (rDDF, rADF, rBDF): Update operand comment to indicate or64.
108 (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
109 (h-roff1): New hardware.
110 (double-field-and-ops mnemonic): New pmacro to generate operations
111 rDD32F, rAD32F, rBD32F, rDDI and rADI.
112 (float-regreg-insn): Update single precision generator to MACH
113 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
114 (float-setflag-insn): Update single precision generator to MACH
115 ORFPX32-MACHS. Fix double instructions from single to double
116 precision. Add generator for or32 64-bit instructions.
117 (float-cust-insn cust-num): Update single precision generator to MACH
118 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
119 (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
120 ORFPX32-MACHS.
121 (lf-rem-d): Fix operation from mod to rem.
122 (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
123 (lf-itof-d): Fix operands from single to double.
124 (lf-ftoi-d): Update operand mode from DI to WI.
125
ea195bb0
JM
1262019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
127
128 * bpf.cpu: New file.
129 * bpf.opc: Likewise.
130
f974f26c
NC
1312018-06-24 Nick Clifton <nickc@redhat.com>
132
133 2.32 branch created.
134
07f5f4c6
RH
1352018-10-05 Richard Henderson <rth@twiddle.net>
136 Stafford Horne <shorne@gmail.com>
137
138 * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
139 (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
140 (l-mul): Fix overflow support and indentation.
141 (l-mulu): Fix overflow support and indentation.
142 (l-muld, l-muldu, l-msbu, l-macu): New instructions.
143 (l-div); Remove incorrect carry behavior.
144 (l-divu): Fix carry and overflow behavior.
145 (l-mac): Add overflow support.
146 (l-msb, l-msbu): Add carry and overflow support.
147
c8e98e36
SH
1482018-10-05 Richard Henderson <rth@twiddle.net>
149
150 * or1k.opc (parse_disp26): Add support for plta() relocations.
151 (parse_disp21): New function.
152 (or1k_rclass): New enum.
153 (or1k_rtype): New enum.
154 (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
155 (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
156 (parse_imm16): Add support for the new 21bit and 13bit relocations.
157 * or1korbis.cpu (f-disp26): Don't assume SI.
158 (f-disp21): New pc-relative 21-bit 13 shifted to right.
159 (insn-opcode): Add ADRP.
160 (l-adrp): New instruction.
161
1c4f3780
RH
1622018-10-05 Richard Henderson <rth@twiddle.net>
163
164 * or1k.opc: Add RTYPE_ enum.
165 (INVALID_STORE_RELOC): New string.
166 (or1k_imm16_relocs): New array array.
167 (parse_reloc): New static function that just does the parsing.
168 (parse_imm16): New static function for generic parsing.
169 (parse_simm16): Change to just call parse_imm16.
170 (parse_simm16_split): New function.
171 (parse_uimm16): Change to call parse_imm16.
172 (parse_uimm16_split): New function.
173 * or1korbis.cpu (simm16-split): Change to use new simm16_split.
174 (uimm16-split): Change to use new uimm16_split.
175
67ce483b
AM
1762018-07-24 Alan Modra <amodra@gmail.com>
177
178 PR 23430
179 * or1kcommon.cpu (spr-reg-indices): Fix description typo.
180
84f9f8c3
AM
1812018-05-09 Sebastian Rasmussen <sebras@gmail.com>
182
183 * or1kcommon.cpu (spr-reg-info): Typo fix.
184
a6743a54
AM
1852018-03-03 Alan Modra <amodra@gmail.com>
186
187 * frv.opc: Include opintl.h.
188 (add_next_to_vliw): Use opcodes_error_handler to print error.
189 Standardize error message.
190 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
191
faf766e3
NC
1922018-01-13 Nick Clifton <nickc@redhat.com>
193
194 2.30 branch created.
195
4ea0266c
SH
1962017-03-15 Stafford Horne <shorne@gmail.com>
197
198 * or1kcommon.cpu: Add pc set semantics to also update ppc.
199
b781683b
AM
2002016-10-06 Alan Modra <amodra@gmail.com>
201
202 * mep.opc (expand_string): Add fall through comment.
203
439baf71
AM
2042016-03-03 Alan Modra <amodra@gmail.com>
205
206 * fr30.cpu (f-m4): Replace bogus comment with a better guess
207 at what is really going on.
208
62de1c63
AM
2092016-03-02 Alan Modra <amodra@gmail.com>
210
211 * fr30.cpu (f-m4): Replace -1 << 4 with -16.
212
b89807c6
AB
2132016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
214
215 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
216 a constant to better align disassembler output.
217
018dc9be
SK
2182014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
219
220 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
221
c151b1c6
AM
2222014-06-12 Alan Modra <amodra@gmail.com>
223
224 * or1k.opc: Whitespace fixes.
225
999b995d
SK
2262014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
227
228 * or1korbis.cpu (h-atomic-reserve): New hardware.
229 (h-atomic-address): Likewise.
230 (insn-opcode): Add opcodes for LWA and SWA.
231 (atomic-reserve): New operand.
232 (atomic-address): Likewise.
233 (l-lwa, l-swa): New instructions.
234 (l-lbs): Fix typo in comment.
235 (store-insn): Clear atomic reserve on store to atomic-address.
236 Fix register names in fmt field.
237
73589c9d
CS
2382014-04-22 Christian Svensson <blue@cmd.nu>
239
240 * openrisc.cpu: Delete.
241 * openrisc.opc: Delete.
242 * or1k.cpu: New file.
243 * or1k.opc: New file.
244 * or1kcommon.cpu: New file.
245 * or1korbis.cpu: New file.
246 * or1korfpx.cpu: New file.
247
594d8fa8
MF
2482013-12-07 Mike Frysinger <vapier@gentoo.org>
249
250 * epiphany.opc: Remove +x file mode.
251
87a8d6cb
NC
2522013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
253
254 PR binutils/15241
255 * lm32.cpu (Control and status registers): Add CFG2, PSW,
256 TLBVADDR, TLBPADDR and TLBBADVADDR.
257
02a79b89
JR
2582012-11-30 Oleg Raikhman <oleg@adapteva.com>
259 Joern Rennecke <joern.rennecke@embecosm.com>
260
261 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
262 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
263 (testset-insn): Add NO_DIS attribute to t.l.
264 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
265 (move-insns): Add NO-DIS attribute to cmov.l.
266 (op-mmr-movts): Add NO-DIS attribute to movts.l.
267 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
268 (op-rrr): Add NO-DIS attribute to .l.
269 (shift-rrr): Add NO-DIS attribute to .l.
270 (op-shift-rri): Add NO-DIS attribute to i32.l.
271 (bitrl, movtl): Add NO-DIS attribute.
272 (op-iextrrr): Add NO-DIS attribute to .l
273 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
274 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
275
a597d2d3
AM
2762012-02-27 Alan Modra <amodra@gmail.com>
277
278 * mt.opc (print_dollarhex): Trim values to 32 bits.
279
5011093d
NC
2802011-12-15 Nick Clifton <nickc@redhat.com>
281
282 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
283 hosts.
284
fd936b4c
JR
2852011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
286
287 * epiphany.opc (parse_branch_addr): Fix type of valuep.
288 Cast value before printing it as a long.
289 (parse_postindex): Fix type of valuep.
290
cfb8c092
NC
2912011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
292
293 * cpu/epiphany.cpu: New file.
294 * cpu/epiphany.opc: New file.
295
dc15e575
NC
2962011-08-22 Nick Clifton <nickc@redhat.com>
297
298 * fr30.cpu: Newly contributed file.
299 * fr30.opc: Likewise.
300 * ip2k.cpu: Likewise.
301 * ip2k.opc: Likewise.
302 * mep-avc.cpu: Likewise.
303 * mep-avc2.cpu: Likewise.
304 * mep-c5.cpu: Likewise.
305 * mep-core.cpu: Likewise.
306 * mep-default.cpu: Likewise.
307 * mep-ext-cop.cpu: Likewise.
308 * mep-fmax.cpu: Likewise.
309 * mep-h1.cpu: Likewise.
310 * mep-ivc2.cpu: Likewise.
311 * mep-rhcop.cpu: Likewise.
312 * mep-sample-ucidsp.cpu: Likewise.
313 * mep.cpu: Likewise.
314 * mep.opc: Likewise.
315 * openrisc.cpu: Likewise.
316 * openrisc.opc: Likewise.
317 * xstormy16.cpu: Likewise.
318 * xstormy16.opc: Likewise.
319
9ccb8af9
AM
3202010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
321
322 * frv.opc: #undef DEBUG.
323
21375995
DD
3242010-07-03 DJ Delorie <dj@delorie.com>
325
326 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
327
5ff58fb0
DE
3282010-02-11 Doug Evans <dje@sebabeach.org>
329
330 * m32r.cpu (HASH-PREFIX): Delete.
331 (duhpo, dshpo): New pmacros.
332 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
333 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
334 attribute, define with dshpo.
335 (uimm24): Delete HASH-PREFIX attribute.
336 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
337 (print_signed_with_hash_prefix): New function.
338 (print_unsigned_with_hash_prefix): New function.
339 * xc16x.cpu (dowh): New pmacro.
340 (upof16): Define with dowh, specify print handler.
341 (qbit, qlobit, qhibit): Ditto.
342 (upag16): Ditto.
343 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
344 (print_with_dot_prefix): New functions.
345 (print_with_pof_prefix, print_with_pag_prefix): New functions.
346
3fa5b97b
DE
3472010-01-24 Doug Evans <dje@sebabeach.org>
348
349 * frv.cpu (floating-point-conversion): Update call to fp conv op.
350 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
351 conditional-floating-point-conversion, ne-floating-point-conversion,
352 float-parallel-mul-add-double-semantics): Ditto.
353
fe8afbc4
DE
3542010-01-05 Doug Evans <dje@sebabeach.org>
355
356 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
357 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
358
caaf56fb
DE
3592010-01-02 Doug Evans <dje@sebabeach.org>
360
361 * m32c.opc (parse_signed16): Fix typo.
362
91d6fa6a
NC
3632009-12-11 Nick Clifton <nickc@redhat.com>
364
365 * frv.opc: Fix shadowed variable warnings.
366 * m32c.opc: Fix shadowed variable warnings.
367
ec84cc2b
DE
3682009-11-14 Doug Evans <dje@sebabeach.org>
369
370 Must use VOID expression in VOID context.
371 * xc16x.cpu (mov4): Fix mode of `sequence'.
372 (mov9, mov10): Ditto.
373 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
374 (callr, callseg, calls, trap, rets, reti): Ditto.
375 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
376 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
377 (exts, exts1, extsr, extsr1, prior): Ditto.
378
ac1e9eca
DE
3792009-10-23 Doug Evans <dje@sebabeach.org>
380
381 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
382 cgen-ops.h -> cgen/basic-ops.h.
383
b4744b17
AM
3842009-09-25 Alan Modra <amodra@bigpond.net.au>
385
386 * m32r.cpu (stb-plus): Typo fix.
387
ab5f875d
DE
3882009-09-23 Doug Evans <dje@sebabeach.org>
389
390 * m32r.cpu (sth-plus): Fix address mode and calculation.
391 (stb-plus): Ditto.
392 (clrpsw): Fix mask calculation.
393 (bset, bclr, btst): Make mode in bit calculation match expression.
394
395 * xc16x.cpu (rtl-version): Set to 0.8.
396 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
397 make uppercase. Remove unnecessary name-prefix spec.
398 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
399 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
400 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
401 (h-cr): New hardware.
402 (muls): Comment out parts that won't compile, add fixme.
403 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
404 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
405 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
406
0aaaf7c3
DE
4072009-07-16 Doug Evans <dje@sebabeach.org>
408
409 * cpu/simplify.inc (*): One line doc strings don't need \n.
410 (df): Invoke define-full-ifield instead of claiming it's an alias.
411 (dno): Define.
412 (dnop): Mark as deprecated.
413
1998a8e0
AM
4142009-06-22 Alan Modra <amodra@bigpond.net.au>
415
416 * m32c.opc (parse_lab_5_3): Use correct enum.
417
6347aad8
HPN
4182009-01-07 Hans-Peter Nilsson <hp@axis.com>
419
420 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
421 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
422 (media-arith-sat-semantics): Explicitly sign- or zero-extend
423 arguments of "operation" to DI using "mode" and the new pmacros.
424
2c06b7a6
HPN
4252009-01-03 Hans-Peter Nilsson <hp@axis.com>
426
427 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
428 of number 2, PID.
429
84e94c90
NC
4302008-12-23 Jon Beniston <jon@beniston.com>
431
432 * lm32.cpu: New file.
433 * lm32.opc: New file.
434
90518ff4
AM
4352008-01-29 Alan Modra <amodra@bigpond.net.au>
436
437 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
438 to source.
439
a69f60de
HPN
4402007-10-22 Hans-Peter Nilsson <hp@axis.com>
441
442 * cris.cpu (movs, movu): Use result of extension operation when
443 updating flags.
444
9b201bb5
NC
4452007-07-04 Nick Clifton <nickc@redhat.com>
446
447 * cris.cpu: Update copyright notice to refer to GPLv3.
448 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
449 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
450 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
451 xc16x.opc: Likewise.
452 * iq2000.cpu: Fix copyright notice to refer to FSF.
453
53289dcd
MS
4542007-04-30 Mark Salter <msalter@sadr.localdomain>
455
456 * frv.cpu (spr-names): Support new coprocessor SPR registers.
457
f6da2ec2
NC
4582007-04-20 Nick Clifton <nickc@redhat.com>
459
460 * xc16x.cpu: Restore after accidentally overwriting this file with
461 xc16x.opc.
462
144f4bc6
DD
4632007-03-29 DJ Delorie <dj@redhat.com>
464
465 * m32c.cpu (Imm-8-s4n): Fix print hook.
466 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
467 (arith-jnz-imm4-dst-defn): Make relaxable.
468 (arith-jnz16-imm4-dst-defn): Fix encodings.
469
75b06e7b
DD
4702007-03-20 DJ Delorie <dj@redhat.com>
471
472 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
473 mem20): New.
474 (src16-16-20-An-relative-*): New.
475 (dst16-*-20-An-relative-*): New.
476 (dst16-16-16sa-*): New
477 (dst16-16-16ar-*): New
478 (dst32-16-16sa-Unprefixed-*): New
479 (jsri): Fix operands.
480 (setzx): Fix encoding.
72f4393d 481
a5da764d
AM
4822007-03-08 Alan Modra <amodra@bigpond.net.au>
483
484 * m32r.opc: Formatting.
485
b497d0b0
NC
4862006-05-22 Nick Clifton <nickc@redhat.com>
487
488 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
489
e78efa90
DD
4902006-04-10 DJ Delorie <dj@redhat.com>
491
492 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
493 decides if this function accepts symbolic constants or not.
494 (parse_signed_bitbase): Likewise.
495 (parse_unsigned_bitbase8): Pass the new parameter.
496 (parse_unsigned_bitbase11): Likewise.
497 (parse_unsigned_bitbase16): Likewise.
498 (parse_unsigned_bitbase19): Likewise.
499 (parse_unsigned_bitbase27): Likewise.
500 (parse_signed_bitbase8): Likewise.
501 (parse_signed_bitbase11): Likewise.
502 (parse_signed_bitbase19): Likewise.
72f4393d 503
8d0e2679
DD
5042006-03-13 DJ Delorie <dj@redhat.com>
505
43aa3bb1
DD
506 * m32c.cpu (Bit3-S): New.
507 (btst:s): New.
508 * m32c.opc (parse_bit3_S): New.
509
8d0e2679
DD
510 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
511 (btst): Add optional :G suffix for MACH32.
512 (or.b:S): New.
513 (pop.w:G): Add optional :G suffix for MACH16.
514 (push.b.imm): Fix syntax.
515
253d272c
DD
5162006-03-10 DJ Delorie <dj@redhat.com>
517
518 * m32c.cpu (mul.l): New.
519 (mulu.l): New.
520
c7d41dc5
NC
5212006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
522
523 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
524 an error message otherwise.
525 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
526 Fix up comments to correctly describe the functions.
527
6772dd07
DD
5282006-02-24 DJ Delorie <dj@redhat.com>
529
530 * m32c.cpu (RL_TYPE): New attribute, with macros.
531 (Lab-8-24): Add RELAX.
532 (unary-insn-defn-g, binary-arith-imm-dst-defn,
533 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
534 (binary-arith-src-dst-defn): Add 2ADDR attribute.
535 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
536 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
537 attribute.
538 (jsri16, jsri32): Add 1ADDR attribute.
539 (jsr32.w, jsr32.a): Add JUMP attribute.
72f4393d 540
d70c5fc7 5412006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
72f4393d
L
542 Anil Paranjape <anilp1@kpitcummins.com>
543 Shilin Shakti <shilins@kpitcummins.com>
d70c5fc7
NC
544
545 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
546 description.
547 * xc16x.opc: New file containing supporting XC16C routines.
548
8536c657
NC
5492006-02-10 Nick Clifton <nickc@redhat.com>
550
551 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
552
458f7770
DD
5532006-01-06 DJ Delorie <dj@redhat.com>
554
555 * m32c.cpu (mov.w:q): Fix mode.
556 (push32.b.imm): Likewise, for the comment.
557
d031aafb
NS
5582005-12-16 Nathan Sidwell <nathan@codesourcery.com>
559
560 Second part of ms1 to mt renaming.
561 * mt.cpu (define-arch, define-isa): Set name to mt.
562 (define-mach): Adjust.
563 * mt.opc (CGEN_ASM_HASH): Update.
564 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
565 (parse_loopsize, parse_imm16): Adjust.
566
eda87aba
DD
5672005-12-13 DJ Delorie <dj@redhat.com>
568
569 * m32c.cpu (jsri): Fix order so register names aren't treated as
570 symbols.
571 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
572 indexwd, indexws): Fix encodings.
573
4970f871
NS
5742005-12-12 Nathan Sidwell <nathan@codesourcery.com>
575
576 * mt.cpu: Rename from ms1.cpu.
577 * mt.opc: Rename from ms1.opc.
578
48ad8298
HPN
5792005-12-06 Hans-Peter Nilsson <hp@axis.com>
580
581 * cris.cpu (simplecris-common-writable-specregs)
582 (simplecris-common-readable-specregs): Split from
583 simplecris-common-specregs. All users changed.
584 (cris-implemented-writable-specregs-v0)
585 (cris-implemented-readable-specregs-v0): Similar from
586 cris-implemented-specregs-v0.
587 (cris-implemented-writable-specregs-v3)
588 (cris-implemented-readable-specregs-v3)
589 (cris-implemented-writable-specregs-v8)
590 (cris-implemented-readable-specregs-v8)
591 (cris-implemented-writable-specregs-v10)
592 (cris-implemented-readable-specregs-v10)
593 (cris-implemented-writable-specregs-v32)
594 (cris-implemented-readable-specregs-v32): Similar.
595 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
596 insns and specializations.
597
6f84a2a6
NS
5982005-11-08 Nathan Sidwell <nathan@codesourcery.com>
599
600 Add ms2
601 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
602 model.
603 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
604 f-cb2incr, f-rc3): New fields.
605 (LOOP): New instruction.
606 (JAL-HAZARD): New hazard.
607 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
608 New operands.
609 (mul, muli, dbnz, iflush): Enable for ms2
610 (jal, reti): Has JAL-HAZARD.
611 (ldctxt, ldfb, stfb): Only ms1.
612 (fbcb): Only ms1,ms1-003.
613 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
614 fbcbincrs, mfbcbincrs): Enable for ms2.
615 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
616 * ms1.opc (parse_loopsize): New.
617 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
618 (print_pcrel): New.
619
95b96521
DB
6202005-10-28 Dave Brolley <brolley@redhat.com>
621
622 Contribute the following change:
623 2003-09-24 Dave Brolley <brolley@redhat.com>
624
625 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
626 CGEN_ATTR_VALUE_TYPE.
627 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
628 Use cgen_bitset_intersect_p.
629
c6552317
DD
6302005-10-27 DJ Delorie <dj@redhat.com>
631
632 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
633 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
634 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
635 imm operand is needed.
636 (adjnz, sbjnz): Pass the right operands.
637 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
638 unary-insn): Add -g variants for opcodes that need to support :G.
639 (not.BW:G, push.BW:G): Call it.
640 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
641 stzx16-imm8-imm8-abs16): Fix operand typos.
642 * m32c.opc (m32c_asm_hash): Support bnCND.
643 (parse_signed4n, print_signed4n): New.
72f4393d 644
f75eb1c0
DD
6452005-10-26 DJ Delorie <dj@redhat.com>
646
647 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
648 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
649 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
650 dsp8[sp] is signed.
651 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
652 (mov.BW:S r0,r1): Fix typo r1l->r1.
653 (tst): Allow :G suffix.
654 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
655
e277c00b
AM
6562005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
657
658 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
659
92e0a941
DD
6602005-10-25 DJ Delorie <dj@redhat.com>
661
662 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
663 making one a macro of the other.
664
a1a280bb
DD
6652005-10-21 DJ Delorie <dj@redhat.com>
666
667 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
668 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
669 indexld, indexls): .w variants have `1' bit.
670 (rot32.b): QI, not SI.
671 (rot32.w): HI, not SI.
672 (xchg16): HI for .w variant.
673
e74eb924
NC
6742005-10-19 Nick Clifton <nickc@redhat.com>
675
676 * m32r.opc (parse_slo16): Fix bad application of previous patch.
677
5e03663f
NC
6782005-10-18 Andreas Schwab <schwab@suse.de>
679
680 * m32r.opc (parse_slo16): Better version of previous patch.
681
ab7c9a26
NC
6822005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
683
684 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
685 size.
686
fd54057a
DD
6872005-07-25 DJ Delorie <dj@redhat.com>
688
689 * m32c.opc (parse_unsigned8): Add %dsp8().
690 (parse_signed8): Add %hi8().
691 (parse_unsigned16): Add %dsp16().
692 (parse_signed16): Add %lo16() and %hi16().
693 (parse_lab_5_3): Make valuep a bfd_vma *.
694
85da3a56
NC
6952005-07-18 Nick Clifton <nickc@redhat.com>
696
697 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
698 components.
699 (f-lab32-jmp-s): Fix insertion sequence.
700 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
701 (Dsp-40-s8): Make parameter be signed.
702 (Dsp-40-s16): Likewise.
703 (Dsp-48-s8): Likewise.
704 (Dsp-48-s16): Likewise.
705 (Imm-13-u3): Likewise. (Despite its name!)
706 (BitBase16-16-s8): Make the parameter be unsigned.
707 (BitBase16-8-u11-S): Likewise.
708 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
709 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
710 relaxation.
711
712 * m32c.opc: Fix formatting.
713 Use safe-ctype.h instead of ctype.h
714 Move duplicated code sequences into a macro.
715 Fix compile time warnings about signedness mismatches.
716 Remove dead code.
717 (parse_lab_5_3): New parser function.
72f4393d 718
aa260854
JB
7192005-07-16 Jim Blandy <jimb@redhat.com>
720
721 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
722 to represent isa sets.
723
0a665bfd
JB
7242005-07-15 Jim Blandy <jimb@redhat.com>
725
726 * m32c.cpu, m32c.opc: Fix copyright.
727
49f58d10
JB
7282005-07-14 Jim Blandy <jimb@redhat.com>
729
730 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
731
0e6b69be
AM
7322005-07-14 Alan Modra <amodra@bigpond.net.au>
733
734 * ms1.opc (print_dollarhex): Correct format string.
735
f9210e37
AM
7362005-07-06 Alan Modra <amodra@bigpond.net.au>
737
738 * iq2000.cpu: Include from binutils cpu dir.
739
3ec2b351
NC
7402005-07-05 Nick Clifton <nickc@redhat.com>
741
742 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
743 unsigned in order to avoid compile time warnings about sign
744 conflicts.
745
746 * ms1.opc (parse_*): Likewise.
747 (parse_imm16): Use a "void *" as it is passed both signed and
748 unsigned arguments.
749
47b0e7ad
NC
7502005-07-01 Nick Clifton <nickc@redhat.com>
751
752 * frv.opc: Update to ISO C90 function declaration style.
753 * iq2000.opc: Likewise.
754 * m32r.opc: Likewise.
755 * sh.opc: Likewise.
756
b081650b
DB
7572005-06-15 Dave Brolley <brolley@redhat.com>
758
759 Contributed by Red Hat.
760 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
761 * ms1.opc: New file. Written by Stan Cox.
762
e172dbf8
NC
7632005-05-10 Nick Clifton <nickc@redhat.com>
764
765 * Update the address and phone number of the FSF organization in
766 the GPL notices in the following files:
767 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
768 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
769 sh64-media.cpu, simplify.inc
770
b2d52a48
AM
7712005-02-24 Alan Modra <amodra@bigpond.net.au>
772
773 * frv.opc (parse_A): Warning fix.
774
33b71eeb
NC
7752005-02-23 Nick Clifton <nickc@redhat.com>
776
777 * frv.opc: Fixed compile time warnings about differing signed'ness
778 of pointers passed to functions.
779 * m32r.opc: Likewise.
780
bc18c937
NC
7812005-02-11 Nick Clifton <nickc@redhat.com>
782
783 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
784 'bfd_vma *' in order avoid compile time warning message.
785
46da9a19
HPN
7862005-01-28 Hans-Peter Nilsson <hp@axis.com>
787
788 * cris.cpu (mstep): Add missing insn.
789
90219bd0
AO
7902005-01-25 Alexandre Oliva <aoliva@redhat.com>
791
792 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
793 * frv.cpu: Add support for TLS annotations in loads and calll.
794 * frv.opc (parse_symbolic_address): New.
795 (parse_ldd_annotation): New.
796 (parse_call_annotation): New.
797 (parse_ld_annotation): New.
798 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
799 Introduce TLS relocations.
800 (parse_d12, parse_s12, parse_u12): Likewise.
801 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
802 (parse_call_label, print_at): New.
803
c3d75c30
HPN
8042004-12-21 Mikael Starvik <starvik@axis.com>
805
806 * cris.cpu (cris-set-mem): Correct integral write semantics.
807
68800d83
HPN
8082004-11-29 Hans-Peter Nilsson <hp@axis.com>
809
810 * cris.cpu: New file.
811
4bd1d37b
NC
8122004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
813
814 * iq2000.cpu: Added quotes around macro arguments so that they
815 will work with newer versions of guile.
816
4030fa5a
NC
8172004-10-27 Nick Clifton <nickc@redhat.com>
818
819 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
820 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
821 operand.
822 * iq2000.cpu (dnop index): Rename to _index to avoid complications
823 with guile.
824
ac28a1cb
RS
8252004-08-27 Richard Sandiford <rsandifo@redhat.com>
826
827 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
828
dc4c54bb
NC
8292004-05-15 Nick Clifton <nickc@redhat.com>
830
831 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
832
f4453dfa
NC
8332004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
834
835 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
836
676a64f4
RS
8372004-03-01 Richard Sandiford <rsandifo@redhat.com>
838
839 * frv.cpu (define-arch frv): Add fr450 mach.
840 (define-mach fr450): New.
841 (define-model fr450): New. Add profile units to every fr450 insn.
842 (define-attr UNIT): Add MDCUTSSI.
843 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
844 (define-attr AUDIO): New boolean.
845 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
846 (f-LRA-null, f-TLBPR-null): New fields.
847 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
848 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
849 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
850 (LRA-null, TLBPR-null): New macros.
851 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
852 (load-real-address): New macro.
853 (lrai, lrad, tlbpr): New instructions.
854 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
855 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
856 (mdcutssi): Change UNIT attribute to MDCUTSSI.
857 (media-low-clear-semantics, media-scope-limit-semantics)
858 (media-quad-limit, media-quad-shift): New macros.
859 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
860 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
861 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
862 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
863 (fr450_unit_mapping): New array.
864 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
865 for new MDCUTSSI unit.
866 (fr450_check_insn_major_constraints): New function.
867 (check_insn_major_constraints): Use it.
868
c7a48b9a
RS
8692004-03-01 Richard Sandiford <rsandifo@redhat.com>
870
871 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
872 (scutss): Change unit to I0.
873 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
874 (mqsaths): Fix FR400-MAJOR categorization.
875 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
876 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
877 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
878 combinations.
879
8ae0baa2
RS
8802004-03-01 Richard Sandiford <rsandifo@redhat.com>
881
882 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
883 (rstb, rsth, rst, rstd, rstq): Delete.
884 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
885
8ee9a8b2
NC
8862004-02-23 Nick Clifton <nickc@redhat.com>
887
888 * Apply these patches from Renesas:
889
890 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
891
892 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
893 disassembling codes for 0x*2 addresses.
894
895 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
896
897 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
898
899 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
900
901 * cpu/m32r.cpu : Add new model m32r2.
902 Add new instructions.
903 Replace occurrances of 'Mitsubishi' with 'Renesas'.
904 Changed PIPE attr of push from O to OS.
905 Care for Little-endian of M32R.
906 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
907 Care for Little-endian of M32R.
908 (parse_slo16): signed extension for value.
909
299d901c
AC
9102004-02-20 Andrew Cagney <cagney@redhat.com>
911
e866a257
AC
912 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
913 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
914
299d901c
AC
915 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
916 written by Ben Elliston.
917
cb10e79a
RS
9182004-01-14 Richard Sandiford <rsandifo@redhat.com>
919
920 * frv.cpu (UNIT): Add IACC.
921 (iacc-multiply-r-r): Use it.
922 * frv.opc (fr400_unit_mapping): Add entry for IACC.
923 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
924
d4e4dc14
AO
9252004-01-06 Alexandre Oliva <aoliva@redhat.com>
926
927 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
928 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
929 cut&paste errors in shifting/truncating numerical operands.
930 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
931 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
932 (parse_uslo16): Likewise.
933 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
934 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
935 (parse_s12): Likewise.
936 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
937 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
938 (parse_uslo16): Likewise.
939 (parse_uhi16): Parse gothi and gotfuncdeschi.
940 (parse_d12): Parse got12 and gotfuncdesc12.
941 (parse_s12): Likewise.
942
1340b9a9
DB
9432003-10-10 Dave Brolley <brolley@redhat.com>
944
945 * frv.cpu (dnpmop): New p-macro.
946 (GRdoublek): Use dnpmop.
947 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
948 (store-double-r-r): Use (.sym regtype doublek).
949 (r-store-double): Ditto.
950 (store-double-r-r-u): Ditto.
951 (conditional-store-double): Ditto.
952 (conditional-store-double-u): Ditto.
953 (store-double-r-simm): Ditto.
954 (fmovs): Assign to UNIT FMALL.
955
ac7c07ac
DB
9562003-10-06 Dave Brolley <brolley@redhat.com>
957
958 * frv.cpu, frv.opc: Add support for fr550.
959
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9602003-09-24 Dave Brolley <brolley@redhat.com>
961
962 * frv.cpu (u-commit): New modelling unit for fr500.
963 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
964 (commit-r): Use u-commit model for fr500.
965 (commit): Ditto.
966 (conditional-float-binary-op): Take profiling data as an argument.
967 Update callers.
968 (ne-float-binary-op): Ditto.
969
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9702003-09-19 Michael Snyder <msnyder@redhat.com>
971
972 * frv.cpu (nldqi): Delete unimplemented instruction.
973
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9742003-09-12 Dave Brolley <brolley@redhat.com>
975
976 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
977 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
978 frv_ref_SI to get input register referenced for profiling.
979 (clear-ne-flag-all): Pass insn profiling in as an argument.
980 (clrgr,clrfr,clrga,clrfa): Add profiling information.
981
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MS
9822003-09-11 Michael Snyder <msnyder@redhat.com>
983
984 * frv.cpu: Typographical corrections.
985
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9862003-09-09 Dave Brolley <brolley@redhat.com>
987
988 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
989 (conditional-media-dual-complex, media-quad-complex): Likewise.
990
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9912003-09-04 Dave Brolley <brolley@redhat.com>
992
993 * frv.cpu (register-transfer): Pass in all attributes in on argument.
994 Update all callers.
995 (conditional-register-transfer): Ditto.
996 (cache-preload): Ditto.
997 (floating-point-conversion): Ditto.
998 (floating-point-neg): Ditto.
999 (float-abs): Ditto.
1000 (float-binary-op-s): Ditto.
1001 (conditional-float-binary-op): Ditto.
1002 (ne-float-binary-op): Ditto.
1003 (float-dual-arith): Ditto.
1004 (ne-float-dual-arith): Ditto.
1005
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10062003-09-03 Dave Brolley <brolley@redhat.com>
1007
1008 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
1009 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
1010 MCLRACC-1.
1011 (A): Removed operand.
1012 (A0,A1): New operands replace operand A.
1013 (mnop): Now a real insn
1014 (mclracc): Removed insn.
1015 (mclracc-0, mclracc-1): New insns replace mclracc.
1016 (all insns): Use new UNIT attributes.
1017
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10182003-08-21 Nick Clifton <nickc@redhat.com>
1019
1020 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
1021 and u-media-dual-btoh with output parameter.
1022 (cmbtoh): Add profiling hack.
1023
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NC
10242003-08-19 Michael Snyder <msnyder@redhat.com>
1025
1026 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
1027
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10282003-06-10 Doug Evans <dje@sebabeach.org>
1029
1030 * frv.cpu: Add IDOC attribute.
1031
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10322003-06-06 Andrew Cagney <cagney@redhat.com>
1033
1034 Contributed by Red Hat.
1035 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
1036 Stan Cox, and Frank Ch. Eigler.
1037 * iq2000.opc: New file. Written by Ben Elliston, Frank
1038 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
1039 * iq2000m.cpu: New file. Written by Jeff Johnston.
1040 * iq10.cpu: New file. Written by Jeff Johnston.
1041
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10422003-06-05 Nick Clifton <nickc@redhat.com>
1043
1044 * frv.cpu (FRintieven): New operand. An even-numbered only
1045 version of the FRinti operand.
1046 (FRintjeven): Likewise for FRintj.
1047 (FRintkeven): Likewise for FRintk.
1048 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1049 media-quad-arith-sat-semantics, media-quad-arith-sat,
1050 conditional-media-quad-arith-sat, mdunpackh,
1051 media-quad-multiply-semantics, media-quad-multiply,
1052 conditional-media-quad-multiply, media-quad-complex-i,
1053 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1054 conditional-media-quad-multiply-acc, munpackh,
1055 media-quad-multiply-cross-acc-semantics, mdpackh,
1056 media-quad-multiply-cross-acc, mbtoh-semantics,
1057 media-quad-cross-multiply-cross-acc-semantics,
1058 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1059 media-quad-cross-multiply-acc-semantics, cmbtoh,
1060 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1061 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1062 cmhtob): Use new operands.
1063 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
0e6b69be 1064 (parse_even_register): New function.
36c3ae24 1065
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10662003-06-03 Nick Clifton <nickc@redhat.com>
1067
1068 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1069 immediate value not unsigned.
1070
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10712003-06-03 Andrew Cagney <cagney@redhat.com>
1072
1073 Contributed by Red Hat.
1074 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
1075 and Eric Christopher.
1076 * frv.opc: New file. Written by Catherine Moore, and Dave
1077 Brolley.
1078 * simplify.inc: New file. Written by Doug Evans.
1079
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10802003-05-02 Andrew Cagney <cagney@redhat.com>
1081
1082 * New file.
1083
1084\f
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1085Copyright (C) 2003-2012 Free Software Foundation, Inc.
1086
1087Copying and distribution of this file, with or without modification,
1088are permitted in any medium without royalty provided the copyright
1089notice and this notice are preserved.
1090
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1091Local Variables:
1092mode: change-log
1093left-margin: 8
1094fill-column: 74
1095version-control: never
1096End:
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