[media] exynos4-is: Do not use asynchronous runtime PM in release fop
[deliverable/linux.git] / drivers / media / platform / exynos4-is / media-dev.c
CommitLineData
d3953223
SN
1/*
2 * S5P/EXYNOS4 SoC series camera host interface media device driver
3 *
7b43a6f3
SN
4 * Copyright (C) 2011 - 2012 Samsung Electronics Co., Ltd.
5 * Sylwester Nawrocki <s.nawrocki@samsung.com>
d3953223
SN
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published
9 * by the Free Software Foundation, either version 2 of the License,
10 * or (at your option) any later version.
11 */
12
13#include <linux/bug.h>
14#include <linux/device.h>
15#include <linux/errno.h>
16#include <linux/i2c.h>
17#include <linux/kernel.h>
18#include <linux/list.h>
19#include <linux/module.h>
e2985a26
SN
20#include <linux/of.h>
21#include <linux/of_platform.h>
22#include <linux/of_device.h>
23#include <linux/of_i2c.h>
d3953223
SN
24#include <linux/platform_device.h>
25#include <linux/pm_runtime.h>
26#include <linux/types.h>
27#include <linux/slab.h>
131b6c61 28#include <media/v4l2-ctrls.h>
e2985a26 29#include <media/v4l2-of.h>
d3953223 30#include <media/media-device.h>
b9ee31e6 31#include <media/s5p_fimc.h>
d3953223 32
56fa1a6a 33#include "media-dev.h"
d3953223 34#include "fimc-core.h"
e781bbe3 35#include "fimc-is.h"
0f735f52 36#include "fimc-lite.h"
d3953223
SN
37#include "mipi-csis.h"
38
39static int __fimc_md_set_camclk(struct fimc_md *fmd,
4c8f0629 40 struct fimc_source_info *si,
d3953223
SN
41 bool on);
42/**
43 * fimc_pipeline_prepare - update pipeline information with subdevice pointers
39bb6df6 44 * @me: media entity terminating the pipeline
d3953223
SN
45 *
46 * Caller holds the graph mutex.
47 */
b9ee31e6
SN
48static void fimc_pipeline_prepare(struct fimc_pipeline *p,
49 struct media_entity *me)
d3953223 50{
d3953223 51 struct v4l2_subdev *sd;
0f735f52 52 int i;
d3953223 53
0f735f52
SN
54 for (i = 0; i < IDX_MAX; i++)
55 p->subdevs[i] = NULL;
d3953223 56
0f735f52 57 while (1) {
39bb6df6
SN
58 struct media_pad *pad = NULL;
59
60 /* Find remote source pad */
61 for (i = 0; i < me->num_pads; i++) {
62 struct media_pad *spad = &me->pads[i];
63 if (!(spad->flags & MEDIA_PAD_FL_SINK))
64 continue;
1bddf1b3 65 pad = media_entity_remote_pad(spad);
39bb6df6
SN
66 if (pad)
67 break;
68 }
0f735f52 69
0f735f52
SN
70 if (pad == NULL ||
71 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
72 break;
0f735f52
SN
73 sd = media_entity_to_v4l2_subdev(pad->entity);
74
75 switch (sd->grp_id) {
588c87be
SN
76 case GRP_ID_FIMC_IS_SENSOR:
77 case GRP_ID_SENSOR:
0f735f52
SN
78 p->subdevs[IDX_SENSOR] = sd;
79 break;
588c87be 80 case GRP_ID_CSIS:
0f735f52
SN
81 p->subdevs[IDX_CSIS] = sd;
82 break;
588c87be 83 case GRP_ID_FLITE:
4af81310
SN
84 p->subdevs[IDX_FLITE] = sd;
85 break;
588c87be 86 case GRP_ID_FIMC:
0f735f52
SN
87 /* No need to control FIMC subdev through subdev ops */
88 break;
e781bbe3
SN
89 case GRP_ID_FIMC_IS:
90 p->subdevs[IDX_IS_ISP] = sd;
91 break;
0f735f52 92 default:
e781bbe3 93 break;
0f735f52 94 }
39bb6df6
SN
95 me = &sd->entity;
96 if (me->num_pads == 1)
97 break;
d3953223
SN
98 }
99}
100
101/**
102 * __subdev_set_power - change power state of a single subdev
103 * @sd: subdevice to change power state for
104 * @on: 1 to enable power or 0 to disable
105 *
106 * Return result of s_power subdev operation or -ENXIO if sd argument
107 * is NULL. Return 0 if the subdevice does not implement s_power.
108 */
109static int __subdev_set_power(struct v4l2_subdev *sd, int on)
110{
111 int *use_count;
112 int ret;
113
114 if (sd == NULL)
115 return -ENXIO;
116
117 use_count = &sd->entity.use_count;
118 if (on && (*use_count)++ > 0)
119 return 0;
120 else if (!on && (*use_count == 0 || --(*use_count) > 0))
121 return 0;
122 ret = v4l2_subdev_call(sd, core, s_power, on);
123
124 return ret != -ENOIOCTLCMD ? ret : 0;
125}
126
127/**
128 * fimc_pipeline_s_power - change power state of all pipeline subdevs
129 * @fimc: fimc device terminating the pipeline
0f735f52 130 * @state: true to power on, false to power off
d3953223 131 *
0f735f52 132 * Needs to be called with the graph mutex held.
d3953223 133 */
f8bca4f5 134static int fimc_pipeline_s_power(struct fimc_pipeline *p, bool on)
d3953223 135{
f8bca4f5
SN
136 static const u8 seq[2][IDX_MAX - 1] = {
137 { IDX_IS_ISP, IDX_SENSOR, IDX_CSIS, IDX_FLITE },
138 { IDX_CSIS, IDX_FLITE, IDX_SENSOR, IDX_IS_ISP },
139 };
140 int i, ret = 0;
d3953223 141
0f735f52 142 if (p->subdevs[IDX_SENSOR] == NULL)
d3953223
SN
143 return -ENXIO;
144
f8bca4f5
SN
145 for (i = 0; i < IDX_MAX - 1; i++) {
146 unsigned int idx = seq[on][i];
147
148 ret = __subdev_set_power(p->subdevs[idx], on);
149
0f735f52 150
0f735f52 151 if (ret < 0 && ret != -ENXIO)
f8bca4f5 152 goto error;
d3953223 153 }
0f735f52 154 return 0;
f8bca4f5
SN
155error:
156 for (; i >= 0; i--) {
157 unsigned int idx = seq[on][i];
158 __subdev_set_power(p->subdevs[idx], !on);
159 }
160 return ret;
d3953223
SN
161}
162
163/**
b9ee31e6
SN
164 * __fimc_pipeline_open - update the pipeline information, enable power
165 * of all pipeline subdevs and the sensor clock
d3953223 166 * @me: media entity to start graph walk with
056f4f30 167 * @prepare: true to walk the current pipeline and acquire all subdevs
d3953223 168 *
740ad921 169 * Called with the graph mutex held.
d3953223 170 */
b9ee31e6 171static int __fimc_pipeline_open(struct fimc_pipeline *p,
056f4f30 172 struct media_entity *me, bool prepare)
d3953223 173{
056f4f30
SN
174 struct fimc_md *fmd = entity_to_fimc_mdev(me);
175 struct v4l2_subdev *sd;
d3953223
SN
176 int ret;
177
056f4f30
SN
178 if (WARN_ON(p == NULL || me == NULL))
179 return -EINVAL;
180
181 if (prepare)
0f735f52
SN
182 fimc_pipeline_prepare(p, me);
183
056f4f30
SN
184 sd = p->subdevs[IDX_SENSOR];
185 if (sd == NULL)
d3953223 186 return -EINVAL;
0f735f52 187
056f4f30
SN
188 /* Disable PXLASYNC clock if this pipeline includes FIMC-IS */
189 if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) {
190 ret = clk_prepare_enable(fmd->wbclk[CLK_IDX_WB_B]);
191 if (ret < 0)
192 return ret;
193 }
194 ret = fimc_md_set_camclk(sd, true);
195 if (ret < 0)
196 goto err_wbclk;
197
198 ret = fimc_pipeline_s_power(p, 1);
199 if (!ret)
200 return 0;
0f735f52 201
056f4f30
SN
202 fimc_md_set_camclk(sd, false);
203
204err_wbclk:
205 if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP])
206 clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
207
208 return ret;
d3953223
SN
209}
210
d3953223 211/**
b9ee31e6 212 * __fimc_pipeline_close - disable the sensor clock and pipeline power
d3953223
SN
213 * @fimc: fimc device terminating the pipeline
214 *
740ad921 215 * Disable power of all subdevs and turn the external sensor clock off.
d3953223 216 */
b9ee31e6 217static int __fimc_pipeline_close(struct fimc_pipeline *p)
d3953223 218{
056f4f30
SN
219 struct v4l2_subdev *sd = p ? p->subdevs[IDX_SENSOR] : NULL;
220 struct fimc_md *fmd;
d3953223
SN
221 int ret = 0;
222
056f4f30 223 if (WARN_ON(sd == NULL))
740ad921
SN
224 return -EINVAL;
225
0f735f52
SN
226 if (p->subdevs[IDX_SENSOR]) {
227 ret = fimc_pipeline_s_power(p, 0);
056f4f30 228 fimc_md_set_camclk(sd, false);
d3953223 229 }
056f4f30
SN
230
231 fmd = entity_to_fimc_mdev(&sd->entity);
232
233 /* Disable PXLASYNC clock if this pipeline includes FIMC-IS */
234 if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP])
235 clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
236
d3953223
SN
237 return ret == -ENXIO ? 0 : ret;
238}
239
d3953223 240/**
8d274e7c 241 * __fimc_pipeline_s_stream - call s_stream() on pipeline subdevs
0f735f52 242 * @pipeline: video pipeline structure
8d274e7c 243 * @on: passed as the s_stream() callback argument
d3953223 244 */
740ad921 245static int __fimc_pipeline_s_stream(struct fimc_pipeline *p, bool on)
d3953223 246{
8d274e7c
SN
247 static const u8 seq[2][IDX_MAX] = {
248 { IDX_FIMC, IDX_SENSOR, IDX_IS_ISP, IDX_CSIS, IDX_FLITE },
249 { IDX_CSIS, IDX_FLITE, IDX_FIMC, IDX_SENSOR, IDX_IS_ISP },
250 };
251 int i, ret = 0;
d3953223 252
0f735f52 253 if (p->subdevs[IDX_SENSOR] == NULL)
d3953223
SN
254 return -ENODEV;
255
0f735f52 256 for (i = 0; i < IDX_MAX; i++) {
8d274e7c 257 unsigned int idx = seq[on][i];
0f735f52
SN
258
259 ret = v4l2_subdev_call(p->subdevs[idx], video, s_stream, on);
260
261 if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV)
8d274e7c 262 goto error;
0f735f52 263 }
0f735f52 264 return 0;
8d274e7c
SN
265error:
266 for (; i >= 0; i--) {
267 unsigned int idx = seq[on][i];
268 v4l2_subdev_call(p->subdevs[idx], video, s_stream, !on);
269 }
270 return ret;
d3953223 271}
b9ee31e6
SN
272
273/* Media pipeline operations for the FIMC/FIMC-LITE video device driver */
274static const struct fimc_pipeline_ops fimc_pipeline_ops = {
740ad921
SN
275 .open = __fimc_pipeline_open,
276 .close = __fimc_pipeline_close,
277 .set_stream = __fimc_pipeline_s_stream,
b9ee31e6 278};
d3953223
SN
279
280/*
281 * Sensor subdevice helper functions
282 */
283static struct v4l2_subdev *fimc_md_register_sensor(struct fimc_md *fmd,
4c8f0629 284 struct fimc_source_info *si)
d3953223
SN
285{
286 struct i2c_adapter *adapter;
287 struct v4l2_subdev *sd = NULL;
288
4c8f0629 289 if (!si || !fmd)
d3953223 290 return NULL;
88fa8311
SN
291 /*
292 * If FIMC bus type is not Writeback FIFO assume it is same
293 * as sensor_bus_type.
294 */
4c8f0629 295 si->fimc_bus_type = si->sensor_bus_type;
d3953223 296
4c8f0629 297 adapter = i2c_get_adapter(si->i2c_bus_num);
ecd9acbf
SN
298 if (!adapter) {
299 v4l2_warn(&fmd->v4l2_dev,
300 "Failed to get I2C adapter %d, deferring probe\n",
4c8f0629 301 si->i2c_bus_num);
ecd9acbf
SN
302 return ERR_PTR(-EPROBE_DEFER);
303 }
d3953223 304 sd = v4l2_i2c_new_subdev_board(&fmd->v4l2_dev, adapter,
4c8f0629 305 si->board_info, NULL);
d3953223 306 if (IS_ERR_OR_NULL(sd)) {
7acde02a 307 i2c_put_adapter(adapter);
ecd9acbf
SN
308 v4l2_warn(&fmd->v4l2_dev,
309 "Failed to acquire subdev %s, deferring probe\n",
4c8f0629 310 si->board_info->type);
ecd9acbf 311 return ERR_PTR(-EPROBE_DEFER);
d3953223 312 }
4c8f0629 313 v4l2_set_subdev_hostdata(sd, si);
588c87be 314 sd->grp_id = GRP_ID_SENSOR;
d3953223
SN
315
316 v4l2_info(&fmd->v4l2_dev, "Registered sensor subdevice %s\n",
2b13f7d4 317 sd->name);
d3953223
SN
318 return sd;
319}
320
321static void fimc_md_unregister_sensor(struct v4l2_subdev *sd)
322{
323 struct i2c_client *client = v4l2_get_subdevdata(sd);
7acde02a 324 struct i2c_adapter *adapter;
d3953223
SN
325
326 if (!client)
327 return;
e781bbe3 328
d3953223 329 v4l2_device_unregister_subdev(sd);
2b13f7d4
SN
330
331 if (!client->dev.of_node) {
332 adapter = client->adapter;
333 i2c_unregister_device(client);
334 if (adapter)
335 i2c_put_adapter(adapter);
336 }
d3953223
SN
337}
338
e2985a26 339#ifdef CONFIG_OF
2b13f7d4
SN
340/* Register I2C client subdev associated with @node. */
341static int fimc_md_of_add_sensor(struct fimc_md *fmd,
342 struct device_node *node, int index)
343{
344 struct fimc_sensor_info *si;
345 struct i2c_client *client;
346 struct v4l2_subdev *sd;
347 int ret;
348
349 if (WARN_ON(index >= ARRAY_SIZE(fmd->sensor)))
350 return -EINVAL;
351 si = &fmd->sensor[index];
352
353 client = of_find_i2c_device_by_node(node);
354 if (!client)
355 return -EPROBE_DEFER;
356
357 device_lock(&client->dev);
358
359 if (!client->driver ||
360 !try_module_get(client->driver->driver.owner)) {
361 ret = -EPROBE_DEFER;
362 v4l2_info(&fmd->v4l2_dev, "No driver found for %s\n",
363 node->full_name);
364 goto dev_put;
365 }
366
367 /* Enable sensor's master clock */
4c8f0629 368 ret = __fimc_md_set_camclk(fmd, &si->pdata, true);
2b13f7d4
SN
369 if (ret < 0)
370 goto mod_put;
371 sd = i2c_get_clientdata(client);
372
373 ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
4c8f0629 374 __fimc_md_set_camclk(fmd, &si->pdata, false);
2b13f7d4
SN
375 if (ret < 0)
376 goto mod_put;
377
4c8f0629 378 v4l2_set_subdev_hostdata(sd, &si->pdata);
e781bbe3
SN
379 if (si->pdata.fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK)
380 sd->grp_id = GRP_ID_FIMC_IS_SENSOR;
381 else
382 sd->grp_id = GRP_ID_SENSOR;
383
2b13f7d4
SN
384 si->subdev = sd;
385 v4l2_info(&fmd->v4l2_dev, "Registered sensor subdevice: %s (%d)\n",
386 sd->name, fmd->num_sensors);
387 fmd->num_sensors++;
388
389mod_put:
390 module_put(client->driver->driver.owner);
391dev_put:
392 device_unlock(&client->dev);
393 put_device(&client->dev);
394 return ret;
395}
396
397/* Parse port node and register as a sub-device any sensor specified there. */
398static int fimc_md_parse_port_node(struct fimc_md *fmd,
399 struct device_node *port,
400 unsigned int index)
401{
402 struct device_node *rem, *ep, *np;
403 struct fimc_source_info *pd;
404 struct v4l2_of_endpoint endpoint;
405 int ret;
406 u32 val;
407
408 pd = &fmd->sensor[index].pdata;
409
410 /* Assume here a port node can have only one endpoint node. */
411 ep = of_get_next_child(port, NULL);
412 if (!ep)
413 return 0;
414
415 v4l2_of_parse_endpoint(ep, &endpoint);
416 if (WARN_ON(endpoint.port == 0) || index >= FIMC_MAX_SENSORS)
417 return -EINVAL;
418
419 pd->mux_id = (endpoint.port - 1) & 0x1;
420
421 rem = v4l2_of_get_remote_port_parent(ep);
422 of_node_put(ep);
423 if (rem == NULL) {
424 v4l2_info(&fmd->v4l2_dev, "Remote device at %s not found\n",
425 ep->full_name);
426 return 0;
427 }
428 if (!of_property_read_u32(rem, "samsung,camclk-out", &val))
429 pd->clk_id = val;
430
431 if (!of_property_read_u32(rem, "clock-frequency", &val))
432 pd->clk_frequency = val;
433
434 if (pd->clk_frequency == 0) {
435 v4l2_err(&fmd->v4l2_dev, "Wrong clock frequency at node %s\n",
436 rem->full_name);
437 of_node_put(rem);
438 return -EINVAL;
439 }
440
441 if (fimc_input_is_parallel(endpoint.port)) {
442 if (endpoint.bus_type == V4L2_MBUS_PARALLEL)
443 pd->sensor_bus_type = FIMC_BUS_TYPE_ITU_601;
444 else
445 pd->sensor_bus_type = FIMC_BUS_TYPE_ITU_656;
446 pd->flags = endpoint.bus.parallel.flags;
447 } else if (fimc_input_is_mipi_csi(endpoint.port)) {
448 /*
449 * MIPI CSI-2: only input mux selection and
450 * the sensor's clock frequency is needed.
451 */
452 pd->sensor_bus_type = FIMC_BUS_TYPE_MIPI_CSI2;
453 } else {
454 v4l2_err(&fmd->v4l2_dev, "Wrong port id (%u) at node %s\n",
455 endpoint.port, rem->full_name);
456 }
457 /*
458 * For FIMC-IS handled sensors, that are placed under i2c-isp device
459 * node, FIMC is connected to the FIMC-IS through its ISP Writeback
460 * input. Sensors are attached to the FIMC-LITE hostdata interface
461 * directly or through MIPI-CSIS, depending on the external media bus
462 * used. This needs to be handled in a more reliable way, not by just
463 * checking parent's node name.
464 */
465 np = of_get_parent(rem);
466
467 if (np && !of_node_cmp(np->name, "i2c-isp"))
468 pd->fimc_bus_type = FIMC_BUS_TYPE_ISP_WRITEBACK;
469 else
470 pd->fimc_bus_type = pd->sensor_bus_type;
471
472 ret = fimc_md_of_add_sensor(fmd, rem, index);
473 of_node_put(rem);
474
475 return ret;
476}
477
478/* Register all SoC external sub-devices */
479static int fimc_md_of_sensors_register(struct fimc_md *fmd,
480 struct device_node *np)
481{
482 struct device_node *parent = fmd->pdev->dev.of_node;
483 struct device_node *node, *ports;
484 int index = 0;
485 int ret;
486
487 /* Attach sensors linked to MIPI CSI-2 receivers */
488 for_each_available_child_of_node(parent, node) {
489 struct device_node *port;
490
491 if (of_node_cmp(node->name, "csis"))
492 continue;
493 /* The csis node can have only port subnode. */
494 port = of_get_next_child(node, NULL);
495 if (!port)
496 continue;
497
498 ret = fimc_md_parse_port_node(fmd, port, index);
499 if (ret < 0)
500 return ret;
501 index++;
502 }
503
504 /* Attach sensors listed in the parallel-ports node */
505 ports = of_get_child_by_name(parent, "parallel-ports");
506 if (!ports)
507 return 0;
508
509 for_each_child_of_node(ports, node) {
510 ret = fimc_md_parse_port_node(fmd, node, index);
511 if (ret < 0)
512 break;
513 index++;
514 }
515
516 return 0;
517}
518
e2985a26
SN
519static int __of_get_csis_id(struct device_node *np)
520{
521 u32 reg = 0;
522
523 np = of_get_child_by_name(np, "port");
524 if (!np)
525 return -EINVAL;
526 of_property_read_u32(np, "reg", &reg);
527 return reg - FIMC_INPUT_MIPI_CSI2_0;
528}
529#else
2b13f7d4 530#define fimc_md_of_sensors_register(fmd, np) (-ENOSYS)
e2985a26
SN
531#define __of_get_csis_id(np) (-ENOSYS)
532#endif
533
d3953223
SN
534static int fimc_md_register_sensor_entities(struct fimc_md *fmd)
535{
536 struct s5p_platform_fimc *pdata = fmd->pdev->dev.platform_data;
2b13f7d4 537 struct device_node *of_node = fmd->pdev->dev.of_node;
2b13f7d4
SN
538 int num_clients = 0;
539 int ret, i;
d3953223
SN
540
541 /*
542 * Runtime resume one of the FIMC entities to make sure
543 * the sclk_cam clocks are not globally disabled.
544 */
3e20c345 545 if (!fmd->pmf)
d3953223 546 return -ENXIO;
2b13f7d4 547
3e20c345 548 ret = pm_runtime_get_sync(fmd->pmf);
d3953223
SN
549 if (ret < 0)
550 return ret;
551
2b13f7d4
SN
552 if (of_node) {
553 fmd->num_sensors = 0;
554 ret = fimc_md_of_sensors_register(fmd, of_node);
555 } else if (pdata) {
556 WARN_ON(pdata->num_clients > ARRAY_SIZE(fmd->sensor));
557 num_clients = min_t(u32, pdata->num_clients,
558 ARRAY_SIZE(fmd->sensor));
559 fmd->num_sensors = num_clients;
d3953223 560
2b13f7d4 561 for (i = 0; i < num_clients; i++) {
4c8f0629 562 struct fimc_sensor_info *si = &fmd->sensor[i];
2b13f7d4 563 struct v4l2_subdev *sd;
ecd9acbf 564
4c8f0629
SN
565 si->pdata = pdata->source_info[i];
566 ret = __fimc_md_set_camclk(fmd, &si->pdata, true);
2b13f7d4
SN
567 if (ret)
568 break;
4c8f0629
SN
569 sd = fimc_md_register_sensor(fmd, &si->pdata);
570 ret = __fimc_md_set_camclk(fmd, &si->pdata, false);
2b13f7d4
SN
571
572 if (IS_ERR(sd)) {
4c8f0629 573 si->subdev = NULL;
2b13f7d4
SN
574 ret = PTR_ERR(sd);
575 break;
576 }
4c8f0629 577 si->subdev = sd;
2b13f7d4
SN
578 if (ret)
579 break;
ecd9acbf 580 }
d3953223 581 }
2b13f7d4 582
3e20c345 583 pm_runtime_put(fmd->pmf);
d3953223
SN
584 return ret;
585}
586
587/*
7b43a6f3 588 * MIPI-CSIS, FIMC and FIMC-LITE platform devices registration.
d3953223 589 */
7b43a6f3
SN
590
591static int register_fimc_lite_entity(struct fimc_md *fmd,
592 struct fimc_lite *fimc_lite)
d3953223 593{
8163ec0b 594 struct v4l2_subdev *sd;
afd7348c 595 int ret;
4af81310 596
7b43a6f3
SN
597 if (WARN_ON(fimc_lite->index >= FIMC_LITE_MAX_DEVS ||
598 fmd->fimc_lite[fimc_lite->index]))
599 return -EBUSY;
d3953223 600
7b43a6f3
SN
601 sd = &fimc_lite->subdev;
602 sd->grp_id = GRP_ID_FLITE;
97d66c47 603 v4l2_set_subdev_hostdata(sd, (void *)&fimc_pipeline_ops);
693f5c40
SN
604
605 ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
7b43a6f3
SN
606 if (!ret)
607 fmd->fimc_lite[fimc_lite->index] = fimc_lite;
608 else
609 v4l2_err(&fmd->v4l2_dev, "Failed to register FIMC.LITE%d\n",
610 fimc_lite->index);
611 return ret;
d3953223
SN
612}
613
7b43a6f3 614static int register_fimc_entity(struct fimc_md *fmd, struct fimc_dev *fimc)
4af81310 615{
7b43a6f3 616 struct v4l2_subdev *sd;
4af81310
SN
617 int ret;
618
7b43a6f3
SN
619 if (WARN_ON(fimc->id >= FIMC_MAX_DEVS || fmd->fimc[fimc->id]))
620 return -EBUSY;
4af81310 621
7b43a6f3
SN
622 sd = &fimc->vid_cap.subdev;
623 sd->grp_id = GRP_ID_FIMC;
624 v4l2_set_subdev_hostdata(sd, (void *)&fimc_pipeline_ops);
4af81310 625
7b43a6f3
SN
626 ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
627 if (!ret) {
3e20c345
SN
628 if (!fmd->pmf && fimc->pdev)
629 fmd->pmf = &fimc->pdev->dev;
7b43a6f3
SN
630 fmd->fimc[fimc->id] = fimc;
631 fimc->vid_cap.user_subdev_api = fmd->user_subdev_api;
632 } else {
633 v4l2_err(&fmd->v4l2_dev, "Failed to register FIMC.%d (%d)\n",
634 fimc->id, ret);
4af81310 635 }
7b43a6f3 636 return ret;
4af81310
SN
637}
638
7b43a6f3
SN
639static int register_csis_entity(struct fimc_md *fmd,
640 struct platform_device *pdev,
641 struct v4l2_subdev *sd)
d3953223 642{
7b43a6f3 643 struct device_node *node = pdev->dev.of_node;
d3953223
SN
644 int id, ret;
645
e2985a26 646 id = node ? __of_get_csis_id(node) : max(0, pdev->id);
7b43a6f3 647
e2985a26
SN
648 if (WARN_ON(id < 0 || id >= CSIS_MAX_ENTITIES))
649 return -ENOENT;
7b43a6f3 650
e2985a26
SN
651 if (WARN_ON(fmd->csis[id].sd))
652 return -EBUSY;
d3953223 653
588c87be 654 sd->grp_id = GRP_ID_CSIS;
d3953223 655 ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
afd7348c
SN
656 if (!ret)
657 fmd->csis[id].sd = sd;
658 else
d3953223 659 v4l2_err(&fmd->v4l2_dev,
7b43a6f3 660 "Failed to register MIPI-CSIS.%d (%d)\n", id, ret);
d3953223
SN
661 return ret;
662}
663
e781bbe3
SN
664static int register_fimc_is_entity(struct fimc_md *fmd, struct fimc_is *is)
665{
666 struct v4l2_subdev *sd = &is->isp.subdev;
667 int ret;
668
669 ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
670 if (ret) {
671 v4l2_err(&fmd->v4l2_dev,
672 "Failed to register FIMC-ISP (%d)\n", ret);
673 return ret;
674 }
675
676 fmd->fimc_is = is;
677 return 0;
678}
679
7b43a6f3
SN
680static int fimc_md_register_platform_entity(struct fimc_md *fmd,
681 struct platform_device *pdev,
682 int plat_entity)
d3953223 683{
7b43a6f3
SN
684 struct device *dev = &pdev->dev;
685 int ret = -EPROBE_DEFER;
686 void *drvdata;
687
688 /* Lock to ensure dev->driver won't change. */
689 device_lock(dev);
690
691 if (!dev->driver || !try_module_get(dev->driver->owner))
692 goto dev_unlock;
693
694 drvdata = dev_get_drvdata(dev);
695 /* Some subdev didn't probe succesfully id drvdata is NULL */
696 if (drvdata) {
697 switch (plat_entity) {
698 case IDX_FIMC:
699 ret = register_fimc_entity(fmd, drvdata);
700 break;
701 case IDX_FLITE:
702 ret = register_fimc_lite_entity(fmd, drvdata);
ecd9acbf 703 break;
7b43a6f3
SN
704 case IDX_CSIS:
705 ret = register_csis_entity(fmd, pdev, drvdata);
706 break;
e781bbe3
SN
707 case IDX_IS_ISP:
708 ret = register_fimc_is_entity(fmd, drvdata);
709 break;
7b43a6f3
SN
710 default:
711 ret = -ENODEV;
ecd9acbf
SN
712 }
713 }
d3953223 714
7b43a6f3
SN
715 module_put(dev->driver->owner);
716dev_unlock:
717 device_unlock(dev);
718 if (ret == -EPROBE_DEFER)
719 dev_info(&fmd->pdev->dev, "deferring %s device registration\n",
720 dev_name(dev));
721 else if (ret < 0)
722 dev_err(&fmd->pdev->dev, "%s device registration failed (%d)\n",
723 dev_name(dev), ret);
724 return ret;
725}
726
727static int fimc_md_pdev_match(struct device *dev, void *data)
728{
729 struct platform_device *pdev = to_platform_device(dev);
730 int plat_entity = -1;
731 int ret;
732 char *p;
733
734 if (!get_device(dev))
735 return -ENODEV;
736
737 if (!strcmp(pdev->name, CSIS_DRIVER_NAME)) {
738 plat_entity = IDX_CSIS;
739 } else if (!strcmp(pdev->name, FIMC_LITE_DRV_NAME)) {
740 plat_entity = IDX_FLITE;
741 } else {
742 p = strstr(pdev->name, "fimc");
743 if (p && *(p + 4) == 0)
744 plat_entity = IDX_FIMC;
ecd9acbf
SN
745 }
746
7b43a6f3
SN
747 if (plat_entity >= 0)
748 ret = fimc_md_register_platform_entity(data, pdev,
749 plat_entity);
750 put_device(dev);
751 return 0;
d3953223
SN
752}
753
e2985a26
SN
754/* Register FIMC, FIMC-LITE and CSIS media entities */
755#ifdef CONFIG_OF
756static int fimc_md_register_of_platform_entities(struct fimc_md *fmd,
757 struct device_node *parent)
758{
759 struct device_node *node;
760 int ret = 0;
761
762 for_each_available_child_of_node(parent, node) {
763 struct platform_device *pdev;
764 int plat_entity = -1;
765
766 pdev = of_find_device_by_node(node);
767 if (!pdev)
768 continue;
769
770 /* If driver of any entity isn't ready try all again later. */
771 if (!strcmp(node->name, CSIS_OF_NODE_NAME))
772 plat_entity = IDX_CSIS;
e781bbe3
SN
773 else if (!strcmp(node->name, FIMC_IS_OF_NODE_NAME))
774 plat_entity = IDX_IS_ISP;
e2985a26
SN
775 else if (!strcmp(node->name, FIMC_LITE_OF_NODE_NAME))
776 plat_entity = IDX_FLITE;
777 else if (!strcmp(node->name, FIMC_OF_NODE_NAME) &&
778 !of_property_read_bool(node, "samsung,lcd-wb"))
779 plat_entity = IDX_FIMC;
780
781 if (plat_entity >= 0)
782 ret = fimc_md_register_platform_entity(fmd, pdev,
783 plat_entity);
784 put_device(&pdev->dev);
785 if (ret < 0)
786 break;
787 }
788
789 return ret;
790}
791#else
792#define fimc_md_register_of_platform_entities(fmd, node) (-ENOSYS)
793#endif
794
d3953223
SN
795static void fimc_md_unregister_entities(struct fimc_md *fmd)
796{
797 int i;
798
799 for (i = 0; i < FIMC_MAX_DEVS; i++) {
800 if (fmd->fimc[i] == NULL)
801 continue;
693f5c40 802 v4l2_device_unregister_subdev(&fmd->fimc[i]->vid_cap.subdev);
b9ee31e6 803 fmd->fimc[i]->pipeline_ops = NULL;
d3953223
SN
804 fmd->fimc[i] = NULL;
805 }
4af81310
SN
806 for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) {
807 if (fmd->fimc_lite[i] == NULL)
808 continue;
809 v4l2_device_unregister_subdev(&fmd->fimc_lite[i]->subdev);
248ac368 810 fmd->fimc_lite[i]->pipeline_ops = NULL;
4af81310
SN
811 fmd->fimc_lite[i] = NULL;
812 }
d3953223
SN
813 for (i = 0; i < CSIS_MAX_ENTITIES; i++) {
814 if (fmd->csis[i].sd == NULL)
815 continue;
816 v4l2_device_unregister_subdev(fmd->csis[i].sd);
817 fmd->csis[i].sd = NULL;
818 }
819 for (i = 0; i < fmd->num_sensors; i++) {
820 if (fmd->sensor[i].subdev == NULL)
821 continue;
822 fimc_md_unregister_sensor(fmd->sensor[i].subdev);
823 fmd->sensor[i].subdev = NULL;
824 }
e41a35cb
SN
825
826 if (fmd->fimc_is)
827 v4l2_device_unregister_subdev(&fmd->fimc_is->isp.subdev);
828
7b43a6f3 829 v4l2_info(&fmd->v4l2_dev, "Unregistered all entities\n");
d3953223
SN
830}
831
d3953223
SN
832/**
833 * __fimc_md_create_fimc_links - create links to all FIMC entities
834 * @fmd: fimc media device
835 * @source: the source entity to create links to all fimc entities from
836 * @sensor: sensor subdev linked to FIMC[fimc_id] entity, may be null
837 * @pad: the source entity pad index
d0da3c35 838 * @link_mask: bitmask of the fimc devices for which link should be enabled
d3953223 839 */
4af81310
SN
840static int __fimc_md_create_fimc_sink_links(struct fimc_md *fmd,
841 struct media_entity *source,
842 struct v4l2_subdev *sensor,
d0da3c35 843 int pad, int link_mask)
d3953223 844{
4c8f0629 845 struct fimc_source_info *si = NULL;
d3953223 846 struct media_entity *sink;
4af81310 847 unsigned int flags = 0;
f998bb7b 848 int i, ret = 0;
d3953223 849
f998bb7b
SN
850 if (sensor) {
851 si = v4l2_get_subdev_hostdata(sensor);
852 /* Skip direct FIMC links in the logical FIMC-IS sensor path */
4c8f0629 853 if (si && si->fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK)
f998bb7b
SN
854 ret = 1;
855 }
856
857 for (i = 0; !ret && i < FIMC_MAX_DEVS; i++) {
d3953223 858 if (!fmd->fimc[i])
4af81310 859 continue;
d3953223
SN
860 /*
861 * Some FIMC variants are not fitted with camera capture
862 * interface. Skip creating a link from sensor for those.
863 */
4af81310 864 if (!fmd->fimc[i]->variant->has_cam_if)
d3953223
SN
865 continue;
866
d0da3c35 867 flags = ((1 << i) & link_mask) ? MEDIA_LNK_FL_ENABLED : 0;
4af81310 868
693f5c40 869 sink = &fmd->fimc[i]->vid_cap.subdev.entity;
237e0265 870 ret = media_entity_create_link(source, pad, sink,
88fa8311 871 FIMC_SD_PAD_SINK_CAM, flags);
d3953223
SN
872 if (ret)
873 return ret;
874
237e0265
SN
875 /* Notify FIMC capture subdev entity */
876 ret = media_entity_call(sink, link_setup, &sink->pads[0],
877 &source->pads[pad], flags);
878 if (ret)
879 break;
880
542fb082 881 v4l2_info(&fmd->v4l2_dev, "created link [%s] %c> [%s]\n",
d3953223
SN
882 source->name, flags ? '=' : '-', sink->name);
883
4af81310 884 if (flags == 0 || sensor == NULL)
d3953223 885 continue;
f998bb7b
SN
886
887 if (!WARN_ON(si == NULL)) {
d3953223 888 unsigned long irq_flags;
4c8f0629
SN
889 struct fimc_sensor_info *inf = source_to_sensor_info(si);
890
d3953223 891 spin_lock_irqsave(&fmd->slock, irq_flags);
4c8f0629 892 inf->host = fmd->fimc[i];
d3953223
SN
893 spin_unlock_irqrestore(&fmd->slock, irq_flags);
894 }
895 }
4af81310
SN
896
897 for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) {
898 if (!fmd->fimc_lite[i])
899 continue;
900
4af81310
SN
901 sink = &fmd->fimc_lite[i]->subdev.entity;
902 ret = media_entity_create_link(source, pad, sink,
f998bb7b 903 FLITE_SD_PAD_SINK, 0);
4af81310
SN
904 if (ret)
905 return ret;
906
907 /* Notify FIMC-LITE subdev entity */
908 ret = media_entity_call(sink, link_setup, &sink->pads[0],
f998bb7b 909 &source->pads[pad], 0);
4af81310
SN
910 if (ret)
911 break;
912
f998bb7b
SN
913 v4l2_info(&fmd->v4l2_dev, "created link [%s] -> [%s]\n",
914 source->name, sink->name);
4af81310 915 }
d3953223
SN
916 return 0;
917}
918
4af81310
SN
919/* Create links from FIMC-LITE source pads to other entities */
920static int __fimc_md_create_flite_source_links(struct fimc_md *fmd)
921{
922 struct media_entity *source, *sink;
a26860bd 923 int i, ret = 0;
4af81310
SN
924
925 for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) {
926 struct fimc_lite *fimc = fmd->fimc_lite[i];
f998bb7b 927
4af81310
SN
928 if (fimc == NULL)
929 continue;
f998bb7b 930
4af81310 931 source = &fimc->subdev.entity;
bc7584b0 932 sink = &fimc->ve.vdev.entity;
4af81310 933 /* FIMC-LITE's subdev and video node */
6319d6a0 934 ret = media_entity_create_link(source, FLITE_SD_PAD_SOURCE_DMA,
f998bb7b
SN
935 sink, 0, 0);
936 if (ret)
937 break;
938 /* Link from FIMC-LITE to IS-ISP subdev */
939 sink = &fmd->fimc_is->isp.subdev.entity;
940 ret = media_entity_create_link(source, FLITE_SD_PAD_SOURCE_ISP,
941 sink, 0, 0);
4af81310
SN
942 if (ret)
943 break;
f998bb7b
SN
944 }
945
946 return ret;
947}
948
949/* Create FIMC-IS links */
950static int __fimc_md_create_fimc_is_links(struct fimc_md *fmd)
951{
952 struct media_entity *source, *sink;
953 int i, ret;
954
955 source = &fmd->fimc_is->isp.subdev.entity;
956
957 for (i = 0; i < FIMC_MAX_DEVS; i++) {
958 if (fmd->fimc[i] == NULL)
959 continue;
960
961 /* Link from IS-ISP subdev to FIMC */
962 sink = &fmd->fimc[i]->vid_cap.subdev.entity;
963 ret = media_entity_create_link(source, FIMC_ISP_SD_PAD_SRC_FIFO,
964 sink, FIMC_SD_PAD_SINK_FIFO, 0);
965 if (ret)
966 return ret;
4af81310
SN
967 }
968
969 return ret;
970}
971
d3953223
SN
972/**
973 * fimc_md_create_links - create default links between registered entities
974 *
975 * Parallel interface sensor entities are connected directly to FIMC capture
976 * entities. The sensors using MIPI CSIS bus are connected through immutable
977 * link with CSI receiver entity specified by mux_id. Any registered CSIS
978 * entity has a link to each registered FIMC capture entity. Enabled links
979 * are created by default between each subsequent registered sensor and
980 * subsequent FIMC capture entity. The number of default active links is
981 * determined by the number of available sensors or FIMC entities,
982 * whichever is less.
983 */
984static int fimc_md_create_links(struct fimc_md *fmd)
985{
a8697ec8 986 struct v4l2_subdev *csi_sensors[CSIS_MAX_ENTITIES] = { NULL };
d3953223 987 struct v4l2_subdev *sensor, *csis;
56bc911a 988 struct fimc_source_info *pdata;
237e0265 989 struct media_entity *source, *sink;
d0da3c35
SN
990 int i, pad, fimc_id = 0, ret = 0;
991 u32 flags, link_mask = 0;
d3953223
SN
992
993 for (i = 0; i < fmd->num_sensors; i++) {
994 if (fmd->sensor[i].subdev == NULL)
995 continue;
996
997 sensor = fmd->sensor[i].subdev;
4c8f0629
SN
998 pdata = v4l2_get_subdev_hostdata(sensor);
999 if (!pdata)
d3953223
SN
1000 continue;
1001
1002 source = NULL;
d3953223 1003
56bc911a
SN
1004 switch (pdata->sensor_bus_type) {
1005 case FIMC_BUS_TYPE_MIPI_CSI2:
d3953223
SN
1006 if (WARN(pdata->mux_id >= CSIS_MAX_ENTITIES,
1007 "Wrong CSI channel id: %d\n", pdata->mux_id))
1008 return -EINVAL;
1009
1010 csis = fmd->csis[pdata->mux_id].sd;
1011 if (WARN(csis == NULL,
1012 "MIPI-CSI interface specified "
1013 "but s5p-csis module is not loaded!\n"))
d12392ec 1014 return -EINVAL;
d3953223 1015
1c9f5bd7
AH
1016 pad = sensor->entity.num_pads - 1;
1017 ret = media_entity_create_link(&sensor->entity, pad,
d3953223
SN
1018 &csis->entity, CSIS_PAD_SINK,
1019 MEDIA_LNK_FL_IMMUTABLE |
1020 MEDIA_LNK_FL_ENABLED);
1021 if (ret)
1022 return ret;
1023
969e877c 1024 v4l2_info(&fmd->v4l2_dev, "created link [%s] => [%s]\n",
d3953223
SN
1025 sensor->entity.name, csis->entity.name);
1026
4af81310 1027 source = NULL;
5d33ee92 1028 csi_sensors[pdata->mux_id] = sensor;
d3953223
SN
1029 break;
1030
56bc911a 1031 case FIMC_BUS_TYPE_ITU_601...FIMC_BUS_TYPE_ITU_656:
d3953223
SN
1032 source = &sensor->entity;
1033 pad = 0;
1034 break;
1035
1036 default:
1037 v4l2_err(&fmd->v4l2_dev, "Wrong bus_type: %x\n",
56bc911a 1038 pdata->sensor_bus_type);
d3953223
SN
1039 return -EINVAL;
1040 }
1041 if (source == NULL)
1042 continue;
1043
d0da3c35 1044 link_mask = 1 << fimc_id++;
4af81310 1045 ret = __fimc_md_create_fimc_sink_links(fmd, source, sensor,
d0da3c35 1046 pad, link_mask);
4af81310
SN
1047 }
1048
a8697ec8 1049 for (i = 0; i < CSIS_MAX_ENTITIES; i++) {
4af81310
SN
1050 if (fmd->csis[i].sd == NULL)
1051 continue;
f998bb7b 1052
4af81310
SN
1053 source = &fmd->csis[i].sd->entity;
1054 pad = CSIS_PAD_SOURCE;
5d33ee92 1055 sensor = csi_sensors[i];
4af81310 1056
d0da3c35 1057 link_mask = 1 << fimc_id++;
5d33ee92 1058 ret = __fimc_md_create_fimc_sink_links(fmd, source, sensor,
d0da3c35 1059 pad, link_mask);
d3953223 1060 }
4af81310 1061
237e0265
SN
1062 /* Create immutable links between each FIMC's subdev and video node */
1063 flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
1064 for (i = 0; i < FIMC_MAX_DEVS; i++) {
1065 if (!fmd->fimc[i])
1066 continue;
f998bb7b 1067
693f5c40 1068 source = &fmd->fimc[i]->vid_cap.subdev.entity;
bc7584b0 1069 sink = &fmd->fimc[i]->vid_cap.ve.vdev.entity;
f998bb7b 1070
237e0265
SN
1071 ret = media_entity_create_link(source, FIMC_SD_PAD_SOURCE,
1072 sink, 0, flags);
1073 if (ret)
1074 break;
1075 }
1076
f998bb7b
SN
1077 ret = __fimc_md_create_flite_source_links(fmd);
1078 if (ret < 0)
1079 return ret;
1080
1081 if (fmd->use_isp)
1082 ret = __fimc_md_create_fimc_is_links(fmd);
1083
1084 return ret;
d3953223
SN
1085}
1086
1087/*
056f4f30 1088 * The peripheral sensor and CAM_BLK (PIXELASYNCMx) clocks management.
d3953223 1089 */
0e23cbbe
SN
1090static void fimc_md_put_clocks(struct fimc_md *fmd)
1091{
1092 int i = FIMC_MAX_CAMCLKS;
1093
1094 while (--i >= 0) {
1095 if (IS_ERR(fmd->camclk[i].clock))
1096 continue;
1097 clk_unprepare(fmd->camclk[i].clock);
1098 clk_put(fmd->camclk[i].clock);
1099 fmd->camclk[i].clock = ERR_PTR(-EINVAL);
1100 }
056f4f30
SN
1101
1102 /* Writeback (PIXELASYNCMx) clocks */
1103 for (i = 0; i < FIMC_MAX_WBCLKS; i++) {
1104 if (IS_ERR(fmd->wbclk[i]))
1105 continue;
1106 clk_put(fmd->wbclk[i]);
1107 fmd->wbclk[i] = ERR_PTR(-EINVAL);
1108 }
0e23cbbe
SN
1109}
1110
d3953223
SN
1111static int fimc_md_get_clocks(struct fimc_md *fmd)
1112{
0e23cbbe 1113 struct device *dev = NULL;
d3953223
SN
1114 char clk_name[32];
1115 struct clk *clock;
0e23cbbe
SN
1116 int ret, i;
1117
1118 for (i = 0; i < FIMC_MAX_CAMCLKS; i++)
1119 fmd->camclk[i].clock = ERR_PTR(-EINVAL);
1120
1121 if (fmd->pdev->dev.of_node)
1122 dev = &fmd->pdev->dev;
d3953223
SN
1123
1124 for (i = 0; i < FIMC_MAX_CAMCLKS; i++) {
1125 snprintf(clk_name, sizeof(clk_name), "sclk_cam%u", i);
0e23cbbe
SN
1126 clock = clk_get(dev, clk_name);
1127
dc3ae328 1128 if (IS_ERR(clock)) {
0e23cbbe
SN
1129 dev_err(&fmd->pdev->dev, "Failed to get clock: %s\n",
1130 clk_name);
1131 ret = PTR_ERR(clock);
1132 break;
1133 }
1134 ret = clk_prepare(clock);
1135 if (ret < 0) {
1136 clk_put(clock);
1137 fmd->camclk[i].clock = ERR_PTR(-EINVAL);
1138 break;
d3953223
SN
1139 }
1140 fmd->camclk[i].clock = clock;
1141 }
0e23cbbe
SN
1142 if (ret)
1143 fimc_md_put_clocks(fmd);
d3953223 1144
056f4f30
SN
1145 if (!fmd->use_isp)
1146 return 0;
1147 /*
1148 * For now get only PIXELASYNCM1 clock (Writeback B/ISP),
1149 * leave PIXELASYNCM0 out for the LCD Writeback driver.
1150 */
1151 fmd->wbclk[CLK_IDX_WB_A] = ERR_PTR(-EINVAL);
1152
1153 for (i = CLK_IDX_WB_B; i < FIMC_MAX_WBCLKS; i++) {
1154 snprintf(clk_name, sizeof(clk_name), "pxl_async%u", i);
1155 clock = clk_get(dev, clk_name);
1156 if (IS_ERR(clock)) {
1157 v4l2_err(&fmd->v4l2_dev, "Failed to get clock: %s\n",
1158 clk_name);
1159 ret = PTR_ERR(clock);
1160 break;
1161 }
1162 fmd->wbclk[i] = clock;
1163 }
1164 if (ret)
1165 fimc_md_put_clocks(fmd);
1166
0e23cbbe 1167 return ret;
d3953223
SN
1168}
1169
1170static int __fimc_md_set_camclk(struct fimc_md *fmd,
4c8f0629 1171 struct fimc_source_info *si,
e3fc82e8 1172 bool on)
d3953223 1173{
d3953223
SN
1174 struct fimc_camclk_info *camclk;
1175 int ret = 0;
1176
4c8f0629 1177 if (WARN_ON(si->clk_id >= FIMC_MAX_CAMCLKS) || !fmd || !fmd->pmf)
d3953223
SN
1178 return -EINVAL;
1179
4c8f0629 1180 camclk = &fmd->camclk[si->clk_id];
d3953223 1181
e3fc82e8 1182 dbg("camclk %d, f: %lu, use_count: %d, on: %d",
4c8f0629 1183 si->clk_id, si->clk_frequency, camclk->use_count, on);
d3953223
SN
1184
1185 if (on) {
1186 if (camclk->use_count > 0 &&
4c8f0629 1187 camclk->frequency != si->clk_frequency)
d3953223
SN
1188 return -EINVAL;
1189
1190 if (camclk->use_count++ == 0) {
4c8f0629
SN
1191 clk_set_rate(camclk->clock, si->clk_frequency);
1192 camclk->frequency = si->clk_frequency;
3e20c345
SN
1193 ret = pm_runtime_get_sync(fmd->pmf);
1194 if (ret < 0)
1195 return ret;
d3953223 1196 ret = clk_enable(camclk->clock);
4c8f0629 1197 dbg("Enabled camclk %d: f: %lu", si->clk_id,
e3fc82e8 1198 clk_get_rate(camclk->clock));
d3953223 1199 }
d3953223
SN
1200 return ret;
1201 }
1202
1203 if (WARN_ON(camclk->use_count == 0))
1204 return 0;
1205
1206 if (--camclk->use_count == 0) {
1207 clk_disable(camclk->clock);
3e20c345 1208 pm_runtime_put(fmd->pmf);
4c8f0629 1209 dbg("Disabled camclk %d", si->clk_id);
d3953223
SN
1210 }
1211 return ret;
1212}
1213
1214/**
1215 * fimc_md_set_camclk - peripheral sensor clock setup
1216 * @sd: sensor subdev to configure sclk_cam clock for
1217 * @on: 1 to enable or 0 to disable the clock
1218 *
1219 * There are 2 separate clock outputs available in the SoC for external
1220 * image processors. These clocks are shared between all registered FIMC
1221 * devices to which sensors can be attached, either directly or through
1222 * the MIPI CSI receiver. The clock is allowed here to be used by
1223 * multiple sensors concurrently if they use same frequency.
d3953223
SN
1224 * This function should only be called when the graph mutex is held.
1225 */
1226int fimc_md_set_camclk(struct v4l2_subdev *sd, bool on)
1227{
4c8f0629 1228 struct fimc_source_info *si = v4l2_get_subdev_hostdata(sd);
d3953223
SN
1229 struct fimc_md *fmd = entity_to_fimc_mdev(&sd->entity);
1230
4c8f0629 1231 return __fimc_md_set_camclk(fmd, si, on);
d3953223
SN
1232}
1233
1234static int fimc_md_link_notify(struct media_pad *source,
1235 struct media_pad *sink, u32 flags)
1236{
4af81310
SN
1237 struct fimc_lite *fimc_lite = NULL;
1238 struct fimc_dev *fimc = NULL;
0f735f52 1239 struct fimc_pipeline *pipeline;
237e0265 1240 struct v4l2_subdev *sd;
8c6ecdd7 1241 int i, ret = 0;
d3953223 1242
237e0265 1243 if (media_entity_type(sink->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
d3953223
SN
1244 return 0;
1245
237e0265 1246 sd = media_entity_to_v4l2_subdev(sink->entity);
d3953223 1247
0f735f52 1248 switch (sd->grp_id) {
588c87be 1249 case GRP_ID_FLITE:
4af81310 1250 fimc_lite = v4l2_get_subdevdata(sd);
740ad921
SN
1251 if (WARN_ON(fimc_lite == NULL))
1252 return 0;
4af81310
SN
1253 pipeline = &fimc_lite->pipeline;
1254 break;
588c87be 1255 case GRP_ID_FIMC:
0f735f52 1256 fimc = v4l2_get_subdevdata(sd);
740ad921
SN
1257 if (WARN_ON(fimc == NULL))
1258 return 0;
0f735f52
SN
1259 pipeline = &fimc->pipeline;
1260 break;
1261 default:
1262 return 0;
1263 }
131b6c61 1264
0f735f52 1265 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
42625fdf 1266 if (sink->entity->use_count > 0) {
8c6ecdd7 1267 ret = __fimc_pipeline_close(pipeline);
8c6ecdd7 1268 }
740ad921
SN
1269 for (i = 0; i < IDX_MAX; i++)
1270 pipeline->subdevs[i] = NULL;
42625fdf 1271 } else if (sink->entity->use_count > 0) {
8c6ecdd7
SN
1272 /*
1273 * Link activation. Enable power of pipeline elements only if
1274 * the pipeline is already in use, i.e. its video node is open.
1275 * Recreate the controls destroyed during the link deactivation.
1276 */
1277 ret = __fimc_pipeline_open(pipeline,
1278 source->entity, true);
d3953223 1279 }
740ad921 1280
d3953223
SN
1281 return ret ? -EPIPE : ret;
1282}
1283
1284static ssize_t fimc_md_sysfs_show(struct device *dev,
1285 struct device_attribute *attr, char *buf)
1286{
1287 struct platform_device *pdev = to_platform_device(dev);
1288 struct fimc_md *fmd = platform_get_drvdata(pdev);
1289
1290 if (fmd->user_subdev_api)
1291 return strlcpy(buf, "Sub-device API (sub-dev)\n", PAGE_SIZE);
1292
1293 return strlcpy(buf, "V4L2 video node only API (vid-dev)\n", PAGE_SIZE);
1294}
1295
1296static ssize_t fimc_md_sysfs_store(struct device *dev,
1297 struct device_attribute *attr,
1298 const char *buf, size_t count)
1299{
1300 struct platform_device *pdev = to_platform_device(dev);
1301 struct fimc_md *fmd = platform_get_drvdata(pdev);
1302 bool subdev_api;
1303 int i;
1304
1305 if (!strcmp(buf, "vid-dev\n"))
1306 subdev_api = false;
1307 else if (!strcmp(buf, "sub-dev\n"))
1308 subdev_api = true;
1309 else
1310 return count;
1311
1312 fmd->user_subdev_api = subdev_api;
1313 for (i = 0; i < FIMC_MAX_DEVS; i++)
1314 if (fmd->fimc[i])
1315 fmd->fimc[i]->vid_cap.user_subdev_api = subdev_api;
1316 return count;
1317}
1318/*
1319 * This device attribute is to select video pipeline configuration method.
1320 * There are following valid values:
1321 * vid-dev - for V4L2 video node API only, subdevice will be configured
1322 * by the host driver.
1323 * sub-dev - for media controller API, subdevs must be configured in user
1324 * space before starting streaming.
1325 */
1326static DEVICE_ATTR(subdev_conf_mode, S_IWUSR | S_IRUGO,
1327 fimc_md_sysfs_show, fimc_md_sysfs_store);
1328
4163851f
SN
1329static int fimc_md_get_pinctrl(struct fimc_md *fmd)
1330{
1331 struct device *dev = &fmd->pdev->dev;
1332 struct fimc_pinctrl *pctl = &fmd->pinctl;
1333
1334 pctl->pinctrl = devm_pinctrl_get(dev);
1335 if (IS_ERR(pctl->pinctrl))
1336 return PTR_ERR(pctl->pinctrl);
1337
1338 pctl->state_default = pinctrl_lookup_state(pctl->pinctrl,
1339 PINCTRL_STATE_DEFAULT);
1340 if (IS_ERR(pctl->state_default))
1341 return PTR_ERR(pctl->state_default);
1342
1343 pctl->state_idle = pinctrl_lookup_state(pctl->pinctrl,
1344 PINCTRL_STATE_IDLE);
1345 return 0;
1346}
1347
ecd9acbf 1348static int fimc_md_probe(struct platform_device *pdev)
d3953223 1349{
e2985a26 1350 struct device *dev = &pdev->dev;
d3953223
SN
1351 struct v4l2_device *v4l2_dev;
1352 struct fimc_md *fmd;
1353 int ret;
1354
e2985a26 1355 fmd = devm_kzalloc(dev, sizeof(*fmd), GFP_KERNEL);
d3953223
SN
1356 if (!fmd)
1357 return -ENOMEM;
1358
1359 spin_lock_init(&fmd->slock);
1360 fmd->pdev = pdev;
1361
1362 strlcpy(fmd->media_dev.model, "SAMSUNG S5P FIMC",
1363 sizeof(fmd->media_dev.model));
1364 fmd->media_dev.link_notify = fimc_md_link_notify;
e2985a26 1365 fmd->media_dev.dev = dev;
d3953223
SN
1366
1367 v4l2_dev = &fmd->v4l2_dev;
1368 v4l2_dev->mdev = &fmd->media_dev;
e1d72f4d 1369 v4l2_dev->notify = fimc_sensor_notify;
e2985a26 1370 strlcpy(v4l2_dev->name, "s5p-fimc-md", sizeof(v4l2_dev->name));
d3953223 1371
e781bbe3
SN
1372 fmd->use_isp = fimc_md_is_isp_available(dev->of_node);
1373
e2985a26 1374 ret = v4l2_device_register(dev, &fmd->v4l2_dev);
d3953223
SN
1375 if (ret < 0) {
1376 v4l2_err(v4l2_dev, "Failed to register v4l2_device: %d\n", ret);
6d91a51a 1377 return ret;
d3953223
SN
1378 }
1379 ret = media_device_register(&fmd->media_dev);
1380 if (ret < 0) {
1381 v4l2_err(v4l2_dev, "Failed to register media device: %d\n", ret);
693f5c40 1382 goto err_md;
d3953223
SN
1383 }
1384 ret = fimc_md_get_clocks(fmd);
1385 if (ret)
693f5c40 1386 goto err_clk;
d3953223 1387
e2985a26 1388 fmd->user_subdev_api = (dev->of_node != NULL);
693f5c40
SN
1389
1390 /* Protect the media graph while we're registering entities */
1391 mutex_lock(&fmd->media_dev.graph_mutex);
1392
4163851f
SN
1393 ret = fimc_md_get_pinctrl(fmd);
1394 if (ret < 0) {
1395 if (ret != EPROBE_DEFER)
1396 dev_err(dev, "Failed to get pinctrl: %d\n", ret);
1397 goto err_unlock;
1398 }
1399
e2985a26
SN
1400 if (dev->of_node)
1401 ret = fimc_md_register_of_platform_entities(fmd, dev->of_node);
1402 else
1403 ret = bus_for_each_dev(&platform_bus_type, NULL, fmd,
1404 fimc_md_pdev_match);
d3953223 1405 if (ret)
693f5c40 1406 goto err_unlock;
d3953223 1407
2b13f7d4 1408 if (dev->platform_data || dev->of_node) {
5cbf6f16
SN
1409 ret = fimc_md_register_sensor_entities(fmd);
1410 if (ret)
693f5c40 1411 goto err_unlock;
5cbf6f16 1412 }
e2985a26 1413
d3953223
SN
1414 ret = fimc_md_create_links(fmd);
1415 if (ret)
693f5c40 1416 goto err_unlock;
d3953223
SN
1417 ret = v4l2_device_register_subdev_nodes(&fmd->v4l2_dev);
1418 if (ret)
693f5c40 1419 goto err_unlock;
d3953223
SN
1420
1421 ret = device_create_file(&pdev->dev, &dev_attr_subdev_conf_mode);
693f5c40
SN
1422 if (ret)
1423 goto err_unlock;
1424
1425 platform_set_drvdata(pdev, fmd);
1426 mutex_unlock(&fmd->media_dev.graph_mutex);
1427 return 0;
1428
1429err_unlock:
1430 mutex_unlock(&fmd->media_dev.graph_mutex);
1431err_clk:
d3953223
SN
1432 media_device_unregister(&fmd->media_dev);
1433 fimc_md_put_clocks(fmd);
1434 fimc_md_unregister_entities(fmd);
693f5c40 1435err_md:
d3953223 1436 v4l2_device_unregister(&fmd->v4l2_dev);
d3953223
SN
1437 return ret;
1438}
1439
4c62e976 1440static int fimc_md_remove(struct platform_device *pdev)
d3953223
SN
1441{
1442 struct fimc_md *fmd = platform_get_drvdata(pdev);
1443
1444 if (!fmd)
1445 return 0;
1446 device_remove_file(&pdev->dev, &dev_attr_subdev_conf_mode);
1447 fimc_md_unregister_entities(fmd);
1448 media_device_unregister(&fmd->media_dev);
1449 fimc_md_put_clocks(fmd);
d3953223
SN
1450 return 0;
1451}
1452
e2985a26
SN
1453static struct platform_device_id fimc_driver_ids[] __always_unused = {
1454 { .name = "s5p-fimc-md" },
1455 { },
1456};
1457MODULE_DEVICE_TABLE(platform, fimc_driver_ids);
1458
1459static const struct of_device_id fimc_md_of_match[] = {
1460 { .compatible = "samsung,fimc" },
1461 { },
1462};
1463MODULE_DEVICE_TABLE(of, fimc_md_of_match);
1464
d3953223
SN
1465static struct platform_driver fimc_md_driver = {
1466 .probe = fimc_md_probe,
4c62e976 1467 .remove = fimc_md_remove,
d3953223 1468 .driver = {
e2985a26
SN
1469 .of_match_table = of_match_ptr(fimc_md_of_match),
1470 .name = "s5p-fimc-md",
1471 .owner = THIS_MODULE,
d3953223
SN
1472 }
1473};
1474
7e566be2 1475static int __init fimc_md_init(void)
d3953223
SN
1476{
1477 int ret;
ecd9acbf 1478
d3953223
SN
1479 request_module("s5p-csis");
1480 ret = fimc_register_driver();
1481 if (ret)
1482 return ret;
ecd9acbf 1483
d3953223
SN
1484 return platform_driver_register(&fimc_md_driver);
1485}
7e566be2
SK
1486
1487static void __exit fimc_md_exit(void)
d3953223
SN
1488{
1489 platform_driver_unregister(&fimc_md_driver);
1490 fimc_unregister_driver();
1491}
1492
1493module_init(fimc_md_init);
1494module_exit(fimc_md_exit);
1495
1496MODULE_AUTHOR("Sylwester Nawrocki <s.nawrocki@samsung.com>");
1497MODULE_DESCRIPTION("S5P FIMC camera host interface/video postprocessor driver");
1498MODULE_LICENSE("GPL");
1499MODULE_VERSION("2.0.1");
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