KVM: MMU: drop zeroing on mmu_memory_cache_alloc
[deliverable/linux.git] / arch / x86 / kvm / mmu.c
CommitLineData
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1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
e495606d 19
1d737c8a 20#include "mmu.h"
e495606d 21
edf88417 22#include <linux/kvm_host.h>
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23#include <linux/types.h>
24#include <linux/string.h>
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25#include <linux/mm.h>
26#include <linux/highmem.h>
27#include <linux/module.h>
448353ca 28#include <linux/swap.h>
05da4558 29#include <linux/hugetlb.h>
2f333bcb 30#include <linux/compiler.h>
6aa8b732 31
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32#include <asm/page.h>
33#include <asm/cmpxchg.h>
4e542370 34#include <asm/io.h>
13673a90 35#include <asm/vmx.h>
6aa8b732 36
18552672
JR
37/*
38 * When setting this variable to true it enables Two-Dimensional-Paging
39 * where the hardware walks 2 page tables:
40 * 1. the guest-virtual to guest-physical
41 * 2. while doing 1. it walks guest-physical to host-physical
42 * If the hardware supports that we don't need to do shadow paging.
43 */
2f333bcb 44bool tdp_enabled = false;
18552672 45
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46#undef MMU_DEBUG
47
48#undef AUDIT
49
50#ifdef AUDIT
51static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
52#else
53static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
54#endif
55
56#ifdef MMU_DEBUG
57
58#define pgprintk(x...) do { if (dbg) printk(x); } while (0)
59#define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
60
61#else
62
63#define pgprintk(x...) do { } while (0)
64#define rmap_printk(x...) do { } while (0)
65
66#endif
67
68#if defined(MMU_DEBUG) || defined(AUDIT)
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69static int dbg = 0;
70module_param(dbg, bool, 0644);
37a7d8b0 71#endif
6aa8b732 72
582801a9
MT
73static int oos_shadow = 1;
74module_param(oos_shadow, bool, 0644);
75
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76#ifndef MMU_DEBUG
77#define ASSERT(x) do { } while (0)
78#else
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79#define ASSERT(x) \
80 if (!(x)) { \
81 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
82 __FILE__, __LINE__, #x); \
83 }
d6c69ee9 84#endif
6aa8b732 85
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86#define PT_FIRST_AVAIL_BITS_SHIFT 9
87#define PT64_SECOND_AVAIL_BITS_SHIFT 52
88
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89#define VALID_PAGE(x) ((x) != INVALID_PAGE)
90
91#define PT64_LEVEL_BITS 9
92
93#define PT64_LEVEL_SHIFT(level) \
d77c26fc 94 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
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95
96#define PT64_LEVEL_MASK(level) \
97 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
98
99#define PT64_INDEX(address, level)\
100 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
101
102
103#define PT32_LEVEL_BITS 10
104
105#define PT32_LEVEL_SHIFT(level) \
d77c26fc 106 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
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107
108#define PT32_LEVEL_MASK(level) \
109 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
110
111#define PT32_INDEX(address, level)\
112 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
113
114
27aba766 115#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
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116#define PT64_DIR_BASE_ADDR_MASK \
117 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
118
119#define PT32_BASE_ADDR_MASK PAGE_MASK
120#define PT32_DIR_BASE_ADDR_MASK \
121 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
122
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123#define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
124 | PT64_NX_MASK)
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125
126#define PFERR_PRESENT_MASK (1U << 0)
127#define PFERR_WRITE_MASK (1U << 1)
128#define PFERR_USER_MASK (1U << 2)
73b1087e 129#define PFERR_FETCH_MASK (1U << 4)
6aa8b732 130
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131#define PT_DIRECTORY_LEVEL 2
132#define PT_PAGE_TABLE_LEVEL 1
133
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134#define RMAP_EXT 4
135
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136#define ACC_EXEC_MASK 1
137#define ACC_WRITE_MASK PT_WRITABLE_MASK
138#define ACC_USER_MASK PT_USER_MASK
139#define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
140
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141#define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
142
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143struct kvm_rmap_desc {
144 u64 *shadow_ptes[RMAP_EXT];
145 struct kvm_rmap_desc *more;
146};
147
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148struct kvm_shadow_walk_iterator {
149 u64 addr;
150 hpa_t shadow_addr;
151 int level;
152 u64 *sptep;
153 unsigned index;
154};
155
156#define for_each_shadow_entry(_vcpu, _addr, _walker) \
157 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
158 shadow_walk_okay(&(_walker)); \
159 shadow_walk_next(&(_walker)))
160
161
4731d4c7
MT
162struct kvm_unsync_walk {
163 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
164};
165
ad8cfbe3
MT
166typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
167
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168static struct kmem_cache *pte_chain_cache;
169static struct kmem_cache *rmap_desc_cache;
d3d25b04 170static struct kmem_cache *mmu_page_header_cache;
b5a33a75 171
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172static u64 __read_mostly shadow_trap_nonpresent_pte;
173static u64 __read_mostly shadow_notrap_nonpresent_pte;
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SY
174static u64 __read_mostly shadow_base_present_pte;
175static u64 __read_mostly shadow_nx_mask;
176static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
177static u64 __read_mostly shadow_user_mask;
178static u64 __read_mostly shadow_accessed_mask;
179static u64 __read_mostly shadow_dirty_mask;
64d4d521 180static u64 __read_mostly shadow_mt_mask;
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181
182void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
183{
184 shadow_trap_nonpresent_pte = trap_pte;
185 shadow_notrap_nonpresent_pte = notrap_pte;
186}
187EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
188
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189void kvm_mmu_set_base_ptes(u64 base_pte)
190{
191 shadow_base_present_pte = base_pte;
192}
193EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
194
195void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
64d4d521 196 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 mt_mask)
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SY
197{
198 shadow_user_mask = user_mask;
199 shadow_accessed_mask = accessed_mask;
200 shadow_dirty_mask = dirty_mask;
201 shadow_nx_mask = nx_mask;
202 shadow_x_mask = x_mask;
64d4d521 203 shadow_mt_mask = mt_mask;
7b52345e
SY
204}
205EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
206
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207static int is_write_protection(struct kvm_vcpu *vcpu)
208{
ad312c7c 209 return vcpu->arch.cr0 & X86_CR0_WP;
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210}
211
212static int is_cpuid_PSE36(void)
213{
214 return 1;
215}
216
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217static int is_nx(struct kvm_vcpu *vcpu)
218{
ad312c7c 219 return vcpu->arch.shadow_efer & EFER_NX;
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220}
221
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222static int is_present_pte(unsigned long pte)
223{
224 return pte & PT_PRESENT_MASK;
225}
226
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227static int is_shadow_present_pte(u64 pte)
228{
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229 return pte != shadow_trap_nonpresent_pte
230 && pte != shadow_notrap_nonpresent_pte;
231}
232
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233static int is_large_pte(u64 pte)
234{
235 return pte & PT_PAGE_SIZE_MASK;
236}
237
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238static int is_writeble_pte(unsigned long pte)
239{
240 return pte & PT_WRITABLE_MASK;
241}
242
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243static int is_dirty_pte(unsigned long pte)
244{
7b52345e 245 return pte & shadow_dirty_mask;
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246}
247
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248static int is_rmap_pte(u64 pte)
249{
4b1a80fa 250 return is_shadow_present_pte(pte);
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251}
252
35149e21 253static pfn_t spte_to_pfn(u64 pte)
0b49ea86 254{
35149e21 255 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
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256}
257
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258static gfn_t pse36_gfn_delta(u32 gpte)
259{
260 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
261
262 return (gpte & PT32_DIR_PSE36_MASK) << shift;
263}
264
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265static void set_shadow_pte(u64 *sptep, u64 spte)
266{
267#ifdef CONFIG_X86_64
268 set_64bit((unsigned long *)sptep, spte);
269#else
270 set_64bit((unsigned long long *)sptep, spte);
271#endif
272}
273
e2dec939 274static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
2e3e5882 275 struct kmem_cache *base_cache, int min)
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276{
277 void *obj;
278
279 if (cache->nobjs >= min)
e2dec939 280 return 0;
714b93da 281 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 282 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
714b93da 283 if (!obj)
e2dec939 284 return -ENOMEM;
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285 cache->objects[cache->nobjs++] = obj;
286 }
e2dec939 287 return 0;
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288}
289
290static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
291{
292 while (mc->nobjs)
293 kfree(mc->objects[--mc->nobjs]);
294}
295
c1158e63 296static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
2e3e5882 297 int min)
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298{
299 struct page *page;
300
301 if (cache->nobjs >= min)
302 return 0;
303 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 304 page = alloc_page(GFP_KERNEL);
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305 if (!page)
306 return -ENOMEM;
307 set_page_private(page, 0);
308 cache->objects[cache->nobjs++] = page_address(page);
309 }
310 return 0;
311}
312
313static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
314{
315 while (mc->nobjs)
c4d198d5 316 free_page((unsigned long)mc->objects[--mc->nobjs]);
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317}
318
2e3e5882 319static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
714b93da 320{
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321 int r;
322
ad312c7c 323 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
2e3e5882 324 pte_chain_cache, 4);
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325 if (r)
326 goto out;
ad312c7c 327 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
c41ef344 328 rmap_desc_cache, 4);
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329 if (r)
330 goto out;
ad312c7c 331 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
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332 if (r)
333 goto out;
ad312c7c 334 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
2e3e5882 335 mmu_page_header_cache, 4);
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336out:
337 return r;
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338}
339
340static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
341{
ad312c7c
ZX
342 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
343 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
344 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
345 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
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346}
347
348static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
349 size_t size)
350{
351 void *p;
352
353 BUG_ON(!mc->nobjs);
354 p = mc->objects[--mc->nobjs];
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355 return p;
356}
357
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358static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
359{
ad312c7c 360 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
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361 sizeof(struct kvm_pte_chain));
362}
363
90cb0529 364static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
714b93da 365{
90cb0529 366 kfree(pc);
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367}
368
369static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
370{
ad312c7c 371 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
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372 sizeof(struct kvm_rmap_desc));
373}
374
90cb0529 375static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
714b93da 376{
90cb0529 377 kfree(rd);
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378}
379
05da4558
MT
380/*
381 * Return the pointer to the largepage write count for a given
382 * gfn, handling slots that are not large page aligned.
383 */
384static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
385{
386 unsigned long idx;
387
388 idx = (gfn / KVM_PAGES_PER_HPAGE) -
389 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
390 return &slot->lpage_info[idx].write_count;
391}
392
393static void account_shadowed(struct kvm *kvm, gfn_t gfn)
394{
395 int *write_count;
396
2843099f
IE
397 gfn = unalias_gfn(kvm, gfn);
398 write_count = slot_largepage_idx(gfn,
399 gfn_to_memslot_unaliased(kvm, gfn));
05da4558 400 *write_count += 1;
05da4558
MT
401}
402
403static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
404{
405 int *write_count;
406
2843099f
IE
407 gfn = unalias_gfn(kvm, gfn);
408 write_count = slot_largepage_idx(gfn,
409 gfn_to_memslot_unaliased(kvm, gfn));
05da4558
MT
410 *write_count -= 1;
411 WARN_ON(*write_count < 0);
412}
413
414static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
415{
2843099f 416 struct kvm_memory_slot *slot;
05da4558
MT
417 int *largepage_idx;
418
2843099f
IE
419 gfn = unalias_gfn(kvm, gfn);
420 slot = gfn_to_memslot_unaliased(kvm, gfn);
05da4558
MT
421 if (slot) {
422 largepage_idx = slot_largepage_idx(gfn, slot);
423 return *largepage_idx;
424 }
425
426 return 1;
427}
428
429static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
430{
431 struct vm_area_struct *vma;
432 unsigned long addr;
4c2155ce 433 int ret = 0;
05da4558
MT
434
435 addr = gfn_to_hva(kvm, gfn);
436 if (kvm_is_error_hva(addr))
4c2155ce 437 return ret;
05da4558 438
4c2155ce 439 down_read(&current->mm->mmap_sem);
05da4558
MT
440 vma = find_vma(current->mm, addr);
441 if (vma && is_vm_hugetlb_page(vma))
4c2155ce
MT
442 ret = 1;
443 up_read(&current->mm->mmap_sem);
05da4558 444
4c2155ce 445 return ret;
05da4558
MT
446}
447
448static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
449{
450 struct kvm_memory_slot *slot;
451
452 if (has_wrprotected_page(vcpu->kvm, large_gfn))
453 return 0;
454
455 if (!host_largepage_backed(vcpu->kvm, large_gfn))
456 return 0;
457
458 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
459 if (slot && slot->dirty_bitmap)
460 return 0;
461
462 return 1;
463}
464
290fc38d
IE
465/*
466 * Take gfn and return the reverse mapping to it.
467 * Note: gfn must be unaliased before this function get called
468 */
469
05da4558 470static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
290fc38d
IE
471{
472 struct kvm_memory_slot *slot;
05da4558 473 unsigned long idx;
290fc38d
IE
474
475 slot = gfn_to_memslot(kvm, gfn);
05da4558
MT
476 if (!lpage)
477 return &slot->rmap[gfn - slot->base_gfn];
478
479 idx = (gfn / KVM_PAGES_PER_HPAGE) -
480 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
481
482 return &slot->lpage_info[idx].rmap_pde;
290fc38d
IE
483}
484
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485/*
486 * Reverse mapping data structures:
487 *
290fc38d
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488 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
489 * that points to page_address(page).
cd4a4e53 490 *
290fc38d
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491 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
492 * containing more mappings.
cd4a4e53 493 */
05da4558 494static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
cd4a4e53 495{
4db35314 496 struct kvm_mmu_page *sp;
cd4a4e53 497 struct kvm_rmap_desc *desc;
290fc38d 498 unsigned long *rmapp;
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499 int i;
500
501 if (!is_rmap_pte(*spte))
502 return;
290fc38d 503 gfn = unalias_gfn(vcpu->kvm, gfn);
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AK
504 sp = page_header(__pa(spte));
505 sp->gfns[spte - sp->spt] = gfn;
05da4558 506 rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
290fc38d 507 if (!*rmapp) {
cd4a4e53 508 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
290fc38d
IE
509 *rmapp = (unsigned long)spte;
510 } else if (!(*rmapp & 1)) {
cd4a4e53 511 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
714b93da 512 desc = mmu_alloc_rmap_desc(vcpu);
290fc38d 513 desc->shadow_ptes[0] = (u64 *)*rmapp;
cd4a4e53 514 desc->shadow_ptes[1] = spte;
290fc38d 515 *rmapp = (unsigned long)desc | 1;
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516 } else {
517 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
290fc38d 518 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
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519 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
520 desc = desc->more;
521 if (desc->shadow_ptes[RMAP_EXT-1]) {
714b93da 522 desc->more = mmu_alloc_rmap_desc(vcpu);
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523 desc = desc->more;
524 }
525 for (i = 0; desc->shadow_ptes[i]; ++i)
526 ;
527 desc->shadow_ptes[i] = spte;
528 }
529}
530
290fc38d 531static void rmap_desc_remove_entry(unsigned long *rmapp,
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532 struct kvm_rmap_desc *desc,
533 int i,
534 struct kvm_rmap_desc *prev_desc)
535{
536 int j;
537
538 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
539 ;
540 desc->shadow_ptes[i] = desc->shadow_ptes[j];
11718b4d 541 desc->shadow_ptes[j] = NULL;
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542 if (j != 0)
543 return;
544 if (!prev_desc && !desc->more)
290fc38d 545 *rmapp = (unsigned long)desc->shadow_ptes[0];
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546 else
547 if (prev_desc)
548 prev_desc->more = desc->more;
549 else
290fc38d 550 *rmapp = (unsigned long)desc->more | 1;
90cb0529 551 mmu_free_rmap_desc(desc);
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552}
553
290fc38d 554static void rmap_remove(struct kvm *kvm, u64 *spte)
cd4a4e53 555{
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556 struct kvm_rmap_desc *desc;
557 struct kvm_rmap_desc *prev_desc;
4db35314 558 struct kvm_mmu_page *sp;
35149e21 559 pfn_t pfn;
290fc38d 560 unsigned long *rmapp;
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561 int i;
562
563 if (!is_rmap_pte(*spte))
564 return;
4db35314 565 sp = page_header(__pa(spte));
35149e21 566 pfn = spte_to_pfn(*spte);
7b52345e 567 if (*spte & shadow_accessed_mask)
35149e21 568 kvm_set_pfn_accessed(pfn);
b4231d61 569 if (is_writeble_pte(*spte))
35149e21 570 kvm_release_pfn_dirty(pfn);
b4231d61 571 else
35149e21 572 kvm_release_pfn_clean(pfn);
05da4558 573 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
290fc38d 574 if (!*rmapp) {
cd4a4e53
AK
575 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
576 BUG();
290fc38d 577 } else if (!(*rmapp & 1)) {
cd4a4e53 578 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
290fc38d 579 if ((u64 *)*rmapp != spte) {
cd4a4e53
AK
580 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
581 spte, *spte);
582 BUG();
583 }
290fc38d 584 *rmapp = 0;
cd4a4e53
AK
585 } else {
586 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
290fc38d 587 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
cd4a4e53
AK
588 prev_desc = NULL;
589 while (desc) {
590 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
591 if (desc->shadow_ptes[i] == spte) {
290fc38d 592 rmap_desc_remove_entry(rmapp,
714b93da 593 desc, i,
cd4a4e53
AK
594 prev_desc);
595 return;
596 }
597 prev_desc = desc;
598 desc = desc->more;
599 }
600 BUG();
601 }
602}
603
98348e95 604static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
374cbac0 605{
374cbac0 606 struct kvm_rmap_desc *desc;
98348e95
IE
607 struct kvm_rmap_desc *prev_desc;
608 u64 *prev_spte;
609 int i;
610
611 if (!*rmapp)
612 return NULL;
613 else if (!(*rmapp & 1)) {
614 if (!spte)
615 return (u64 *)*rmapp;
616 return NULL;
617 }
618 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
619 prev_desc = NULL;
620 prev_spte = NULL;
621 while (desc) {
622 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
623 if (prev_spte == spte)
624 return desc->shadow_ptes[i];
625 prev_spte = desc->shadow_ptes[i];
626 }
627 desc = desc->more;
628 }
629 return NULL;
630}
631
b1a36821 632static int rmap_write_protect(struct kvm *kvm, u64 gfn)
98348e95 633{
290fc38d 634 unsigned long *rmapp;
374cbac0 635 u64 *spte;
caa5b8a5 636 int write_protected = 0;
374cbac0 637
4a4c9924 638 gfn = unalias_gfn(kvm, gfn);
05da4558 639 rmapp = gfn_to_rmap(kvm, gfn, 0);
374cbac0 640
98348e95
IE
641 spte = rmap_next(kvm, rmapp, NULL);
642 while (spte) {
374cbac0 643 BUG_ON(!spte);
374cbac0 644 BUG_ON(!(*spte & PT_PRESENT_MASK));
374cbac0 645 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
caa5b8a5 646 if (is_writeble_pte(*spte)) {
9647c14c 647 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
caa5b8a5
ED
648 write_protected = 1;
649 }
9647c14c 650 spte = rmap_next(kvm, rmapp, spte);
374cbac0 651 }
855149aa 652 if (write_protected) {
35149e21 653 pfn_t pfn;
855149aa
IE
654
655 spte = rmap_next(kvm, rmapp, NULL);
35149e21
AL
656 pfn = spte_to_pfn(*spte);
657 kvm_set_pfn_dirty(pfn);
855149aa
IE
658 }
659
05da4558
MT
660 /* check for huge page mappings */
661 rmapp = gfn_to_rmap(kvm, gfn, 1);
662 spte = rmap_next(kvm, rmapp, NULL);
663 while (spte) {
664 BUG_ON(!spte);
665 BUG_ON(!(*spte & PT_PRESENT_MASK));
666 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
667 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
668 if (is_writeble_pte(*spte)) {
669 rmap_remove(kvm, spte);
670 --kvm->stat.lpages;
671 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
6597ca09 672 spte = NULL;
05da4558
MT
673 write_protected = 1;
674 }
675 spte = rmap_next(kvm, rmapp, spte);
676 }
677
b1a36821 678 return write_protected;
374cbac0
AK
679}
680
e930bffe
AA
681static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
682{
683 u64 *spte;
684 int need_tlb_flush = 0;
685
686 while ((spte = rmap_next(kvm, rmapp, NULL))) {
687 BUG_ON(!(*spte & PT_PRESENT_MASK));
688 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
689 rmap_remove(kvm, spte);
690 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
691 need_tlb_flush = 1;
692 }
693 return need_tlb_flush;
694}
695
696static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
697 int (*handler)(struct kvm *kvm, unsigned long *rmapp))
698{
699 int i;
700 int retval = 0;
701
702 /*
703 * If mmap_sem isn't taken, we can look the memslots with only
704 * the mmu_lock by skipping over the slots with userspace_addr == 0.
705 */
706 for (i = 0; i < kvm->nmemslots; i++) {
707 struct kvm_memory_slot *memslot = &kvm->memslots[i];
708 unsigned long start = memslot->userspace_addr;
709 unsigned long end;
710
711 /* mmu_lock protects userspace_addr */
712 if (!start)
713 continue;
714
715 end = start + (memslot->npages << PAGE_SHIFT);
716 if (hva >= start && hva < end) {
717 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
718 retval |= handler(kvm, &memslot->rmap[gfn_offset]);
719 retval |= handler(kvm,
720 &memslot->lpage_info[
721 gfn_offset /
722 KVM_PAGES_PER_HPAGE].rmap_pde);
723 }
724 }
725
726 return retval;
727}
728
729int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
730{
731 return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
732}
733
734static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
735{
736 u64 *spte;
737 int young = 0;
738
534e38b4
SY
739 /* always return old for EPT */
740 if (!shadow_accessed_mask)
741 return 0;
742
e930bffe
AA
743 spte = rmap_next(kvm, rmapp, NULL);
744 while (spte) {
745 int _young;
746 u64 _spte = *spte;
747 BUG_ON(!(_spte & PT_PRESENT_MASK));
748 _young = _spte & PT_ACCESSED_MASK;
749 if (_young) {
750 young = 1;
751 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
752 }
753 spte = rmap_next(kvm, rmapp, spte);
754 }
755 return young;
756}
757
758int kvm_age_hva(struct kvm *kvm, unsigned long hva)
759{
760 return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
761}
762
d6c69ee9 763#ifdef MMU_DEBUG
47ad8e68 764static int is_empty_shadow_page(u64 *spt)
6aa8b732 765{
139bdb2d
AK
766 u64 *pos;
767 u64 *end;
768
47ad8e68 769 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
3c915510 770 if (is_shadow_present_pte(*pos)) {
b8688d51 771 printk(KERN_ERR "%s: %p %llx\n", __func__,
139bdb2d 772 pos, *pos);
6aa8b732 773 return 0;
139bdb2d 774 }
6aa8b732
AK
775 return 1;
776}
d6c69ee9 777#endif
6aa8b732 778
4db35314 779static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
260746c0 780{
4db35314
AK
781 ASSERT(is_empty_shadow_page(sp->spt));
782 list_del(&sp->link);
783 __free_page(virt_to_page(sp->spt));
784 __free_page(virt_to_page(sp->gfns));
785 kfree(sp);
f05e70ac 786 ++kvm->arch.n_free_mmu_pages;
260746c0
AK
787}
788
cea0f0e7
AK
789static unsigned kvm_page_table_hashfn(gfn_t gfn)
790{
1ae0a13d 791 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
cea0f0e7
AK
792}
793
25c0de2c
AK
794static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
795 u64 *parent_pte)
6aa8b732 796{
4db35314 797 struct kvm_mmu_page *sp;
6aa8b732 798
ad312c7c
ZX
799 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
800 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
801 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
4db35314 802 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
f05e70ac 803 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
6cffe8ca 804 INIT_LIST_HEAD(&sp->oos_link);
4db35314 805 ASSERT(is_empty_shadow_page(sp->spt));
291f26bc 806 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
4db35314
AK
807 sp->multimapped = 0;
808 sp->parent_pte = parent_pte;
f05e70ac 809 --vcpu->kvm->arch.n_free_mmu_pages;
4db35314 810 return sp;
6aa8b732
AK
811}
812
714b93da 813static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
4db35314 814 struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7
AK
815{
816 struct kvm_pte_chain *pte_chain;
817 struct hlist_node *node;
818 int i;
819
820 if (!parent_pte)
821 return;
4db35314
AK
822 if (!sp->multimapped) {
823 u64 *old = sp->parent_pte;
cea0f0e7
AK
824
825 if (!old) {
4db35314 826 sp->parent_pte = parent_pte;
cea0f0e7
AK
827 return;
828 }
4db35314 829 sp->multimapped = 1;
714b93da 830 pte_chain = mmu_alloc_pte_chain(vcpu);
4db35314
AK
831 INIT_HLIST_HEAD(&sp->parent_ptes);
832 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
833 pte_chain->parent_ptes[0] = old;
834 }
4db35314 835 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
cea0f0e7
AK
836 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
837 continue;
838 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
839 if (!pte_chain->parent_ptes[i]) {
840 pte_chain->parent_ptes[i] = parent_pte;
841 return;
842 }
843 }
714b93da 844 pte_chain = mmu_alloc_pte_chain(vcpu);
cea0f0e7 845 BUG_ON(!pte_chain);
4db35314 846 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
847 pte_chain->parent_ptes[0] = parent_pte;
848}
849
4db35314 850static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
cea0f0e7
AK
851 u64 *parent_pte)
852{
853 struct kvm_pte_chain *pte_chain;
854 struct hlist_node *node;
855 int i;
856
4db35314
AK
857 if (!sp->multimapped) {
858 BUG_ON(sp->parent_pte != parent_pte);
859 sp->parent_pte = NULL;
cea0f0e7
AK
860 return;
861 }
4db35314 862 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
cea0f0e7
AK
863 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
864 if (!pte_chain->parent_ptes[i])
865 break;
866 if (pte_chain->parent_ptes[i] != parent_pte)
867 continue;
697fe2e2
AK
868 while (i + 1 < NR_PTE_CHAIN_ENTRIES
869 && pte_chain->parent_ptes[i + 1]) {
cea0f0e7
AK
870 pte_chain->parent_ptes[i]
871 = pte_chain->parent_ptes[i + 1];
872 ++i;
873 }
874 pte_chain->parent_ptes[i] = NULL;
697fe2e2
AK
875 if (i == 0) {
876 hlist_del(&pte_chain->link);
90cb0529 877 mmu_free_pte_chain(pte_chain);
4db35314
AK
878 if (hlist_empty(&sp->parent_ptes)) {
879 sp->multimapped = 0;
880 sp->parent_pte = NULL;
697fe2e2
AK
881 }
882 }
cea0f0e7
AK
883 return;
884 }
885 BUG();
886}
887
ad8cfbe3
MT
888
889static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
890 mmu_parent_walk_fn fn)
891{
892 struct kvm_pte_chain *pte_chain;
893 struct hlist_node *node;
894 struct kvm_mmu_page *parent_sp;
895 int i;
896
897 if (!sp->multimapped && sp->parent_pte) {
898 parent_sp = page_header(__pa(sp->parent_pte));
899 fn(vcpu, parent_sp);
900 mmu_parent_walk(vcpu, parent_sp, fn);
901 return;
902 }
903 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
904 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
905 if (!pte_chain->parent_ptes[i])
906 break;
907 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
908 fn(vcpu, parent_sp);
909 mmu_parent_walk(vcpu, parent_sp, fn);
910 }
911}
912
0074ff63
MT
913static void kvm_mmu_update_unsync_bitmap(u64 *spte)
914{
915 unsigned int index;
916 struct kvm_mmu_page *sp = page_header(__pa(spte));
917
918 index = spte - sp->spt;
60c8aec6
MT
919 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
920 sp->unsync_children++;
921 WARN_ON(!sp->unsync_children);
0074ff63
MT
922}
923
924static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
925{
926 struct kvm_pte_chain *pte_chain;
927 struct hlist_node *node;
928 int i;
929
930 if (!sp->parent_pte)
931 return;
932
933 if (!sp->multimapped) {
934 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
935 return;
936 }
937
938 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
939 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
940 if (!pte_chain->parent_ptes[i])
941 break;
942 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
943 }
944}
945
946static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
947{
0074ff63
MT
948 kvm_mmu_update_parents_unsync(sp);
949 return 1;
950}
951
952static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
953 struct kvm_mmu_page *sp)
954{
955 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
956 kvm_mmu_update_parents_unsync(sp);
957}
958
d761a501
AK
959static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
960 struct kvm_mmu_page *sp)
961{
962 int i;
963
964 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
965 sp->spt[i] = shadow_trap_nonpresent_pte;
966}
967
e8bc217a
MT
968static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
969 struct kvm_mmu_page *sp)
970{
971 return 1;
972}
973
a7052897
MT
974static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
975{
976}
977
60c8aec6
MT
978#define KVM_PAGE_ARRAY_NR 16
979
980struct kvm_mmu_pages {
981 struct mmu_page_and_offset {
982 struct kvm_mmu_page *sp;
983 unsigned int idx;
984 } page[KVM_PAGE_ARRAY_NR];
985 unsigned int nr;
986};
987
0074ff63
MT
988#define for_each_unsync_children(bitmap, idx) \
989 for (idx = find_first_bit(bitmap, 512); \
990 idx < 512; \
991 idx = find_next_bit(bitmap, 512, idx+1))
992
60c8aec6
MT
993int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
994 int idx)
4731d4c7 995{
60c8aec6 996 int i;
4731d4c7 997
60c8aec6
MT
998 if (sp->unsync)
999 for (i=0; i < pvec->nr; i++)
1000 if (pvec->page[i].sp == sp)
1001 return 0;
1002
1003 pvec->page[pvec->nr].sp = sp;
1004 pvec->page[pvec->nr].idx = idx;
1005 pvec->nr++;
1006 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1007}
1008
1009static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1010 struct kvm_mmu_pages *pvec)
1011{
1012 int i, ret, nr_unsync_leaf = 0;
4731d4c7 1013
0074ff63 1014 for_each_unsync_children(sp->unsync_child_bitmap, i) {
4731d4c7
MT
1015 u64 ent = sp->spt[i];
1016
87917239 1017 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
4731d4c7
MT
1018 struct kvm_mmu_page *child;
1019 child = page_header(ent & PT64_BASE_ADDR_MASK);
1020
1021 if (child->unsync_children) {
60c8aec6
MT
1022 if (mmu_pages_add(pvec, child, i))
1023 return -ENOSPC;
1024
1025 ret = __mmu_unsync_walk(child, pvec);
1026 if (!ret)
1027 __clear_bit(i, sp->unsync_child_bitmap);
1028 else if (ret > 0)
1029 nr_unsync_leaf += ret;
1030 else
4731d4c7
MT
1031 return ret;
1032 }
1033
1034 if (child->unsync) {
60c8aec6
MT
1035 nr_unsync_leaf++;
1036 if (mmu_pages_add(pvec, child, i))
1037 return -ENOSPC;
4731d4c7
MT
1038 }
1039 }
1040 }
1041
0074ff63 1042 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
4731d4c7
MT
1043 sp->unsync_children = 0;
1044
60c8aec6
MT
1045 return nr_unsync_leaf;
1046}
1047
1048static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1049 struct kvm_mmu_pages *pvec)
1050{
1051 if (!sp->unsync_children)
1052 return 0;
1053
1054 mmu_pages_add(pvec, sp, 0);
1055 return __mmu_unsync_walk(sp, pvec);
4731d4c7
MT
1056}
1057
4db35314 1058static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
cea0f0e7
AK
1059{
1060 unsigned index;
1061 struct hlist_head *bucket;
4db35314 1062 struct kvm_mmu_page *sp;
cea0f0e7
AK
1063 struct hlist_node *node;
1064
b8688d51 1065 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1ae0a13d 1066 index = kvm_page_table_hashfn(gfn);
f05e70ac 1067 bucket = &kvm->arch.mmu_page_hash[index];
4db35314 1068 hlist_for_each_entry(sp, node, bucket, hash_link)
2e53d63a
MT
1069 if (sp->gfn == gfn && !sp->role.metaphysical
1070 && !sp->role.invalid) {
cea0f0e7 1071 pgprintk("%s: found role %x\n",
b8688d51 1072 __func__, sp->role.word);
4db35314 1073 return sp;
cea0f0e7
AK
1074 }
1075 return NULL;
1076}
1077
6cffe8ca
MT
1078static void kvm_unlink_unsync_global(struct kvm *kvm, struct kvm_mmu_page *sp)
1079{
1080 list_del(&sp->oos_link);
1081 --kvm->stat.mmu_unsync_global;
1082}
1083
4731d4c7
MT
1084static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1085{
1086 WARN_ON(!sp->unsync);
1087 sp->unsync = 0;
6cffe8ca
MT
1088 if (sp->global)
1089 kvm_unlink_unsync_global(kvm, sp);
4731d4c7
MT
1090 --kvm->stat.mmu_unsync;
1091}
1092
1093static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1094
1095static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1096{
1097 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1098 kvm_mmu_zap_page(vcpu->kvm, sp);
1099 return 1;
1100 }
1101
b1a36821
MT
1102 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1103 kvm_flush_remote_tlbs(vcpu->kvm);
0c0f40bd 1104 kvm_unlink_unsync_page(vcpu->kvm, sp);
4731d4c7
MT
1105 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1106 kvm_mmu_zap_page(vcpu->kvm, sp);
1107 return 1;
1108 }
1109
1110 kvm_mmu_flush_tlb(vcpu);
4731d4c7
MT
1111 return 0;
1112}
1113
60c8aec6
MT
1114struct mmu_page_path {
1115 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1116 unsigned int idx[PT64_ROOT_LEVEL-1];
4731d4c7
MT
1117};
1118
60c8aec6
MT
1119#define for_each_sp(pvec, sp, parents, i) \
1120 for (i = mmu_pages_next(&pvec, &parents, -1), \
1121 sp = pvec.page[i].sp; \
1122 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1123 i = mmu_pages_next(&pvec, &parents, i))
1124
1125int mmu_pages_next(struct kvm_mmu_pages *pvec, struct mmu_page_path *parents,
1126 int i)
1127{
1128 int n;
1129
1130 for (n = i+1; n < pvec->nr; n++) {
1131 struct kvm_mmu_page *sp = pvec->page[n].sp;
1132
1133 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1134 parents->idx[0] = pvec->page[n].idx;
1135 return n;
1136 }
1137
1138 parents->parent[sp->role.level-2] = sp;
1139 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1140 }
1141
1142 return n;
1143}
1144
1145void mmu_pages_clear_parents(struct mmu_page_path *parents)
4731d4c7 1146{
60c8aec6
MT
1147 struct kvm_mmu_page *sp;
1148 unsigned int level = 0;
1149
1150 do {
1151 unsigned int idx = parents->idx[level];
4731d4c7 1152
60c8aec6
MT
1153 sp = parents->parent[level];
1154 if (!sp)
1155 return;
1156
1157 --sp->unsync_children;
1158 WARN_ON((int)sp->unsync_children < 0);
1159 __clear_bit(idx, sp->unsync_child_bitmap);
1160 level++;
1161 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
4731d4c7
MT
1162}
1163
60c8aec6
MT
1164static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1165 struct mmu_page_path *parents,
1166 struct kvm_mmu_pages *pvec)
4731d4c7 1167{
60c8aec6
MT
1168 parents->parent[parent->role.level-1] = NULL;
1169 pvec->nr = 0;
1170}
4731d4c7 1171
60c8aec6
MT
1172static void mmu_sync_children(struct kvm_vcpu *vcpu,
1173 struct kvm_mmu_page *parent)
1174{
1175 int i;
1176 struct kvm_mmu_page *sp;
1177 struct mmu_page_path parents;
1178 struct kvm_mmu_pages pages;
1179
1180 kvm_mmu_pages_init(parent, &parents, &pages);
1181 while (mmu_unsync_walk(parent, &pages)) {
b1a36821
MT
1182 int protected = 0;
1183
1184 for_each_sp(pages, sp, parents, i)
1185 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1186
1187 if (protected)
1188 kvm_flush_remote_tlbs(vcpu->kvm);
1189
60c8aec6
MT
1190 for_each_sp(pages, sp, parents, i) {
1191 kvm_sync_page(vcpu, sp);
1192 mmu_pages_clear_parents(&parents);
1193 }
4731d4c7 1194 cond_resched_lock(&vcpu->kvm->mmu_lock);
60c8aec6
MT
1195 kvm_mmu_pages_init(parent, &parents, &pages);
1196 }
4731d4c7
MT
1197}
1198
cea0f0e7
AK
1199static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1200 gfn_t gfn,
1201 gva_t gaddr,
1202 unsigned level,
1203 int metaphysical,
41074d07 1204 unsigned access,
f7d9c7b7 1205 u64 *parent_pte)
cea0f0e7
AK
1206{
1207 union kvm_mmu_page_role role;
1208 unsigned index;
1209 unsigned quadrant;
1210 struct hlist_head *bucket;
4db35314 1211 struct kvm_mmu_page *sp;
4731d4c7 1212 struct hlist_node *node, *tmp;
cea0f0e7 1213
a770f6f2 1214 role = vcpu->arch.mmu.base_role;
cea0f0e7
AK
1215 role.level = level;
1216 role.metaphysical = metaphysical;
41074d07 1217 role.access = access;
ad312c7c 1218 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
cea0f0e7
AK
1219 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1220 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1221 role.quadrant = quadrant;
1222 }
b8688d51 1223 pgprintk("%s: looking gfn %lx role %x\n", __func__,
cea0f0e7 1224 gfn, role.word);
1ae0a13d 1225 index = kvm_page_table_hashfn(gfn);
f05e70ac 1226 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4731d4c7
MT
1227 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1228 if (sp->gfn == gfn) {
1229 if (sp->unsync)
1230 if (kvm_sync_page(vcpu, sp))
1231 continue;
1232
1233 if (sp->role.word != role.word)
1234 continue;
1235
4db35314 1236 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
0074ff63
MT
1237 if (sp->unsync_children) {
1238 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1239 kvm_mmu_mark_parents_unsync(vcpu, sp);
1240 }
b8688d51 1241 pgprintk("%s: found\n", __func__);
4db35314 1242 return sp;
cea0f0e7 1243 }
dfc5aa00 1244 ++vcpu->kvm->stat.mmu_cache_miss;
4db35314
AK
1245 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1246 if (!sp)
1247 return sp;
b8688d51 1248 pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
4db35314
AK
1249 sp->gfn = gfn;
1250 sp->role = role;
e2078318 1251 sp->global = role.cr4_pge;
4db35314 1252 hlist_add_head(&sp->hash_link, bucket);
4731d4c7 1253 if (!metaphysical) {
b1a36821
MT
1254 if (rmap_write_protect(vcpu->kvm, gfn))
1255 kvm_flush_remote_tlbs(vcpu->kvm);
4731d4c7
MT
1256 account_shadowed(vcpu->kvm, gfn);
1257 }
131d8279
AK
1258 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1259 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1260 else
1261 nonpaging_prefetch_page(vcpu, sp);
4db35314 1262 return sp;
cea0f0e7
AK
1263}
1264
2d11123a
AK
1265static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1266 struct kvm_vcpu *vcpu, u64 addr)
1267{
1268 iterator->addr = addr;
1269 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1270 iterator->level = vcpu->arch.mmu.shadow_root_level;
1271 if (iterator->level == PT32E_ROOT_LEVEL) {
1272 iterator->shadow_addr
1273 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1274 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1275 --iterator->level;
1276 if (!iterator->shadow_addr)
1277 iterator->level = 0;
1278 }
1279}
1280
1281static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1282{
1283 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1284 return false;
1285 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1286 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1287 return true;
1288}
1289
1290static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1291{
1292 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1293 --iterator->level;
1294}
1295
90cb0529 1296static void kvm_mmu_page_unlink_children(struct kvm *kvm,
4db35314 1297 struct kvm_mmu_page *sp)
a436036b 1298{
697fe2e2
AK
1299 unsigned i;
1300 u64 *pt;
1301 u64 ent;
1302
4db35314 1303 pt = sp->spt;
697fe2e2 1304
4db35314 1305 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
697fe2e2 1306 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
c7addb90 1307 if (is_shadow_present_pte(pt[i]))
290fc38d 1308 rmap_remove(kvm, &pt[i]);
c7addb90 1309 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2
AK
1310 }
1311 return;
1312 }
1313
1314 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1315 ent = pt[i];
1316
05da4558
MT
1317 if (is_shadow_present_pte(ent)) {
1318 if (!is_large_pte(ent)) {
1319 ent &= PT64_BASE_ADDR_MASK;
1320 mmu_page_remove_parent_pte(page_header(ent),
1321 &pt[i]);
1322 } else {
1323 --kvm->stat.lpages;
1324 rmap_remove(kvm, &pt[i]);
1325 }
1326 }
c7addb90 1327 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2 1328 }
a436036b
AK
1329}
1330
4db35314 1331static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7 1332{
4db35314 1333 mmu_page_remove_parent_pte(sp, parent_pte);
a436036b
AK
1334}
1335
12b7d28f
AK
1336static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1337{
1338 int i;
1339
1340 for (i = 0; i < KVM_MAX_VCPUS; ++i)
1341 if (kvm->vcpus[i])
ad312c7c 1342 kvm->vcpus[i]->arch.last_pte_updated = NULL;
12b7d28f
AK
1343}
1344
31aa2b44 1345static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
a436036b
AK
1346{
1347 u64 *parent_pte;
1348
4db35314
AK
1349 while (sp->multimapped || sp->parent_pte) {
1350 if (!sp->multimapped)
1351 parent_pte = sp->parent_pte;
a436036b
AK
1352 else {
1353 struct kvm_pte_chain *chain;
1354
4db35314 1355 chain = container_of(sp->parent_ptes.first,
a436036b
AK
1356 struct kvm_pte_chain, link);
1357 parent_pte = chain->parent_ptes[0];
1358 }
697fe2e2 1359 BUG_ON(!parent_pte);
4db35314 1360 kvm_mmu_put_page(sp, parent_pte);
c7addb90 1361 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
a436036b 1362 }
31aa2b44
AK
1363}
1364
60c8aec6
MT
1365static int mmu_zap_unsync_children(struct kvm *kvm,
1366 struct kvm_mmu_page *parent)
4731d4c7 1367{
60c8aec6
MT
1368 int i, zapped = 0;
1369 struct mmu_page_path parents;
1370 struct kvm_mmu_pages pages;
4731d4c7 1371
60c8aec6 1372 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
4731d4c7 1373 return 0;
60c8aec6
MT
1374
1375 kvm_mmu_pages_init(parent, &parents, &pages);
1376 while (mmu_unsync_walk(parent, &pages)) {
1377 struct kvm_mmu_page *sp;
1378
1379 for_each_sp(pages, sp, parents, i) {
1380 kvm_mmu_zap_page(kvm, sp);
1381 mmu_pages_clear_parents(&parents);
1382 }
1383 zapped += pages.nr;
1384 kvm_mmu_pages_init(parent, &parents, &pages);
1385 }
1386
1387 return zapped;
4731d4c7
MT
1388}
1389
07385413 1390static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
31aa2b44 1391{
4731d4c7 1392 int ret;
31aa2b44 1393 ++kvm->stat.mmu_shadow_zapped;
4731d4c7 1394 ret = mmu_zap_unsync_children(kvm, sp);
4db35314 1395 kvm_mmu_page_unlink_children(kvm, sp);
31aa2b44 1396 kvm_mmu_unlink_parents(kvm, sp);
5b5c6a5a
AK
1397 kvm_flush_remote_tlbs(kvm);
1398 if (!sp->role.invalid && !sp->role.metaphysical)
1399 unaccount_shadowed(kvm, sp->gfn);
4731d4c7
MT
1400 if (sp->unsync)
1401 kvm_unlink_unsync_page(kvm, sp);
4db35314
AK
1402 if (!sp->root_count) {
1403 hlist_del(&sp->hash_link);
1404 kvm_mmu_free_page(kvm, sp);
2e53d63a 1405 } else {
2e53d63a 1406 sp->role.invalid = 1;
5b5c6a5a 1407 list_move(&sp->link, &kvm->arch.active_mmu_pages);
2e53d63a
MT
1408 kvm_reload_remote_mmus(kvm);
1409 }
12b7d28f 1410 kvm_mmu_reset_last_pte_updated(kvm);
4731d4c7 1411 return ret;
a436036b
AK
1412}
1413
82ce2c96
IE
1414/*
1415 * Changing the number of mmu pages allocated to the vm
1416 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1417 */
1418void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1419{
1420 /*
1421 * If we set the number of mmu pages to be smaller be than the
1422 * number of actived pages , we must to free some mmu pages before we
1423 * change the value
1424 */
1425
f05e70ac 1426 if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
82ce2c96 1427 kvm_nr_mmu_pages) {
f05e70ac
ZX
1428 int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
1429 - kvm->arch.n_free_mmu_pages;
82ce2c96
IE
1430
1431 while (n_used_mmu_pages > kvm_nr_mmu_pages) {
1432 struct kvm_mmu_page *page;
1433
f05e70ac 1434 page = container_of(kvm->arch.active_mmu_pages.prev,
82ce2c96
IE
1435 struct kvm_mmu_page, link);
1436 kvm_mmu_zap_page(kvm, page);
1437 n_used_mmu_pages--;
1438 }
f05e70ac 1439 kvm->arch.n_free_mmu_pages = 0;
82ce2c96
IE
1440 }
1441 else
f05e70ac
ZX
1442 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1443 - kvm->arch.n_alloc_mmu_pages;
82ce2c96 1444
f05e70ac 1445 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
82ce2c96
IE
1446}
1447
f67a46f4 1448static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
a436036b
AK
1449{
1450 unsigned index;
1451 struct hlist_head *bucket;
4db35314 1452 struct kvm_mmu_page *sp;
a436036b
AK
1453 struct hlist_node *node, *n;
1454 int r;
1455
b8688d51 1456 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
a436036b 1457 r = 0;
1ae0a13d 1458 index = kvm_page_table_hashfn(gfn);
f05e70ac 1459 bucket = &kvm->arch.mmu_page_hash[index];
4db35314
AK
1460 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1461 if (sp->gfn == gfn && !sp->role.metaphysical) {
b8688d51 1462 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
4db35314 1463 sp->role.word);
a436036b 1464 r = 1;
07385413
MT
1465 if (kvm_mmu_zap_page(kvm, sp))
1466 n = bucket->first;
a436036b
AK
1467 }
1468 return r;
cea0f0e7
AK
1469}
1470
f67a46f4 1471static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
97a0a01e 1472{
4677a3b6
AK
1473 unsigned index;
1474 struct hlist_head *bucket;
4db35314 1475 struct kvm_mmu_page *sp;
4677a3b6 1476 struct hlist_node *node, *nn;
97a0a01e 1477
4677a3b6
AK
1478 index = kvm_page_table_hashfn(gfn);
1479 bucket = &kvm->arch.mmu_page_hash[index];
1480 hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
1481 if (sp->gfn == gfn && !sp->role.metaphysical
1482 && !sp->role.invalid) {
1483 pgprintk("%s: zap %lx %x\n",
1484 __func__, gfn, sp->role.word);
1485 kvm_mmu_zap_page(kvm, sp);
1486 }
97a0a01e
AK
1487 }
1488}
1489
38c335f1 1490static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
6aa8b732 1491{
38c335f1 1492 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
4db35314 1493 struct kvm_mmu_page *sp = page_header(__pa(pte));
6aa8b732 1494
291f26bc 1495 __set_bit(slot, sp->slot_bitmap);
6aa8b732
AK
1496}
1497
6844dec6
MT
1498static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1499{
1500 int i;
1501 u64 *pt = sp->spt;
1502
1503 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1504 return;
1505
1506 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1507 if (pt[i] == shadow_notrap_nonpresent_pte)
1508 set_shadow_pte(&pt[i], shadow_trap_nonpresent_pte);
1509 }
1510}
1511
039576c0
AK
1512struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1513{
72dc67a6
IE
1514 struct page *page;
1515
ad312c7c 1516 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
039576c0
AK
1517
1518 if (gpa == UNMAPPED_GVA)
1519 return NULL;
72dc67a6 1520
72dc67a6 1521 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
72dc67a6
IE
1522
1523 return page;
039576c0
AK
1524}
1525
74be52e3
SY
1526/*
1527 * The function is based on mtrr_type_lookup() in
1528 * arch/x86/kernel/cpu/mtrr/generic.c
1529 */
1530static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1531 u64 start, u64 end)
1532{
1533 int i;
1534 u64 base, mask;
1535 u8 prev_match, curr_match;
1536 int num_var_ranges = KVM_NR_VAR_MTRR;
1537
1538 if (!mtrr_state->enabled)
1539 return 0xFF;
1540
1541 /* Make end inclusive end, instead of exclusive */
1542 end--;
1543
1544 /* Look in fixed ranges. Just return the type as per start */
1545 if (mtrr_state->have_fixed && (start < 0x100000)) {
1546 int idx;
1547
1548 if (start < 0x80000) {
1549 idx = 0;
1550 idx += (start >> 16);
1551 return mtrr_state->fixed_ranges[idx];
1552 } else if (start < 0xC0000) {
1553 idx = 1 * 8;
1554 idx += ((start - 0x80000) >> 14);
1555 return mtrr_state->fixed_ranges[idx];
1556 } else if (start < 0x1000000) {
1557 idx = 3 * 8;
1558 idx += ((start - 0xC0000) >> 12);
1559 return mtrr_state->fixed_ranges[idx];
1560 }
1561 }
1562
1563 /*
1564 * Look in variable ranges
1565 * Look of multiple ranges matching this address and pick type
1566 * as per MTRR precedence
1567 */
1568 if (!(mtrr_state->enabled & 2))
1569 return mtrr_state->def_type;
1570
1571 prev_match = 0xFF;
1572 for (i = 0; i < num_var_ranges; ++i) {
1573 unsigned short start_state, end_state;
1574
1575 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1576 continue;
1577
1578 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1579 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1580 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1581 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1582
1583 start_state = ((start & mask) == (base & mask));
1584 end_state = ((end & mask) == (base & mask));
1585 if (start_state != end_state)
1586 return 0xFE;
1587
1588 if ((start & mask) != (base & mask))
1589 continue;
1590
1591 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1592 if (prev_match == 0xFF) {
1593 prev_match = curr_match;
1594 continue;
1595 }
1596
1597 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1598 curr_match == MTRR_TYPE_UNCACHABLE)
1599 return MTRR_TYPE_UNCACHABLE;
1600
1601 if ((prev_match == MTRR_TYPE_WRBACK &&
1602 curr_match == MTRR_TYPE_WRTHROUGH) ||
1603 (prev_match == MTRR_TYPE_WRTHROUGH &&
1604 curr_match == MTRR_TYPE_WRBACK)) {
1605 prev_match = MTRR_TYPE_WRTHROUGH;
1606 curr_match = MTRR_TYPE_WRTHROUGH;
1607 }
1608
1609 if (prev_match != curr_match)
1610 return MTRR_TYPE_UNCACHABLE;
1611 }
1612
1613 if (prev_match != 0xFF)
1614 return prev_match;
1615
1616 return mtrr_state->def_type;
1617}
1618
1619static u8 get_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1620{
1621 u8 mtrr;
1622
1623 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1624 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1625 if (mtrr == 0xfe || mtrr == 0xff)
1626 mtrr = MTRR_TYPE_WRBACK;
1627 return mtrr;
1628}
1629
4731d4c7
MT
1630static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1631{
1632 unsigned index;
1633 struct hlist_head *bucket;
1634 struct kvm_mmu_page *s;
1635 struct hlist_node *node, *n;
1636
1637 index = kvm_page_table_hashfn(sp->gfn);
1638 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1639 /* don't unsync if pagetable is shadowed with multiple roles */
1640 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1641 if (s->gfn != sp->gfn || s->role.metaphysical)
1642 continue;
1643 if (s->role.word != sp->role.word)
1644 return 1;
1645 }
4731d4c7
MT
1646 ++vcpu->kvm->stat.mmu_unsync;
1647 sp->unsync = 1;
6cffe8ca
MT
1648
1649 if (sp->global) {
1650 list_add(&sp->oos_link, &vcpu->kvm->arch.oos_global_pages);
1651 ++vcpu->kvm->stat.mmu_unsync_global;
1652 } else
1653 kvm_mmu_mark_parents_unsync(vcpu, sp);
1654
4731d4c7
MT
1655 mmu_convert_notrap(sp);
1656 return 0;
1657}
1658
1659static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1660 bool can_unsync)
1661{
1662 struct kvm_mmu_page *shadow;
1663
1664 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1665 if (shadow) {
1666 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1667 return 1;
1668 if (shadow->unsync)
1669 return 0;
582801a9 1670 if (can_unsync && oos_shadow)
4731d4c7
MT
1671 return kvm_unsync_page(vcpu, shadow);
1672 return 1;
1673 }
1674 return 0;
1675}
1676
1e73f9dd
MT
1677static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1678 unsigned pte_access, int user_fault,
1679 int write_fault, int dirty, int largepage,
6cffe8ca 1680 int global, gfn_t gfn, pfn_t pfn, bool speculative,
4731d4c7 1681 bool can_unsync)
1c4f1fd6
AK
1682{
1683 u64 spte;
1e73f9dd 1684 int ret = 0;
64d4d521 1685 u64 mt_mask = shadow_mt_mask;
6cffe8ca
MT
1686 struct kvm_mmu_page *sp = page_header(__pa(shadow_pte));
1687
1688 if (!global && sp->global) {
1689 sp->global = 0;
1690 if (sp->unsync) {
1691 kvm_unlink_unsync_global(vcpu->kvm, sp);
1692 kvm_mmu_mark_parents_unsync(vcpu, sp);
1693 }
1694 }
64d4d521 1695
1c4f1fd6
AK
1696 /*
1697 * We don't set the accessed bit, since we sometimes want to see
1698 * whether the guest actually used the pte (in order to detect
1699 * demand paging).
1700 */
7b52345e 1701 spte = shadow_base_present_pte | shadow_dirty_mask;
947da538 1702 if (!speculative)
3201b5d9 1703 spte |= shadow_accessed_mask;
1c4f1fd6
AK
1704 if (!dirty)
1705 pte_access &= ~ACC_WRITE_MASK;
7b52345e
SY
1706 if (pte_access & ACC_EXEC_MASK)
1707 spte |= shadow_x_mask;
1708 else
1709 spte |= shadow_nx_mask;
1c4f1fd6 1710 if (pte_access & ACC_USER_MASK)
7b52345e 1711 spte |= shadow_user_mask;
05da4558
MT
1712 if (largepage)
1713 spte |= PT_PAGE_SIZE_MASK;
64d4d521 1714 if (mt_mask) {
2aaf69dc
SY
1715 if (!kvm_is_mmio_pfn(pfn)) {
1716 mt_mask = get_memory_type(vcpu, gfn) <<
1717 kvm_x86_ops->get_mt_mask_shift();
1718 mt_mask |= VMX_EPT_IGMT_BIT;
1719 } else
1720 mt_mask = MTRR_TYPE_UNCACHABLE <<
1721 kvm_x86_ops->get_mt_mask_shift();
64d4d521
SY
1722 spte |= mt_mask;
1723 }
1c4f1fd6 1724
35149e21 1725 spte |= (u64)pfn << PAGE_SHIFT;
1c4f1fd6
AK
1726
1727 if ((pte_access & ACC_WRITE_MASK)
1728 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1c4f1fd6 1729
38187c83
MT
1730 if (largepage && has_wrprotected_page(vcpu->kvm, gfn)) {
1731 ret = 1;
1732 spte = shadow_trap_nonpresent_pte;
1733 goto set_pte;
1734 }
1735
1c4f1fd6 1736 spte |= PT_WRITABLE_MASK;
1c4f1fd6 1737
ecc5589f
MT
1738 /*
1739 * Optimization: for pte sync, if spte was writable the hash
1740 * lookup is unnecessary (and expensive). Write protection
1741 * is responsibility of mmu_get_page / kvm_sync_page.
1742 * Same reasoning can be applied to dirty page accounting.
1743 */
1744 if (!can_unsync && is_writeble_pte(*shadow_pte))
1745 goto set_pte;
1746
4731d4c7 1747 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1c4f1fd6 1748 pgprintk("%s: found shadow page for %lx, marking ro\n",
b8688d51 1749 __func__, gfn);
1e73f9dd 1750 ret = 1;
1c4f1fd6 1751 pte_access &= ~ACC_WRITE_MASK;
a378b4e6 1752 if (is_writeble_pte(spte))
1c4f1fd6 1753 spte &= ~PT_WRITABLE_MASK;
1c4f1fd6
AK
1754 }
1755 }
1756
1c4f1fd6
AK
1757 if (pte_access & ACC_WRITE_MASK)
1758 mark_page_dirty(vcpu->kvm, gfn);
1759
38187c83 1760set_pte:
1c4f1fd6 1761 set_shadow_pte(shadow_pte, spte);
1e73f9dd
MT
1762 return ret;
1763}
1764
1e73f9dd
MT
1765static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1766 unsigned pt_access, unsigned pte_access,
1767 int user_fault, int write_fault, int dirty,
6cffe8ca
MT
1768 int *ptwrite, int largepage, int global,
1769 gfn_t gfn, pfn_t pfn, bool speculative)
1e73f9dd
MT
1770{
1771 int was_rmapped = 0;
1772 int was_writeble = is_writeble_pte(*shadow_pte);
1773
1774 pgprintk("%s: spte %llx access %x write_fault %d"
1775 " user_fault %d gfn %lx\n",
1776 __func__, *shadow_pte, pt_access,
1777 write_fault, user_fault, gfn);
1778
1779 if (is_rmap_pte(*shadow_pte)) {
1780 /*
1781 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1782 * the parent of the now unreachable PTE.
1783 */
1784 if (largepage && !is_large_pte(*shadow_pte)) {
1785 struct kvm_mmu_page *child;
1786 u64 pte = *shadow_pte;
1787
1788 child = page_header(pte & PT64_BASE_ADDR_MASK);
1789 mmu_page_remove_parent_pte(child, shadow_pte);
1790 } else if (pfn != spte_to_pfn(*shadow_pte)) {
1791 pgprintk("hfn old %lx new %lx\n",
1792 spte_to_pfn(*shadow_pte), pfn);
1793 rmap_remove(vcpu->kvm, shadow_pte);
1794 } else {
1795 if (largepage)
1796 was_rmapped = is_large_pte(*shadow_pte);
1797 else
1798 was_rmapped = 1;
1799 }
1800 }
1801 if (set_spte(vcpu, shadow_pte, pte_access, user_fault, write_fault,
6cffe8ca 1802 dirty, largepage, global, gfn, pfn, speculative, true)) {
1e73f9dd
MT
1803 if (write_fault)
1804 *ptwrite = 1;
a378b4e6
MT
1805 kvm_x86_ops->tlb_flush(vcpu);
1806 }
1e73f9dd
MT
1807
1808 pgprintk("%s: setting spte %llx\n", __func__, *shadow_pte);
1809 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1810 is_large_pte(*shadow_pte)? "2MB" : "4kB",
1811 is_present_pte(*shadow_pte)?"RW":"R", gfn,
1812 *shadow_pte, shadow_pte);
1813 if (!was_rmapped && is_large_pte(*shadow_pte))
05da4558
MT
1814 ++vcpu->kvm->stat.lpages;
1815
1c4f1fd6
AK
1816 page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
1817 if (!was_rmapped) {
05da4558 1818 rmap_add(vcpu, shadow_pte, gfn, largepage);
1c4f1fd6 1819 if (!is_rmap_pte(*shadow_pte))
35149e21 1820 kvm_release_pfn_clean(pfn);
75e68e60
IE
1821 } else {
1822 if (was_writeble)
35149e21 1823 kvm_release_pfn_dirty(pfn);
75e68e60 1824 else
35149e21 1825 kvm_release_pfn_clean(pfn);
1c4f1fd6 1826 }
1b7fcd32 1827 if (speculative) {
ad312c7c 1828 vcpu->arch.last_pte_updated = shadow_pte;
1b7fcd32
AK
1829 vcpu->arch.last_pte_gfn = gfn;
1830 }
1c4f1fd6
AK
1831}
1832
6aa8b732
AK
1833static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1834{
1835}
1836
9f652d21
AK
1837static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1838 int largepage, gfn_t gfn, pfn_t pfn)
140754bc 1839{
9f652d21 1840 struct kvm_shadow_walk_iterator iterator;
140754bc 1841 struct kvm_mmu_page *sp;
9f652d21 1842 int pt_write = 0;
140754bc 1843 gfn_t pseudo_gfn;
6aa8b732 1844
9f652d21
AK
1845 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1846 if (iterator.level == PT_PAGE_TABLE_LEVEL
1847 || (largepage && iterator.level == PT_DIRECTORY_LEVEL)) {
1848 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1849 0, write, 1, &pt_write,
1850 largepage, 0, gfn, pfn, false);
1851 ++vcpu->stat.pf_fixed;
1852 break;
6aa8b732
AK
1853 }
1854
9f652d21
AK
1855 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1856 pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1857 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1858 iterator.level - 1,
1859 1, ACC_ALL, iterator.sptep);
1860 if (!sp) {
1861 pgprintk("nonpaging_map: ENOMEM\n");
1862 kvm_release_pfn_clean(pfn);
1863 return -ENOMEM;
1864 }
140754bc 1865
9f652d21
AK
1866 set_shadow_pte(iterator.sptep,
1867 __pa(sp->spt)
1868 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1869 | shadow_user_mask | shadow_x_mask);
1870 }
1871 }
1872 return pt_write;
6aa8b732
AK
1873}
1874
10589a46
MT
1875static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1876{
1877 int r;
05da4558 1878 int largepage = 0;
35149e21 1879 pfn_t pfn;
e930bffe 1880 unsigned long mmu_seq;
aaee2c94 1881
05da4558
MT
1882 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
1883 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1884 largepage = 1;
1885 }
1886
e930bffe 1887 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 1888 smp_rmb();
35149e21 1889 pfn = gfn_to_pfn(vcpu->kvm, gfn);
aaee2c94 1890
d196e343 1891 /* mmio */
35149e21
AL
1892 if (is_error_pfn(pfn)) {
1893 kvm_release_pfn_clean(pfn);
d196e343
AK
1894 return 1;
1895 }
1896
aaee2c94 1897 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA
1898 if (mmu_notifier_retry(vcpu, mmu_seq))
1899 goto out_unlock;
eb787d10 1900 kvm_mmu_free_some_pages(vcpu);
6c41f428 1901 r = __direct_map(vcpu, v, write, largepage, gfn, pfn);
aaee2c94
MT
1902 spin_unlock(&vcpu->kvm->mmu_lock);
1903
aaee2c94 1904
10589a46 1905 return r;
e930bffe
AA
1906
1907out_unlock:
1908 spin_unlock(&vcpu->kvm->mmu_lock);
1909 kvm_release_pfn_clean(pfn);
1910 return 0;
10589a46
MT
1911}
1912
1913
17ac10ad
AK
1914static void mmu_free_roots(struct kvm_vcpu *vcpu)
1915{
1916 int i;
4db35314 1917 struct kvm_mmu_page *sp;
17ac10ad 1918
ad312c7c 1919 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
7b53aa56 1920 return;
aaee2c94 1921 spin_lock(&vcpu->kvm->mmu_lock);
ad312c7c
ZX
1922 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1923 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad 1924
4db35314
AK
1925 sp = page_header(root);
1926 --sp->root_count;
2e53d63a
MT
1927 if (!sp->root_count && sp->role.invalid)
1928 kvm_mmu_zap_page(vcpu->kvm, sp);
ad312c7c 1929 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
aaee2c94 1930 spin_unlock(&vcpu->kvm->mmu_lock);
17ac10ad
AK
1931 return;
1932 }
17ac10ad 1933 for (i = 0; i < 4; ++i) {
ad312c7c 1934 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad 1935
417726a3 1936 if (root) {
417726a3 1937 root &= PT64_BASE_ADDR_MASK;
4db35314
AK
1938 sp = page_header(root);
1939 --sp->root_count;
2e53d63a
MT
1940 if (!sp->root_count && sp->role.invalid)
1941 kvm_mmu_zap_page(vcpu->kvm, sp);
417726a3 1942 }
ad312c7c 1943 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 1944 }
aaee2c94 1945 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 1946 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
17ac10ad
AK
1947}
1948
1949static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
1950{
1951 int i;
cea0f0e7 1952 gfn_t root_gfn;
4db35314 1953 struct kvm_mmu_page *sp;
fb72d167 1954 int metaphysical = 0;
3bb65a22 1955
ad312c7c 1956 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
17ac10ad 1957
ad312c7c
ZX
1958 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1959 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad
AK
1960
1961 ASSERT(!VALID_PAGE(root));
fb72d167
JR
1962 if (tdp_enabled)
1963 metaphysical = 1;
4db35314 1964 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
fb72d167
JR
1965 PT64_ROOT_LEVEL, metaphysical,
1966 ACC_ALL, NULL);
4db35314
AK
1967 root = __pa(sp->spt);
1968 ++sp->root_count;
ad312c7c 1969 vcpu->arch.mmu.root_hpa = root;
17ac10ad
AK
1970 return;
1971 }
fb72d167
JR
1972 metaphysical = !is_paging(vcpu);
1973 if (tdp_enabled)
1974 metaphysical = 1;
17ac10ad 1975 for (i = 0; i < 4; ++i) {
ad312c7c 1976 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad
AK
1977
1978 ASSERT(!VALID_PAGE(root));
ad312c7c
ZX
1979 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
1980 if (!is_present_pte(vcpu->arch.pdptrs[i])) {
1981 vcpu->arch.mmu.pae_root[i] = 0;
417726a3
AK
1982 continue;
1983 }
ad312c7c
ZX
1984 root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
1985 } else if (vcpu->arch.mmu.root_level == 0)
cea0f0e7 1986 root_gfn = 0;
4db35314 1987 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
fb72d167 1988 PT32_ROOT_LEVEL, metaphysical,
f7d9c7b7 1989 ACC_ALL, NULL);
4db35314
AK
1990 root = __pa(sp->spt);
1991 ++sp->root_count;
ad312c7c 1992 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
17ac10ad 1993 }
ad312c7c 1994 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
17ac10ad
AK
1995}
1996
0ba73cda
MT
1997static void mmu_sync_roots(struct kvm_vcpu *vcpu)
1998{
1999 int i;
2000 struct kvm_mmu_page *sp;
2001
2002 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2003 return;
2004 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2005 hpa_t root = vcpu->arch.mmu.root_hpa;
2006 sp = page_header(root);
2007 mmu_sync_children(vcpu, sp);
2008 return;
2009 }
2010 for (i = 0; i < 4; ++i) {
2011 hpa_t root = vcpu->arch.mmu.pae_root[i];
2012
2013 if (root) {
2014 root &= PT64_BASE_ADDR_MASK;
2015 sp = page_header(root);
2016 mmu_sync_children(vcpu, sp);
2017 }
2018 }
2019}
2020
6cffe8ca
MT
2021static void mmu_sync_global(struct kvm_vcpu *vcpu)
2022{
2023 struct kvm *kvm = vcpu->kvm;
2024 struct kvm_mmu_page *sp, *n;
2025
2026 list_for_each_entry_safe(sp, n, &kvm->arch.oos_global_pages, oos_link)
2027 kvm_sync_page(vcpu, sp);
2028}
2029
0ba73cda
MT
2030void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2031{
2032 spin_lock(&vcpu->kvm->mmu_lock);
2033 mmu_sync_roots(vcpu);
6cffe8ca
MT
2034 spin_unlock(&vcpu->kvm->mmu_lock);
2035}
2036
2037void kvm_mmu_sync_global(struct kvm_vcpu *vcpu)
2038{
2039 spin_lock(&vcpu->kvm->mmu_lock);
2040 mmu_sync_global(vcpu);
0ba73cda
MT
2041 spin_unlock(&vcpu->kvm->mmu_lock);
2042}
2043
6aa8b732
AK
2044static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
2045{
2046 return vaddr;
2047}
2048
2049static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
3f3e7124 2050 u32 error_code)
6aa8b732 2051{
e833240f 2052 gfn_t gfn;
e2dec939 2053 int r;
6aa8b732 2054
b8688d51 2055 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
e2dec939
AK
2056 r = mmu_topup_memory_caches(vcpu);
2057 if (r)
2058 return r;
714b93da 2059
6aa8b732 2060 ASSERT(vcpu);
ad312c7c 2061 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 2062
e833240f 2063 gfn = gva >> PAGE_SHIFT;
6aa8b732 2064
e833240f
AK
2065 return nonpaging_map(vcpu, gva & PAGE_MASK,
2066 error_code & PFERR_WRITE_MASK, gfn);
6aa8b732
AK
2067}
2068
fb72d167
JR
2069static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2070 u32 error_code)
2071{
35149e21 2072 pfn_t pfn;
fb72d167 2073 int r;
05da4558
MT
2074 int largepage = 0;
2075 gfn_t gfn = gpa >> PAGE_SHIFT;
e930bffe 2076 unsigned long mmu_seq;
fb72d167
JR
2077
2078 ASSERT(vcpu);
2079 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2080
2081 r = mmu_topup_memory_caches(vcpu);
2082 if (r)
2083 return r;
2084
05da4558
MT
2085 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
2086 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
2087 largepage = 1;
2088 }
e930bffe 2089 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 2090 smp_rmb();
35149e21 2091 pfn = gfn_to_pfn(vcpu->kvm, gfn);
35149e21
AL
2092 if (is_error_pfn(pfn)) {
2093 kvm_release_pfn_clean(pfn);
fb72d167
JR
2094 return 1;
2095 }
2096 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA
2097 if (mmu_notifier_retry(vcpu, mmu_seq))
2098 goto out_unlock;
fb72d167
JR
2099 kvm_mmu_free_some_pages(vcpu);
2100 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
6c41f428 2101 largepage, gfn, pfn);
fb72d167 2102 spin_unlock(&vcpu->kvm->mmu_lock);
fb72d167
JR
2103
2104 return r;
e930bffe
AA
2105
2106out_unlock:
2107 spin_unlock(&vcpu->kvm->mmu_lock);
2108 kvm_release_pfn_clean(pfn);
2109 return 0;
fb72d167
JR
2110}
2111
6aa8b732
AK
2112static void nonpaging_free(struct kvm_vcpu *vcpu)
2113{
17ac10ad 2114 mmu_free_roots(vcpu);
6aa8b732
AK
2115}
2116
2117static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2118{
ad312c7c 2119 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
2120
2121 context->new_cr3 = nonpaging_new_cr3;
2122 context->page_fault = nonpaging_page_fault;
6aa8b732
AK
2123 context->gva_to_gpa = nonpaging_gva_to_gpa;
2124 context->free = nonpaging_free;
c7addb90 2125 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 2126 context->sync_page = nonpaging_sync_page;
a7052897 2127 context->invlpg = nonpaging_invlpg;
cea0f0e7 2128 context->root_level = 0;
6aa8b732 2129 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 2130 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
2131 return 0;
2132}
2133
d835dfec 2134void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
6aa8b732 2135{
1165f5fe 2136 ++vcpu->stat.tlb_flush;
cbdd1bea 2137 kvm_x86_ops->tlb_flush(vcpu);
6aa8b732
AK
2138}
2139
2140static void paging_new_cr3(struct kvm_vcpu *vcpu)
2141{
b8688d51 2142 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
cea0f0e7 2143 mmu_free_roots(vcpu);
6aa8b732
AK
2144}
2145
6aa8b732
AK
2146static void inject_page_fault(struct kvm_vcpu *vcpu,
2147 u64 addr,
2148 u32 err_code)
2149{
c3c91fee 2150 kvm_inject_page_fault(vcpu, addr, err_code);
6aa8b732
AK
2151}
2152
6aa8b732
AK
2153static void paging_free(struct kvm_vcpu *vcpu)
2154{
2155 nonpaging_free(vcpu);
2156}
2157
2158#define PTTYPE 64
2159#include "paging_tmpl.h"
2160#undef PTTYPE
2161
2162#define PTTYPE 32
2163#include "paging_tmpl.h"
2164#undef PTTYPE
2165
17ac10ad 2166static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
6aa8b732 2167{
ad312c7c 2168 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
2169
2170 ASSERT(is_pae(vcpu));
2171 context->new_cr3 = paging_new_cr3;
2172 context->page_fault = paging64_page_fault;
6aa8b732 2173 context->gva_to_gpa = paging64_gva_to_gpa;
c7addb90 2174 context->prefetch_page = paging64_prefetch_page;
e8bc217a 2175 context->sync_page = paging64_sync_page;
a7052897 2176 context->invlpg = paging64_invlpg;
6aa8b732 2177 context->free = paging_free;
17ac10ad
AK
2178 context->root_level = level;
2179 context->shadow_root_level = level;
17c3ba9d 2180 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
2181 return 0;
2182}
2183
17ac10ad
AK
2184static int paging64_init_context(struct kvm_vcpu *vcpu)
2185{
2186 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2187}
2188
6aa8b732
AK
2189static int paging32_init_context(struct kvm_vcpu *vcpu)
2190{
ad312c7c 2191 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
2192
2193 context->new_cr3 = paging_new_cr3;
2194 context->page_fault = paging32_page_fault;
6aa8b732
AK
2195 context->gva_to_gpa = paging32_gva_to_gpa;
2196 context->free = paging_free;
c7addb90 2197 context->prefetch_page = paging32_prefetch_page;
e8bc217a 2198 context->sync_page = paging32_sync_page;
a7052897 2199 context->invlpg = paging32_invlpg;
6aa8b732
AK
2200 context->root_level = PT32_ROOT_LEVEL;
2201 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 2202 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
2203 return 0;
2204}
2205
2206static int paging32E_init_context(struct kvm_vcpu *vcpu)
2207{
17ac10ad 2208 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
6aa8b732
AK
2209}
2210
fb72d167
JR
2211static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2212{
2213 struct kvm_mmu *context = &vcpu->arch.mmu;
2214
2215 context->new_cr3 = nonpaging_new_cr3;
2216 context->page_fault = tdp_page_fault;
2217 context->free = nonpaging_free;
2218 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 2219 context->sync_page = nonpaging_sync_page;
a7052897 2220 context->invlpg = nonpaging_invlpg;
67253af5 2221 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
fb72d167
JR
2222 context->root_hpa = INVALID_PAGE;
2223
2224 if (!is_paging(vcpu)) {
2225 context->gva_to_gpa = nonpaging_gva_to_gpa;
2226 context->root_level = 0;
2227 } else if (is_long_mode(vcpu)) {
2228 context->gva_to_gpa = paging64_gva_to_gpa;
2229 context->root_level = PT64_ROOT_LEVEL;
2230 } else if (is_pae(vcpu)) {
2231 context->gva_to_gpa = paging64_gva_to_gpa;
2232 context->root_level = PT32E_ROOT_LEVEL;
2233 } else {
2234 context->gva_to_gpa = paging32_gva_to_gpa;
2235 context->root_level = PT32_ROOT_LEVEL;
2236 }
2237
2238 return 0;
2239}
2240
2241static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
6aa8b732 2242{
a770f6f2
AK
2243 int r;
2244
6aa8b732 2245 ASSERT(vcpu);
ad312c7c 2246 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732
AK
2247
2248 if (!is_paging(vcpu))
a770f6f2 2249 r = nonpaging_init_context(vcpu);
a9058ecd 2250 else if (is_long_mode(vcpu))
a770f6f2 2251 r = paging64_init_context(vcpu);
6aa8b732 2252 else if (is_pae(vcpu))
a770f6f2 2253 r = paging32E_init_context(vcpu);
6aa8b732 2254 else
a770f6f2
AK
2255 r = paging32_init_context(vcpu);
2256
2257 vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
2258
2259 return r;
6aa8b732
AK
2260}
2261
fb72d167
JR
2262static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2263{
35149e21
AL
2264 vcpu->arch.update_pte.pfn = bad_pfn;
2265
fb72d167
JR
2266 if (tdp_enabled)
2267 return init_kvm_tdp_mmu(vcpu);
2268 else
2269 return init_kvm_softmmu(vcpu);
2270}
2271
6aa8b732
AK
2272static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2273{
2274 ASSERT(vcpu);
ad312c7c
ZX
2275 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2276 vcpu->arch.mmu.free(vcpu);
2277 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6aa8b732
AK
2278 }
2279}
2280
2281int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
17c3ba9d
AK
2282{
2283 destroy_kvm_mmu(vcpu);
2284 return init_kvm_mmu(vcpu);
2285}
8668a3c4 2286EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
17c3ba9d
AK
2287
2288int kvm_mmu_load(struct kvm_vcpu *vcpu)
6aa8b732 2289{
714b93da
AK
2290 int r;
2291
e2dec939 2292 r = mmu_topup_memory_caches(vcpu);
17c3ba9d
AK
2293 if (r)
2294 goto out;
aaee2c94 2295 spin_lock(&vcpu->kvm->mmu_lock);
eb787d10 2296 kvm_mmu_free_some_pages(vcpu);
17c3ba9d 2297 mmu_alloc_roots(vcpu);
0ba73cda 2298 mmu_sync_roots(vcpu);
aaee2c94 2299 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 2300 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
17c3ba9d 2301 kvm_mmu_flush_tlb(vcpu);
714b93da
AK
2302out:
2303 return r;
6aa8b732 2304}
17c3ba9d
AK
2305EXPORT_SYMBOL_GPL(kvm_mmu_load);
2306
2307void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2308{
2309 mmu_free_roots(vcpu);
2310}
6aa8b732 2311
09072daf 2312static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
4db35314 2313 struct kvm_mmu_page *sp,
ac1b714e
AK
2314 u64 *spte)
2315{
2316 u64 pte;
2317 struct kvm_mmu_page *child;
2318
2319 pte = *spte;
c7addb90 2320 if (is_shadow_present_pte(pte)) {
05da4558
MT
2321 if (sp->role.level == PT_PAGE_TABLE_LEVEL ||
2322 is_large_pte(pte))
290fc38d 2323 rmap_remove(vcpu->kvm, spte);
ac1b714e
AK
2324 else {
2325 child = page_header(pte & PT64_BASE_ADDR_MASK);
90cb0529 2326 mmu_page_remove_parent_pte(child, spte);
ac1b714e
AK
2327 }
2328 }
c7addb90 2329 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
05da4558
MT
2330 if (is_large_pte(pte))
2331 --vcpu->kvm->stat.lpages;
ac1b714e
AK
2332}
2333
0028425f 2334static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
4db35314 2335 struct kvm_mmu_page *sp,
0028425f 2336 u64 *spte,
489f1d65 2337 const void *new)
0028425f 2338{
30945387
MT
2339 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2340 if (!vcpu->arch.update_pte.largepage ||
2341 sp->role.glevels == PT32_ROOT_LEVEL) {
2342 ++vcpu->kvm->stat.mmu_pde_zapped;
2343 return;
2344 }
2345 }
0028425f 2346
4cee5764 2347 ++vcpu->kvm->stat.mmu_pte_updated;
4db35314 2348 if (sp->role.glevels == PT32_ROOT_LEVEL)
489f1d65 2349 paging32_update_pte(vcpu, sp, spte, new);
0028425f 2350 else
489f1d65 2351 paging64_update_pte(vcpu, sp, spte, new);
0028425f
AK
2352}
2353
79539cec
AK
2354static bool need_remote_flush(u64 old, u64 new)
2355{
2356 if (!is_shadow_present_pte(old))
2357 return false;
2358 if (!is_shadow_present_pte(new))
2359 return true;
2360 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2361 return true;
2362 old ^= PT64_NX_MASK;
2363 new ^= PT64_NX_MASK;
2364 return (old & ~new & PT64_PERM_MASK) != 0;
2365}
2366
2367static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2368{
2369 if (need_remote_flush(old, new))
2370 kvm_flush_remote_tlbs(vcpu->kvm);
2371 else
2372 kvm_mmu_flush_tlb(vcpu);
2373}
2374
12b7d28f
AK
2375static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2376{
ad312c7c 2377 u64 *spte = vcpu->arch.last_pte_updated;
12b7d28f 2378
7b52345e 2379 return !!(spte && (*spte & shadow_accessed_mask));
12b7d28f
AK
2380}
2381
d7824fff
AK
2382static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2383 const u8 *new, int bytes)
2384{
2385 gfn_t gfn;
2386 int r;
2387 u64 gpte = 0;
35149e21 2388 pfn_t pfn;
d7824fff 2389
05da4558
MT
2390 vcpu->arch.update_pte.largepage = 0;
2391
d7824fff
AK
2392 if (bytes != 4 && bytes != 8)
2393 return;
2394
2395 /*
2396 * Assume that the pte write on a page table of the same type
2397 * as the current vcpu paging mode. This is nearly always true
2398 * (might be false while changing modes). Note it is verified later
2399 * by update_pte().
2400 */
2401 if (is_pae(vcpu)) {
2402 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2403 if ((bytes == 4) && (gpa % 4 == 0)) {
2404 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2405 if (r)
2406 return;
2407 memcpy((void *)&gpte + (gpa % 8), new, 4);
2408 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2409 memcpy((void *)&gpte, new, 8);
2410 }
2411 } else {
2412 if ((bytes == 4) && (gpa % 4 == 0))
2413 memcpy((void *)&gpte, new, 4);
2414 }
2415 if (!is_present_pte(gpte))
2416 return;
2417 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
72dc67a6 2418
05da4558
MT
2419 if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
2420 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
2421 vcpu->arch.update_pte.largepage = 1;
2422 }
e930bffe 2423 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 2424 smp_rmb();
35149e21 2425 pfn = gfn_to_pfn(vcpu->kvm, gfn);
72dc67a6 2426
35149e21
AL
2427 if (is_error_pfn(pfn)) {
2428 kvm_release_pfn_clean(pfn);
d196e343
AK
2429 return;
2430 }
d7824fff 2431 vcpu->arch.update_pte.gfn = gfn;
35149e21 2432 vcpu->arch.update_pte.pfn = pfn;
d7824fff
AK
2433}
2434
1b7fcd32
AK
2435static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2436{
2437 u64 *spte = vcpu->arch.last_pte_updated;
2438
2439 if (spte
2440 && vcpu->arch.last_pte_gfn == gfn
2441 && shadow_accessed_mask
2442 && !(*spte & shadow_accessed_mask)
2443 && is_shadow_present_pte(*spte))
2444 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2445}
2446
09072daf 2447void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
ad218f85
MT
2448 const u8 *new, int bytes,
2449 bool guest_initiated)
da4a00f0 2450{
9b7a0325 2451 gfn_t gfn = gpa >> PAGE_SHIFT;
4db35314 2452 struct kvm_mmu_page *sp;
0e7bc4b9 2453 struct hlist_node *node, *n;
9b7a0325
AK
2454 struct hlist_head *bucket;
2455 unsigned index;
489f1d65 2456 u64 entry, gentry;
9b7a0325 2457 u64 *spte;
9b7a0325 2458 unsigned offset = offset_in_page(gpa);
0e7bc4b9 2459 unsigned pte_size;
9b7a0325 2460 unsigned page_offset;
0e7bc4b9 2461 unsigned misaligned;
fce0657f 2462 unsigned quadrant;
9b7a0325 2463 int level;
86a5ba02 2464 int flooded = 0;
ac1b714e 2465 int npte;
489f1d65 2466 int r;
9b7a0325 2467
b8688d51 2468 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
d7824fff 2469 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
aaee2c94 2470 spin_lock(&vcpu->kvm->mmu_lock);
1b7fcd32 2471 kvm_mmu_access_page(vcpu, gfn);
eb787d10 2472 kvm_mmu_free_some_pages(vcpu);
4cee5764 2473 ++vcpu->kvm->stat.mmu_pte_write;
c7addb90 2474 kvm_mmu_audit(vcpu, "pre pte write");
ad218f85
MT
2475 if (guest_initiated) {
2476 if (gfn == vcpu->arch.last_pt_write_gfn
2477 && !last_updated_pte_accessed(vcpu)) {
2478 ++vcpu->arch.last_pt_write_count;
2479 if (vcpu->arch.last_pt_write_count >= 3)
2480 flooded = 1;
2481 } else {
2482 vcpu->arch.last_pt_write_gfn = gfn;
2483 vcpu->arch.last_pt_write_count = 1;
2484 vcpu->arch.last_pte_updated = NULL;
2485 }
86a5ba02 2486 }
1ae0a13d 2487 index = kvm_page_table_hashfn(gfn);
f05e70ac 2488 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4db35314 2489 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
5b5c6a5a 2490 if (sp->gfn != gfn || sp->role.metaphysical || sp->role.invalid)
9b7a0325 2491 continue;
4db35314 2492 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
0e7bc4b9 2493 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
e925c5ba 2494 misaligned |= bytes < 4;
86a5ba02 2495 if (misaligned || flooded) {
0e7bc4b9
AK
2496 /*
2497 * Misaligned accesses are too much trouble to fix
2498 * up; also, they usually indicate a page is not used
2499 * as a page table.
86a5ba02
AK
2500 *
2501 * If we're seeing too many writes to a page,
2502 * it may no longer be a page table, or we may be
2503 * forking, in which case it is better to unmap the
2504 * page.
0e7bc4b9
AK
2505 */
2506 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
4db35314 2507 gpa, bytes, sp->role.word);
07385413
MT
2508 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2509 n = bucket->first;
4cee5764 2510 ++vcpu->kvm->stat.mmu_flooded;
0e7bc4b9
AK
2511 continue;
2512 }
9b7a0325 2513 page_offset = offset;
4db35314 2514 level = sp->role.level;
ac1b714e 2515 npte = 1;
4db35314 2516 if (sp->role.glevels == PT32_ROOT_LEVEL) {
ac1b714e
AK
2517 page_offset <<= 1; /* 32->64 */
2518 /*
2519 * A 32-bit pde maps 4MB while the shadow pdes map
2520 * only 2MB. So we need to double the offset again
2521 * and zap two pdes instead of one.
2522 */
2523 if (level == PT32_ROOT_LEVEL) {
6b8d0f9b 2524 page_offset &= ~7; /* kill rounding error */
ac1b714e
AK
2525 page_offset <<= 1;
2526 npte = 2;
2527 }
fce0657f 2528 quadrant = page_offset >> PAGE_SHIFT;
9b7a0325 2529 page_offset &= ~PAGE_MASK;
4db35314 2530 if (quadrant != sp->role.quadrant)
fce0657f 2531 continue;
9b7a0325 2532 }
4db35314 2533 spte = &sp->spt[page_offset / sizeof(*spte)];
489f1d65
DE
2534 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2535 gentry = 0;
2536 r = kvm_read_guest_atomic(vcpu->kvm,
2537 gpa & ~(u64)(pte_size - 1),
2538 &gentry, pte_size);
2539 new = (const void *)&gentry;
2540 if (r < 0)
2541 new = NULL;
2542 }
ac1b714e 2543 while (npte--) {
79539cec 2544 entry = *spte;
4db35314 2545 mmu_pte_write_zap_pte(vcpu, sp, spte);
489f1d65
DE
2546 if (new)
2547 mmu_pte_write_new_pte(vcpu, sp, spte, new);
79539cec 2548 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
ac1b714e 2549 ++spte;
9b7a0325 2550 }
9b7a0325 2551 }
c7addb90 2552 kvm_mmu_audit(vcpu, "post pte write");
aaee2c94 2553 spin_unlock(&vcpu->kvm->mmu_lock);
35149e21
AL
2554 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2555 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2556 vcpu->arch.update_pte.pfn = bad_pfn;
d7824fff 2557 }
da4a00f0
AK
2558}
2559
a436036b
AK
2560int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2561{
10589a46
MT
2562 gpa_t gpa;
2563 int r;
a436036b 2564
10589a46 2565 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
10589a46 2566
aaee2c94 2567 spin_lock(&vcpu->kvm->mmu_lock);
10589a46 2568 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
aaee2c94 2569 spin_unlock(&vcpu->kvm->mmu_lock);
10589a46 2570 return r;
a436036b 2571}
577bdc49 2572EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
a436036b 2573
22d95b12 2574void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
ebeace86 2575{
f05e70ac 2576 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
4db35314 2577 struct kvm_mmu_page *sp;
ebeace86 2578
f05e70ac 2579 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
4db35314
AK
2580 struct kvm_mmu_page, link);
2581 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 2582 ++vcpu->kvm->stat.mmu_recycled;
ebeace86
AK
2583 }
2584}
ebeace86 2585
3067714c
AK
2586int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2587{
2588 int r;
2589 enum emulation_result er;
2590
ad312c7c 2591 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
3067714c
AK
2592 if (r < 0)
2593 goto out;
2594
2595 if (!r) {
2596 r = 1;
2597 goto out;
2598 }
2599
b733bfb5
AK
2600 r = mmu_topup_memory_caches(vcpu);
2601 if (r)
2602 goto out;
2603
3067714c 2604 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
3067714c
AK
2605
2606 switch (er) {
2607 case EMULATE_DONE:
2608 return 1;
2609 case EMULATE_DO_MMIO:
2610 ++vcpu->stat.mmio_exits;
2611 return 0;
2612 case EMULATE_FAIL:
2613 kvm_report_emulation_failure(vcpu, "pagetable");
2614 return 1;
2615 default:
2616 BUG();
2617 }
2618out:
3067714c
AK
2619 return r;
2620}
2621EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2622
a7052897
MT
2623void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2624{
a7052897 2625 vcpu->arch.mmu.invlpg(vcpu, gva);
a7052897
MT
2626 kvm_mmu_flush_tlb(vcpu);
2627 ++vcpu->stat.invlpg;
2628}
2629EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2630
18552672
JR
2631void kvm_enable_tdp(void)
2632{
2633 tdp_enabled = true;
2634}
2635EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2636
5f4cb662
JR
2637void kvm_disable_tdp(void)
2638{
2639 tdp_enabled = false;
2640}
2641EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2642
6aa8b732
AK
2643static void free_mmu_pages(struct kvm_vcpu *vcpu)
2644{
4db35314 2645 struct kvm_mmu_page *sp;
6aa8b732 2646
f05e70ac
ZX
2647 while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2648 sp = container_of(vcpu->kvm->arch.active_mmu_pages.next,
4db35314
AK
2649 struct kvm_mmu_page, link);
2650 kvm_mmu_zap_page(vcpu->kvm, sp);
8d2d73b9 2651 cond_resched();
f51234c2 2652 }
ad312c7c 2653 free_page((unsigned long)vcpu->arch.mmu.pae_root);
6aa8b732
AK
2654}
2655
2656static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2657{
17ac10ad 2658 struct page *page;
6aa8b732
AK
2659 int i;
2660
2661 ASSERT(vcpu);
2662
f05e70ac
ZX
2663 if (vcpu->kvm->arch.n_requested_mmu_pages)
2664 vcpu->kvm->arch.n_free_mmu_pages =
2665 vcpu->kvm->arch.n_requested_mmu_pages;
82ce2c96 2666 else
f05e70ac
ZX
2667 vcpu->kvm->arch.n_free_mmu_pages =
2668 vcpu->kvm->arch.n_alloc_mmu_pages;
17ac10ad
AK
2669 /*
2670 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2671 * Therefore we need to allocate shadow page tables in the first
2672 * 4GB of memory, which happens to fit the DMA32 zone.
2673 */
2674 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2675 if (!page)
2676 goto error_1;
ad312c7c 2677 vcpu->arch.mmu.pae_root = page_address(page);
17ac10ad 2678 for (i = 0; i < 4; ++i)
ad312c7c 2679 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 2680
6aa8b732
AK
2681 return 0;
2682
2683error_1:
2684 free_mmu_pages(vcpu);
2685 return -ENOMEM;
2686}
2687
8018c27b 2688int kvm_mmu_create(struct kvm_vcpu *vcpu)
6aa8b732 2689{
6aa8b732 2690 ASSERT(vcpu);
ad312c7c 2691 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 2692
8018c27b
IM
2693 return alloc_mmu_pages(vcpu);
2694}
6aa8b732 2695
8018c27b
IM
2696int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2697{
2698 ASSERT(vcpu);
ad312c7c 2699 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2c264957 2700
8018c27b 2701 return init_kvm_mmu(vcpu);
6aa8b732
AK
2702}
2703
2704void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2705{
2706 ASSERT(vcpu);
2707
2708 destroy_kvm_mmu(vcpu);
2709 free_mmu_pages(vcpu);
714b93da 2710 mmu_free_memory_caches(vcpu);
6aa8b732
AK
2711}
2712
90cb0529 2713void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
6aa8b732 2714{
4db35314 2715 struct kvm_mmu_page *sp;
6aa8b732 2716
2245a28f 2717 spin_lock(&kvm->mmu_lock);
f05e70ac 2718 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
6aa8b732
AK
2719 int i;
2720 u64 *pt;
2721
291f26bc 2722 if (!test_bit(slot, sp->slot_bitmap))
6aa8b732
AK
2723 continue;
2724
4db35314 2725 pt = sp->spt;
6aa8b732
AK
2726 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2727 /* avoid RMW */
9647c14c 2728 if (pt[i] & PT_WRITABLE_MASK)
6aa8b732 2729 pt[i] &= ~PT_WRITABLE_MASK;
6aa8b732 2730 }
171d595d 2731 kvm_flush_remote_tlbs(kvm);
2245a28f 2732 spin_unlock(&kvm->mmu_lock);
6aa8b732 2733}
37a7d8b0 2734
90cb0529 2735void kvm_mmu_zap_all(struct kvm *kvm)
e0fa826f 2736{
4db35314 2737 struct kvm_mmu_page *sp, *node;
e0fa826f 2738
aaee2c94 2739 spin_lock(&kvm->mmu_lock);
f05e70ac 2740 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
07385413
MT
2741 if (kvm_mmu_zap_page(kvm, sp))
2742 node = container_of(kvm->arch.active_mmu_pages.next,
2743 struct kvm_mmu_page, link);
aaee2c94 2744 spin_unlock(&kvm->mmu_lock);
e0fa826f 2745
90cb0529 2746 kvm_flush_remote_tlbs(kvm);
e0fa826f
DL
2747}
2748
8b2cf73c 2749static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
3ee16c81
IE
2750{
2751 struct kvm_mmu_page *page;
2752
2753 page = container_of(kvm->arch.active_mmu_pages.prev,
2754 struct kvm_mmu_page, link);
2755 kvm_mmu_zap_page(kvm, page);
2756}
2757
2758static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2759{
2760 struct kvm *kvm;
2761 struct kvm *kvm_freed = NULL;
2762 int cache_count = 0;
2763
2764 spin_lock(&kvm_lock);
2765
2766 list_for_each_entry(kvm, &vm_list, vm_list) {
2767 int npages;
2768
5a4c9288
MT
2769 if (!down_read_trylock(&kvm->slots_lock))
2770 continue;
3ee16c81
IE
2771 spin_lock(&kvm->mmu_lock);
2772 npages = kvm->arch.n_alloc_mmu_pages -
2773 kvm->arch.n_free_mmu_pages;
2774 cache_count += npages;
2775 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2776 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2777 cache_count--;
2778 kvm_freed = kvm;
2779 }
2780 nr_to_scan--;
2781
2782 spin_unlock(&kvm->mmu_lock);
5a4c9288 2783 up_read(&kvm->slots_lock);
3ee16c81
IE
2784 }
2785 if (kvm_freed)
2786 list_move_tail(&kvm_freed->vm_list, &vm_list);
2787
2788 spin_unlock(&kvm_lock);
2789
2790 return cache_count;
2791}
2792
2793static struct shrinker mmu_shrinker = {
2794 .shrink = mmu_shrink,
2795 .seeks = DEFAULT_SEEKS * 10,
2796};
2797
2ddfd20e 2798static void mmu_destroy_caches(void)
b5a33a75
AK
2799{
2800 if (pte_chain_cache)
2801 kmem_cache_destroy(pte_chain_cache);
2802 if (rmap_desc_cache)
2803 kmem_cache_destroy(rmap_desc_cache);
d3d25b04
AK
2804 if (mmu_page_header_cache)
2805 kmem_cache_destroy(mmu_page_header_cache);
b5a33a75
AK
2806}
2807
3ee16c81
IE
2808void kvm_mmu_module_exit(void)
2809{
2810 mmu_destroy_caches();
2811 unregister_shrinker(&mmu_shrinker);
2812}
2813
b5a33a75
AK
2814int kvm_mmu_module_init(void)
2815{
2816 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2817 sizeof(struct kvm_pte_chain),
20c2df83 2818 0, 0, NULL);
b5a33a75
AK
2819 if (!pte_chain_cache)
2820 goto nomem;
2821 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2822 sizeof(struct kvm_rmap_desc),
20c2df83 2823 0, 0, NULL);
b5a33a75
AK
2824 if (!rmap_desc_cache)
2825 goto nomem;
2826
d3d25b04
AK
2827 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2828 sizeof(struct kvm_mmu_page),
20c2df83 2829 0, 0, NULL);
d3d25b04
AK
2830 if (!mmu_page_header_cache)
2831 goto nomem;
2832
3ee16c81
IE
2833 register_shrinker(&mmu_shrinker);
2834
b5a33a75
AK
2835 return 0;
2836
2837nomem:
3ee16c81 2838 mmu_destroy_caches();
b5a33a75
AK
2839 return -ENOMEM;
2840}
2841
3ad82a7e
ZX
2842/*
2843 * Caculate mmu pages needed for kvm.
2844 */
2845unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
2846{
2847 int i;
2848 unsigned int nr_mmu_pages;
2849 unsigned int nr_pages = 0;
2850
2851 for (i = 0; i < kvm->nmemslots; i++)
2852 nr_pages += kvm->memslots[i].npages;
2853
2854 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
2855 nr_mmu_pages = max(nr_mmu_pages,
2856 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
2857
2858 return nr_mmu_pages;
2859}
2860
2f333bcb
MT
2861static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2862 unsigned len)
2863{
2864 if (len > buffer->len)
2865 return NULL;
2866 return buffer->ptr;
2867}
2868
2869static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2870 unsigned len)
2871{
2872 void *ret;
2873
2874 ret = pv_mmu_peek_buffer(buffer, len);
2875 if (!ret)
2876 return ret;
2877 buffer->ptr += len;
2878 buffer->len -= len;
2879 buffer->processed += len;
2880 return ret;
2881}
2882
2883static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
2884 gpa_t addr, gpa_t value)
2885{
2886 int bytes = 8;
2887 int r;
2888
2889 if (!is_long_mode(vcpu) && !is_pae(vcpu))
2890 bytes = 4;
2891
2892 r = mmu_topup_memory_caches(vcpu);
2893 if (r)
2894 return r;
2895
3200f405 2896 if (!emulator_write_phys(vcpu, addr, &value, bytes))
2f333bcb
MT
2897 return -EFAULT;
2898
2899 return 1;
2900}
2901
2902static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2903{
2904 kvm_x86_ops->tlb_flush(vcpu);
6ad9f15c 2905 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
2f333bcb
MT
2906 return 1;
2907}
2908
2909static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
2910{
2911 spin_lock(&vcpu->kvm->mmu_lock);
2912 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
2913 spin_unlock(&vcpu->kvm->mmu_lock);
2914 return 1;
2915}
2916
2917static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
2918 struct kvm_pv_mmu_op_buffer *buffer)
2919{
2920 struct kvm_mmu_op_header *header;
2921
2922 header = pv_mmu_peek_buffer(buffer, sizeof *header);
2923 if (!header)
2924 return 0;
2925 switch (header->op) {
2926 case KVM_MMU_OP_WRITE_PTE: {
2927 struct kvm_mmu_op_write_pte *wpte;
2928
2929 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
2930 if (!wpte)
2931 return 0;
2932 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
2933 wpte->pte_val);
2934 }
2935 case KVM_MMU_OP_FLUSH_TLB: {
2936 struct kvm_mmu_op_flush_tlb *ftlb;
2937
2938 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
2939 if (!ftlb)
2940 return 0;
2941 return kvm_pv_mmu_flush_tlb(vcpu);
2942 }
2943 case KVM_MMU_OP_RELEASE_PT: {
2944 struct kvm_mmu_op_release_pt *rpt;
2945
2946 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
2947 if (!rpt)
2948 return 0;
2949 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
2950 }
2951 default: return 0;
2952 }
2953}
2954
2955int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
2956 gpa_t addr, unsigned long *ret)
2957{
2958 int r;
6ad18fba 2959 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
2f333bcb 2960
6ad18fba
DH
2961 buffer->ptr = buffer->buf;
2962 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
2963 buffer->processed = 0;
2f333bcb 2964
6ad18fba 2965 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
2f333bcb
MT
2966 if (r)
2967 goto out;
2968
6ad18fba
DH
2969 while (buffer->len) {
2970 r = kvm_pv_mmu_op_one(vcpu, buffer);
2f333bcb
MT
2971 if (r < 0)
2972 goto out;
2973 if (r == 0)
2974 break;
2975 }
2976
2977 r = 1;
2978out:
6ad18fba 2979 *ret = buffer->processed;
2f333bcb
MT
2980 return r;
2981}
2982
37a7d8b0
AK
2983#ifdef AUDIT
2984
2985static const char *audit_msg;
2986
2987static gva_t canonicalize(gva_t gva)
2988{
2989#ifdef CONFIG_X86_64
2990 gva = (long long)(gva << 16) >> 16;
2991#endif
2992 return gva;
2993}
2994
2995static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
2996 gva_t va, int level)
2997{
2998 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
2999 int i;
3000 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3001
3002 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3003 u64 ent = pt[i];
3004
c7addb90 3005 if (ent == shadow_trap_nonpresent_pte)
37a7d8b0
AK
3006 continue;
3007
3008 va = canonicalize(va);
c7addb90
AK
3009 if (level > 1) {
3010 if (ent == shadow_notrap_nonpresent_pte)
3011 printk(KERN_ERR "audit: (%s) nontrapping pte"
3012 " in nonleaf level: levels %d gva %lx"
3013 " level %d pte %llx\n", audit_msg,
ad312c7c 3014 vcpu->arch.mmu.root_level, va, level, ent);
c7addb90 3015
37a7d8b0 3016 audit_mappings_page(vcpu, ent, va, level - 1);
c7addb90 3017 } else {
ad312c7c 3018 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
35149e21 3019 hpa_t hpa = (hpa_t)gpa_to_pfn(vcpu, gpa) << PAGE_SHIFT;
37a7d8b0 3020
c7addb90 3021 if (is_shadow_present_pte(ent)
37a7d8b0 3022 && (ent & PT64_BASE_ADDR_MASK) != hpa)
c7addb90
AK
3023 printk(KERN_ERR "xx audit error: (%s) levels %d"
3024 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
ad312c7c 3025 audit_msg, vcpu->arch.mmu.root_level,
d77c26fc
MD
3026 va, gpa, hpa, ent,
3027 is_shadow_present_pte(ent));
c7addb90
AK
3028 else if (ent == shadow_notrap_nonpresent_pte
3029 && !is_error_hpa(hpa))
3030 printk(KERN_ERR "audit: (%s) notrap shadow,"
3031 " valid guest gva %lx\n", audit_msg, va);
35149e21 3032 kvm_release_pfn_clean(pfn);
c7addb90 3033
37a7d8b0
AK
3034 }
3035 }
3036}
3037
3038static void audit_mappings(struct kvm_vcpu *vcpu)
3039{
1ea252af 3040 unsigned i;
37a7d8b0 3041
ad312c7c
ZX
3042 if (vcpu->arch.mmu.root_level == 4)
3043 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
37a7d8b0
AK
3044 else
3045 for (i = 0; i < 4; ++i)
ad312c7c 3046 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
37a7d8b0 3047 audit_mappings_page(vcpu,
ad312c7c 3048 vcpu->arch.mmu.pae_root[i],
37a7d8b0
AK
3049 i << 30,
3050 2);
3051}
3052
3053static int count_rmaps(struct kvm_vcpu *vcpu)
3054{
3055 int nmaps = 0;
3056 int i, j, k;
3057
3058 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3059 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
3060 struct kvm_rmap_desc *d;
3061
3062 for (j = 0; j < m->npages; ++j) {
290fc38d 3063 unsigned long *rmapp = &m->rmap[j];
37a7d8b0 3064
290fc38d 3065 if (!*rmapp)
37a7d8b0 3066 continue;
290fc38d 3067 if (!(*rmapp & 1)) {
37a7d8b0
AK
3068 ++nmaps;
3069 continue;
3070 }
290fc38d 3071 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
37a7d8b0
AK
3072 while (d) {
3073 for (k = 0; k < RMAP_EXT; ++k)
3074 if (d->shadow_ptes[k])
3075 ++nmaps;
3076 else
3077 break;
3078 d = d->more;
3079 }
3080 }
3081 }
3082 return nmaps;
3083}
3084
3085static int count_writable_mappings(struct kvm_vcpu *vcpu)
3086{
3087 int nmaps = 0;
4db35314 3088 struct kvm_mmu_page *sp;
37a7d8b0
AK
3089 int i;
3090
f05e70ac 3091 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 3092 u64 *pt = sp->spt;
37a7d8b0 3093
4db35314 3094 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
37a7d8b0
AK
3095 continue;
3096
3097 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3098 u64 ent = pt[i];
3099
3100 if (!(ent & PT_PRESENT_MASK))
3101 continue;
3102 if (!(ent & PT_WRITABLE_MASK))
3103 continue;
3104 ++nmaps;
3105 }
3106 }
3107 return nmaps;
3108}
3109
3110static void audit_rmap(struct kvm_vcpu *vcpu)
3111{
3112 int n_rmap = count_rmaps(vcpu);
3113 int n_actual = count_writable_mappings(vcpu);
3114
3115 if (n_rmap != n_actual)
3116 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
b8688d51 3117 __func__, audit_msg, n_rmap, n_actual);
37a7d8b0
AK
3118}
3119
3120static void audit_write_protection(struct kvm_vcpu *vcpu)
3121{
4db35314 3122 struct kvm_mmu_page *sp;
290fc38d
IE
3123 struct kvm_memory_slot *slot;
3124 unsigned long *rmapp;
3125 gfn_t gfn;
37a7d8b0 3126
f05e70ac 3127 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 3128 if (sp->role.metaphysical)
37a7d8b0
AK
3129 continue;
3130
4db35314 3131 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
2843099f 3132 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
290fc38d
IE
3133 rmapp = &slot->rmap[gfn - slot->base_gfn];
3134 if (*rmapp)
37a7d8b0
AK
3135 printk(KERN_ERR "%s: (%s) shadow page has writable"
3136 " mappings: gfn %lx role %x\n",
b8688d51 3137 __func__, audit_msg, sp->gfn,
4db35314 3138 sp->role.word);
37a7d8b0
AK
3139 }
3140}
3141
3142static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3143{
3144 int olddbg = dbg;
3145
3146 dbg = 0;
3147 audit_msg = msg;
3148 audit_rmap(vcpu);
3149 audit_write_protection(vcpu);
3150 audit_mappings(vcpu);
3151 dbg = olddbg;
3152}
3153
3154#endif
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