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PR 3609
[deliverable/binutils-gdb.git] / opcodes / i386-dis.c
CommitLineData
252b5132 1/* Print i386 instructions for GDB, the GNU debugger.
060d22b0 2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
0112cd26 3 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
252b5132 4
20f0a1fc
NC		 5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
f4321104 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
20f0a1fc
NC		 20
21/* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
22 July 1988
23 modified by John Hassey (hassey@dg-rtp.dg.com)
24 x86-64 support added by Jan Hubicka (jh@suse.cz)
25 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
26
27/* The main tables describing the instructions is essentially a copy
28 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
29 Programmers Manual. Usually, there is a capital letter, followed
30 by a small letter. The capital letter tell the addressing mode,
31 and the small letter tells about the operand size. Refer to
32 the Intel manual for details. */
252b5132
RH		 33
34#include "dis-asm.h"
35#include "sysdep.h"
36#include "opintl.h"
37
272c9217 38#define MAXLEN 15
252b5132
RH		 39
40#include <setjmp.h>
41
42#ifndef UNIXWARE_COMPAT
43/* Set non-zero for broken, compatible instructions. Set to zero for
44 non-broken opcodes. */
45#define UNIXWARE_COMPAT 1
46#endif
47
26ca5450
AJ		 48static int fetch_data (struct disassemble_info *, bfd_byte *);
49static void ckprefix (void);
50static const char *prefix_name (int, int);
51static int print_insn (bfd_vma, disassemble_info *);
52static void dofloat (int);
53static void OP_ST (int, int);
54static void OP_STi (int, int);
55static int putop (const char *, int);
56static void oappend (const char *);
57static void append_seg (void);
58static void OP_indirE (int, int);
59static void print_operand_value (char *, int, bfd_vma);
60static void OP_E (int, int);
61static void OP_G (int, int);
62static bfd_vma get64 (void);
63static bfd_signed_vma get32 (void);
64static bfd_signed_vma get32s (void);
65static int get16 (void);
66static void set_op (bfd_vma, int);
67static void OP_REG (int, int);
68static void OP_IMREG (int, int);
69static void OP_I (int, int);
70static void OP_I64 (int, int);
71static void OP_sI (int, int);
72static void OP_J (int, int);
73static void OP_SEG (int, int);
74static void OP_DIR (int, int);
75static void OP_OFF (int, int);
76static void OP_OFF64 (int, int);
77static void ptr_reg (int, int);
78static void OP_ESreg (int, int);
79static void OP_DSreg (int, int);
80static void OP_C (int, int);
81static void OP_D (int, int);
82static void OP_T (int, int);
83static void OP_Rd (int, int);
84static void OP_MMX (int, int);
85static void OP_XMM (int, int);
86static void OP_EM (int, int);
87static void OP_EX (int, int);
4d9567e0
MM		 88static void OP_EMC (int,int);
89static void OP_MXC (int,int);
26ca5450
AJ		 90static void OP_MS (int, int);
91static void OP_XS (int, int);
cc0ec051 92static void OP_M (int, int);
90700ea2 93static void OP_VMX (int, int);
cc0ec051
AM		 94static void OP_0fae (int, int);
95static void OP_0f07 (int, int);
46e883c5
L		 96static void NOP_Fixup1 (int, int);
97static void NOP_Fixup2 (int, int);
26ca5450
AJ		 98static void OP_3DNowSuffix (int, int);
99static void OP_SIMD_Suffix (int, int);
100static void SIMD_Fixup (int, int);
101static void PNI_Fixup (int, int);
30123838 102static void SVME_Fixup (int, int);
4fd61dcb 103static void INVLPG_Fixup (int, int);
26ca5450 104static void BadOp (void);
4cc91dba 105static void SEG_Fixup (int, int);
90700ea2 106static void VMX_Fixup (int, int);
35c52694 107static void REP_Fixup (int, int);
252b5132 108
6608db57 109struct dis_private {
252b5132
RH		 110 /* Points to first byte not fetched. */
111 bfd_byte *max_fetched;
112 bfd_byte the_buffer[MAXLEN];
113 bfd_vma insn_start;
e396998b 114 int orig_sizeflag;
252b5132
RH		 115 jmp_buf bailout;
116};
117
5076851f
ILT		 118/* The opcode for the fwait instruction, which we treat as a prefix
119 when we can. */
120#define FWAIT_OPCODE (0x9b)
121
cb712a9e
L		 122enum address_mode
123{
124 mode_16bit,
125 mode_32bit,
126 mode_64bit
127};
128
129enum address_mode address_mode;
52b15da3 130
5076851f
ILT		 131/* Flags for the prefixes for the current instruction. See below. */
132static int prefixes;
133
52b15da3
JH		 134/* REX prefix the current instruction. See below. */
135static int rex;
136/* Bits of REX we've already used. */
137static int rex_used;
138#define REX_MODE64 8
139#define REX_EXTX 4
140#define REX_EXTY 2
141#define REX_EXTZ 1
142/* Mark parts used in the REX prefix. When we are testing for
143 empty prefix (for 8bit register REX extension), just mask it
144 out. Otherwise test for REX bit is excuse for existence of REX
145 only in case value is nonzero. */
146#define USED_REX(value) \
147 { \
148 if (value) \
149 rex_used |= (rex & value) ? (value) | 0x40 : 0; \
150 else \
151 rex_used |= 0x40; \
152 }
153
7d421014
ILT		 154/* Flags for prefixes which we somehow handled when printing the
155 current instruction. */
156static int used_prefixes;
157
5076851f
ILT		 158/* Flags stored in PREFIXES. */
159#define PREFIX_REPZ 1
160#define PREFIX_REPNZ 2
161#define PREFIX_LOCK 4
162#define PREFIX_CS 8
163#define PREFIX_SS 0x10
164#define PREFIX_DS 0x20
165#define PREFIX_ES 0x40
166#define PREFIX_FS 0x80
167#define PREFIX_GS 0x100
168#define PREFIX_DATA 0x200
169#define PREFIX_ADDR 0x400
170#define PREFIX_FWAIT 0x800
171
252b5132
RH		 172/* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
173 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
174 on error. */
175#define FETCH_DATA(info, addr) \
6608db57 176 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
252b5132
RH		 177 ? 1 : fetch_data ((info), (addr)))
178
179static int
26ca5450 180fetch_data (struct disassemble_info *info, bfd_byte *addr)
252b5132
RH		 181{
182 int status;
6608db57 183 struct dis_private *priv = (struct dis_private *) info->private_data;
252b5132
RH		 184 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
185
272c9217
JB		 186 if (addr <= priv->the_buffer + MAXLEN)
187 status = (*info->read_memory_func) (start,
188 priv->max_fetched,
189 addr - priv->max_fetched,
190 info);
191 else
192 status = -1;
252b5132
RH		 193 if (status != 0)
194 {
7d421014 195 /* If we did manage to read at least one byte, then
db6eb5be
AM		 196 print_insn_i386 will do something sensible. Otherwise, print
197 an error. We do that here because this is where we know
198 STATUS. */
7d421014 199 if (priv->max_fetched == priv->the_buffer)
5076851f 200 (*info->memory_error_func) (status, start, info);
252b5132
RH		 201 longjmp (priv->bailout, 1);
202 }
203 else
204 priv->max_fetched = addr;
205 return 1;
206}
207
57d91c3c
ILT		 208#define XX NULL, 0
209
252b5132 210#define Eb OP_E, b_mode
52b15da3
JH		 211#define Ev OP_E, v_mode
212#define Ed OP_E, d_mode
9306ca4a 213#define Eq OP_E, q_mode
db6eb5be 214#define Edq OP_E, dq_mode
9306ca4a 215#define Edqw OP_E, dqw_mode
1a114b12 216#define indirEv OP_indirE, stack_v_mode
9306ca4a 217#define indirEp OP_indirE, f_mode
1a114b12 218#define stackEv OP_E, stack_v_mode
90700ea2 219#define Em OP_E, m_mode
252b5132
RH		 220#define Ew OP_E, w_mode
221#define Ma OP_E, v_mode
cc0ec051 222#define M OP_M, 0 /* lea, lgdt, etc. */
9306ca4a 223#define Mp OP_M, f_mode /* 32 or 48 bit memory operand for LDS, LES etc */
992aaec9 224#define Gb OP_G, b_mode
252b5132 225#define Gv OP_G, v_mode
992aaec9 226#define Gd OP_G, d_mode
9306ca4a 227#define Gdq OP_G, dq_mode
90700ea2 228#define Gm OP_G, m_mode
252b5132 229#define Gw OP_G, w_mode
2da11e11 230#define Rd OP_Rd, d_mode
52b15da3 231#define Rm OP_Rd, m_mode
252b5132
RH		 232#define Ib OP_I, b_mode
233#define sIb OP_sI, b_mode /* sign extened byte */
234#define Iv OP_I, v_mode
52b15da3
JH		 235#define Iq OP_I, q_mode
236#define Iv64 OP_I64, v_mode
252b5132 237#define Iw OP_I, w_mode
9306ca4a 238#define I1 OP_I, const_1_mode
252b5132
RH		 239#define Jb OP_J, b_mode
240#define Jv OP_J, v_mode
52b15da3
JH		 241#define Cm OP_C, m_mode
242#define Dm OP_D, m_mode
252b5132 243#define Td OP_T, d_mode
4cc91dba 244#define Sv SEG_Fixup, v_mode
252b5132 245
52b15da3
JH		 246#define RMeAX OP_REG, eAX_reg
247#define RMeBX OP_REG, eBX_reg
248#define RMeCX OP_REG, eCX_reg
249#define RMeDX OP_REG, eDX_reg
250#define RMeSP OP_REG, eSP_reg
251#define RMeBP OP_REG, eBP_reg
252#define RMeSI OP_REG, eSI_reg
253#define RMeDI OP_REG, eDI_reg
254#define RMrAX OP_REG, rAX_reg
255#define RMrBX OP_REG, rBX_reg
256#define RMrCX OP_REG, rCX_reg
257#define RMrDX OP_REG, rDX_reg
258#define RMrSP OP_REG, rSP_reg
259#define RMrBP OP_REG, rBP_reg
260#define RMrSI OP_REG, rSI_reg
261#define RMrDI OP_REG, rDI_reg
262#define RMAL OP_REG, al_reg
263#define RMAL OP_REG, al_reg
264#define RMCL OP_REG, cl_reg
265#define RMDL OP_REG, dl_reg
266#define RMBL OP_REG, bl_reg
267#define RMAH OP_REG, ah_reg
268#define RMCH OP_REG, ch_reg
269#define RMDH OP_REG, dh_reg
270#define RMBH OP_REG, bh_reg
271#define RMAX OP_REG, ax_reg
272#define RMDX OP_REG, dx_reg
273
274#define eAX OP_IMREG, eAX_reg
275#define eBX OP_IMREG, eBX_reg
276#define eCX OP_IMREG, eCX_reg
277#define eDX OP_IMREG, eDX_reg
278#define eSP OP_IMREG, eSP_reg
279#define eBP OP_IMREG, eBP_reg
280#define eSI OP_IMREG, eSI_reg
281#define eDI OP_IMREG, eDI_reg
282#define AL OP_IMREG, al_reg
52b15da3
JH		 283#define CL OP_IMREG, cl_reg
284#define DL OP_IMREG, dl_reg
285#define BL OP_IMREG, bl_reg
286#define AH OP_IMREG, ah_reg
287#define CH OP_IMREG, ch_reg
288#define DH OP_IMREG, dh_reg
289#define BH OP_IMREG, bh_reg
290#define AX OP_IMREG, ax_reg
291#define DX OP_IMREG, dx_reg
292#define indirDX OP_IMREG, indir_dx_reg
252b5132
RH		 293
294#define Sw OP_SEG, w_mode
c608c12e 295#define Ap OP_DIR, 0
1a114b12
JB		 296#define Ob OP_OFF64, b_mode
297#define Ov OP_OFF64, v_mode
252b5132
RH		 298#define Xb OP_DSreg, eSI_reg
299#define Xv OP_DSreg, eSI_reg
300#define Yb OP_ESreg, eDI_reg
301#define Yv OP_ESreg, eDI_reg
302#define DSBX OP_DSreg, eBX_reg
303
304#define es OP_REG, es_reg
305#define ss OP_REG, ss_reg
306#define cs OP_REG, cs_reg
307#define ds OP_REG, ds_reg
308#define fs OP_REG, fs_reg
309#define gs OP_REG, gs_reg
310
311#define MX OP_MMX, 0
c608c12e 312#define XM OP_XMM, 0
252b5132 313#define EM OP_EM, v_mode
c608c12e 314#define EX OP_EX, v_mode
2da11e11 315#define MS OP_MS, v_mode
992aaec9 316#define XS OP_XS, v_mode
4d9567e0
MM		 317#define EMC OP_EMC, v_mode
318#define MXC OP_MXC, 0
90700ea2 319#define VM OP_VMX, q_mode
252b5132 320#define OPSUF OP_3DNowSuffix, 0
c608c12e 321#define OPSIMD OP_SIMD_Suffix, 0
252b5132 322
35c52694
L		 323/* Used handle "rep" prefix for string instructions. */
324#define Xbr REP_Fixup, eSI_reg
325#define Xvr REP_Fixup, eSI_reg
326#define Ybr REP_Fixup, eDI_reg
327#define Yvr REP_Fixup, eDI_reg
328#define indirDXr REP_Fixup, indir_dx_reg
329#define ALr REP_Fixup, al_reg
330#define eAXr REP_Fixup, eAX_reg
331
3ffd33cf
AM		 332#define cond_jump_flag NULL, cond_jump_mode
333#define loop_jcxz_flag NULL, loop_jcxz_mode
334
252b5132 335/* bits in sizeflag */
252b5132 336#define SUFFIX_ALWAYS 4
252b5132
RH		 337#define AFLAG 2
338#define DFLAG 1
339
52b15da3
JH		 340#define b_mode 1 /* byte operand */
341#define v_mode 2 /* operand size depends on prefixes */
342#define w_mode 3 /* word operand */
343#define d_mode 4 /* double word operand */
344#define q_mode 5 /* quad word operand */
9306ca4a
JB		 345#define t_mode 6 /* ten-byte operand */
346#define x_mode 7 /* 16-byte XMM operand */
347#define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
348#define cond_jump_mode 9
349#define loop_jcxz_mode 10
350#define dq_mode 11 /* operand size depends on REX prefixes. */
351#define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
352#define f_mode 13 /* 4- or 6-byte pointer operand */
353#define const_1_mode 14
1a114b12 354#define stack_v_mode 15 /* v_mode for stack-related opcodes. */
252b5132
RH		 355
356#define es_reg 100
357#define cs_reg 101
358#define ss_reg 102
359#define ds_reg 103
360#define fs_reg 104
361#define gs_reg 105
252b5132 362
c608c12e
AM		 363#define eAX_reg 108
364#define eCX_reg 109
365#define eDX_reg 110
366#define eBX_reg 111
367#define eSP_reg 112
368#define eBP_reg 113
369#define eSI_reg 114
370#define eDI_reg 115
252b5132
RH		 371
372#define al_reg 116
373#define cl_reg 117
374#define dl_reg 118
375#define bl_reg 119
376#define ah_reg 120
377#define ch_reg 121
378#define dh_reg 122
379#define bh_reg 123
380
381#define ax_reg 124
382#define cx_reg 125
383#define dx_reg 126
384#define bx_reg 127
385#define sp_reg 128
386#define bp_reg 129
387#define si_reg 130
388#define di_reg 131
389
52b15da3
JH		 390#define rAX_reg 132
391#define rCX_reg 133
392#define rDX_reg 134
393#define rBX_reg 135
394#define rSP_reg 136
395#define rBP_reg 137
396#define rSI_reg 138
397#define rDI_reg 139
398
252b5132
RH		 399#define indir_dx_reg 150
400
6439fc28
AM		 401#define FLOATCODE 1
402#define USE_GROUPS 2
403#define USE_PREFIX_USER_TABLE 3
404#define X86_64_SPECIAL 4
331d2d0d 405#define IS_3BYTE_OPCODE 5
6439fc28 406
050dfa73
MM		 407#define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0, NULL, 0
408
409#define GRP1b NULL, NULL, USE_GROUPS, NULL, 0, NULL, 0, NULL, 0
410#define GRP1S NULL, NULL, USE_GROUPS, NULL, 1, NULL, 0, NULL, 0
411#define GRP1Ss NULL, NULL, USE_GROUPS, NULL, 2, NULL, 0, NULL, 0
412#define GRP2b NULL, NULL, USE_GROUPS, NULL, 3, NULL, 0, NULL, 0
413#define GRP2S NULL, NULL, USE_GROUPS, NULL, 4, NULL, 0, NULL, 0
414#define GRP2b_one NULL, NULL, USE_GROUPS, NULL, 5, NULL, 0, NULL, 0
415#define GRP2S_one NULL, NULL, USE_GROUPS, NULL, 6, NULL, 0, NULL, 0
416#define GRP2b_cl NULL, NULL, USE_GROUPS, NULL, 7, NULL, 0, NULL, 0
417#define GRP2S_cl NULL, NULL, USE_GROUPS, NULL, 8, NULL, 0, NULL, 0
418#define GRP3b NULL, NULL, USE_GROUPS, NULL, 9, NULL, 0, NULL, 0
419#define GRP3S NULL, NULL, USE_GROUPS, NULL, 10, NULL, 0, NULL, 0
420#define GRP4 NULL, NULL, USE_GROUPS, NULL, 11, NULL, 0, NULL, 0
421#define GRP5 NULL, NULL, USE_GROUPS, NULL, 12, NULL, 0, NULL, 0
422#define GRP6 NULL, NULL, USE_GROUPS, NULL, 13, NULL, 0, NULL, 0
423#define GRP7 NULL, NULL, USE_GROUPS, NULL, 14, NULL, 0, NULL, 0
424#define GRP8 NULL, NULL, USE_GROUPS, NULL, 15, NULL, 0, NULL, 0
425#define GRP9 NULL, NULL, USE_GROUPS, NULL, 16, NULL, 0, NULL, 0
a6bd098c
L		 426#define GRP11_C6 NULL, NULL, USE_GROUPS, NULL, 17, NULL, 0, NULL, 0
427#define GRP11_C7 NULL, NULL, USE_GROUPS, NULL, 18, NULL, 0, NULL, 0
428#define GRP12 NULL, NULL, USE_GROUPS, NULL, 19, NULL, 0, NULL, 0
429#define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0, NULL, 0
430#define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0, NULL, 0
431#define GRP15 NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0, NULL, 0
432#define GRP16 NULL, NULL, USE_GROUPS, NULL, 23, NULL, 0, NULL, 0
433#define GRPAMD NULL, NULL, USE_GROUPS, NULL, 24, NULL, 0, NULL, 0
434#define GRPPADLCK1 NULL, NULL, USE_GROUPS, NULL, 25, NULL, 0, NULL, 0
435#define GRPPADLCK2 NULL, NULL, USE_GROUPS, NULL, 26, NULL, 0, NULL, 0
050dfa73
MM		 436
437#define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0, NULL, 0
438#define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0, NULL, 0
439#define PREGRP2 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 2, NULL, 0, NULL, 0
440#define PREGRP3 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 3, NULL, 0, NULL, 0
441#define PREGRP4 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 4, NULL, 0, NULL, 0
442#define PREGRP5 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 5, NULL, 0, NULL, 0
443#define PREGRP6 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 6, NULL, 0, NULL, 0
444#define PREGRP7 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 7, NULL, 0, NULL, 0
445#define PREGRP8 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 8, NULL, 0, NULL, 0
446#define PREGRP9 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 9, NULL, 0, NULL, 0
447#define PREGRP10 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 10, NULL, 0, NULL, 0
448#define PREGRP11 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 11, NULL, 0, NULL, 0
449#define PREGRP12 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 12, NULL, 0, NULL, 0
450#define PREGRP13 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 13, NULL, 0, NULL, 0
451#define PREGRP14 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 14, NULL, 0, NULL, 0
452#define PREGRP15 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 15, NULL, 0, NULL, 0
453#define PREGRP16 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 16, NULL, 0, NULL, 0
454#define PREGRP17 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 17, NULL, 0, NULL, 0
455#define PREGRP18 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 18, NULL, 0, NULL, 0
456#define PREGRP19 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 19, NULL, 0, NULL, 0
457#define PREGRP20 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 20, NULL, 0, NULL, 0
458#define PREGRP21 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 21, NULL, 0, NULL, 0
459#define PREGRP22 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 22, NULL, 0, NULL, 0
460#define PREGRP23 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 23, NULL, 0, NULL, 0
461#define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0, NULL, 0
462#define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0, NULL, 0
463#define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0, NULL, 0
464#define PREGRP27 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 27, NULL, 0, NULL, 0
465#define PREGRP28 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 28, NULL, 0, NULL, 0
466#define PREGRP29 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 29, NULL, 0, NULL, 0
467#define PREGRP30 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 30, NULL, 0, NULL, 0
468#define PREGRP31 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 31, NULL, 0, NULL, 0
469#define PREGRP32 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 32, NULL, 0, NULL, 0
470#define PREGRP33 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 33, NULL, 0, NULL, 0
471#define PREGRP34 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 34, NULL, 0, NULL, 0
472#define PREGRP35 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 35, NULL, 0, NULL, 0
473#define PREGRP36 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 36, NULL, 0, NULL, 0
7918206c
MM		 474#define PREGRP37 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 37, NULL, 0, NULL, 0
475
050dfa73
MM		 476
477#define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0, NULL, 0
478
479#define THREE_BYTE_0 NULL, NULL, IS_3BYTE_OPCODE, NULL, 0, NULL, 0, NULL, 0
480#define THREE_BYTE_1 NULL, NULL, IS_3BYTE_OPCODE, NULL, 1, NULL, 0, NULL, 0
331d2d0d 481
26ca5450 482typedef void (*op_rtn) (int bytemode, int sizeflag);
252b5132
RH		 483
484struct dis386 {
2da11e11 485 const char *name;
252b5132
RH		 486 op_rtn op1;
487 int bytemode1;
488 op_rtn op2;
489 int bytemode2;
490 op_rtn op3;
491 int bytemode3;
050dfa73
MM		 492 op_rtn op4;
493 int bytemode4;
252b5132
RH		 494};
495
496/* Upper case letters in the instruction names here are macros.
497 'A' => print 'b' if no register operands or suffix_always is true
498 'B' => print 'b' if suffix_always is true
9306ca4a
JB		 499 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
500 . size prefix
252b5132 501 'E' => print 'e' if 32-bit form of jcxz
3ffd33cf 502 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
5dd0794d 503 'H' => print ",pt" or ",pn" branch hint
9306ca4a
JB		 504 'I' => honor following macro letter even in Intel mode (implemented only
505 . for some of the macro letters)
506 'J' => print 'l'
252b5132
RH		 507 'L' => print 'l' if suffix_always is true
508 'N' => print 'n' if instruction has no wait "prefix"
52b15da3
JH		 509 'O' => print 'd', or 'o'
510 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
e396998b
AM		 511 . or suffix_always is true. print 'q' if rex prefix is present.
512 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
513 . is true
52b15da3
JH		 514 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode)
515 'S' => print 'w', 'l' or 'q' if suffix_always is true
6439fc28
AM		 516 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
517 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
1a114b12 518 'V' => print 'q' in 64bit mode and behave as 'S' otherwise
10084519 519 'W' => print 'b' or 'w' ("w" or "de" in intel mode)
9306ca4a 520 'X' => print 's', 'd' depending on data16 prefix (for XMM)
76f227a5 521 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
6dd5059a 522 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
52b15da3 523
6439fc28
AM		 524 Many of the above letters print nothing in Intel mode. See "putop"
525 for the details.
52b15da3 526
6439fc28
AM		 527 Braces '{' and '}', and vertical bars '|', indicate alternative
528 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
529 modes. In cases where there are only two alternatives, the X86_64
530 instruction is reserved, and "(bad)" is printed.
531*/
252b5132 532
6439fc28 533static const struct dis386 dis386[] = {
252b5132 534 /* 00 */
050dfa73
MM		 535 { "addB", Eb, Gb, XX, XX },
536 { "addS", Ev, Gv, XX, XX },
537 { "addB", Gb, Eb, XX, XX },
538 { "addS", Gv, Ev, XX, XX },
539 { "addB", AL, Ib, XX, XX },
540 { "addS", eAX, Iv, XX, XX },
541 { "push{T|}", es, XX, XX, XX },
542 { "pop{T|}", es, XX, XX, XX },
252b5132 543 /* 08 */
050dfa73
MM		 544 { "orB", Eb, Gb, XX, XX },
545 { "orS", Ev, Gv, XX, XX },
546 { "orB", Gb, Eb, XX, XX },
547 { "orS", Gv, Ev, XX , XX},
548 { "orB", AL, Ib, XX, XX },
549 { "orS", eAX, Iv, XX, XX },
550 { "push{T|}", cs, XX, XX, XX },
551 { "(bad)", XX, XX, XX, XX }, /* 0x0f extended opcode escape */
252b5132 552 /* 10 */
050dfa73
MM		 553 { "adcB", Eb, Gb, XX, XX },
554 { "adcS", Ev, Gv, XX, XX },
555 { "adcB", Gb, Eb, XX, XX },
556 { "adcS", Gv, Ev, XX, XX },
557 { "adcB", AL, Ib, XX, XX },
558 { "adcS", eAX, Iv, XX, XX },
559 { "push{T|}", ss, XX, XX, XX },
560 { "pop{T|}", ss, XX, XX, XX },
252b5132 561 /* 18 */
050dfa73
MM		 562 { "sbbB", Eb, Gb, XX, XX },
563 { "sbbS", Ev, Gv, XX, XX },
564 { "sbbB", Gb, Eb, XX, XX },
565 { "sbbS", Gv, Ev, XX, XX },
566 { "sbbB", AL, Ib, XX, XX },
567 { "sbbS", eAX, Iv, XX, XX },
568 { "push{T|}", ds, XX, XX, XX },
569 { "pop{T|}", ds, XX, XX, XX },
252b5132 570 /* 20 */
050dfa73
MM		 571 { "andB", Eb, Gb, XX, XX },
572 { "andS", Ev, Gv, XX, XX },
573 { "andB", Gb, Eb, XX, XX },
574 { "andS", Gv, Ev, XX, XX },
575 { "andB", AL, Ib, XX, XX },
576 { "andS", eAX, Iv, XX, XX },
577 { "(bad)", XX, XX, XX, XX }, /* SEG ES prefix */
578 { "daa{|}", XX, XX, XX, XX },
252b5132 579 /* 28 */
050dfa73
MM		 580 { "subB", Eb, Gb, XX, XX },
581 { "subS", Ev, Gv, XX, XX},
582 { "subB", Gb, Eb, XX, XX },
583 { "subS", Gv, Ev, XX, XX },
584 { "subB", AL, Ib, XX, XX },
585 { "subS", eAX, Iv, XX, XX },
586 { "(bad)", XX, XX, XX, XX }, /* SEG CS prefix */
587 { "das{|}", XX, XX, XX, XX },
252b5132 588 /* 30 */
050dfa73
MM		 589 { "xorB", Eb, Gb, XX, XX },
590 { "xorS", Ev, Gv, XX, XX },
591 { "xorB", Gb, Eb, XX, XX },
592 { "xorS", Gv, Ev, XX, XX },
593 { "xorB", AL, Ib, XX, XX },
594 { "xorS", eAX, Iv, XX, XX },
595 { "(bad)", XX, XX, XX, XX }, /* SEG SS prefix */
596 { "aaa{|}", XX, XX, XX, XX },
252b5132 597 /* 38 */
050dfa73
MM		 598 { "cmpB", Eb, Gb, XX, XX },
599 { "cmpS", Ev, Gv, XX, XX },
600 { "cmpB", Gb, Eb, XX, XX },
601 { "cmpS", Gv, Ev, XX, XX },
602 { "cmpB", AL, Ib, XX, XX },
603 { "cmpS", eAX, Iv, XX, XX },
604 { "(bad)", XX, XX, XX, XX }, /* SEG DS prefix */
605 { "aas{|}", XX, XX, XX, XX },
252b5132 606 /* 40 */
050dfa73
MM		 607 { "inc{S|}", RMeAX, XX, XX, XX },
608 { "inc{S|}", RMeCX, XX, XX, XX },
609 { "inc{S|}", RMeDX, XX, XX, XX },
610 { "inc{S|}", RMeBX, XX, XX, XX },
611 { "inc{S|}", RMeSP, XX, XX, XX },
612 { "inc{S|}", RMeBP, XX, XX, XX },
613 { "inc{S|}", RMeSI, XX, XX, XX },
614 { "inc{S|}", RMeDI, XX, XX, XX },
252b5132 615 /* 48 */
050dfa73
MM		 616 { "dec{S|}", RMeAX, XX, XX, XX },
617 { "dec{S|}", RMeCX, XX, XX, XX },
618 { "dec{S|}", RMeDX, XX, XX, XX },
619 { "dec{S|}", RMeBX, XX, XX, XX },
620 { "dec{S|}", RMeSP, XX, XX, XX },
621 { "dec{S|}", RMeBP, XX, XX, XX },
622 { "dec{S|}", RMeSI, XX, XX, XX },
623 { "dec{S|}", RMeDI, XX, XX, XX },
252b5132 624 /* 50 */
050dfa73
MM		 625 { "pushV", RMrAX, XX, XX, XX },
626 { "pushV", RMrCX, XX, XX, XX },
627 { "pushV", RMrDX, XX, XX, XX },
628 { "pushV", RMrBX, XX, XX, XX },
629 { "pushV", RMrSP, XX, XX, XX },
630 { "pushV", RMrBP, XX, XX, XX },
631 { "pushV", RMrSI, XX, XX, XX },
632 { "pushV", RMrDI, XX, XX, XX },
252b5132 633 /* 58 */
050dfa73
MM		 634 { "popV", RMrAX, XX, XX, XX },
635 { "popV", RMrCX, XX, XX, XX },
636 { "popV", RMrDX, XX, XX, XX },
637 { "popV", RMrBX, XX, XX, XX },
638 { "popV", RMrSP, XX, XX, XX },
639 { "popV", RMrBP, XX, XX, XX },
640 { "popV", RMrSI, XX, XX, XX },
641 { "popV", RMrDI, XX, XX, XX },
252b5132 642 /* 60 */
050dfa73
MM		 643 { "pusha{P|}", XX, XX, XX, XX},
644 { "popa{P|}", XX, XX, XX, XX },
645 { "bound{S|}", Gv, Ma, XX, XX },
6439fc28 646 { X86_64_0 },
050dfa73
MM		 647 { "(bad)", XX, XX, XX, XX }, /* seg fs */
648 { "(bad)", XX, XX, XX, XX }, /* seg gs */
649 { "(bad)", XX, XX, XX, XX }, /* op size prefix */
650 { "(bad)", XX, XX, XX, XX }, /* adr size prefix */
252b5132 651 /* 68 */
050dfa73
MM		 652 { "pushT", Iq, XX, XX, XX },
653 { "imulS", Gv, Ev, Iv, XX },
654 { "pushT", sIb, XX, XX, XX },
655 { "imulS", Gv, Ev, sIb, XX },
656 { "ins{b||b|}", Ybr, indirDX, XX, XX },
657 { "ins{R||R|}", Yvr, indirDX, XX, XX },
658 { "outs{b||b|}", indirDXr, Xb, XX, XX },
659 { "outs{R||R|}", indirDXr, Xv, XX, XX },
252b5132 660 /* 70 */
050dfa73
MM		 661 { "joH", Jb, XX, cond_jump_flag, XX },
662 { "jnoH", Jb, XX, cond_jump_flag, XX },
663 { "jbH", Jb, XX, cond_jump_flag, XX },
664 { "jaeH", Jb, XX, cond_jump_flag, XX },
665 { "jeH", Jb, XX, cond_jump_flag, XX },
666 { "jneH", Jb, XX, cond_jump_flag, XX },
667 { "jbeH", Jb, XX, cond_jump_flag, XX },
668 { "jaH", Jb, XX, cond_jump_flag, XX },
252b5132 669 /* 78 */
050dfa73
MM		 670 { "jsH", Jb, XX, cond_jump_flag, XX },
671 { "jnsH", Jb, XX, cond_jump_flag, XX },
672 { "jpH", Jb, XX, cond_jump_flag, XX },
673 { "jnpH", Jb, XX, cond_jump_flag, XX },
674 { "jlH", Jb, XX, cond_jump_flag, XX },
675 { "jgeH", Jb, XX, cond_jump_flag, XX },
676 { "jleH", Jb, XX, cond_jump_flag, XX },
677 { "jgH", Jb, XX, cond_jump_flag, XX },
252b5132
RH		 678 /* 80 */
679 { GRP1b },
680 { GRP1S },
050dfa73 681 { "(bad)", XX, XX, XX, XX },
252b5132 682 { GRP1Ss },
050dfa73
MM		 683 { "testB", Eb, Gb, XX, XX },
684 { "testS", Ev, Gv, XX, XX },
685 { "xchgB", Eb, Gb, XX, XX },
686 { "xchgS", Ev, Gv, XX, XX },
252b5132 687 /* 88 */
050dfa73
MM		 688 { "movB", Eb, Gb, XX, XX },
689 { "movS", Ev, Gv, XX, XX },
690 { "movB", Gb, Eb, XX, XX },
691 { "movS", Gv, Ev, XX, XX },
692 { "movQ", Sv, Sw, XX, XX },
693 { "leaS", Gv, M, XX, XX },
694 { "movQ", Sw, Sv, XX, XX },
695 { "popU", stackEv, XX, XX, XX },
252b5132 696 /* 90 */
050dfa73
MM		 697 { "xchgS", NOP_Fixup1, eAX_reg, NOP_Fixup2, eAX_reg, XX, XX },
698 { "xchgS", RMeCX, eAX, XX, XX },
699 { "xchgS", RMeDX, eAX, XX, XX },
700 { "xchgS", RMeBX, eAX, XX, XX },
701 { "xchgS", RMeSP, eAX, XX, XX },
702 { "xchgS", RMeBP, eAX, XX, XX },
703 { "xchgS", RMeSI, eAX, XX, XX },
704 { "xchgS", RMeDI, eAX, XX, XX },
252b5132 705 /* 98 */
050dfa73
MM		 706 { "cW{tR||tR|}", XX, XX, XX, XX },
707 { "cR{tO||tO|}", XX, XX, XX, XX },
708 { "Jcall{T|}", Ap, XX, XX, XX },
709 { "(bad)", XX, XX, XX, XX }, /* fwait */
710 { "pushfT", XX, XX, XX, XX },
711 { "popfT", XX, XX, XX, XX },
712 { "sahf{|}", XX, XX, XX, XX },
713 { "lahf{|}", XX, XX, XX, XX },
252b5132 714 /* a0 */
050dfa73
MM		 715 { "movB", AL, Ob, XX, XX },
716 { "movS", eAX, Ov, XX, XX },
717 { "movB", Ob, AL, XX, XX },
718 { "movS", Ov, eAX, XX, XX },
719 { "movs{b||b|}", Ybr, Xb, XX, XX },
720 { "movs{R||R|}", Yvr, Xv, XX, XX },
721 { "cmps{b||b|}", Xb, Yb, XX, XX },
722 { "cmps{R||R|}", Xv, Yv, XX, XX },
252b5132 723 /* a8 */
050dfa73
MM		 724 { "testB", AL, Ib, XX, XX },
725 { "testS", eAX, Iv, XX, XX },
726 { "stosB", Ybr, AL, XX, XX },
727 { "stosS", Yvr, eAX, XX, XX },
728 { "lodsB", ALr, Xb, XX, XX },
729 { "lodsS", eAXr, Xv, XX, XX },
730 { "scasB", AL, Yb, XX, XX },
731 { "scasS", eAX, Yv, XX, XX },
252b5132 732 /* b0 */
050dfa73
MM		 733 { "movB", RMAL, Ib, XX, XX },
734 { "movB", RMCL, Ib, XX, XX },
735 { "movB", RMDL, Ib, XX, XX },
736 { "movB", RMBL, Ib, XX, XX },
737 { "movB", RMAH, Ib, XX, XX },
738 { "movB", RMCH, Ib, XX, XX },
739 { "movB", RMDH, Ib, XX, XX },
740 { "movB", RMBH, Ib, XX, XX },
252b5132 741 /* b8 */
050dfa73
MM		 742 { "movS", RMeAX, Iv64, XX, XX },
743 { "movS", RMeCX, Iv64, XX, XX },
744 { "movS", RMeDX, Iv64, XX, XX },
745 { "movS", RMeBX, Iv64, XX, XX },
746 { "movS", RMeSP, Iv64, XX, XX },
747 { "movS", RMeBP, Iv64, XX, XX },
748 { "movS", RMeSI, Iv64, XX, XX },
749 { "movS", RMeDI, Iv64, XX, XX },
252b5132
RH		 750 /* c0 */
751 { GRP2b },
752 { GRP2S },
050dfa73
MM		 753 { "retT", Iw, XX, XX, XX },
754 { "retT", XX, XX, XX, XX },
755 { "les{S|}", Gv, Mp, XX, XX },
756 { "ldsS", Gv, Mp, XX, XX },
a6bd098c
L		 757 { GRP11_C6 },
758 { GRP11_C7 },
252b5132 759 /* c8 */
050dfa73
MM		 760 { "enterT", Iw, Ib, XX, XX },
761 { "leaveT", XX, XX, XX, XX },
762 { "lretP", Iw, XX, XX, XX },
763 { "lretP", XX, XX, XX, XX },
764 { "int3", XX, XX, XX, XX },
765 { "int", Ib, XX, XX, XX },
766 { "into{|}", XX, XX, XX, XX },
767 { "iretP", XX, XX, XX, XX },
252b5132
RH		 768 /* d0 */
769 { GRP2b_one },
770 { GRP2S_one },
771 { GRP2b_cl },
772 { GRP2S_cl },
050dfa73
MM		 773 { "aam{|}", sIb, XX, XX, XX },
774 { "aad{|}", sIb, XX, XX, XX },
775 { "(bad)", XX, XX, XX, XX },
776 { "xlat", DSBX, XX, XX, XX },
252b5132
RH		 777 /* d8 */
778 { FLOAT },
779 { FLOAT },
780 { FLOAT },
781 { FLOAT },
782 { FLOAT },
783 { FLOAT },
784 { FLOAT },
785 { FLOAT },
786 /* e0 */
050dfa73
MM		 787 { "loopneFH", Jb, XX, loop_jcxz_flag, XX },
788 { "loopeFH", Jb, XX, loop_jcxz_flag, XX },
789 { "loopFH", Jb, XX, loop_jcxz_flag, XX },
790 { "jEcxzH", Jb, XX, loop_jcxz_flag, XX },
791 { "inB", AL, Ib, XX, XX },
792 { "inS", eAX, Ib, XX, XX },
793 { "outB", Ib, AL, XX, XX },
794 { "outS", Ib, eAX, XX, XX },
252b5132 795 /* e8 */
050dfa73
MM		 796 { "callT", Jv, XX, XX, XX },
797 { "jmpT", Jv, XX, XX, XX },
798 { "Jjmp{T|}", Ap, XX, XX, XX },
799 { "jmp", Jb, XX, XX, XX },
800 { "inB", AL, indirDX, XX, XX },
801 { "inS", eAX, indirDX, XX, XX },
802 { "outB", indirDX, AL, XX, XX },
803 { "outS", indirDX, eAX, XX, XX },
252b5132 804 /* f0 */
050dfa73
MM		 805 { "(bad)", XX, XX, XX, XX }, /* lock prefix */
806 { "icebp", XX, XX, XX, XX },
807 { "(bad)", XX, XX, XX, XX }, /* repne */
808 { "(bad)", XX, XX, XX, XX }, /* repz */
809 { "hlt", XX, XX, XX, XX },
810 { "cmc", XX, XX, XX, XX },
252b5132
RH		 811 { GRP3b },
812 { GRP3S },
813 /* f8 */
050dfa73
MM		 814 { "clc", XX, XX, XX, XX },
815 { "stc", XX, XX, XX, XX },
816 { "cli", XX, XX, XX, XX },
817 { "sti", XX, XX, XX, XX },
818 { "cld", XX, XX, XX, XX },
819 { "std", XX, XX, XX, XX },
252b5132
RH		 820 { GRP4 },
821 { GRP5 },
822};
823
6439fc28 824static const struct dis386 dis386_twobyte[] = {
252b5132
RH		 825 /* 00 */
826 { GRP6 },
827 { GRP7 },
050dfa73
MM		 828 { "larS", Gv, Ew, XX, XX },
829 { "lslS", Gv, Ew, XX, XX },
830 { "(bad)", XX, XX, XX, XX },
831 { "syscall", XX, XX, XX, XX },
832 { "clts", XX, XX, XX, XX },
833 { "sysretP", XX, XX, XX, XX },
252b5132 834 /* 08 */
050dfa73
MM		 835 { "invd", XX, XX, XX, XX},
836 { "wbinvd", XX, XX, XX, XX },
837 { "(bad)", XX, XX, XX, XX },
838 { "ud2a", XX, XX, XX, XX },
839 { "(bad)", XX, XX, XX, XX },
c608c12e 840 { GRPAMD },
050dfa73
MM		 841 { "femms", XX, XX, XX, XX },
842 { "", MX, EM, OPSUF, XX }, /* See OP_3DNowSuffix. */
252b5132 843 /* 10 */
c608c12e
AM		 844 { PREGRP8 },
845 { PREGRP9 },
ca164297 846 { PREGRP30 },
050dfa73
MM		 847 { "movlpX", EX, XM, SIMD_Fixup, 'h', XX },
848 { "unpcklpX", XM, EX, XX, XX },
849 { "unpckhpX", XM, EX, XX, XX },
ca164297 850 { PREGRP31 },
050dfa73 851 { "movhpX", EX, XM, SIMD_Fixup, 'l', XX },
252b5132 852 /* 18 */
b3882df9 853 { GRP16 },
050dfa73
MM		 854 { "(bad)", XX, XX, XX, XX },
855 { "(bad)", XX, XX, XX, XX },
856 { "(bad)", XX, XX, XX, XX },
857 { "(bad)", XX, XX, XX, XX },
858 { "(bad)", XX, XX, XX, XX },
859 { "(bad)", XX, XX, XX, XX },
860 { "nopQ", Ev, XX, XX, XX },
252b5132 861 /* 20 */
050dfa73
MM		 862 { "movZ", Rm, Cm, XX, XX },
863 { "movZ", Rm, Dm, XX, XX },
864 { "movZ", Cm, Rm, XX, XX },
865 { "movZ", Dm, Rm, XX, XX },
866 { "movL", Rd, Td, XX, XX },
867 { "(bad)", XX, XX, XX, XX },
868 { "movL", Td, Rd, XX, XX },
869 { "(bad)", XX, XX, XX, XX },
252b5132 870 /* 28 */
050dfa73
MM		 871 { "movapX", XM, EX, XX, XX },
872 { "movapX", EX, XM, XX, XX },
c608c12e 873 { PREGRP2 },
050dfa73 874 { PREGRP33 },
2da11e11 875 { PREGRP4 },
c608c12e 876 { PREGRP3 },
050dfa73
MM		 877 { "ucomisX", XM,EX, XX, XX },
878 { "comisX", XM,EX, XX, XX },
252b5132 879 /* 30 */
050dfa73
MM		 880 { "wrmsr", XX, XX, XX, XX },
881 { "rdtsc", XX, XX, XX, XX },
882 { "rdmsr", XX, XX, XX, XX },
883 { "rdpmc", XX, XX, XX, XX },
884 { "sysenter", XX, XX, XX, XX },
885 { "sysexit", XX, XX, XX, XX },
886 { "(bad)", XX, XX, XX, XX },
887 { "(bad)", XX, XX, XX, XX },
252b5132 888 /* 38 */
331d2d0d 889 { THREE_BYTE_0 },
050dfa73 890 { "(bad)", XX, XX, XX, XX },
331d2d0d 891 { THREE_BYTE_1 },
050dfa73
MM		 892 { "(bad)", XX, XX, XX, XX },
893 { "(bad)", XX, XX, XX, XX },
894 { "(bad)", XX, XX, XX, XX },
895 { "(bad)", XX, XX, XX, XX },
896 { "(bad)", XX, XX, XX, XX },
252b5132 897 /* 40 */
050dfa73
MM		 898 { "cmovo", Gv, Ev, XX, XX },
899 { "cmovno", Gv, Ev, XX, XX },
900 { "cmovb", Gv, Ev, XX, XX },
901 { "cmovae", Gv, Ev, XX, XX },
902 { "cmove", Gv, Ev, XX, XX },
903 { "cmovne", Gv, Ev, XX, XX },
904 { "cmovbe", Gv, Ev, XX, XX },
905 { "cmova", Gv, Ev, XX, XX },
252b5132 906 /* 48 */
050dfa73
MM		 907 { "cmovs", Gv, Ev, XX, XX },
908 { "cmovns", Gv, Ev, XX, XX },
909 { "cmovp", Gv, Ev, XX, XX },
910 { "cmovnp", Gv, Ev, XX, XX },
911 { "cmovl", Gv, Ev, XX, XX },
912 { "cmovge", Gv, Ev, XX, XX },
913 { "cmovle", Gv, Ev, XX, XX },
914 { "cmovg", Gv, Ev, XX, XX },
252b5132 915 /* 50 */
050dfa73 916 { "movmskpX", Gdq, XS, XX, XX },
c608c12e
AM		 917 { PREGRP13 },
918 { PREGRP12 },
919 { PREGRP11 },
050dfa73
MM		 920 { "andpX", XM, EX, XX, XX },
921 { "andnpX", XM, EX, XX, XX },
922 { "orpX", XM, EX, XX, XX },
923 { "xorpX", XM, EX, XX, XX },
252b5132 924 /* 58 */
c608c12e
AM		 925 { PREGRP0 },
926 { PREGRP10 },
041bd2e0
JH		 927 { PREGRP17 },
928 { PREGRP16 },
c608c12e
AM		 929 { PREGRP14 },
930 { PREGRP7 },
931 { PREGRP5 },
2da11e11 932 { PREGRP6 },
252b5132 933 /* 60 */
050dfa73
MM		 934 { "punpcklbw", MX, EM, XX, XX },
935 { "punpcklwd", MX, EM, XX, XX },
936 { "punpckldq", MX, EM, XX, XX },
937 { "packsswb", MX, EM, XX, XX },
938 { "pcmpgtb", MX, EM, XX, XX },
939 { "pcmpgtw", MX, EM, XX, XX },
940 { "pcmpgtd", MX, EM, XX, XX },
941 { "packuswb", MX, EM, XX, XX },
252b5132 942 /* 68 */
050dfa73
MM		 943 { "punpckhbw", MX, EM, XX, XX },
944 { "punpckhwd", MX, EM, XX, XX },
945 { "punpckhdq", MX, EM, XX, XX },
946 { "packssdw", MX, EM, XX, XX },
0f17484f 947 { PREGRP26 },
041bd2e0 948 { PREGRP24 },
050dfa73 949 { "movd", MX, Edq, XX, XX },
041bd2e0 950 { PREGRP19 },
252b5132 951 /* 70 */
041bd2e0 952 { PREGRP22 },
252b5132 953 { GRP12 },
b3882df9
L		 954 { GRP13 },
955 { GRP14 },
050dfa73
MM		 956 { "pcmpeqb", MX, EM, XX, XX },
957 { "pcmpeqw", MX, EM, XX, XX },
958 { "pcmpeqd", MX, EM, XX, XX },
959 { "emms", XX, XX, XX, XX },
252b5132 960 /* 78 */
050dfa73
MM		 961 { PREGRP34 },
962 { PREGRP35 },
963 { "(bad)", XX, XX, XX, XX },
964 { "(bad)", XX, XX, XX, XX },
ca164297
L		 965 { PREGRP28 },
966 { PREGRP29 },
041bd2e0
JH		 967 { PREGRP23 },
968 { PREGRP20 },
252b5132 969 /* 80 */
050dfa73
MM		 970 { "joH", Jv, XX, cond_jump_flag, XX },
971 { "jnoH", Jv, XX, cond_jump_flag, XX },
972 { "jbH", Jv, XX, cond_jump_flag, XX },
973 { "jaeH", Jv, XX, cond_jump_flag, XX },
974 { "jeH", Jv, XX, cond_jump_flag, XX },
975 { "jneH", Jv, XX, cond_jump_flag, XX },
976 { "jbeH", Jv, XX, cond_jump_flag, XX },
977 { "jaH", Jv, XX, cond_jump_flag, XX },
252b5132 978 /* 88 */
050dfa73
MM		 979 { "jsH", Jv, XX, cond_jump_flag, XX },
980 { "jnsH", Jv, XX, cond_jump_flag, XX },
981 { "jpH", Jv, XX, cond_jump_flag, XX },
982 { "jnpH", Jv, XX, cond_jump_flag, XX },
983 { "jlH", Jv, XX, cond_jump_flag, XX },
984 { "jgeH", Jv, XX, cond_jump_flag, XX },
985 { "jleH", Jv, XX, cond_jump_flag, XX },
986 { "jgH", Jv, XX, cond_jump_flag, XX },
252b5132 987 /* 90 */
050dfa73
MM		 988 { "seto", Eb, XX, XX, XX },
989 { "setno", Eb, XX, XX, XX },
990 { "setb", Eb, XX, XX, XX },
991 { "setae", Eb, XX, XX, XX },
992 { "sete", Eb, XX, XX, XX },
993 { "setne", Eb, XX, XX, XX },
994 { "setbe", Eb, XX, XX, XX },
995 { "seta", Eb, XX, XX, XX },
252b5132 996 /* 98 */
050dfa73
MM		 997 { "sets", Eb, XX, XX, XX },
998 { "setns", Eb, XX, XX, XX },
999 { "setp", Eb, XX, XX, XX },
1000 { "setnp", Eb, XX, XX, XX },
1001 { "setl", Eb, XX, XX, XX },
1002 { "setge", Eb, XX, XX, XX },
1003 { "setle", Eb, XX, XX, XX },
1004 { "setg", Eb, XX, XX, XX },
252b5132 1005 /* a0 */
050dfa73
MM		 1006 { "pushT", fs, XX, XX, XX },
1007 { "popT", fs, XX, XX, XX },
1008 { "cpuid", XX, XX, XX, XX },
1009 { "btS", Ev, Gv, XX, XX },
1010 { "shldS", Ev, Gv, Ib, XX },
1011 { "shldS", Ev, Gv, CL, XX },
30d1c836
ML		 1012 { GRPPADLCK2 },
1013 { GRPPADLCK1 },
252b5132 1014 /* a8 */
050dfa73
MM		 1015 { "pushT", gs, XX, XX, XX },
1016 { "popT", gs, XX, XX, XX },
1017 { "rsm", XX, XX, XX, XX },
1018 { "btsS", Ev, Gv, XX, XX },
1019 { "shrdS", Ev, Gv, Ib, XX },
1020 { "shrdS", Ev, Gv, CL, XX },
b3882df9 1021 { GRP15 },
050dfa73 1022 { "imulS", Gv, Ev, XX, XX },
252b5132 1023 /* b0 */
050dfa73
MM		 1024 { "cmpxchgB", Eb, Gb, XX, XX },
1025 { "cmpxchgS", Ev, Gv, XX, XX },
1026 { "lssS", Gv, Mp, XX, XX },
1027 { "btrS", Ev, Gv, XX, XX },
1028 { "lfsS", Gv, Mp, XX, XX },
1029 { "lgsS", Gv, Mp, XX, XX },
1030 { "movz{bR|x|bR|x}", Gv, Eb, XX, XX },
1031 { "movz{wR|x|wR|x}", Gv, Ew, XX, XX }, /* yes, there really is movzww ! */
252b5132 1032 /* b8 */
7918206c 1033 { PREGRP37 },
050dfa73 1034 { "ud2b", XX, XX, XX, XX },
252b5132 1035 { GRP8 },
050dfa73
MM		 1036 { "btcS", Ev, Gv, XX, XX },
1037 { "bsfS", Gv, Ev, XX, XX },
1038 { PREGRP36 },
1039 { "movs{bR|x|bR|x}", Gv, Eb, XX, XX },
1040 { "movs{wR|x|wR|x}", Gv, Ew, XX, XX }, /* yes, there really is movsww ! */
252b5132 1041 /* c0 */
050dfa73
MM		 1042 { "xaddB", Eb, Gb, XX, XX },
1043 { "xaddS", Ev, Gv, XX, XX },
c608c12e 1044 { PREGRP1 },
050dfa73
MM		 1045 { "movntiS", Ev, Gv, XX, XX },
1046 { "pinsrw", MX, Edqw, Ib, XX },
1047 { "pextrw", Gdq, MS, Ib, XX },
1048 { "shufpX", XM, EX, Ib, XX },
252b5132
RH		 1049 { GRP9 },
1050 /* c8 */
050dfa73
MM		 1051 { "bswap", RMeAX, XX, XX, XX },
1052 { "bswap", RMeCX, XX, XX, XX },
1053 { "bswap", RMeDX, XX, XX, XX },
1054 { "bswap", RMeBX, XX, XX, XX },
1055 { "bswap", RMeSP, XX, XX, XX },
1056 { "bswap", RMeBP, XX, XX, XX },
1057 { "bswap", RMeSI, XX, XX, XX },
1058 { "bswap", RMeDI, XX, XX, XX },
252b5132 1059 /* d0 */
ca164297 1060 { PREGRP27 },
050dfa73
MM		 1061 { "psrlw", MX, EM, XX, XX },
1062 { "psrld", MX, EM, XX, XX },
1063 { "psrlq", MX, EM, XX, XX },
1064 { "paddq", MX, EM, XX, XX },
1065 { "pmullw", MX, EM, XX, XX },
041bd2e0 1066 { PREGRP21 },
050dfa73 1067 { "pmovmskb", Gdq, MS, XX, XX },
252b5132 1068 /* d8 */
050dfa73
MM		 1069 { "psubusb", MX, EM, XX, XX },
1070 { "psubusw", MX, EM, XX, XX },
1071 { "pminub", MX, EM, XX, XX },
1072 { "pand", MX, EM, XX, XX },
1073 { "paddusb", MX, EM, XX, XX },
1074 { "paddusw", MX, EM, XX, XX },
1075 { "pmaxub", MX, EM, XX, XX },
1076 { "pandn", MX, EM, XX, XX },
252b5132 1077 /* e0 */
050dfa73
MM		 1078 { "pavgb", MX, EM, XX, XX },
1079 { "psraw", MX, EM, XX, XX },
1080 { "psrad", MX, EM, XX, XX },
1081 { "pavgw", MX, EM, XX, XX },
1082 { "pmulhuw", MX, EM, XX, XX },
1083 { "pmulhw", MX, EM, XX, XX },
041bd2e0 1084 { PREGRP15 },
0f17484f 1085 { PREGRP25 },
252b5132 1086 /* e8 */
050dfa73
MM		 1087 { "psubsb", MX, EM, XX, XX },
1088 { "psubsw", MX, EM, XX, XX },
1089 { "pminsw", MX, EM, XX, XX },
1090 { "por", MX, EM, XX, XX },
1091 { "paddsb", MX, EM, XX, XX },
1092 { "paddsw", MX, EM, XX, XX },
1093 { "pmaxsw", MX, EM, XX, XX },
1094 { "pxor", MX, EM, XX, XX },
252b5132 1095 /* f0 */
ca164297 1096 { PREGRP32 },
050dfa73
MM		 1097 { "psllw", MX, EM, XX, XX },
1098 { "pslld", MX, EM, XX, XX },
1099 { "psllq", MX, EM, XX, XX },
1100 { "pmuludq", MX, EM, XX, XX },
1101 { "pmaddwd", MX, EM, XX, XX },
1102 { "psadbw", MX, EM, XX, XX },
041bd2e0 1103 { PREGRP18 },
252b5132 1104 /* f8 */
050dfa73
MM		 1105 { "psubb", MX, EM, XX, XX },
1106 { "psubw", MX, EM, XX, XX },
1107 { "psubd", MX, EM, XX, XX },
1108 { "psubq", MX, EM, XX, XX },
1109 { "paddb", MX, EM, XX, XX },
1110 { "paddw", MX, EM, XX, XX },
1111 { "paddd", MX, EM, XX, XX },
1112 { "(bad)", XX, XX, XX, XX }
252b5132
RH		 1113};
1114
1115static const unsigned char onebyte_has_modrm[256] = {
c608c12e
AM		 1116 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1117 /* ------------------------------- */
1118 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1119 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1120 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1121 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1122 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1123 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1124 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1125 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1126 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1127 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1128 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1129 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1130 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1131 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1132 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1133 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1134 /* ------------------------------- */
1135 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
252b5132
RH		 1136};
1137
1138static const unsigned char twobyte_has_modrm[256] = {
c608c12e
AM		 1139 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1140 /* ------------------------------- */
252b5132 1141 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
15965411 1142 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
4bba6815 1143 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
331d2d0d 1144 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
252b5132 1145 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
4bba6815
AM		 1146 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1147 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
90700ea2 1148 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
252b5132
RH		 1149 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1150 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
30d1c836 1151 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
050dfa73 1152 /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
252b5132 1153 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
ca164297 1154 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
4bba6815 1155 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
ca164297 1156 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
c608c12e
AM		 1157 /* ------------------------------- */
1158 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1159};
1160
eec0f4ca 1161static const unsigned char twobyte_uses_DATA_prefix[256] = {
c608c12e
AM		 1162 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1163 /* ------------------------------- */
1164 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
ca164297 1165 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
050dfa73 1166 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
331d2d0d 1167 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
c608c12e 1168 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
041bd2e0
JH		 1169 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1170 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
050dfa73 1171 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,1,1, /* 7f */
c608c12e
AM		 1172 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1173 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1174 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1175 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1176 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
ca164297 1177 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
041bd2e0 1178 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
ca164297 1179 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
c608c12e
AM		 1180 /* ------------------------------- */
1181 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
252b5132
RH		 1182};
1183
eec0f4ca
L		 1184static const unsigned char twobyte_uses_REPNZ_prefix[256] = {
1185 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1186 /* ------------------------------- */
1187 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1188 /* 10 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1189 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1190 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1191 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1192 /* 50 */ 0,1,0,0,0,0,0,0,1,1,1,0,1,1,1,1, /* 5f */
1193 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1194 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,0,0, /* 7f */
1195 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1196 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1197 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1198 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1199 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1200 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1201 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1202 /* f0 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1203 /* ------------------------------- */
1204 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1205};
1206
1207static const unsigned char twobyte_uses_REPZ_prefix[256] = {
1208 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1209 /* ------------------------------- */
1210 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1211 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1212 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1213 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1214 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1215 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1216 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* 6f */
1217 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */
1218 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1219 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1220 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1221 /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,0,1,0,0, /* bf */
1222 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1223 /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1224 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1225 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1226 /* ------------------------------- */
1227 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1228};
1229
1230/* This is used to determine if opcode 0f 38 XX uses DATA prefix. */
1231static const unsigned char threebyte_0x38_uses_DATA_prefix[256] = {
1232 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1233 /* ------------------------------- */
1234 /* 00 */ 1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0, /* 0f */
1235 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,0, /* 1f */
1236 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1237 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1238 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1239 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1240 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1241 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1242 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1243 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1244 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1245 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1246 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1247 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1248 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1249 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1250 /* ------------------------------- */
1251 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1252};
1253
1254/* This is used to determine if opcode 0f 38 XX uses REPNZ prefix. */
1255static const unsigned char threebyte_0x38_uses_REPNZ_prefix[256] = {
1256 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1257 /* ------------------------------- */
1258 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1259 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1260 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1261 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1262 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1263 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1264 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1265 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1266 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1267 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1268 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1269 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1270 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1271 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1272 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1273 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1274 /* ------------------------------- */
1275 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1276};
1277
1278/* This is used to determine if opcode 0f 38 XX uses REPZ prefix. */
1279static const unsigned char threebyte_0x38_uses_REPZ_prefix[256] = {
1280 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1281 /* ------------------------------- */
1282 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1283 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1284 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1285 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1286 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1287 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1288 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1289 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1290 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1291 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1292 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1293 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1294 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1295 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1296 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1297 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1298 /* ------------------------------- */
1299 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1300};
1301
1302/* This is used to determine if opcode 0f 3a XX uses DATA prefix. */
1303static const unsigned char threebyte_0x3a_uses_DATA_prefix[256] = {
1304 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1305 /* ------------------------------- */
1306 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* 0f */
1307 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1308 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1309 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1310 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1311 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1312 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1313 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1314 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1315 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1316 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1317 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1318 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1319 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1320 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1321 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1322 /* ------------------------------- */
1323 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1324};
1325
1326/* This is used to determine if opcode 0f 3a XX uses REPNZ prefix. */
1327static const unsigned char threebyte_0x3a_uses_REPNZ_prefix[256] = {
1328 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1329 /* ------------------------------- */
1330 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1331 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1332 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1333 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1334 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1335 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1336 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1337 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1338 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1339 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1340 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1341 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1342 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1343 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1344 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1345 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1346 /* ------------------------------- */
1347 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1348};
1349
1350/* This is used to determine if opcode 0f 3a XX uses REPZ prefix. */
1351static const unsigned char threebyte_0x3a_uses_REPZ_prefix[256] = {
1352 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1353 /* ------------------------------- */
1354 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1355 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1356 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1357 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1358 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1359 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1360 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1361 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1362 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1363 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1364 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1365 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1366 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1367 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1368 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1369 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1370 /* ------------------------------- */
1371 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1372};
1373
252b5132
RH		 1374static char obuf[100];
1375static char *obufp;
1376static char scratchbuf[100];
1377static unsigned char *start_codep;
1378static unsigned char *insn_codep;
1379static unsigned char *codep;
1380static disassemble_info *the_info;
1381static int mod;
1382static int rm;
1383static int reg;
4bba6815 1384static unsigned char need_modrm;
252b5132 1385
4bba6815
AM		 1386/* If we are accessing mod/rm/reg without need_modrm set, then the
1387 values are stale. Hitting this abort likely indicates that you
1388 need to update onebyte_has_modrm or twobyte_has_modrm. */
1389#define MODRM_CHECK if (!need_modrm) abort ()
1390
d708bcba
AM		 1391static const char **names64;
1392static const char **names32;
1393static const char **names16;
1394static const char **names8;
1395static const char **names8rex;
1396static const char **names_seg;
1397static const char **index16;
1398
1399static const char *intel_names64[] = {
1400 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1401 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1402};
1403static const char *intel_names32[] = {
1404 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1405 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1406};
1407static const char *intel_names16[] = {
1408 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1409 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1410};
1411static const char *intel_names8[] = {
1412 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1413};
1414static const char *intel_names8rex[] = {
1415 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1416 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1417};
1418static const char *intel_names_seg[] = {
1419 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1420};
1421static const char *intel_index16[] = {
1422 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1423};
1424
1425static const char *att_names64[] = {
1426 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
52b15da3
JH		 1427 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1428};
d708bcba
AM		 1429static const char *att_names32[] = {
1430 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
52b15da3 1431 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
252b5132 1432};
d708bcba
AM		 1433static const char *att_names16[] = {
1434 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
52b15da3 1435 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
252b5132 1436};
d708bcba
AM		 1437static const char *att_names8[] = {
1438 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
252b5132 1439};
d708bcba
AM		 1440static const char *att_names8rex[] = {
1441 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
52b15da3
JH		 1442 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1443};
d708bcba
AM		 1444static const char *att_names_seg[] = {
1445 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
252b5132 1446};
d708bcba
AM		 1447static const char *att_index16[] = {
1448 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
252b5132
RH		 1449};
1450
2da11e11 1451static const struct dis386 grps[][8] = {
252b5132
RH		 1452 /* GRP1b */
1453 {
050dfa73
MM		 1454 { "addA", Eb, Ib, XX, XX },
1455 { "orA", Eb, Ib, XX, XX },
1456 { "adcA", Eb, Ib, XX, XX },
1457 { "sbbA", Eb, Ib, XX, XX },
1458 { "andA", Eb, Ib, XX, XX },
1459 { "subA", Eb, Ib, XX, XX },
1460 { "xorA", Eb, Ib, XX, XX },
1461 { "cmpA", Eb, Ib, XX, XX }
252b5132
RH		 1462 },
1463 /* GRP1S */
1464 {
050dfa73
MM		 1465 { "addQ", Ev, Iv, XX, XX },
1466 { "orQ", Ev, Iv, XX, XX },
1467 { "adcQ", Ev, Iv, XX, XX },
1468 { "sbbQ", Ev, Iv, XX, XX },
1469 { "andQ", Ev, Iv, XX, XX },
1470 { "subQ", Ev, Iv, XX, XX },
1471 { "xorQ", Ev, Iv, XX, XX },
1472 { "cmpQ", Ev, Iv, XX, XX }
252b5132
RH		 1473 },
1474 /* GRP1Ss */
1475 {
050dfa73
MM		 1476 { "addQ", Ev, sIb, XX, XX },
1477 { "orQ", Ev, sIb, XX, XX },
1478 { "adcQ", Ev, sIb, XX, XX },
1479 { "sbbQ", Ev, sIb, XX, XX },
1480 { "andQ", Ev, sIb, XX, XX },
1481 { "subQ", Ev, sIb, XX, XX },
1482 { "xorQ", Ev, sIb, XX, XX },
1483 { "cmpQ", Ev, sIb, XX, XX }
252b5132
RH		 1484 },
1485 /* GRP2b */
1486 {
050dfa73
MM		 1487 { "rolA", Eb, Ib, XX, XX },
1488 { "rorA", Eb, Ib, XX, XX },
1489 { "rclA", Eb, Ib, XX, XX },
1490 { "rcrA", Eb, Ib, XX, XX },
1491 { "shlA", Eb, Ib, XX, XX },
1492 { "shrA", Eb, Ib, XX, XX },
1493 { "(bad)", XX, XX, XX, XX },
1494 { "sarA", Eb, Ib, XX, XX },
252b5132
RH		 1495 },
1496 /* GRP2S */
1497 {
050dfa73
MM		 1498 { "rolQ", Ev, Ib, XX, XX },
1499 { "rorQ", Ev, Ib, XX, XX },
1500 { "rclQ", Ev, Ib, XX, XX },
1501 { "rcrQ", Ev, Ib, XX, XX },
1502 { "shlQ", Ev, Ib, XX, XX },
1503 { "shrQ", Ev, Ib, XX, XX },
1504 { "(bad)", XX, XX, XX, XX },
1505 { "sarQ", Ev, Ib, XX, XX },
252b5132
RH		 1506 },
1507 /* GRP2b_one */
1508 {
050dfa73
MM		 1509 { "rolA", Eb, I1, XX, XX },
1510 { "rorA", Eb, I1, XX, XX },
1511 { "rclA", Eb, I1, XX, XX },
1512 { "rcrA", Eb, I1, XX, XX },
1513 { "shlA", Eb, I1, XX, XX },
1514 { "shrA", Eb, I1, XX, XX },
1515 { "(bad)", XX, XX, XX, XX },
1516 { "sarA", Eb, I1, XX, XX },
252b5132
RH		 1517 },
1518 /* GRP2S_one */
1519 {
050dfa73
MM		 1520 { "rolQ", Ev, I1, XX, XX },
1521 { "rorQ", Ev, I1, XX, XX },
1522 { "rclQ", Ev, I1, XX, XX },
1523 { "rcrQ", Ev, I1, XX, XX },
1524 { "shlQ", Ev, I1, XX, XX },
1525 { "shrQ", Ev, I1, XX, XX },
1526 { "(bad)", XX, XX, XX, XX },
1527 { "sarQ", Ev, I1, XX, XX },
252b5132
RH		 1528 },
1529 /* GRP2b_cl */
1530 {
050dfa73
MM		 1531 { "rolA", Eb, CL, XX, XX },
1532 { "rorA", Eb, CL, XX, XX },
1533 { "rclA", Eb, CL, XX, XX },
1534 { "rcrA", Eb, CL, XX, XX },
1535 { "shlA", Eb, CL, XX, XX },
1536 { "shrA", Eb, CL, XX, XX },
1537 { "(bad)", XX, XX, XX, XX },
1538 { "sarA", Eb, CL, XX, XX },
252b5132
RH		 1539 },
1540 /* GRP2S_cl */
1541 {
050dfa73
MM		 1542 { "rolQ", Ev, CL, XX, XX },
1543 { "rorQ", Ev, CL, XX, XX },
1544 { "rclQ", Ev, CL, XX, XX },
1545 { "rcrQ", Ev, CL, XX, XX },
1546 { "shlQ", Ev, CL, XX, XX },
1547 { "shrQ", Ev, CL, XX, XX },
1548 { "(bad)", XX, XX, XX, XX },
1549 { "sarQ", Ev, CL, XX, XX }
252b5132
RH		 1550 },
1551 /* GRP3b */
1552 {
050dfa73
MM		 1553 { "testA", Eb, Ib, XX, XX },
1554 { "(bad)", Eb, XX, XX, XX },
1555 { "notA", Eb, XX, XX, XX },
1556 { "negA", Eb, XX, XX, XX },
1557 { "mulA", Eb, XX, XX, XX }, /* Don't print the implicit %al register, */
1558 { "imulA", Eb, XX, XX, XX }, /* to distinguish these opcodes from other */
1559 { "divA", Eb, XX, XX, XX }, /* mul/imul opcodes. Do the same for div */
1560 { "idivA", Eb, XX, XX, XX } /* and idiv for consistency. */
252b5132
RH		 1561 },
1562 /* GRP3S */
1563 {
050dfa73
MM		 1564 { "testQ", Ev, Iv, XX, XX },
1565 { "(bad)", XX, XX, XX, XX },
1566 { "notQ", Ev, XX, XX, XX },
1567 { "negQ", Ev, XX, XX, XX },
1568 { "mulQ", Ev, XX, XX, XX }, /* Don't print the implicit register. */
1569 { "imulQ", Ev, XX, XX, XX },
1570 { "divQ", Ev, XX, XX, XX },
1571 { "idivQ", Ev, XX, XX, XX },
252b5132
RH		 1572 },
1573 /* GRP4 */
1574 {
050dfa73
MM		 1575 { "incA", Eb, XX, XX, XX },
1576 { "decA", Eb, XX, XX, XX },
1577 { "(bad)", XX, XX, XX, XX },
1578 { "(bad)", XX, XX, XX, XX },
1579 { "(bad)", XX, XX, XX, XX },
1580 { "(bad)", XX, XX, XX, XX },
1581 { "(bad)", XX, XX, XX, XX },
1582 { "(bad)", XX, XX, XX, XX },
252b5132
RH		 1583 },
1584 /* GRP5 */
1585 {
050dfa73
MM		 1586 { "incQ", Ev, XX, XX, XX },
1587 { "decQ", Ev, XX, XX, XX },
1588 { "callT", indirEv, XX, XX, XX },
1589 { "JcallT", indirEp, XX, XX, XX },
1590 { "jmpT", indirEv, XX, XX, XX },
1591 { "JjmpT", indirEp, XX, XX, XX },
1592 { "pushU", stackEv, XX, XX, XX },
1593 { "(bad)", XX, XX, XX, XX },
252b5132
RH		 1594 },
1595 /* GRP6 */
1596 {
2b516b72
L		 1597 { "sldt", Ev, XX, XX, XX },
1598 { "str", Ev, XX, XX, XX },
050dfa73
MM		 1599 { "lldt", Ew, XX, XX, XX },
1600 { "ltr", Ew, XX, XX, XX },
1601 { "verr", Ew, XX, XX, XX },
1602 { "verw", Ew, XX, XX, XX },
1603 { "(bad)", XX, XX, XX, XX },
1604 { "(bad)", XX, XX, XX, XX }
252b5132
RH		 1605 },
1606 /* GRP7 */
1607 {
050dfa73
MM		 1608 { "sgdt{Q|IQ||}", VMX_Fixup, 0, XX, XX, XX },
1609 { "sidt{Q|IQ||}", PNI_Fixup, 0, XX, XX, XX },
1610 { "lgdt{Q|Q||}", M, XX, XX, XX },
1611 { "lidt{Q|Q||}", SVME_Fixup, 0, XX, XX, XX },
2b516b72 1612 { "smsw", Ev, XX, XX, XX },
050dfa73
MM		 1613 { "(bad)", XX, XX, XX, XX },
1614 { "lmsw", Ew, XX, XX, XX },
1615 { "invlpg", INVLPG_Fixup, w_mode, XX, XX, XX },
252b5132
RH		 1616 },
1617 /* GRP8 */
1618 {
050dfa73
MM		 1619 { "(bad)", XX, XX, XX, XX },
1620 { "(bad)", XX, XX, XX, XX },
1621 { "(bad)", XX, XX, XX, XX },
1622 { "(bad)", XX, XX, XX, XX },
1623 { "btQ", Ev, Ib, XX, XX },
1624 { "btsQ", Ev, Ib, XX, XX },
1625 { "btrQ", Ev, Ib, XX, XX },
1626 { "btcQ", Ev, Ib, XX, XX },
252b5132
RH		 1627 },
1628 /* GRP9 */
1629 {
050dfa73
MM		 1630 { "(bad)", XX, XX, XX, XX },
1631 { "cmpxchg8b", Eq, XX, XX, XX },
1632 { "(bad)", XX, XX, XX, XX },
1633 { "(bad)", XX, XX, XX, XX },
1634 { "(bad)", XX, XX, XX, XX },
1635 { "(bad)", XX, XX, XX, XX },
1636 { "", VM, XX, XX, XX }, /* See OP_VMX. */
1637 { "vmptrst", Eq, XX, XX, XX },
252b5132 1638 },
a6bd098c
L		 1639 /* GRP11_C6 */
1640 {
1641 { "movA", Eb, Ib, XX, XX },
1642 { "(bad)", XX, XX, XX, XX },
1643 { "(bad)", XX, XX, XX, XX },
1644 { "(bad)", XX, XX, XX, XX },
1645 { "(bad)", XX, XX, XX, XX },
1646 { "(bad)", XX, XX, XX, XX },
1647 { "(bad)", XX, XX, XX, XX },
1648 { "(bad)", XX, XX, XX, XX },
1649 },
1650 /* GRP11_C7 */
1651 {
1652 { "movQ", Ev, Iv, XX, XX },
1653 { "(bad)", XX, XX, XX, XX },
1654 { "(bad)", XX, XX, XX, XX },
1655 { "(bad)", XX, XX, XX, XX },
1656 { "(bad)", XX, XX, XX, XX },
1657 { "(bad)", XX, XX, XX, XX },
1658 { "(bad)", XX, XX, XX, XX },
1659 { "(bad)", XX, XX, XX, XX },
1660 },
b3882df9 1661 /* GRP12 */
252b5132 1662 {
050dfa73
MM		 1663 { "(bad)", XX, XX, XX, XX },
1664 { "(bad)", XX, XX, XX, XX },
1665 { "psrlw", MS, Ib, XX, XX },
1666 { "(bad)", XX, XX, XX, XX },
1667 { "psraw", MS, Ib, XX, XX },
1668 { "(bad)", XX, XX, XX, XX },
1669 { "psllw", MS, Ib, XX, XX },
1670 { "(bad)", XX, XX, XX, XX },
252b5132 1671 },
b3882df9 1672 /* GRP13 */
252b5132 1673 {
050dfa73
MM		 1674 { "(bad)", XX, XX, XX, XX },
1675 { "(bad)", XX, XX, XX, XX },
1676 { "psrld", MS, Ib, XX, XX },
1677 { "(bad)", XX, XX, XX, XX },
1678 { "psrad", MS, Ib, XX, XX },
1679 { "(bad)", XX, XX, XX, XX },
1680 { "pslld", MS, Ib, XX, XX },
1681 { "(bad)", XX, XX, XX, XX },
252b5132 1682 },
b3882df9 1683 /* GRP14 */
252b5132 1684 {
050dfa73
MM		 1685 { "(bad)", XX, XX, XX, XX },
1686 { "(bad)", XX, XX, XX, XX },
1687 { "psrlq", MS, Ib, XX, XX },
1688 { "psrldq", MS, Ib, XX, XX },
1689 { "(bad)", XX, XX, XX, XX },
1690 { "(bad)", XX, XX, XX, XX },
1691 { "psllq", MS, Ib, XX, XX },
1692 { "pslldq", MS, Ib, XX, XX },
252b5132 1693 },
b3882df9 1694 /* GRP15 */
252b5132 1695 {
050dfa73
MM		 1696 { "fxsave", Ev, XX, XX, XX },
1697 { "fxrstor", Ev, XX, XX, XX },
1698 { "ldmxcsr", Ev, XX, XX, XX },
1699 { "stmxcsr", Ev, XX, XX, XX },
1700 { "(bad)", XX, XX, XX, XX },
1701 { "lfence", OP_0fae, 0, XX, XX, XX },
1702 { "mfence", OP_0fae, 0, XX, XX, XX },
1703 { "clflush", OP_0fae, 0, XX, XX, XX },
c608c12e 1704 },
b3882df9 1705 /* GRP16 */
c608c12e 1706 {
050dfa73
MM		 1707 { "prefetchnta", Ev, XX, XX, XX },
1708 { "prefetcht0", Ev, XX, XX, XX },
1709 { "prefetcht1", Ev, XX, XX, XX },
1710 { "prefetcht2", Ev, XX, XX, XX },
1711 { "(bad)", XX, XX, XX, XX },
1712 { "(bad)", XX, XX, XX, XX },
1713 { "(bad)", XX, XX, XX, XX },
1714 { "(bad)", XX, XX, XX, XX },
252b5132 1715 },
c608c12e 1716 /* GRPAMD */
252b5132 1717 {
050dfa73
MM		 1718 { "prefetch", Eb, XX, XX, XX },
1719 { "prefetchw", Eb, XX, XX, XX },
1720 { "(bad)", XX, XX, XX, XX },
1721 { "(bad)", XX, XX, XX, XX },
1722 { "(bad)", XX, XX, XX, XX },
1723 { "(bad)", XX, XX, XX, XX },
1724 { "(bad)", XX, XX, XX, XX },
1725 { "(bad)", XX, XX, XX, XX },
0f10071e 1726 },
30d1c836 1727 /* GRPPADLCK1 */
cc0ec051 1728 {
050dfa73
MM		 1729 { "xstore-rng", OP_0f07, 0, XX, XX, XX },
1730 { "xcrypt-ecb", OP_0f07, 0, XX, XX, XX },
1731 { "xcrypt-cbc", OP_0f07, 0, XX, XX, XX },
1732 { "xcrypt-ctr", OP_0f07, 0, XX, XX, XX },
1733 { "xcrypt-cfb", OP_0f07, 0, XX, XX, XX },
1734 { "xcrypt-ofb", OP_0f07, 0, XX, XX, XX },
1735 { "(bad)", OP_0f07, 0, XX, XX, XX },
1736 { "(bad)", OP_0f07, 0, XX, XX, XX },
30d1c836
ML		 1737 },
1738 /* GRPPADLCK2 */
1739 {
050dfa73
MM		 1740 { "montmul", OP_0f07, 0, XX, XX, XX },
1741 { "xsha1", OP_0f07, 0, XX, XX, XX },
1742 { "xsha256", OP_0f07, 0, XX, XX, XX },
1743 { "(bad)", OP_0f07, 0, XX, XX, XX },
1744 { "(bad)", OP_0f07, 0, XX, XX, XX },
1745 { "(bad)", OP_0f07, 0, XX, XX, XX },
1746 { "(bad)", OP_0f07, 0, XX, XX, XX },
1747 { "(bad)", OP_0f07, 0, XX, XX, XX },
252b5132 1748 }
252b5132
RH		 1749};
1750
041bd2e0 1751static const struct dis386 prefix_user_table[][4] = {
c608c12e
AM		 1752 /* PREGRP0 */
1753 {
050dfa73
MM		 1754 { "addps", XM, EX, XX, XX },
1755 { "addss", XM, EX, XX, XX },
1756 { "addpd", XM, EX, XX, XX },
1757 { "addsd", XM, EX, XX, XX },
c608c12e
AM		 1758 },
1759 /* PREGRP1 */
1760 {
050dfa73
MM		 1761 { "", XM, EX, OPSIMD, XX }, /* See OP_SIMD_SUFFIX. */
1762 { "", XM, EX, OPSIMD, XX },
1763 { "", XM, EX, OPSIMD, XX },
1764 { "", XM, EX, OPSIMD, XX },
c608c12e
AM		 1765 },
1766 /* PREGRP2 */
1767 {
4d9567e0 1768 { "cvtpi2ps", XM, EMC, XX, XX },
050dfa73 1769 { "cvtsi2ssY", XM, Ev, XX, XX },
4d9567e0 1770 { "cvtpi2pd", XM, EMC, XX, XX },
050dfa73 1771 { "cvtsi2sdY", XM, Ev, XX, XX },
c608c12e
AM		 1772 },
1773 /* PREGRP3 */
1774 {
4d9567e0 1775 { "cvtps2pi", MXC, EX, XX, XX },
050dfa73 1776 { "cvtss2siY", Gv, EX, XX, XX },
4d9567e0 1777 { "cvtpd2pi", MXC, EX, XX, XX },
050dfa73 1778 { "cvtsd2siY", Gv, EX, XX, XX },
c608c12e
AM		 1779 },
1780 /* PREGRP4 */
1781 {
4d9567e0 1782 { "cvttps2pi", MXC, EX, XX, XX },
050dfa73 1783 { "cvttss2siY", Gv, EX, XX, XX },
4d9567e0 1784 { "cvttpd2pi", MXC, EX, XX, XX },
050dfa73 1785 { "cvttsd2siY", Gv, EX, XX, XX },
c608c12e
AM		 1786 },
1787 /* PREGRP5 */
1788 {
050dfa73
MM		 1789 { "divps", XM, EX, XX, XX },
1790 { "divss", XM, EX, XX, XX },
1791 { "divpd", XM, EX, XX, XX },
1792 { "divsd", XM, EX, XX, XX },
c608c12e
AM		 1793 },
1794 /* PREGRP6 */
1795 {
050dfa73
MM		 1796 { "maxps", XM, EX, XX, XX },
1797 { "maxss", XM, EX, XX, XX },
1798 { "maxpd", XM, EX, XX, XX },
1799 { "maxsd", XM, EX, XX, XX },
c608c12e
AM		 1800 },
1801 /* PREGRP7 */
1802 {
050dfa73
MM		 1803 { "minps", XM, EX, XX, XX },
1804 { "minss", XM, EX, XX, XX },
1805 { "minpd", XM, EX, XX, XX },
1806 { "minsd", XM, EX, XX, XX },
c608c12e
AM		 1807 },
1808 /* PREGRP8 */
1809 {
050dfa73
MM		 1810 { "movups", XM, EX, XX, XX },
1811 { "movss", XM, EX, XX, XX },
1812 { "movupd", XM, EX, XX, XX },
1813 { "movsd", XM, EX, XX, XX },
c608c12e
AM		 1814 },
1815 /* PREGRP9 */
1816 {
050dfa73
MM		 1817 { "movups", EX, XM, XX, XX },
1818 { "movss", EX, XM, XX, XX },
1819 { "movupd", EX, XM, XX, XX },
1820 { "movsd", EX, XM, XX, XX },
c608c12e
AM		 1821 },
1822 /* PREGRP10 */
1823 {
050dfa73
MM		 1824 { "mulps", XM, EX, XX, XX },
1825 { "mulss", XM, EX, XX, XX },
1826 { "mulpd", XM, EX, XX, XX },
1827 { "mulsd", XM, EX, XX, XX },
c608c12e
AM		 1828 },
1829 /* PREGRP11 */
1830 {
050dfa73
MM		 1831 { "rcpps", XM, EX, XX, XX },
1832 { "rcpss", XM, EX, XX, XX },
1833 { "(bad)", XM, EX, XX, XX },
1834 { "(bad)", XM, EX, XX, XX },
c608c12e
AM		 1835 },
1836 /* PREGRP12 */
1837 {
050dfa73
MM		 1838 { "rsqrtps", XM, EX, XX, XX },
1839 { "rsqrtss", XM, EX, XX, XX },
1840 { "(bad)", XM, EX, XX, XX },
1841 { "(bad)", XM, EX, XX, XX },
c608c12e
AM		 1842 },
1843 /* PREGRP13 */
1844 {
050dfa73
MM		 1845 { "sqrtps", XM, EX, XX, XX },
1846 { "sqrtss", XM, EX, XX, XX },
1847 { "sqrtpd", XM, EX, XX, XX },
1848 { "sqrtsd", XM, EX, XX, XX },
c608c12e
AM		 1849 },
1850 /* PREGRP14 */
1851 {
050dfa73
MM		 1852 { "subps", XM, EX, XX, XX },
1853 { "subss", XM, EX, XX, XX },
1854 { "subpd", XM, EX, XX, XX },
1855 { "subsd", XM, EX, XX, XX },
041bd2e0
JH		 1856 },
1857 /* PREGRP15 */
1858 {
050dfa73
MM		 1859 { "(bad)", XM, EX, XX, XX},
1860 { "cvtdq2pd", XM, EX, XX, XX },
1861 { "cvttpd2dq", XM, EX, XX, XX },
1862 { "cvtpd2dq", XM, EX, XX, XX },
041bd2e0
JH		 1863 },
1864 /* PREGRP16 */
1865 {
050dfa73
MM		 1866 { "cvtdq2ps", XM, EX, XX, XX },
1867 { "cvttps2dq",XM, EX, XX, XX },
1868 { "cvtps2dq",XM, EX, XX, XX },
1869 { "(bad)", XM, EX, XX, XX },
041bd2e0
JH		 1870 },
1871 /* PREGRP17 */
1872 {
050dfa73
MM		 1873 { "cvtps2pd", XM, EX, XX, XX },
1874 { "cvtss2sd", XM, EX, XX, XX },
1875 { "cvtpd2ps", XM, EX, XX, XX },
1876 { "cvtsd2ss", XM, EX, XX, XX },
041bd2e0
JH		 1877 },
1878 /* PREGRP18 */
1879 {
050dfa73
MM		 1880 { "maskmovq", MX, MS, XX, XX },
1881 { "(bad)", XM, EX, XX, XX },
c4b5fff9 1882 { "maskmovdqu", XM, XS, XX, XX },
050dfa73 1883 { "(bad)", XM, EX, XX, XX },
041bd2e0
JH		 1884 },
1885 /* PREGRP19 */
1886 {
050dfa73
MM		 1887 { "movq", MX, EM, XX, XX },
1888 { "movdqu", XM, EX, XX, XX },
1889 { "movdqa", XM, EX, XX, XX },
1890 { "(bad)", XM, EX, XX, XX },
041bd2e0
JH		 1891 },
1892 /* PREGRP20 */
1893 {
050dfa73
MM		 1894 { "movq", EM, MX, XX, XX },
1895 { "movdqu", EX, XM, XX, XX },
1896 { "movdqa", EX, XM, XX, XX },
1897 { "(bad)", EX, XM, XX, XX },
041bd2e0
JH		 1898 },
1899 /* PREGRP21 */
1900 {
050dfa73
MM		 1901 { "(bad)", EX, XM, XX, XX },
1902 { "movq2dq", XM, MS, XX, XX },
1903 { "movq", EX, XM, XX, XX },
1904 { "movdq2q", MX, XS, XX, XX },
041bd2e0
JH		 1905 },
1906 /* PREGRP22 */
1907 {
050dfa73
MM		 1908 { "pshufw", MX, EM, Ib, XX },
1909 { "pshufhw", XM, EX, Ib, XX },
1910 { "pshufd", XM, EX, Ib, XX },
1911 { "pshuflw", XM, EX, Ib, XX},
041bd2e0
JH		 1912 },
1913 /* PREGRP23 */
1914 {
050dfa73
MM		 1915 { "movd", Edq, MX, XX, XX },
1916 { "movq", XM, EX, XX, XX },
1917 { "movd", Edq, XM, XX, XX },
1918 { "(bad)", Ed, XM, XX, XX },
041bd2e0
JH		 1919 },
1920 /* PREGRP24 */
1921 {
050dfa73
MM		 1922 { "(bad)", MX, EX, XX, XX },
1923 { "(bad)", XM, EX, XX, XX },
1924 { "punpckhqdq", XM, EX, XX, XX },
1925 { "(bad)", XM, EX, XX, XX },
0f17484f
AM		 1926 },
1927 /* PREGRP25 */
1928 {
050dfa73
MM		 1929 { "movntq", EM, MX, XX, XX },
1930 { "(bad)", EM, XM, XX, XX },
1931 { "movntdq", EM, XM, XX, XX },
1932 { "(bad)", EM, XM, XX, XX },
0f17484f
AM		 1933 },
1934 /* PREGRP26 */
1935 {
050dfa73
MM		 1936 { "(bad)", MX, EX, XX, XX },
1937 { "(bad)", XM, EX, XX, XX },
1938 { "punpcklqdq", XM, EX, XX, XX },
1939 { "(bad)", XM, EX, XX, XX },
041bd2e0 1940 },
ca164297
L		 1941 /* PREGRP27 */
1942 {
050dfa73
MM		 1943 { "(bad)", MX, EX, XX, XX },
1944 { "(bad)", XM, EX, XX, XX },
1945 { "addsubpd", XM, EX, XX, XX },
1946 { "addsubps", XM, EX, XX, XX },
ca164297
L		 1947 },
1948 /* PREGRP28 */
1949 {
050dfa73
MM		 1950 { "(bad)", MX, EX, XX, XX },
1951 { "(bad)", XM, EX, XX, XX },
1952 { "haddpd", XM, EX, XX, XX },
1953 { "haddps", XM, EX, XX, XX },
ca164297
L		 1954 },
1955 /* PREGRP29 */
1956 {
050dfa73
MM		 1957 { "(bad)", MX, EX, XX, XX },
1958 { "(bad)", XM, EX, XX, XX },
1959 { "hsubpd", XM, EX, XX, XX },
1960 { "hsubps", XM, EX, XX, XX },
ca164297
L		 1961 },
1962 /* PREGRP30 */
1963 {
050dfa73
MM		 1964 { "movlpX", XM, EX, SIMD_Fixup, 'h', XX }, /* really only 2 operands */
1965 { "movsldup", XM, EX, XX, XX },
1966 { "movlpd", XM, EX, XX, XX },
1967 { "movddup", XM, EX, XX, XX },
ca164297
L		 1968 },
1969 /* PREGRP31 */
1970 {
050dfa73
MM		 1971 { "movhpX", XM, EX, SIMD_Fixup, 'l', XX },
1972 { "movshdup", XM, EX, XX, XX },
1973 { "movhpd", XM, EX, XX, XX },
1974 { "(bad)", XM, EX, XX, XX },
ca164297
L		 1975 },
1976 /* PREGRP32 */
1977 {
050dfa73
MM		 1978 { "(bad)", XM, EX, XX, XX },
1979 { "(bad)", XM, EX, XX, XX },
1980 { "(bad)", XM, EX, XX, XX },
1981 { "lddqu", XM, M, XX, XX },
ca164297 1982 },
050dfa73
MM		 1983 /* PREGRP33 */
1984 {
1985 {"movntps",Ev, XM, XX, XX},
1986 {"movntss",Ev, XM, XX, XX},
1987 {"movntpd",Ev, XM, XX, XX},
1988 {"movntsd",Ev, XM, XX, XX},
1989 },
1990
1991 /* PREGRP34 */
1992 {
1993 {"vmread", Em, Gm, XX, XX},
1994 {"(bad)", XX, XX, XX, XX},
1995 {"extrq", XS, Ib, Ib, XX},
1996 {"insertq",XM, XS, Ib, Ib},
1997 },
1998
1999 /* PREGRP35 */
2000 {
2001 {"vmwrite", Gm, Em, XX, XX},
2002 {"(bad)", XX, XX, XX, XX},
2003 {"extrq", XM, XS, XX, XX},
2004 {"insertq", XM, XS, XX, XX},
2005 },
2006
2007 /* PREGRP36 */
2008 {
2009 { "bsrS", Gv, Ev, XX, XX },
2010 { "lzcntS", Gv, Ev, XX, XX },
2011 { "bsrS", Gv, Ev, XX, XX },
2012 { "(bad)", XX, XX, XX, XX },
2013 },
2014
7918206c
MM		 2015 /* PREGRP37 */
2016 {
2017 { "(bad)", XX, XX, XX, XX },
2018 { "popcntS",Gv, Ev, XX, XX },
2019 { "(bad)", XX, XX, XX, XX },
2020 { "(bad)", XX, XX, XX, XX },
2021 },
c608c12e
AM		 2022};
2023
6439fc28
AM		 2024static const struct dis386 x86_64_table[][2] = {
2025 {
050dfa73
MM		 2026 { "arpl", Ew, Gw, XX, XX },
2027 { "movs{||lq|xd}", Gv, Ed, XX, XX },
6439fc28
AM		 2028 },
2029};
2030
96fbad73 2031static const struct dis386 three_byte_table[][256] = {
331d2d0d
L		 2032 /* THREE_BYTE_0 */
2033 {
96fbad73 2034 /* 00 */
050dfa73
MM		 2035 { "pshufb", MX, EM, XX, XX },
2036 { "phaddw", MX, EM, XX, XX },
2037 { "phaddd", MX, EM, XX, XX },
2038 { "phaddsw", MX, EM, XX, XX },
2039 { "pmaddubsw", MX, EM, XX, XX },
2040 { "phsubw", MX, EM, XX, XX },
2041 { "phsubd", MX, EM, XX, XX },
2042 { "phsubsw", MX, EM, XX, XX },
96fbad73 2043 /* 08 */
050dfa73
MM		 2044 { "psignb", MX, EM, XX, XX },
2045 { "psignw", MX, EM, XX, XX },
2046 { "psignd", MX, EM, XX, XX },
2047 { "pmulhrsw", MX, EM, XX, XX },
2048 { "(bad)", XX, XX, XX, XX },
2049 { "(bad)", XX, XX, XX, XX },
2050 { "(bad)", XX, XX, XX, XX },
2051 { "(bad)", XX, XX, XX, XX },
96fbad73 2052 /* 10 */
050dfa73
MM		 2053 { "(bad)", XX, XX, XX, XX },
2054 { "(bad)", XX, XX, XX, XX },
2055 { "(bad)", XX, XX, XX, XX },
2056 { "(bad)", XX, XX, XX, XX },
2057 { "(bad)", XX, XX, XX, XX },
2058 { "(bad)", XX, XX, XX, XX },
2059 { "(bad)", XX, XX, XX, XX },
2060 { "(bad)", XX, XX, XX, XX },
96fbad73 2061 /* 18 */
050dfa73
MM		 2062 { "(bad)", XX, XX, XX, XX },
2063 { "(bad)", XX, XX, XX, XX },
2064 { "(bad)", XX, XX, XX, XX },
2065 { "(bad)", XX, XX, XX, XX },
2066 { "pabsb", MX, EM, XX, XX },
2067 { "pabsw", MX, EM, XX, XX },
2068 { "pabsd", MX, EM, XX, XX },
96fbad73
L		 2069 { "(bad)", XX, XX, XX, XX },
2070 /* 20 */
2071 { "(bad)", XX, XX, XX, XX },
2072 { "(bad)", XX, XX, XX, XX },
2073 { "(bad)", XX, XX, XX, XX },
2074 { "(bad)", XX, XX, XX, XX },
2075 { "(bad)", XX, XX, XX, XX },
2076 { "(bad)", XX, XX, XX, XX },
2077 { "(bad)", XX, XX, XX, XX },
2078 { "(bad)", XX, XX, XX, XX },
2079 /* 28 */
2080 { "(bad)", XX, XX, XX, XX },
2081 { "(bad)", XX, XX, XX, XX },
2082 { "(bad)", XX, XX, XX, XX },
2083 { "(bad)", XX, XX, XX, XX },
2084 { "(bad)", XX, XX, XX, XX },
2085 { "(bad)", XX, XX, XX, XX },
2086 { "(bad)", XX, XX, XX, XX },
2087 { "(bad)", XX, XX, XX, XX },
2088 /* 30 */
2089 { "(bad)", XX, XX, XX, XX },
2090 { "(bad)", XX, XX, XX, XX },
2091 { "(bad)", XX, XX, XX, XX },
2092 { "(bad)", XX, XX, XX, XX },
2093 { "(bad)", XX, XX, XX, XX },
2094 { "(bad)", XX, XX, XX, XX },
2095 { "(bad)", XX, XX, XX, XX },
2096 { "(bad)", XX, XX, XX, XX },
2097 /* 38 */
2098 { "(bad)", XX, XX, XX, XX },
2099 { "(bad)", XX, XX, XX, XX },
2100 { "(bad)", XX, XX, XX, XX },
2101 { "(bad)", XX, XX, XX, XX },
2102 { "(bad)", XX, XX, XX, XX },
2103 { "(bad)", XX, XX, XX, XX },
2104 { "(bad)", XX, XX, XX, XX },
2105 { "(bad)", XX, XX, XX, XX },
2106 /* 40 */
2107 { "(bad)", XX, XX, XX, XX },
2108 { "(bad)", XX, XX, XX, XX },
2109 { "(bad)", XX, XX, XX, XX },
2110 { "(bad)", XX, XX, XX, XX },
2111 { "(bad)", XX, XX, XX, XX },
2112 { "(bad)", XX, XX, XX, XX },
2113 { "(bad)", XX, XX, XX, XX },
2114 { "(bad)", XX, XX, XX, XX },
2115 /* 48 */
2116 { "(bad)", XX, XX, XX, XX },
2117 { "(bad)", XX, XX, XX, XX },
2118 { "(bad)", XX, XX, XX, XX },
2119 { "(bad)", XX, XX, XX, XX },
2120 { "(bad)", XX, XX, XX, XX },
2121 { "(bad)", XX, XX, XX, XX },
2122 { "(bad)", XX, XX, XX, XX },
2123 { "(bad)", XX, XX, XX, XX },
2124 /* 50 */
2125 { "(bad)", XX, XX, XX, XX },
2126 { "(bad)", XX, XX, XX, XX },
2127 { "(bad)", XX, XX, XX, XX },
2128 { "(bad)", XX, XX, XX, XX },
2129 { "(bad)", XX, XX, XX, XX },
2130 { "(bad)", XX, XX, XX, XX },
2131 { "(bad)", XX, XX, XX, XX },
2132 { "(bad)", XX, XX, XX, XX },
2133 /* 58 */
2134 { "(bad)", XX, XX, XX, XX },
2135 { "(bad)", XX, XX, XX, XX },
2136 { "(bad)", XX, XX, XX, XX },
2137 { "(bad)", XX, XX, XX, XX },
2138 { "(bad)", XX, XX, XX, XX },
2139 { "(bad)", XX, XX, XX, XX },
2140 { "(bad)", XX, XX, XX, XX },
2141 { "(bad)", XX, XX, XX, XX },
2142 /* 60 */
2143 { "(bad)", XX, XX, XX, XX },
2144 { "(bad)", XX, XX, XX, XX },
2145 { "(bad)", XX, XX, XX, XX },
2146 { "(bad)", XX, XX, XX, XX },
2147 { "(bad)", XX, XX, XX, XX },
2148 { "(bad)", XX, XX, XX, XX },
2149 { "(bad)", XX, XX, XX, XX },
2150 { "(bad)", XX, XX, XX, XX },
2151 /* 68 */
2152 { "(bad)", XX, XX, XX, XX },
2153 { "(bad)", XX, XX, XX, XX },
2154 { "(bad)", XX, XX, XX, XX },
2155 { "(bad)", XX, XX, XX, XX },
2156 { "(bad)", XX, XX, XX, XX },
2157 { "(bad)", XX, XX, XX, XX },
2158 { "(bad)", XX, XX, XX, XX },
2159 { "(bad)", XX, XX, XX, XX },
2160 /* 70 */
2161 { "(bad)", XX, XX, XX, XX },
2162 { "(bad)", XX, XX, XX, XX },
2163 { "(bad)", XX, XX, XX, XX },
2164 { "(bad)", XX, XX, XX, XX },
2165 { "(bad)", XX, XX, XX, XX },
2166 { "(bad)", XX, XX, XX, XX },
2167 { "(bad)", XX, XX, XX, XX },
2168 { "(bad)", XX, XX, XX, XX },
2169 /* 78 */
2170 { "(bad)", XX, XX, XX, XX },
2171 { "(bad)", XX, XX, XX, XX },
2172 { "(bad)", XX, XX, XX, XX },
2173 { "(bad)", XX, XX, XX, XX },
2174 { "(bad)", XX, XX, XX, XX },
2175 { "(bad)", XX, XX, XX, XX },
2176 { "(bad)", XX, XX, XX, XX },
2177 { "(bad)", XX, XX, XX, XX },
2178 /* 80 */
2179 { "(bad)", XX, XX, XX, XX },
2180 { "(bad)", XX, XX, XX, XX },
2181 { "(bad)", XX, XX, XX, XX },
2182 { "(bad)", XX, XX, XX, XX },
2183 { "(bad)", XX, XX, XX, XX },
2184 { "(bad)", XX, XX, XX, XX },
2185 { "(bad)", XX, XX, XX, XX },
2186 { "(bad)", XX, XX, XX, XX },
2187 /* 88 */
2188 { "(bad)", XX, XX, XX, XX },
2189 { "(bad)", XX, XX, XX, XX },
2190 { "(bad)", XX, XX, XX, XX },
2191 { "(bad)", XX, XX, XX, XX },
2192 { "(bad)", XX, XX, XX, XX },
2193 { "(bad)", XX, XX, XX, XX },
2194 { "(bad)", XX, XX, XX, XX },
2195 { "(bad)", XX, XX, XX, XX },
2196 /* 90 */
2197 { "(bad)", XX, XX, XX, XX },
2198 { "(bad)", XX, XX, XX, XX },
2199 { "(bad)", XX, XX, XX, XX },
2200 { "(bad)", XX, XX, XX, XX },
2201 { "(bad)", XX, XX, XX, XX },
2202 { "(bad)", XX, XX, XX, XX },
2203 { "(bad)", XX, XX, XX, XX },
2204 { "(bad)", XX, XX, XX, XX },
2205 /* 98 */
2206 { "(bad)", XX, XX, XX, XX },
2207 { "(bad)", XX, XX, XX, XX },
2208 { "(bad)", XX, XX, XX, XX },
2209 { "(bad)", XX, XX, XX, XX },
2210 { "(bad)", XX, XX, XX, XX },
2211 { "(bad)", XX, XX, XX, XX },
2212 { "(bad)", XX, XX, XX, XX },
2213 { "(bad)", XX, XX, XX, XX },
2214 /* a0 */
2215 { "(bad)", XX, XX, XX, XX },
2216 { "(bad)", XX, XX, XX, XX },
2217 { "(bad)", XX, XX, XX, XX },
2218 { "(bad)", XX, XX, XX, XX },
2219 { "(bad)", XX, XX, XX, XX },
2220 { "(bad)", XX, XX, XX, XX },
2221 { "(bad)", XX, XX, XX, XX },
2222 { "(bad)", XX, XX, XX, XX },
2223 /* a8 */
2224 { "(bad)", XX, XX, XX, XX },
2225 { "(bad)", XX, XX, XX, XX },
2226 { "(bad)", XX, XX, XX, XX },
2227 { "(bad)", XX, XX, XX, XX },
2228 { "(bad)", XX, XX, XX, XX },
2229 { "(bad)", XX, XX, XX, XX },
2230 { "(bad)", XX, XX, XX, XX },
2231 { "(bad)", XX, XX, XX, XX },
2232 /* b0 */
2233 { "(bad)", XX, XX, XX, XX },
2234 { "(bad)", XX, XX, XX, XX },
2235 { "(bad)", XX, XX, XX, XX },
2236 { "(bad)", XX, XX, XX, XX },
2237 { "(bad)", XX, XX, XX, XX },
2238 { "(bad)", XX, XX, XX, XX },
2239 { "(bad)", XX, XX, XX, XX },
2240 { "(bad)", XX, XX, XX, XX },
2241 /* b8 */
2242 { "(bad)", XX, XX, XX, XX },
2243 { "(bad)", XX, XX, XX, XX },
2244 { "(bad)", XX, XX, XX, XX },
2245 { "(bad)", XX, XX, XX, XX },
2246 { "(bad)", XX, XX, XX, XX },
2247 { "(bad)", XX, XX, XX, XX },
2248 { "(bad)", XX, XX, XX, XX },
2249 { "(bad)", XX, XX, XX, XX },
2250 /* c0 */
2251 { "(bad)", XX, XX, XX, XX },
2252 { "(bad)", XX, XX, XX, XX },
2253 { "(bad)", XX, XX, XX, XX },
2254 { "(bad)", XX, XX, XX, XX },
2255 { "(bad)", XX, XX, XX, XX },
2256 { "(bad)", XX, XX, XX, XX },
2257 { "(bad)", XX, XX, XX, XX },
2258 { "(bad)", XX, XX, XX, XX },
2259 /* c8 */
2260 { "(bad)", XX, XX, XX, XX },
2261 { "(bad)", XX, XX, XX, XX },
2262 { "(bad)", XX, XX, XX, XX },
2263 { "(bad)", XX, XX, XX, XX },
2264 { "(bad)", XX, XX, XX, XX },
2265 { "(bad)", XX, XX, XX, XX },
2266 { "(bad)", XX, XX, XX, XX },
2267 { "(bad)", XX, XX, XX, XX },
2268 /* d0 */
2269 { "(bad)", XX, XX, XX, XX },
2270 { "(bad)", XX, XX, XX, XX },
2271 { "(bad)", XX, XX, XX, XX },
2272 { "(bad)", XX, XX, XX, XX },
2273 { "(bad)", XX, XX, XX, XX },
2274 { "(bad)", XX, XX, XX, XX },
2275 { "(bad)", XX, XX, XX, XX },
2276 { "(bad)", XX, XX, XX, XX },
2277 /* d8 */
2278 { "(bad)", XX, XX, XX, XX },
2279 { "(bad)", XX, XX, XX, XX },
2280 { "(bad)", XX, XX, XX, XX },
2281 { "(bad)", XX, XX, XX, XX },
2282 { "(bad)", XX, XX, XX, XX },
2283 { "(bad)", XX, XX, XX, XX },
2284 { "(bad)", XX, XX, XX, XX },
2285 { "(bad)", XX, XX, XX, XX },
2286 /* e0 */
2287 { "(bad)", XX, XX, XX, XX },
2288 { "(bad)", XX, XX, XX, XX },
2289 { "(bad)", XX, XX, XX, XX },
2290 { "(bad)", XX, XX, XX, XX },
2291 { "(bad)", XX, XX, XX, XX },
2292 { "(bad)", XX, XX, XX, XX },
2293 { "(bad)", XX, XX, XX, XX },
2294 { "(bad)", XX, XX, XX, XX },
2295 /* e8 */
2296 { "(bad)", XX, XX, XX, XX },
2297 { "(bad)", XX, XX, XX, XX },
2298 { "(bad)", XX, XX, XX, XX },
2299 { "(bad)", XX, XX, XX, XX },
2300 { "(bad)", XX, XX, XX, XX },
2301 { "(bad)", XX, XX, XX, XX },
2302 { "(bad)", XX, XX, XX, XX },
2303 { "(bad)", XX, XX, XX, XX },
2304 /* f0 */
2305 { "(bad)", XX, XX, XX, XX },
2306 { "(bad)", XX, XX, XX, XX },
2307 { "(bad)", XX, XX, XX, XX },
2308 { "(bad)", XX, XX, XX, XX },
2309 { "(bad)", XX, XX, XX, XX },
2310 { "(bad)", XX, XX, XX, XX },
2311 { "(bad)", XX, XX, XX, XX },
2312 { "(bad)", XX, XX, XX, XX },
2313 /* f8 */
2314 { "(bad)", XX, XX, XX, XX },
2315 { "(bad)", XX, XX, XX, XX },
2316 { "(bad)", XX, XX, XX, XX },
2317 { "(bad)", XX, XX, XX, XX },
2318 { "(bad)", XX, XX, XX, XX },
2319 { "(bad)", XX, XX, XX, XX },
2320 { "(bad)", XX, XX, XX, XX },
050dfa73 2321 { "(bad)", XX, XX, XX, XX }
331d2d0d
L		 2322 },
2323 /* THREE_BYTE_1 */
2324 {
96fbad73 2325 /* 00 */
050dfa73
MM		 2326 { "(bad)", XX, XX, XX, XX },
2327 { "(bad)", XX, XX, XX, XX },
2328 { "(bad)", XX, XX, XX, XX },
2329 { "(bad)", XX, XX, XX, XX },
2330 { "(bad)", XX, XX, XX, XX },
2331 { "(bad)", XX, XX, XX, XX },
2332 { "(bad)", XX, XX, XX, XX },
2333 { "(bad)", XX, XX, XX, XX },
96fbad73 2334 /* 08 */
050dfa73
MM		 2335 { "(bad)", XX, XX, XX, XX },
2336 { "(bad)", XX, XX, XX, XX },
2337 { "(bad)", XX, XX, XX, XX },
2338 { "(bad)", XX, XX, XX, XX },
2339 { "(bad)", XX, XX, XX, XX },
2340 { "(bad)", XX, XX, XX, XX },
2341 { "(bad)", XX, XX, XX, XX },
2342 { "palignr", MX, EM, Ib, XX },
96fbad73
L		 2343 /* 10 */
2344 { "(bad)", XX, XX, XX, XX },
2345 { "(bad)", XX, XX, XX, XX },
2346 { "(bad)", XX, XX, XX, XX },
2347 { "(bad)", XX, XX, XX, XX },
2348 { "(bad)", XX, XX, XX, XX },
2349 { "(bad)", XX, XX, XX, XX },
2350 { "(bad)", XX, XX, XX, XX },
2351 { "(bad)", XX, XX, XX, XX },
2352 /* 18 */
2353 { "(bad)", XX, XX, XX, XX },
2354 { "(bad)", XX, XX, XX, XX },
2355 { "(bad)", XX, XX, XX, XX },
2356 { "(bad)", XX, XX, XX, XX },
2357 { "(bad)", XX, XX, XX, XX },
2358 { "(bad)", XX, XX, XX, XX },
2359 { "(bad)", XX, XX, XX, XX },
2360 { "(bad)", XX, XX, XX, XX },
2361 /* 20 */
2362 { "(bad)", XX, XX, XX, XX },
2363 { "(bad)", XX, XX, XX, XX },
2364 { "(bad)", XX, XX, XX, XX },
2365 { "(bad)", XX, XX, XX, XX },
2366 { "(bad)", XX, XX, XX, XX },
2367 { "(bad)", XX, XX, XX, XX },
2368 { "(bad)", XX, XX, XX, XX },
2369 { "(bad)", XX, XX, XX, XX },
2370 /* 28 */
2371 { "(bad)", XX, XX, XX, XX },
2372 { "(bad)", XX, XX, XX, XX },
2373 { "(bad)", XX, XX, XX, XX },
2374 { "(bad)", XX, XX, XX, XX },
2375 { "(bad)", XX, XX, XX, XX },
2376 { "(bad)", XX, XX, XX, XX },
2377 { "(bad)", XX, XX, XX, XX },
2378 { "(bad)", XX, XX, XX, XX },
2379 /* 30 */
2380 { "(bad)", XX, XX, XX, XX },
2381 { "(bad)", XX, XX, XX, XX },
2382 { "(bad)", XX, XX, XX, XX },
2383 { "(bad)", XX, XX, XX, XX },
2384 { "(bad)", XX, XX, XX, XX },
2385 { "(bad)", XX, XX, XX, XX },
2386 { "(bad)", XX, XX, XX, XX },
2387 { "(bad)", XX, XX, XX, XX },
2388 /* 38 */
2389 { "(bad)", XX, XX, XX, XX },
2390 { "(bad)", XX, XX, XX, XX },
2391 { "(bad)", XX, XX, XX, XX },
2392 { "(bad)", XX, XX, XX, XX },
2393 { "(bad)", XX, XX, XX, XX },
2394 { "(bad)", XX, XX, XX, XX },
2395 { "(bad)", XX, XX, XX, XX },
2396 { "(bad)", XX, XX, XX, XX },
2397 /* 40 */
2398 { "(bad)", XX, XX, XX, XX },
2399 { "(bad)", XX, XX, XX, XX },
2400 { "(bad)", XX, XX, XX, XX },
2401 { "(bad)", XX, XX, XX, XX },
2402 { "(bad)", XX, XX, XX, XX },
2403 { "(bad)", XX, XX, XX, XX },
2404 { "(bad)", XX, XX, XX, XX },
2405 { "(bad)", XX, XX, XX, XX },
2406 /* 48 */
2407 { "(bad)", XX, XX, XX, XX },
2408 { "(bad)", XX, XX, XX, XX },
2409 { "(bad)", XX, XX, XX, XX },
2410 { "(bad)", XX, XX, XX, XX },
2411 { "(bad)", XX, XX, XX, XX },
2412 { "(bad)", XX, XX, XX, XX },
2413 { "(bad)", XX, XX, XX, XX },
2414 { "(bad)", XX, XX, XX, XX },
2415 /* 50 */
2416 { "(bad)", XX, XX, XX, XX },
2417 { "(bad)", XX, XX, XX, XX },
2418 { "(bad)", XX, XX, XX, XX },
2419 { "(bad)", XX, XX, XX, XX },
2420 { "(bad)", XX, XX, XX, XX },
2421 { "(bad)", XX, XX, XX, XX },
2422 { "(bad)", XX, XX, XX, XX },
2423 { "(bad)", XX, XX, XX, XX },
2424 /* 58 */
2425 { "(bad)", XX, XX, XX, XX },
2426 { "(bad)", XX, XX, XX, XX },
2427 { "(bad)", XX, XX, XX, XX },
2428 { "(bad)", XX, XX, XX, XX },
2429 { "(bad)", XX, XX, XX, XX },
2430 { "(bad)", XX, XX, XX, XX },
2431 { "(bad)", XX, XX, XX, XX },
2432 { "(bad)", XX, XX, XX, XX },
2433 /* 60 */
2434 { "(bad)", XX, XX, XX, XX },
2435 { "(bad)", XX, XX, XX, XX },
2436 { "(bad)", XX, XX, XX, XX },
2437 { "(bad)", XX, XX, XX, XX },
2438 { "(bad)", XX, XX, XX, XX },
2439 { "(bad)", XX, XX, XX, XX },
2440 { "(bad)", XX, XX, XX, XX },
2441 { "(bad)", XX, XX, XX, XX },
2442 /* 68 */
2443 { "(bad)", XX, XX, XX, XX },
2444 { "(bad)", XX, XX, XX, XX },
2445 { "(bad)", XX, XX, XX, XX },
2446 { "(bad)", XX, XX, XX, XX },
2447 { "(bad)", XX, XX, XX, XX },
2448 { "(bad)", XX, XX, XX, XX },
2449 { "(bad)", XX, XX, XX, XX },
2450 { "(bad)", XX, XX, XX, XX },
2451 /* 70 */
2452 { "(bad)", XX, XX, XX, XX },
2453 { "(bad)", XX, XX, XX, XX },
2454 { "(bad)", XX, XX, XX, XX },
2455 { "(bad)", XX, XX, XX, XX },
2456 { "(bad)", XX, XX, XX, XX },
2457 { "(bad)", XX, XX, XX, XX },
2458 { "(bad)", XX, XX, XX, XX },
2459 { "(bad)", XX, XX, XX, XX },
2460 /* 78 */
2461 { "(bad)", XX, XX, XX, XX },
2462 { "(bad)", XX, XX, XX, XX },
2463 { "(bad)", XX, XX, XX, XX },
2464 { "(bad)", XX, XX, XX, XX },
2465 { "(bad)", XX, XX, XX, XX },
2466 { "(bad)", XX, XX, XX, XX },
2467 { "(bad)", XX, XX, XX, XX },
2468 { "(bad)", XX, XX, XX, XX },
2469 /* 80 */
2470 { "(bad)", XX, XX, XX, XX },
2471 { "(bad)", XX, XX, XX, XX },
2472 { "(bad)", XX, XX, XX, XX },
2473 { "(bad)", XX, XX, XX, XX },
2474 { "(bad)", XX, XX, XX, XX },
2475 { "(bad)", XX, XX, XX, XX },
2476 { "(bad)", XX, XX, XX, XX },
2477 { "(bad)", XX, XX, XX, XX },
2478 /* 88 */
2479 { "(bad)", XX, XX, XX, XX },
2480 { "(bad)", XX, XX, XX, XX },
2481 { "(bad)", XX, XX, XX, XX },
2482 { "(bad)", XX, XX, XX, XX },
2483 { "(bad)", XX, XX, XX, XX },
2484 { "(bad)", XX, XX, XX, XX },
2485 { "(bad)", XX, XX, XX, XX },
2486 { "(bad)", XX, XX, XX, XX },
2487 /* 90 */
2488 { "(bad)", XX, XX, XX, XX },
2489 { "(bad)", XX, XX, XX, XX },
2490 { "(bad)", XX, XX, XX, XX },
2491 { "(bad)", XX, XX, XX, XX },
2492 { "(bad)", XX, XX, XX, XX },
2493 { "(bad)", XX, XX, XX, XX },
2494 { "(bad)", XX, XX, XX, XX },
2495 { "(bad)", XX, XX, XX, XX },
2496 /* 98 */
2497 { "(bad)", XX, XX, XX, XX },
2498 { "(bad)", XX, XX, XX, XX },
2499 { "(bad)", XX, XX, XX, XX },
2500 { "(bad)", XX, XX, XX, XX },
2501 { "(bad)", XX, XX, XX, XX },
2502 { "(bad)", XX, XX, XX, XX },
2503 { "(bad)", XX, XX, XX, XX },
2504 { "(bad)", XX, XX, XX, XX },
2505 /* a0 */
2506 { "(bad)", XX, XX, XX, XX },
2507 { "(bad)", XX, XX, XX, XX },
2508 { "(bad)", XX, XX, XX, XX },
2509 { "(bad)", XX, XX, XX, XX },
2510 { "(bad)", XX, XX, XX, XX },
2511 { "(bad)", XX, XX, XX, XX },
2512 { "(bad)", XX, XX, XX, XX },
2513 { "(bad)", XX, XX, XX, XX },
2514 /* a8 */
2515 { "(bad)", XX, XX, XX, XX },
2516 { "(bad)", XX, XX, XX, XX },
2517 { "(bad)", XX, XX, XX, XX },
2518 { "(bad)", XX, XX, XX, XX },
2519 { "(bad)", XX, XX, XX, XX },
2520 { "(bad)", XX, XX, XX, XX },
2521 { "(bad)", XX, XX, XX, XX },
2522 { "(bad)", XX, XX, XX, XX },
2523 /* b0 */
2524 { "(bad)", XX, XX, XX, XX },
2525 { "(bad)", XX, XX, XX, XX },
2526 { "(bad)", XX, XX, XX, XX },
2527 { "(bad)", XX, XX, XX, XX },
2528 { "(bad)", XX, XX, XX, XX },
2529 { "(bad)", XX, XX, XX, XX },
2530 { "(bad)", XX, XX, XX, XX },
2531 { "(bad)", XX, XX, XX, XX },
2532 /* b8 */
2533 { "(bad)", XX, XX, XX, XX },
2534 { "(bad)", XX, XX, XX, XX },
2535 { "(bad)", XX, XX, XX, XX },
2536 { "(bad)", XX, XX, XX, XX },
2537 { "(bad)", XX, XX, XX, XX },
2538 { "(bad)", XX, XX, XX, XX },
2539 { "(bad)", XX, XX, XX, XX },
2540 { "(bad)", XX, XX, XX, XX },
2541 /* c0 */
2542 { "(bad)", XX, XX, XX, XX },
2543 { "(bad)", XX, XX, XX, XX },
2544 { "(bad)", XX, XX, XX, XX },
2545 { "(bad)", XX, XX, XX, XX },
2546 { "(bad)", XX, XX, XX, XX },
2547 { "(bad)", XX, XX, XX, XX },
2548 { "(bad)", XX, XX, XX, XX },
2549 { "(bad)", XX, XX, XX, XX },
2550 /* c8 */
2551 { "(bad)", XX, XX, XX, XX },
2552 { "(bad)", XX, XX, XX, XX },
2553 { "(bad)", XX, XX, XX, XX },
2554 { "(bad)", XX, XX, XX, XX },
2555 { "(bad)", XX, XX, XX, XX },
2556 { "(bad)", XX, XX, XX, XX },
2557 { "(bad)", XX, XX, XX, XX },
2558 { "(bad)", XX, XX, XX, XX },
2559 /* d0 */
2560 { "(bad)", XX, XX, XX, XX },
2561 { "(bad)", XX, XX, XX, XX },
2562 { "(bad)", XX, XX, XX, XX },
2563 { "(bad)", XX, XX, XX, XX },
2564 { "(bad)", XX, XX, XX, XX },
2565 { "(bad)", XX, XX, XX, XX },
2566 { "(bad)", XX, XX, XX, XX },
2567 { "(bad)", XX, XX, XX, XX },
2568 /* d8 */
2569 { "(bad)", XX, XX, XX, XX },
2570 { "(bad)", XX, XX, XX, XX },
2571 { "(bad)", XX, XX, XX, XX },
2572 { "(bad)", XX, XX, XX, XX },
2573 { "(bad)", XX, XX, XX, XX },
2574 { "(bad)", XX, XX, XX, XX },
2575 { "(bad)", XX, XX, XX, XX },
2576 { "(bad)", XX, XX, XX, XX },
2577 /* e0 */
2578 { "(bad)", XX, XX, XX, XX },
2579 { "(bad)", XX, XX, XX, XX },
2580 { "(bad)", XX, XX, XX, XX },
2581 { "(bad)", XX, XX, XX, XX },
2582 { "(bad)", XX, XX, XX, XX },
2583 { "(bad)", XX, XX, XX, XX },
2584 { "(bad)", XX, XX, XX, XX },
2585 { "(bad)", XX, XX, XX, XX },
2586 /* e8 */
2587 { "(bad)", XX, XX, XX, XX },
2588 { "(bad)", XX, XX, XX, XX },
2589 { "(bad)", XX, XX, XX, XX },
2590 { "(bad)", XX, XX, XX, XX },
2591 { "(bad)", XX, XX, XX, XX },
2592 { "(bad)", XX, XX, XX, XX },
2593 { "(bad)", XX, XX, XX, XX },
2594 { "(bad)", XX, XX, XX, XX },
2595 /* f0 */
050dfa73
MM		 2596 { "(bad)", XX, XX, XX, XX },
2597 { "(bad)", XX, XX, XX, XX },
2598 { "(bad)", XX, XX, XX, XX },
2599 { "(bad)", XX, XX, XX, XX },
2600 { "(bad)", XX, XX, XX, XX },
2601 { "(bad)", XX, XX, XX, XX },
2602 { "(bad)", XX, XX, XX, XX },
2603 { "(bad)", XX, XX, XX, XX },
96fbad73 2604 /* f8 */
050dfa73
MM		 2605 { "(bad)", XX, XX, XX, XX },
2606 { "(bad)", XX, XX, XX, XX },
2607 { "(bad)", XX, XX, XX, XX },
2608 { "(bad)", XX, XX, XX, XX },
2609 { "(bad)", XX, XX, XX, XX },
2610 { "(bad)", XX, XX, XX, XX },
2611 { "(bad)", XX, XX, XX, XX },
2612 { "(bad)", XX, XX, XX, XX }
331d2d0d
L		 2613 },
2614};
2615
c608c12e
AM		 2616#define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
2617
252b5132 2618static void
26ca5450 2619ckprefix (void)
252b5132 2620{
52b15da3
JH		 2621 int newrex;
2622 rex = 0;
252b5132 2623 prefixes = 0;
7d421014 2624 used_prefixes = 0;
52b15da3 2625 rex_used = 0;
252b5132
RH		 2626 while (1)
2627 {
2628 FETCH_DATA (the_info, codep + 1);
52b15da3 2629 newrex = 0;
252b5132
RH		 2630 switch (*codep)
2631 {
52b15da3
JH		 2632 /* REX prefixes family. */
2633 case 0x40:
2634 case 0x41:
2635 case 0x42:
2636 case 0x43:
2637 case 0x44:
2638 case 0x45:
2639 case 0x46:
2640 case 0x47:
2641 case 0x48:
2642 case 0x49:
2643 case 0x4a:
2644 case 0x4b:
2645 case 0x4c:
2646 case 0x4d:
2647 case 0x4e:
2648 case 0x4f:
cb712a9e 2649 if (address_mode == mode_64bit)
52b15da3
JH		 2650 newrex = *codep;
2651 else
2652 return;
2653 break;
252b5132
RH		 2654 case 0xf3:
2655 prefixes |= PREFIX_REPZ;
2656 break;
2657 case 0xf2:
2658 prefixes |= PREFIX_REPNZ;
2659 break;
2660 case 0xf0:
2661 prefixes |= PREFIX_LOCK;
2662 break;
2663 case 0x2e:
2664 prefixes |= PREFIX_CS;
2665 break;
2666 case 0x36:
2667 prefixes |= PREFIX_SS;
2668 break;
2669 case 0x3e:
2670 prefixes |= PREFIX_DS;
2671 break;
2672 case 0x26:
2673 prefixes |= PREFIX_ES;
2674 break;
2675 case 0x64:
2676 prefixes |= PREFIX_FS;
2677 break;
2678 case 0x65:
2679 prefixes |= PREFIX_GS;
2680 break;
2681 case 0x66:
2682 prefixes |= PREFIX_DATA;
2683 break;
2684 case 0x67:
2685 prefixes |= PREFIX_ADDR;
2686 break;
5076851f 2687 case FWAIT_OPCODE:
252b5132
RH		 2688 /* fwait is really an instruction. If there are prefixes
2689 before the fwait, they belong to the fwait, *not* to the
2690 following instruction. */
3e7d61b2 2691 if (prefixes || rex)
252b5132
RH		 2692 {
2693 prefixes |= PREFIX_FWAIT;
2694 codep++;
2695 return;
2696 }
2697 prefixes = PREFIX_FWAIT;
2698 break;
2699 default:
2700 return;
2701 }
52b15da3
JH		 2702 /* Rex is ignored when followed by another prefix. */
2703 if (rex)
2704 {
3e7d61b2
AM		 2705 rex_used = rex;
2706 return;
52b15da3
JH		 2707 }
2708 rex = newrex;
252b5132
RH		 2709 codep++;
2710 }
2711}
2712
7d421014
ILT		 2713/* Return the name of the prefix byte PREF, or NULL if PREF is not a
2714 prefix byte. */
2715
2716static const char *
26ca5450 2717prefix_name (int pref, int sizeflag)
7d421014
ILT		 2718{
2719 switch (pref)
2720 {
52b15da3
JH		 2721 /* REX prefixes family. */
2722 case 0x40:
2723 return "rex";
2724 case 0x41:
2725 return "rexZ";
2726 case 0x42:
2727 return "rexY";
2728 case 0x43:
2729 return "rexYZ";
2730 case 0x44:
2731 return "rexX";
2732 case 0x45:
2733 return "rexXZ";
2734 case 0x46:
2735 return "rexXY";
2736 case 0x47:
2737 return "rexXYZ";
2738 case 0x48:
2739 return "rex64";
2740 case 0x49:
2741 return "rex64Z";
2742 case 0x4a:
2743 return "rex64Y";
2744 case 0x4b:
2745 return "rex64YZ";
2746 case 0x4c:
2747 return "rex64X";
2748 case 0x4d:
2749 return "rex64XZ";
2750 case 0x4e:
2751 return "rex64XY";
2752 case 0x4f:
2753 return "rex64XYZ";
7d421014
ILT		 2754 case 0xf3:
2755 return "repz";
2756 case 0xf2:
2757 return "repnz";
2758 case 0xf0:
2759 return "lock";
2760 case 0x2e:
2761 return "cs";
2762 case 0x36:
2763 return "ss";
2764 case 0x3e:
2765 return "ds";
2766 case 0x26:
2767 return "es";
2768 case 0x64:
2769 return "fs";
2770 case 0x65:
2771 return "gs";
2772 case 0x66:
2773 return (sizeflag & DFLAG) ? "data16" : "data32";
2774 case 0x67:
cb712a9e 2775 if (address_mode == mode_64bit)
db6eb5be 2776 return (sizeflag & AFLAG) ? "addr32" : "addr64";
c1a64871 2777 else
2888cb7a 2778 return (sizeflag & AFLAG) ? "addr16" : "addr32";
7d421014
ILT		 2779 case FWAIT_OPCODE:
2780 return "fwait";
2781 default:
2782 return NULL;
2783 }
2784}
2785
050dfa73
MM		 2786static char op1out[100], op2out[100], op3out[100], op4out[100];
2787static int op_ad, op_index[4];
1d9f512f 2788static int two_source_ops;
050dfa73
MM		 2789static bfd_vma op_address[4];
2790static bfd_vma op_riprel[4];
52b15da3 2791static bfd_vma start_pc;
252b5132
RH		 2792\f
2793/*
2794 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
2795 * (see topic "Redundant prefixes" in the "Differences from 8086"
2796 * section of the "Virtual 8086 Mode" chapter.)
2797 * 'pc' should be the address of this instruction, it will
2798 * be used to print the target address if this is a relative jump or call
2799 * The function returns the length of this instruction in bytes.
2800 */
2801
252b5132
RH		 2802static char intel_syntax;
2803static char open_char;
2804static char close_char;
2805static char separator_char;
2806static char scale_char;
2807
e396998b
AM		 2808/* Here for backwards compatibility. When gdb stops using
2809 print_insn_i386_att and print_insn_i386_intel these functions can
2810 disappear, and print_insn_i386 be merged into print_insn. */
252b5132 2811int
26ca5450 2812print_insn_i386_att (bfd_vma pc, disassemble_info *info)
252b5132
RH		 2813{
2814 intel_syntax = 0;
e396998b
AM		 2815
2816 return print_insn (pc, info);
252b5132
RH		 2817}
2818
2819int
26ca5450 2820print_insn_i386_intel (bfd_vma pc, disassemble_info *info)
252b5132
RH		 2821{
2822 intel_syntax = 1;
e396998b
AM		 2823
2824 return print_insn (pc, info);
252b5132
RH		 2825}
2826
e396998b 2827int
26ca5450 2828print_insn_i386 (bfd_vma pc, disassemble_info *info)
e396998b
AM		 2829{
2830 intel_syntax = -1;
2831
2832 return print_insn (pc, info);
2833}
2834
2835static int
26ca5450 2836print_insn (bfd_vma pc, disassemble_info *info)
252b5132 2837{
2da11e11 2838 const struct dis386 *dp;
252b5132 2839 int i;
050dfa73 2840 char *first, *second, *third, *fourth;
252b5132 2841 int needcomma;
eec0f4ca
L		 2842 unsigned char uses_DATA_prefix, uses_LOCK_prefix;
2843 unsigned char uses_REPNZ_prefix, uses_REPZ_prefix;
e396998b
AM		 2844 int sizeflag;
2845 const char *p;
252b5132 2846 struct dis_private priv;
eec0f4ca 2847 unsigned char op;
252b5132 2848
cb712a9e
L		 2849 if (info->mach == bfd_mach_x86_64_intel_syntax
2850 || info->mach == bfd_mach_x86_64)
2851 address_mode = mode_64bit;
2852 else
2853 address_mode = mode_32bit;
52b15da3 2854
8373f971 2855 if (intel_syntax == (char) -1)
e396998b
AM		 2856 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
2857 || info->mach == bfd_mach_x86_64_intel_syntax);
2858
2da11e11 2859 if (info->mach == bfd_mach_i386_i386
52b15da3
JH		 2860 || info->mach == bfd_mach_x86_64
2861 || info->mach == bfd_mach_i386_i386_intel_syntax
2862 || info->mach == bfd_mach_x86_64_intel_syntax)
e396998b 2863 priv.orig_sizeflag = AFLAG | DFLAG;
2da11e11 2864 else if (info->mach == bfd_mach_i386_i8086)
e396998b 2865 priv.orig_sizeflag = 0;
2da11e11
AM		 2866 else
2867 abort ();
e396998b
AM		 2868
2869 for (p = info->disassembler_options; p != NULL; )
2870 {
0112cd26 2871 if (CONST_STRNEQ (p, "x86-64"))
e396998b 2872 {
cb712a9e 2873 address_mode = mode_64bit;
e396998b
AM		 2874 priv.orig_sizeflag = AFLAG | DFLAG;
2875 }
0112cd26 2876 else if (CONST_STRNEQ (p, "i386"))
e396998b 2877 {
cb712a9e 2878 address_mode = mode_32bit;
e396998b
AM		 2879 priv.orig_sizeflag = AFLAG | DFLAG;
2880 }
0112cd26 2881 else if (CONST_STRNEQ (p, "i8086"))
e396998b 2882 {
cb712a9e 2883 address_mode = mode_16bit;
e396998b
AM		 2884 priv.orig_sizeflag = 0;
2885 }
0112cd26 2886 else if (CONST_STRNEQ (p, "intel"))
e396998b
AM		 2887 {
2888 intel_syntax = 1;
2889 }
0112cd26 2890 else if (CONST_STRNEQ (p, "att"))
e396998b
AM		 2891 {
2892 intel_syntax = 0;
2893 }
0112cd26 2894 else if (CONST_STRNEQ (p, "addr"))
e396998b
AM		 2895 {
2896 if (p[4] == '1' && p[5] == '6')
2897 priv.orig_sizeflag &= ~AFLAG;
2898 else if (p[4] == '3' && p[5] == '2')
2899 priv.orig_sizeflag |= AFLAG;
2900 }
0112cd26 2901 else if (CONST_STRNEQ (p, "data"))
e396998b
AM		 2902 {
2903 if (p[4] == '1' && p[5] == '6')
2904 priv.orig_sizeflag &= ~DFLAG;
2905 else if (p[4] == '3' && p[5] == '2')
2906 priv.orig_sizeflag |= DFLAG;
2907 }
0112cd26 2908 else if (CONST_STRNEQ (p, "suffix"))
e396998b
AM		 2909 priv.orig_sizeflag |= SUFFIX_ALWAYS;
2910
2911 p = strchr (p, ',');
2912 if (p != NULL)
2913 p++;
2914 }
2915
2916 if (intel_syntax)
2917 {
2918 names64 = intel_names64;
2919 names32 = intel_names32;
2920 names16 = intel_names16;
2921 names8 = intel_names8;
2922 names8rex = intel_names8rex;
2923 names_seg = intel_names_seg;
2924 index16 = intel_index16;
2925 open_char = '[';
2926 close_char = ']';
2927 separator_char = '+';
2928 scale_char = '*';
2929 }
2930 else
2931 {
2932 names64 = att_names64;
2933 names32 = att_names32;
2934 names16 = att_names16;
2935 names8 = att_names8;
2936 names8rex = att_names8rex;
2937 names_seg = att_names_seg;
2938 index16 = att_index16;
2939 open_char = '(';
2940 close_char = ')';
2941 separator_char = ',';
2942 scale_char = ',';
2943 }
2da11e11 2944
4fe53c98 2945 /* The output looks better if we put 7 bytes on a line, since that
c608c12e 2946 puts most long word instructions on a single line. */
4fe53c98 2947 info->bytes_per_line = 7;
252b5132 2948
26ca5450 2949 info->private_data = &priv;
252b5132
RH		 2950 priv.max_fetched = priv.the_buffer;
2951 priv.insn_start = pc;
252b5132
RH		 2952
2953 obuf[0] = 0;
2954 op1out[0] = 0;
2955 op2out[0] = 0;
2956 op3out[0] = 0;
050dfa73 2957 op4out[0] = 0;
252b5132 2958
050dfa73 2959 op_index[0] = op_index[1] = op_index[2] = op_index[3] = -1;
252b5132
RH		 2960
2961 the_info = info;
2962 start_pc = pc;
e396998b
AM		 2963 start_codep = priv.the_buffer;
2964 codep = priv.the_buffer;
252b5132 2965
5076851f
ILT		 2966 if (setjmp (priv.bailout) != 0)
2967 {
7d421014
ILT		 2968 const char *name;
2969
5076851f 2970 /* Getting here means we tried for data but didn't get it. That
e396998b
AM		 2971 means we have an incomplete instruction of some sort. Just
2972 print the first byte as a prefix or a .byte pseudo-op. */
2973 if (codep > priv.the_buffer)
5076851f 2974 {
e396998b 2975 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
7d421014
ILT		 2976 if (name != NULL)
2977 (*info->fprintf_func) (info->stream, "%s", name);
2978 else
5076851f 2979 {
7d421014
ILT		 2980 /* Just print the first byte as a .byte instruction. */
2981 (*info->fprintf_func) (info->stream, ".byte 0x%x",
e396998b 2982 (unsigned int) priv.the_buffer[0]);
5076851f 2983 }
5076851f 2984
7d421014 2985 return 1;
5076851f
ILT		 2986 }
2987
2988 return -1;
2989 }
2990
52b15da3 2991 obufp = obuf;
252b5132
RH		 2992 ckprefix ();
2993
2994 insn_codep = codep;
e396998b 2995 sizeflag = priv.orig_sizeflag;
252b5132
RH		 2996
2997 FETCH_DATA (info, codep + 1);
2998 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
2999
3e7d61b2
AM		 3000 if (((prefixes & PREFIX_FWAIT)
3001 && ((*codep < 0xd8) || (*codep > 0xdf)))
3002 || (rex && rex_used))
252b5132 3003 {
7d421014
ILT		 3004 const char *name;
3005
3e7d61b2
AM		 3006 /* fwait not followed by floating point instruction, or rex followed
3007 by other prefixes. Print the first prefix. */
e396998b 3008 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
7d421014
ILT		 3009 if (name == NULL)
3010 name = INTERNAL_DISASSEMBLER_ERROR;
3011 (*info->fprintf_func) (info->stream, "%s", name);
3012 return 1;
252b5132
RH		 3013 }
3014
eec0f4ca 3015 op = 0;
252b5132
RH		 3016 if (*codep == 0x0f)
3017 {
eec0f4ca 3018 unsigned char threebyte;
252b5132 3019 FETCH_DATA (info, codep + 2);
eec0f4ca
L		 3020 threebyte = *++codep;
3021 dp = &dis386_twobyte[threebyte];
252b5132 3022 need_modrm = twobyte_has_modrm[*codep];
eec0f4ca
L		 3023 uses_DATA_prefix = twobyte_uses_DATA_prefix[*codep];
3024 uses_REPNZ_prefix = twobyte_uses_REPNZ_prefix[*codep];
3025 uses_REPZ_prefix = twobyte_uses_REPZ_prefix[*codep];
c4a530c5 3026 uses_LOCK_prefix = (*codep & ~0x02) == 0x20;
eec0f4ca
L		 3027 codep++;
3028 if (dp->name == NULL && dp->bytemode1 == IS_3BYTE_OPCODE)
3029 {
3030 FETCH_DATA (info, codep + 2);
3031 op = *codep++;
3032 switch (threebyte)
3033 {
3034 case 0x38:
3035 uses_DATA_prefix = threebyte_0x38_uses_DATA_prefix[op];
3036 uses_REPNZ_prefix = threebyte_0x38_uses_REPNZ_prefix[op];
3037 uses_REPZ_prefix = threebyte_0x38_uses_REPZ_prefix[op];
3038 break;
3039 case 0x3a:
3040 uses_DATA_prefix = threebyte_0x3a_uses_DATA_prefix[op];
3041 uses_REPNZ_prefix = threebyte_0x3a_uses_REPNZ_prefix[op];
3042 uses_REPZ_prefix = threebyte_0x3a_uses_REPZ_prefix[op];
3043 break;
3044 default:
3045 break;
3046 }
3047 }
252b5132
RH		 3048 }
3049 else
3050 {
6439fc28 3051 dp = &dis386[*codep];
252b5132 3052 need_modrm = onebyte_has_modrm[*codep];
eec0f4ca
L		 3053 uses_DATA_prefix = 0;
3054 uses_REPNZ_prefix = 0;
3055 uses_REPZ_prefix = 0;
c4a530c5 3056 uses_LOCK_prefix = 0;
eec0f4ca 3057 codep++;
252b5132 3058 }
050dfa73 3059
eec0f4ca 3060 if (!uses_REPZ_prefix && (prefixes & PREFIX_REPZ))
7d421014
ILT		 3061 {
3062 oappend ("repz ");
3063 used_prefixes |= PREFIX_REPZ;
3064 }
eec0f4ca 3065 if (!uses_REPNZ_prefix && (prefixes & PREFIX_REPNZ))
7d421014
ILT		 3066 {
3067 oappend ("repnz ");
3068 used_prefixes |= PREFIX_REPNZ;
3069 }
050dfa73 3070
c4a530c5 3071 if (!uses_LOCK_prefix && (prefixes & PREFIX_LOCK))
7d421014
ILT		 3072 {
3073 oappend ("lock ");
3074 used_prefixes |= PREFIX_LOCK;
3075 }
c608c12e 3076
c608c12e
AM		 3077 if (prefixes & PREFIX_ADDR)
3078 {
3079 sizeflag ^= AFLAG;
6439fc28 3080 if (dp->bytemode3 != loop_jcxz_mode || intel_syntax)
3ffd33cf 3081 {
cb712a9e 3082 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
3ffd33cf
AM		 3083 oappend ("addr32 ");
3084 else
3085 oappend ("addr16 ");
3086 used_prefixes |= PREFIX_ADDR;
3087 }
3088 }
3089
eec0f4ca 3090 if (!uses_DATA_prefix && (prefixes & PREFIX_DATA))
3ffd33cf
AM		 3091 {
3092 sizeflag ^= DFLAG;
6439fc28
AM		 3093 if (dp->bytemode3 == cond_jump_mode
3094 && dp->bytemode1 == v_mode
3095 && !intel_syntax)
3ffd33cf
AM		 3096 {
3097 if (sizeflag & DFLAG)
3098 oappend ("data32 ");
3099 else
3100 oappend ("data16 ");
3101 used_prefixes |= PREFIX_DATA;
3102 }
3103 }
3104
331d2d0d
L		 3105 if (dp->name == NULL && dp->bytemode1 == IS_3BYTE_OPCODE)
3106 {
eec0f4ca 3107 dp = &three_byte_table[dp->bytemode2][op];
331d2d0d
L		 3108 mod = (*codep >> 6) & 3;
3109 reg = (*codep >> 3) & 7;
3110 rm = *codep & 7;
3111 }
3112 else if (need_modrm)
252b5132
RH		 3113 {
3114 FETCH_DATA (info, codep + 1);
3115 mod = (*codep >> 6) & 3;
3116 reg = (*codep >> 3) & 7;
3117 rm = *codep & 7;
3118 }
3119
3120 if (dp->name == NULL && dp->bytemode1 == FLOATCODE)
3121 {
3122 dofloat (sizeflag);
3123 }
3124 else
3125 {
041bd2e0 3126 int index;
252b5132 3127 if (dp->name == NULL)
c608c12e 3128 {
6439fc28 3129 switch (dp->bytemode1)
c608c12e 3130 {
6439fc28
AM		 3131 case USE_GROUPS:
3132 dp = &grps[dp->bytemode2][reg];
3133 break;
3134
3135 case USE_PREFIX_USER_TABLE:
3136 index = 0;
3137 used_prefixes |= (prefixes & PREFIX_REPZ);
3138 if (prefixes & PREFIX_REPZ)
3139 index = 1;
3140 else
3141 {
d81afd0c
L		 3142 /* We should check PREFIX_REPNZ and PREFIX_REPZ
3143 before PREFIX_DATA. */
3144 used_prefixes |= (prefixes & PREFIX_REPNZ);
3145 if (prefixes & PREFIX_REPNZ)
3146 index = 3;
6439fc28
AM		 3147 else
3148 {
d81afd0c
L		 3149 used_prefixes |= (prefixes & PREFIX_DATA);
3150 if (prefixes & PREFIX_DATA)
3151 index = 2;
6439fc28
AM		 3152 }
3153 }
3154 dp = &prefix_user_table[dp->bytemode2][index];
3155 break;
252b5132 3156
6439fc28 3157 case X86_64_SPECIAL:
cb712a9e
L		 3158 index = address_mode == mode_64bit ? 1 : 0;
3159 dp = &x86_64_table[dp->bytemode2][index];
6439fc28 3160 break;
252b5132 3161
6439fc28
AM		 3162 default:
3163 oappend (INTERNAL_DISASSEMBLER_ERROR);
3164 break;
3165 }
3166 }
252b5132 3167
6439fc28
AM		 3168 if (putop (dp->name, sizeflag) == 0)
3169 {
3170 obufp = op1out;
050dfa73 3171 op_ad = 3;
6439fc28 3172 if (dp->op1)
6608db57 3173 (*dp->op1) (dp->bytemode1, sizeflag);
6439fc28
AM		 3174
3175 obufp = op2out;
050dfa73 3176 op_ad = 2;
6439fc28 3177 if (dp->op2)
6608db57 3178 (*dp->op2) (dp->bytemode2, sizeflag);
6439fc28
AM		 3179
3180 obufp = op3out;
050dfa73 3181 op_ad = 1;
6439fc28 3182 if (dp->op3)
6608db57 3183 (*dp->op3) (dp->bytemode3, sizeflag);
050dfa73
MM		 3184
3185 obufp = op4out;
3186 op_ad = 0;
3187 if (dp->op4)
3188 (*dp->op4) (dp->bytemode4, sizeflag);
6439fc28 3189 }
252b5132
RH		 3190 }
3191
7d421014
ILT		 3192 /* See if any prefixes were not used. If so, print the first one
3193 separately. If we don't do this, we'll wind up printing an
3194 instruction stream which does not precisely correspond to the
3195 bytes we are disassembling. */
3196 if ((prefixes & ~used_prefixes) != 0)
3197 {
3198 const char *name;
3199
e396998b 3200 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
7d421014
ILT		 3201 if (name == NULL)
3202 name = INTERNAL_DISASSEMBLER_ERROR;
3203 (*info->fprintf_func) (info->stream, "%s", name);
3204 return 1;
3205 }
52b15da3
JH		 3206 if (rex & ~rex_used)
3207 {
3208 const char *name;
e396998b 3209 name = prefix_name (rex | 0x40, priv.orig_sizeflag);
52b15da3
JH		 3210 if (name == NULL)
3211 name = INTERNAL_DISASSEMBLER_ERROR;
3212 (*info->fprintf_func) (info->stream, "%s ", name);
3213 }
7d421014 3214
252b5132
RH		 3215 obufp = obuf + strlen (obuf);
3216 for (i = strlen (obuf); i < 6; i++)
3217 oappend (" ");
3218 oappend (" ");
3219 (*info->fprintf_func) (info->stream, "%s", obuf);
3220
3221 /* The enter and bound instructions are printed with operands in the same
3222 order as the intel book; everything else is printed in reverse order. */
2da11e11 3223 if (intel_syntax || two_source_ops)
252b5132
RH		 3224 {
3225 first = op1out;
3226 second = op2out;
3227 third = op3out;
050dfa73 3228 fourth = op4out;
252b5132 3229 op_ad = op_index[0];
050dfa73
MM		 3230 op_index[0] = op_index[3];
3231 op_index[3] = op_ad;
3232 op_ad = op_index[1];
3233 op_index[1] = op_index[2];
252b5132 3234 op_index[2] = op_ad;
050dfa73 3235
252b5132
RH		 3236 }
3237 else
3238 {
050dfa73
MM		 3239 first = op4out;
3240 second = op3out;
3241 third = op2out;
3242 fourth = op1out;
252b5132
RH		 3243 }
3244 needcomma = 0;
3245 if (*first)
3246 {
52b15da3 3247 if (op_index[0] != -1 && !op_riprel[0])
252b5132
RH		 3248 (*info->print_address_func) ((bfd_vma) op_address[op_index[0]], info);
3249 else
3250 (*info->fprintf_func) (info->stream, "%s", first);
3251 needcomma = 1;
3252 }
050dfa73 3253
252b5132
RH		 3254 if (*second)
3255 {
3256 if (needcomma)
3257 (*info->fprintf_func) (info->stream, ",");
52b15da3 3258 if (op_index[1] != -1 && !op_riprel[1])
252b5132
RH		 3259 (*info->print_address_func) ((bfd_vma) op_address[op_index[1]], info);
3260 else
3261 (*info->fprintf_func) (info->stream, "%s", second);
3262 needcomma = 1;
3263 }
050dfa73 3264
252b5132
RH		 3265 if (*third)
3266 {
3267 if (needcomma)
3268 (*info->fprintf_func) (info->stream, ",");
52b15da3 3269 if (op_index[2] != -1 && !op_riprel[2])
252b5132
RH		 3270 (*info->print_address_func) ((bfd_vma) op_address[op_index[2]], info);
3271 else
3272 (*info->fprintf_func) (info->stream, "%s", third);
050dfa73
MM		 3273 needcomma = 1;
3274 }
3275
3276 if (*fourth)
3277 {
3278 if (needcomma)
3279 (*info->fprintf_func) (info->stream, ",");
3280 if (op_index[3] != -1 && !op_riprel[3])
3281 (*info->print_address_func) ((bfd_vma) op_address[op_index[3]], info);
3282 else
3283 (*info->fprintf_func) (info->stream, "%s", fourth);
252b5132 3284 }
050dfa73
MM		 3285
3286 for (i = 0; i < 4; i++)
52b15da3
JH		 3287 if (op_index[i] != -1 && op_riprel[i])
3288 {
3289 (*info->fprintf_func) (info->stream, " # ");
3290 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
3291 + op_address[op_index[i]]), info);
3292 }
e396998b 3293 return codep - priv.the_buffer;
252b5132
RH		 3294}
3295
6439fc28 3296static const char *float_mem[] = {
252b5132 3297 /* d8 */
6439fc28
AM		 3298 "fadd{s||s|}",
3299 "fmul{s||s|}",
3300 "fcom{s||s|}",
3301 "fcomp{s||s|}",
3302 "fsub{s||s|}",
3303 "fsubr{s||s|}",
3304 "fdiv{s||s|}",
3305 "fdivr{s||s|}",
db6eb5be 3306 /* d9 */
6439fc28 3307 "fld{s||s|}",
252b5132 3308 "(bad)",
6439fc28
AM		 3309 "fst{s||s|}",
3310 "fstp{s||s|}",
9306ca4a 3311 "fldenvIC",
252b5132 3312 "fldcw",
9306ca4a 3313 "fNstenvIC",
252b5132
RH		 3314 "fNstcw",
3315 /* da */
6439fc28
AM		 3316 "fiadd{l||l|}",
3317 "fimul{l||l|}",
3318 "ficom{l||l|}",
3319 "ficomp{l||l|}",
3320 "fisub{l||l|}",
3321 "fisubr{l||l|}",
3322 "fidiv{l||l|}",
3323 "fidivr{l||l|}",
252b5132 3324 /* db */
6439fc28 3325 "fild{l||l|}",
ca164297 3326 "fisttp{l||l|}",
6439fc28
AM		 3327 "fist{l||l|}",
3328 "fistp{l||l|}",
252b5132 3329 "(bad)",
6439fc28 3330 "fld{t||t|}",
252b5132 3331 "(bad)",
6439fc28 3332 "fstp{t||t|}",
252b5132 3333 /* dc */
6439fc28
AM		 3334 "fadd{l||l|}",
3335 "fmul{l||l|}",
3336 "fcom{l||l|}",
3337 "fcomp{l||l|}",
3338 "fsub{l||l|}",
3339 "fsubr{l||l|}",
3340 "fdiv{l||l|}",
3341 "fdivr{l||l|}",
252b5132 3342 /* dd */
6439fc28 3343 "fld{l||l|}",
1d9f512f 3344 "fisttp{ll||ll|}",
6439fc28
AM		 3345 "fst{l||l|}",
3346 "fstp{l||l|}",
9306ca4a 3347 "frstorIC",
252b5132 3348 "(bad)",
9306ca4a 3349 "fNsaveIC",
252b5132
RH		 3350 "fNstsw",
3351 /* de */
3352 "fiadd",
3353 "fimul",
3354 "ficom",
3355 "ficomp",
3356 "fisub",
3357 "fisubr",
3358 "fidiv",
3359 "fidivr",
3360 /* df */
3361 "fild",
ca164297 3362 "fisttp",
252b5132
RH		 3363 "fist",
3364 "fistp",
3365 "fbld",
6439fc28 3366 "fild{ll||ll|}",
252b5132 3367 "fbstp",
1d9f512f
AM		 3368 "fistp{ll||ll|}",
3369};
3370
3371static const unsigned char float_mem_mode[] = {
3372 /* d8 */
3373 d_mode,
3374 d_mode,
3375 d_mode,
3376 d_mode,
3377 d_mode,
3378 d_mode,
3379 d_mode,
3380 d_mode,
3381 /* d9 */
3382 d_mode,
3383 0,
3384 d_mode,
3385 d_mode,
3386 0,
3387 w_mode,
3388 0,
3389 w_mode,
3390 /* da */
3391 d_mode,
3392 d_mode,
3393 d_mode,
3394 d_mode,
3395 d_mode,
3396 d_mode,
3397 d_mode,
3398 d_mode,
3399 /* db */
3400 d_mode,
3401 d_mode,
3402 d_mode,
3403 d_mode,
3404 0,
9306ca4a 3405 t_mode,
1d9f512f 3406 0,
9306ca4a 3407 t_mode,
1d9f512f
AM		 3408 /* dc */
3409 q_mode,
3410 q_mode,
3411 q_mode,
3412 q_mode,
3413 q_mode,
3414 q_mode,
3415 q_mode,
3416 q_mode,
3417 /* dd */
3418 q_mode,
3419 q_mode,
3420 q_mode,
3421 q_mode,
3422 0,
3423 0,
3424 0,
3425 w_mode,
3426 /* de */
3427 w_mode,
3428 w_mode,
3429 w_mode,
3430 w_mode,
3431 w_mode,
3432 w_mode,
3433 w_mode,
3434 w_mode,
3435 /* df */
3436 w_mode,
3437 w_mode,
3438 w_mode,
3439 w_mode,
9306ca4a 3440 t_mode,
1d9f512f 3441 q_mode,
9306ca4a 3442 t_mode,
1d9f512f 3443 q_mode
252b5132
RH		 3444};
3445
3446#define ST OP_ST, 0
3447#define STi OP_STi, 0
3448
050dfa73
MM		 3449#define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0, NULL, 0
3450#define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0, NULL, 0
3451#define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0, NULL, 0
3452#define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0, NULL, 0
3453#define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0, NULL, 0
3454#define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0, NULL, 0
3455#define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0, NULL, 0
3456#define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0, NULL, 0
3457#define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0, NULL, 0
252b5132 3458
2da11e11 3459static const struct dis386 float_reg[][8] = {
252b5132
RH		 3460 /* d8 */
3461 {
050dfa73
MM		 3462 { "fadd", ST, STi, XX, XX },
3463 { "fmul", ST, STi, XX, XX },
3464 { "fcom", STi, XX, XX, XX },
3465 { "fcomp", STi, XX, XX, XX },
3466 { "fsub", ST, STi, XX, XX },
3467 { "fsubr", ST, STi, XX, XX },
3468 { "fdiv", ST, STi, XX, XX },
3469 { "fdivr", ST, STi, XX, XX },
252b5132
RH		 3470 },
3471 /* d9 */
3472 {
050dfa73
MM		 3473 { "fld", STi, XX, XX, XX },
3474 { "fxch", STi, XX, XX, XX },
252b5132 3475 { FGRPd9_2 },
050dfa73 3476 { "(bad)", XX, XX, XX, XX },
252b5132
RH		 3477 { FGRPd9_4 },
3478 { FGRPd9_5 },
3479 { FGRPd9_6 },
3480 { FGRPd9_7 },
3481 },
3482 /* da */
3483 {
050dfa73
MM		 3484 { "fcmovb", ST, STi, XX, XX },
3485 { "fcmove", ST, STi, XX, XX },
3486 { "fcmovbe",ST, STi, XX, XX },
3487 { "fcmovu", ST, STi, XX, XX },
3488 { "(bad)", XX, XX, XX, XX },
252b5132 3489 { FGRPda_5 },
050dfa73
MM		 3490 { "(bad)", XX, XX, XX, XX },
3491 { "(bad)", XX, XX, XX, XX },
252b5132
RH		 3492 },
3493 /* db */
3494 {
050dfa73
MM		 3495 { "fcmovnb",ST, STi, XX, XX },
3496 { "fcmovne",ST, STi, XX, XX },
3497 { "fcmovnbe",ST, STi, XX, XX },
3498 { "fcmovnu",ST, STi, XX, XX },
252b5132 3499 { FGRPdb_4 },
050dfa73
MM		 3500 { "fucomi", ST, STi, XX, XX },
3501 { "fcomi", ST, STi, XX, XX },
3502 { "(bad)", XX, XX, XX, XX },
252b5132
RH		 3503 },
3504 /* dc */
3505 {
050dfa73
MM		 3506 { "fadd", STi, ST, XX, XX },
3507 { "fmul", STi, ST, XX, XX },
3508 { "(bad)", XX, XX, XX, XX },
3509 { "(bad)", XX, XX, XX, XX },
252b5132 3510#if UNIXWARE_COMPAT
050dfa73
MM		 3511 { "fsub", STi, ST, XX, XX },
3512 { "fsubr", STi, ST, XX, XX },
3513 { "fdiv", STi, ST, XX, XX },
3514 { "fdivr", STi, ST, XX, XX },
252b5132 3515#else
050dfa73
MM		 3516 { "fsubr", STi, ST, XX, XX },
3517 { "fsub", STi, ST, XX, XX },
3518 { "fdivr", STi, ST, XX, XX },
3519 { "fdiv", STi, ST, XX, XX },
252b5132
RH		 3520#endif
3521 },
3522 /* dd */
3523 {
050dfa73
MM		 3524 { "ffree", STi, XX, XX, XX },
3525 { "(bad)", XX, XX, XX, XX },
3526 { "fst", STi, XX, XX, XX },
3527 { "fstp", STi, XX, XX, XX },
3528 { "fucom", STi, XX, XX, XX },
3529 { "fucomp", STi, XX, XX, XX },
3530 { "(bad)", XX, XX, XX, XX },
3531 { "(bad)", XX, XX, XX, XX },
252b5132
RH		 3532 },
3533 /* de */
3534 {
050dfa73
MM		 3535 { "faddp", STi, ST, XX, XX },
3536 { "fmulp", STi, ST, XX, XX },
3537 { "(bad)", XX, XX, XX, XX },
252b5132
RH		 3538 { FGRPde_3 },
3539#if UNIXWARE_COMPAT
050dfa73
MM		 3540 { "fsubp", STi, ST, XX, XX },
3541 { "fsubrp", STi, ST, XX, XX },
3542 { "fdivp", STi, ST, XX, XX },
3543 { "fdivrp", STi, ST, XX, XX },
252b5132 3544#else
050dfa73
MM		 3545 { "fsubrp", STi, ST, XX, XX },
3546 { "fsubp", STi, ST, XX, XX },
3547 { "fdivrp", STi, ST, XX, XX },
3548 { "fdivp", STi, ST, XX, XX },
252b5132
RH		 3549#endif
3550 },
3551 /* df */
3552 {
050dfa73
MM		 3553 { "ffreep", STi, XX, XX, XX },
3554 { "(bad)", XX, XX, XX, XX },
3555 { "(bad)", XX, XX, XX, XX },
3556 { "(bad)", XX, XX, XX, XX },
252b5132 3557 { FGRPdf_4 },
050dfa73
MM		 3558 { "fucomip",ST, STi, XX, XX },
3559 { "fcomip", ST, STi, XX, XX },
3560 { "(bad)", XX, XX, XX, XX },
252b5132
RH		 3561 },
3562};
3563
252b5132
RH		 3564static char *fgrps[][8] = {
3565 /* d9_2 0 */
3566 {
3567 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3568 },
3569
3570 /* d9_4 1 */
3571 {
3572 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
3573 },
3574
3575 /* d9_5 2 */
3576 {
3577 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
3578 },
3579
3580 /* d9_6 3 */
3581 {
3582 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
3583 },
3584
3585 /* d9_7 4 */
3586 {
3587 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
3588 },
3589
3590 /* da_5 5 */
3591 {
3592 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3593 },
3594
3595 /* db_4 6 */
3596 {
3597 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
3598 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
3599 },
3600
3601 /* de_3 7 */
3602 {
3603 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3604 },
3605
3606 /* df_4 8 */
3607 {
3608 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3609 },
3610};
3611
3612static void
26ca5450 3613dofloat (int sizeflag)
252b5132 3614{
2da11e11 3615 const struct dis386 *dp;
252b5132
RH		 3616 unsigned char floatop;
3617
3618 floatop = codep[-1];
3619
3620 if (mod != 3)
3621 {
1d9f512f
AM		 3622 int fp_indx = (floatop - 0xd8) * 8 + reg;
3623
3624 putop (float_mem[fp_indx], sizeflag);
252b5132 3625 obufp = op1out;
6e50d963 3626 op_ad = 2;
1d9f512f 3627 OP_E (float_mem_mode[fp_indx], sizeflag);
252b5132
RH		 3628 return;
3629 }
6608db57 3630 /* Skip mod/rm byte. */
4bba6815 3631 MODRM_CHECK;
252b5132
RH		 3632 codep++;
3633
3634 dp = &float_reg[floatop - 0xd8][reg];
3635 if (dp->name == NULL)
3636 {
3637 putop (fgrps[dp->bytemode1][rm], sizeflag);
3638
6608db57 3639 /* Instruction fnstsw is only one with strange arg. */
252b5132
RH		 3640 if (floatop == 0xdf && codep[-1] == 0xe0)
3641 strcpy (op1out, names16[0]);
3642 }
3643 else
3644 {
3645 putop (dp->name, sizeflag);
3646
3647 obufp = op1out;
6e50d963 3648 op_ad = 2;
252b5132 3649 if (dp->op1)
6608db57 3650 (*dp->op1) (dp->bytemode1, sizeflag);
6e50d963 3651
252b5132 3652 obufp = op2out;
6e50d963 3653 op_ad = 1;
252b5132 3654 if (dp->op2)
6608db57 3655 (*dp->op2) (dp->bytemode2, sizeflag);
252b5132
RH		 3656 }
3657}
3658
252b5132 3659static void
26ca5450 3660OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 3661{
422673a9 3662 oappend ("%st" + intel_syntax);
252b5132
RH		 3663}
3664
252b5132 3665static void
26ca5450 3666OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132
RH		 3667{
3668 sprintf (scratchbuf, "%%st(%d)", rm);
d708bcba 3669 oappend (scratchbuf + intel_syntax);
252b5132
RH		 3670}
3671
6608db57 3672/* Capital letters in template are macros. */
6439fc28 3673static int
26ca5450 3674putop (const char *template, int sizeflag)
252b5132 3675{
2da11e11 3676 const char *p;
9306ca4a 3677 int alt = 0;
252b5132
RH		 3678
3679 for (p = template; *p; p++)
3680 {
3681 switch (*p)
3682 {
3683 default:
3684 *obufp++ = *p;
3685 break;
6439fc28
AM		 3686 case '{':
3687 alt = 0;
3688 if (intel_syntax)
3689 alt += 1;
cb712a9e 3690 if (address_mode == mode_64bit)
6439fc28
AM		 3691 alt += 2;
3692 while (alt != 0)
3693 {
3694 while (*++p != '|')
3695 {
3696 if (*p == '}')
3697 {
3698 /* Alternative not valid. */
3699 strcpy (obuf, "(bad)");
3700 obufp = obuf + 5;
3701 return 1;
3702 }
3703 else if (*p == '\0')
3704 abort ();
3705 }
3706 alt--;
3707 }
9306ca4a
JB		 3708 /* Fall through. */
3709 case 'I':
3710 alt = 1;
3711 continue;
6439fc28
AM		 3712 case '|':
3713 while (*++p != '}')
3714 {
3715 if (*p == '\0')
3716 abort ();
3717 }
3718 break;
3719 case '}':
3720 break;
252b5132 3721 case 'A':
db6eb5be
AM		 3722 if (intel_syntax)
3723 break;
e396998b 3724 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
252b5132
RH		 3725 *obufp++ = 'b';
3726 break;
3727 case 'B':
db6eb5be
AM		 3728 if (intel_syntax)
3729 break;
252b5132
RH		 3730 if (sizeflag & SUFFIX_ALWAYS)
3731 *obufp++ = 'b';
252b5132 3732 break;
9306ca4a
JB		 3733 case 'C':
3734 if (intel_syntax && !alt)
3735 break;
3736 if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
3737 {
3738 if (sizeflag & DFLAG)
3739 *obufp++ = intel_syntax ? 'd' : 'l';
3740 else
3741 *obufp++ = intel_syntax ? 'w' : 's';
3742 used_prefixes |= (prefixes & PREFIX_DATA);
3743 }
3744 break;
252b5132 3745 case 'E': /* For jcxz/jecxz */
cb712a9e 3746 if (address_mode == mode_64bit)
c1a64871
JH		 3747 {
3748 if (sizeflag & AFLAG)
3749 *obufp++ = 'r';
3750 else
3751 *obufp++ = 'e';
3752 }
3753 else
3754 if (sizeflag & AFLAG)
3755 *obufp++ = 'e';
3ffd33cf
AM		 3756 used_prefixes |= (prefixes & PREFIX_ADDR);
3757 break;
3758 case 'F':
db6eb5be
AM		 3759 if (intel_syntax)
3760 break;
e396998b 3761 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
3ffd33cf
AM		 3762 {
3763 if (sizeflag & AFLAG)
cb712a9e 3764 *obufp++ = address_mode == mode_64bit ? 'q' : 'l';
3ffd33cf 3765 else
cb712a9e 3766 *obufp++ = address_mode == mode_64bit ? 'l' : 'w';
3ffd33cf
AM		 3767 used_prefixes |= (prefixes & PREFIX_ADDR);
3768 }
252b5132 3769 break;
5dd0794d 3770 case 'H':
db6eb5be
AM		 3771 if (intel_syntax)
3772 break;
5dd0794d
AM		 3773 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
3774 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
3775 {
3776 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
3777 *obufp++ = ',';
3778 *obufp++ = 'p';
3779 if (prefixes & PREFIX_DS)
3780 *obufp++ = 't';
3781 else
3782 *obufp++ = 'n';
3783 }
3784 break;
9306ca4a
JB		 3785 case 'J':
3786 if (intel_syntax)
3787 break;
3788 *obufp++ = 'l';
3789 break;
6dd5059a
L		 3790 case 'Z':
3791 if (intel_syntax)
3792 break;
3793 if (address_mode == mode_64bit && (sizeflag & SUFFIX_ALWAYS))
3794 {
3795 *obufp++ = 'q';
3796 break;
3797 }
3798 /* Fall through. */
252b5132 3799 case 'L':
db6eb5be
AM		 3800 if (intel_syntax)
3801 break;
252b5132
RH		 3802 if (sizeflag & SUFFIX_ALWAYS)
3803 *obufp++ = 'l';
252b5132
RH		 3804 break;
3805 case 'N':
3806 if ((prefixes & PREFIX_FWAIT) == 0)
3807 *obufp++ = 'n';
7d421014
ILT		 3808 else
3809 used_prefixes |= PREFIX_FWAIT;
252b5132 3810 break;
52b15da3
JH		 3811 case 'O':
3812 USED_REX (REX_MODE64);
3813 if (rex & REX_MODE64)
6439fc28 3814 *obufp++ = 'o';
52b15da3
JH		 3815 else
3816 *obufp++ = 'd';
3817 break;
6439fc28 3818 case 'T':
db6eb5be
AM		 3819 if (intel_syntax)
3820 break;
cb712a9e 3821 if (address_mode == mode_64bit && (sizeflag & DFLAG))
6439fc28
AM		 3822 {
3823 *obufp++ = 'q';
3824 break;
3825 }
6608db57 3826 /* Fall through. */
252b5132 3827 case 'P':
db6eb5be
AM		 3828 if (intel_syntax)
3829 break;
252b5132 3830 if ((prefixes & PREFIX_DATA)
52b15da3 3831 || (rex & REX_MODE64)
e396998b 3832 || (sizeflag & SUFFIX_ALWAYS))
252b5132 3833 {
52b15da3
JH		 3834 USED_REX (REX_MODE64);
3835 if (rex & REX_MODE64)
3836 *obufp++ = 'q';
c2419411 3837 else
52b15da3
JH		 3838 {
3839 if (sizeflag & DFLAG)
3840 *obufp++ = 'l';
3841 else
3842 *obufp++ = 'w';
52b15da3 3843 }
1a114b12 3844 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 3845 }
3846 break;
6439fc28 3847 case 'U':
db6eb5be
AM		 3848 if (intel_syntax)
3849 break;
cb712a9e 3850 if (address_mode == mode_64bit && (sizeflag & DFLAG))
6439fc28 3851 {
1a114b12
JB		 3852 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
3853 *obufp++ = 'q';
6439fc28
AM		 3854 break;
3855 }
6608db57 3856 /* Fall through. */
252b5132 3857 case 'Q':
9306ca4a 3858 if (intel_syntax && !alt)
db6eb5be 3859 break;
90530880 3860 USED_REX (REX_MODE64);
e396998b 3861 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
252b5132 3862 {
52b15da3
JH		 3863 if (rex & REX_MODE64)
3864 *obufp++ = 'q';
252b5132 3865 else
52b15da3
JH		 3866 {
3867 if (sizeflag & DFLAG)
9306ca4a 3868 *obufp++ = intel_syntax ? 'd' : 'l';
52b15da3
JH		 3869 else
3870 *obufp++ = 'w';
52b15da3 3871 }
1a114b12 3872 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 3873 }
3874 break;
3875 case 'R':
52b15da3 3876 USED_REX (REX_MODE64);
db6eb5be 3877 if (intel_syntax)
c608c12e 3878 {
52b15da3
JH		 3879 if (rex & REX_MODE64)
3880 {
3881 *obufp++ = 'q';
3882 *obufp++ = 't';
3883 }
3884 else if (sizeflag & DFLAG)
c608c12e
AM		 3885 {
3886 *obufp++ = 'd';
3887 *obufp++ = 'q';
3888 }
3889 else
3890 {
3891 *obufp++ = 'w';
3892 *obufp++ = 'd';
3893 }
3894 }
252b5132 3895 else
c608c12e 3896 {
52b15da3
JH		 3897 if (rex & REX_MODE64)
3898 *obufp++ = 'q';
3899 else if (sizeflag & DFLAG)
c608c12e
AM		 3900 *obufp++ = 'l';
3901 else
3902 *obufp++ = 'w';
3903 }
52b15da3
JH		 3904 if (!(rex & REX_MODE64))
3905 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132 3906 break;
1a114b12
JB		 3907 case 'V':
3908 if (intel_syntax)
3909 break;
cb712a9e 3910 if (address_mode == mode_64bit && (sizeflag & DFLAG))
1a114b12
JB		 3911 {
3912 if (sizeflag & SUFFIX_ALWAYS)
3913 *obufp++ = 'q';
3914 break;
3915 }
3916 /* Fall through. */
252b5132 3917 case 'S':
db6eb5be
AM		 3918 if (intel_syntax)
3919 break;
252b5132
RH		 3920 if (sizeflag & SUFFIX_ALWAYS)
3921 {
52b15da3
JH		 3922 if (rex & REX_MODE64)
3923 *obufp++ = 'q';
252b5132 3924 else
52b15da3
JH		 3925 {
3926 if (sizeflag & DFLAG)
3927 *obufp++ = 'l';
3928 else
3929 *obufp++ = 'w';
3930 used_prefixes |= (prefixes & PREFIX_DATA);
3931 }
252b5132 3932 }
252b5132 3933 break;
041bd2e0
JH		 3934 case 'X':
3935 if (prefixes & PREFIX_DATA)
3936 *obufp++ = 'd';
3937 else
3938 *obufp++ = 's';
db6eb5be 3939 used_prefixes |= (prefixes & PREFIX_DATA);
041bd2e0 3940 break;
76f227a5 3941 case 'Y':
db6eb5be
AM		 3942 if (intel_syntax)
3943 break;
76f227a5
JH		 3944 if (rex & REX_MODE64)
3945 {
3946 USED_REX (REX_MODE64);
3947 *obufp++ = 'q';
3948 }
3949 break;
52b15da3 3950 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
252b5132 3951 case 'W':
252b5132 3952 /* operand size flag for cwtl, cbtw */
52b15da3
JH		 3953 USED_REX (0);
3954 if (rex)
3955 *obufp++ = 'l';
3956 else if (sizeflag & DFLAG)
252b5132
RH		 3957 *obufp++ = 'w';
3958 else
3959 *obufp++ = 'b';
db6eb5be 3960 if (intel_syntax)
c608c12e 3961 {
52b15da3
JH		 3962 if (rex)
3963 {
3964 *obufp++ = 'q';
3965 *obufp++ = 'e';
3966 }
c608c12e
AM		 3967 if (sizeflag & DFLAG)
3968 {
3969 *obufp++ = 'd';
3970 *obufp++ = 'e';
3971 }
3972 else
3973 {
3974 *obufp++ = 'w';
3975 }
3976 }
52b15da3
JH		 3977 if (!rex)
3978 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 3979 break;
3980 }
9306ca4a 3981 alt = 0;
252b5132
RH		 3982 }
3983 *obufp = 0;
6439fc28 3984 return 0;
252b5132
RH		 3985}
3986
3987static void
26ca5450 3988oappend (const char *s)
252b5132
RH		 3989{
3990 strcpy (obufp, s);
3991 obufp += strlen (s);
3992}
3993
3994static void
26ca5450 3995append_seg (void)
252b5132
RH		 3996{
3997 if (prefixes & PREFIX_CS)
7d421014 3998 {
7d421014 3999 used_prefixes |= PREFIX_CS;
d708bcba 4000 oappend ("%cs:" + intel_syntax);
7d421014 4001 }
252b5132 4002 if (prefixes & PREFIX_DS)
7d421014 4003 {
7d421014 4004 used_prefixes |= PREFIX_DS;
d708bcba 4005 oappend ("%ds:" + intel_syntax);
7d421014 4006 }
252b5132 4007 if (prefixes & PREFIX_SS)
7d421014 4008 {
7d421014 4009 used_prefixes |= PREFIX_SS;
d708bcba 4010 oappend ("%ss:" + intel_syntax);
7d421014 4011 }
252b5132 4012 if (prefixes & PREFIX_ES)
7d421014 4013 {
7d421014 4014 used_prefixes |= PREFIX_ES;
d708bcba 4015 oappend ("%es:" + intel_syntax);
7d421014 4016 }
252b5132 4017 if (prefixes & PREFIX_FS)
7d421014 4018 {
7d421014 4019 used_prefixes |= PREFIX_FS;
d708bcba 4020 oappend ("%fs:" + intel_syntax);
7d421014 4021 }
252b5132 4022 if (prefixes & PREFIX_GS)
7d421014 4023 {
7d421014 4024 used_prefixes |= PREFIX_GS;
d708bcba 4025 oappend ("%gs:" + intel_syntax);
7d421014 4026 }
252b5132
RH		 4027}
4028
4029static void
26ca5450 4030OP_indirE (int bytemode, int sizeflag)
252b5132
RH		 4031{
4032 if (!intel_syntax)
4033 oappend ("*");
4034 OP_E (bytemode, sizeflag);
4035}
4036
52b15da3 4037static void
26ca5450 4038print_operand_value (char *buf, int hex, bfd_vma disp)
52b15da3 4039{
cb712a9e 4040 if (address_mode == mode_64bit)
52b15da3
JH		 4041 {
4042 if (hex)
4043 {
4044 char tmp[30];
4045 int i;
4046 buf[0] = '0';
4047 buf[1] = 'x';
4048 sprintf_vma (tmp, disp);
6608db57 4049 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++);
52b15da3
JH		 4050 strcpy (buf + 2, tmp + i);
4051 }
4052 else
4053 {
4054 bfd_signed_vma v = disp;
4055 char tmp[30];
4056 int i;
4057 if (v < 0)
4058 {
4059 *(buf++) = '-';
4060 v = -disp;
6608db57 4061 /* Check for possible overflow on 0x8000000000000000. */
52b15da3
JH		 4062 if (v < 0)
4063 {
4064 strcpy (buf, "9223372036854775808");
4065 return;
4066 }
4067 }
4068 if (!v)
4069 {
4070 strcpy (buf, "0");
4071 return;
4072 }
4073
4074 i = 0;
4075 tmp[29] = 0;
4076 while (v)
4077 {
6608db57 4078 tmp[28 - i] = (v % 10) + '0';
52b15da3
JH		 4079 v /= 10;
4080 i++;
4081 }
4082 strcpy (buf, tmp + 29 - i);
4083 }
4084 }
4085 else
4086 {
4087 if (hex)
4088 sprintf (buf, "0x%x", (unsigned int) disp);
4089 else
4090 sprintf (buf, "%d", (int) disp);
4091 }
4092}
4093
3f31e633
JB		 4094static void
4095intel_operand_size (int bytemode, int sizeflag)
4096{
4097 switch (bytemode)
4098 {
4099 case b_mode:
4100 oappend ("BYTE PTR ");
4101 break;
4102 case w_mode:
4103 case dqw_mode:
4104 oappend ("WORD PTR ");
4105 break;
1a114b12 4106 case stack_v_mode:
cb712a9e 4107 if (address_mode == mode_64bit && (sizeflag & DFLAG))
3f31e633
JB		 4108 {
4109 oappend ("QWORD PTR ");
4110 used_prefixes |= (prefixes & PREFIX_DATA);
4111 break;
4112 }
4113 /* FALLTHRU */
4114 case v_mode:
4115 case dq_mode:
4116 USED_REX (REX_MODE64);
4117 if (rex & REX_MODE64)
4118 oappend ("QWORD PTR ");
4119 else if ((sizeflag & DFLAG) || bytemode == dq_mode)
4120 oappend ("DWORD PTR ");
4121 else
4122 oappend ("WORD PTR ");
4123 used_prefixes |= (prefixes & PREFIX_DATA);
4124 break;
4125 case d_mode:
4126 oappend ("DWORD PTR ");
4127 break;
4128 case q_mode:
4129 oappend ("QWORD PTR ");
4130 break;
4131 case m_mode:
cb712a9e 4132 if (address_mode == mode_64bit)
3f31e633
JB		 4133 oappend ("QWORD PTR ");
4134 else
4135 oappend ("DWORD PTR ");
4136 break;
4137 case f_mode:
4138 if (sizeflag & DFLAG)
4139 oappend ("FWORD PTR ");
4140 else
4141 oappend ("DWORD PTR ");
4142 used_prefixes |= (prefixes & PREFIX_DATA);
4143 break;
4144 case t_mode:
4145 oappend ("TBYTE PTR ");
4146 break;
4147 case x_mode:
4148 oappend ("XMMWORD PTR ");
4149 break;
4150 default:
4151 break;
4152 }
4153}
4154
252b5132 4155static void
26ca5450 4156OP_E (int bytemode, int sizeflag)
252b5132 4157{
52b15da3
JH		 4158 bfd_vma disp;
4159 int add = 0;
4160 int riprel = 0;
4161 USED_REX (REX_EXTZ);
4162 if (rex & REX_EXTZ)
4163 add += 8;
252b5132 4164
6608db57 4165 /* Skip mod/rm byte. */
4bba6815 4166 MODRM_CHECK;
252b5132
RH		 4167 codep++;
4168
4169 if (mod == 3)
4170 {
4171 switch (bytemode)
4172 {
4173 case b_mode:
52b15da3
JH		 4174 USED_REX (0);
4175 if (rex)
4176 oappend (names8rex[rm + add]);
4177 else
4178 oappend (names8[rm + add]);
252b5132
RH		 4179 break;
4180 case w_mode:
52b15da3 4181 oappend (names16[rm + add]);
252b5132 4182 break;
2da11e11 4183 case d_mode:
52b15da3
JH		 4184 oappend (names32[rm + add]);
4185 break;
4186 case q_mode:
4187 oappend (names64[rm + add]);
4188 break;
4189 case m_mode:
cb712a9e 4190 if (address_mode == mode_64bit)
52b15da3
JH		 4191 oappend (names64[rm + add]);
4192 else
4193 oappend (names32[rm + add]);
2da11e11 4194 break;
1a114b12 4195 case stack_v_mode:
cb712a9e 4196 if (address_mode == mode_64bit && (sizeflag & DFLAG))
003519a7 4197 {
1a114b12 4198 oappend (names64[rm + add]);
003519a7 4199 used_prefixes |= (prefixes & PREFIX_DATA);
1a114b12 4200 break;
003519a7 4201 }
1a114b12
JB		 4202 bytemode = v_mode;
4203 /* FALLTHRU */
252b5132 4204 case v_mode:
db6eb5be 4205 case dq_mode:
9306ca4a 4206 case dqw_mode:
52b15da3
JH		 4207 USED_REX (REX_MODE64);
4208 if (rex & REX_MODE64)
4209 oappend (names64[rm + add]);
9306ca4a 4210 else if ((sizeflag & DFLAG) || bytemode != v_mode)
52b15da3 4211 oappend (names32[rm + add]);
252b5132 4212 else
52b15da3 4213 oappend (names16[rm + add]);
7d421014 4214 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132 4215 break;
2da11e11 4216 case 0:
c608c12e 4217 break;
252b5132 4218 default:
c608c12e 4219 oappend (INTERNAL_DISASSEMBLER_ERROR);
252b5132
RH		 4220 break;
4221 }
4222 return;
4223 }
4224
4225 disp = 0;
3f31e633
JB		 4226 if (intel_syntax)
4227 intel_operand_size (bytemode, sizeflag);
252b5132
RH		 4228 append_seg ();
4229
cb712a9e 4230 if ((sizeflag & AFLAG) || address_mode == mode_64bit) /* 32 bit address mode */
252b5132
RH		 4231 {
4232 int havesib;
4233 int havebase;
4234 int base;
4235 int index = 0;
4236 int scale = 0;
4237
4238 havesib = 0;
4239 havebase = 1;
4240 base = rm;
4241
4242 if (base == 4)
4243 {
4244 havesib = 1;
4245 FETCH_DATA (the_info, codep + 1);
252b5132 4246 index = (*codep >> 3) & 7;
cb712a9e 4247 if (address_mode == mode_64bit || index != 0x4)
9df48ba9 4248 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
2033b4b9 4249 scale = (*codep >> 6) & 3;
252b5132 4250 base = *codep & 7;
52b15da3 4251 USED_REX (REX_EXTY);
52b15da3
JH		 4252 if (rex & REX_EXTY)
4253 index += 8;
252b5132
RH		 4254 codep++;
4255 }
2888cb7a 4256 base += add;
252b5132
RH		 4257
4258 switch (mod)
4259 {
4260 case 0:
52b15da3 4261 if ((base & 7) == 5)
252b5132
RH		 4262 {
4263 havebase = 0;
cb712a9e 4264 if (address_mode == mode_64bit && !havesib)
52b15da3
JH		 4265 riprel = 1;
4266 disp = get32s ();
252b5132
RH		 4267 }
4268 break;
4269 case 1:
4270 FETCH_DATA (the_info, codep + 1);
4271 disp = *codep++;
4272 if ((disp & 0x80) != 0)
4273 disp -= 0x100;
4274 break;
4275 case 2:
52b15da3 4276 disp = get32s ();
252b5132
RH		 4277 break;
4278 }
4279
4280 if (!intel_syntax)
db6eb5be
AM		 4281 if (mod != 0 || (base & 7) == 5)
4282 {
52b15da3 4283 print_operand_value (scratchbuf, !riprel, disp);
db6eb5be 4284 oappend (scratchbuf);
52b15da3
JH		 4285 if (riprel)
4286 {
4287 set_op (disp, 1);
4288 oappend ("(%rip)");
4289 }
db6eb5be 4290 }
2da11e11 4291
252b5132
RH		 4292 if (havebase || (havesib && (index != 4 || scale != 0)))
4293 {
252b5132 4294 *obufp++ = open_char;
52b15da3
JH		 4295 if (intel_syntax && riprel)
4296 oappend ("rip + ");
db6eb5be 4297 *obufp = '\0';
252b5132 4298 if (havebase)
cb712a9e 4299 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
c1a64871 4300 ? names64[base] : names32[base]);
252b5132
RH		 4301 if (havesib)
4302 {
4303 if (index != 4)
4304 {
9306ca4a 4305 if (!intel_syntax || havebase)
db6eb5be 4306 {
9306ca4a
JB		 4307 *obufp++ = separator_char;
4308 *obufp = '\0';
db6eb5be 4309 }
cb712a9e 4310 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
9306ca4a 4311 ? names64[index] : names32[index]);
252b5132 4312 }
a02a862a 4313 if (scale != 0 || (!intel_syntax && index != 4))
db6eb5be
AM		 4314 {
4315 *obufp++ = scale_char;
4316 *obufp = '\0';
4317 sprintf (scratchbuf, "%d", 1 << scale);
4318 oappend (scratchbuf);
4319 }
252b5132 4320 }
3d456fa1
JB		 4321 if (intel_syntax && disp)
4322 {
4323 if ((bfd_signed_vma) disp > 0)
4324 {
4325 *obufp++ = '+';
4326 *obufp = '\0';
4327 }
4328 else if (mod != 1)
4329 {
4330 *obufp++ = '-';
4331 *obufp = '\0';
4332 disp = - (bfd_signed_vma) disp;
4333 }
4334
4335 print_operand_value (scratchbuf, mod != 1, disp);
4336 oappend (scratchbuf);
4337 }
252b5132
RH		 4338
4339 *obufp++ = close_char;
db6eb5be 4340 *obufp = '\0';
252b5132
RH		 4341 }
4342 else if (intel_syntax)
db6eb5be
AM		 4343 {
4344 if (mod != 0 || (base & 7) == 5)
4345 {
252b5132
RH		 4346 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
4347 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
4348 ;
4349 else
4350 {
d708bcba 4351 oappend (names_seg[ds_reg - es_reg]);
252b5132
RH		 4352 oappend (":");
4353 }
52b15da3 4354 print_operand_value (scratchbuf, 1, disp);
db6eb5be
AM		 4355 oappend (scratchbuf);
4356 }
4357 }
252b5132
RH		 4358 }
4359 else
4360 { /* 16 bit address mode */
4361 switch (mod)
4362 {
4363 case 0:
2888cb7a 4364 if (rm == 6)
252b5132
RH		 4365 {
4366 disp = get16 ();
4367 if ((disp & 0x8000) != 0)
4368 disp -= 0x10000;
4369 }
4370 break;
4371 case 1:
4372 FETCH_DATA (the_info, codep + 1);
4373 disp = *codep++;
4374 if ((disp & 0x80) != 0)
4375 disp -= 0x100;
4376 break;
4377 case 2:
4378 disp = get16 ();
4379 if ((disp & 0x8000) != 0)
4380 disp -= 0x10000;
4381 break;
4382 }
4383
4384 if (!intel_syntax)
2888cb7a 4385 if (mod != 0 || rm == 6)
db6eb5be 4386 {
52b15da3 4387 print_operand_value (scratchbuf, 0, disp);
db6eb5be
AM		 4388 oappend (scratchbuf);
4389 }
252b5132 4390
2888cb7a 4391 if (mod != 0 || rm != 6)
252b5132
RH		 4392 {
4393 *obufp++ = open_char;
db6eb5be 4394 *obufp = '\0';
3d456fa1
JB		 4395 oappend (index16[rm]);
4396 if (intel_syntax && disp)
4397 {
4398 if ((bfd_signed_vma) disp > 0)
4399 {
4400 *obufp++ = '+';
4401 *obufp = '\0';
4402 }
4403 else if (mod != 1)
4404 {
4405 *obufp++ = '-';
4406 *obufp = '\0';
4407 disp = - (bfd_signed_vma) disp;
4408 }
4409
4410 print_operand_value (scratchbuf, mod != 1, disp);
4411 oappend (scratchbuf);
4412 }
4413
db6eb5be
AM		 4414 *obufp++ = close_char;
4415 *obufp = '\0';
252b5132 4416 }
3d456fa1
JB		 4417 else if (intel_syntax)
4418 {
4419 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
4420 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
4421 ;
4422 else
4423 {
4424 oappend (names_seg[ds_reg - es_reg]);
4425 oappend (":");
4426 }
4427 print_operand_value (scratchbuf, 1, disp & 0xffff);
4428 oappend (scratchbuf);
4429 }
252b5132
RH		 4430 }
4431}
4432
252b5132 4433static void
26ca5450 4434OP_G (int bytemode, int sizeflag)
252b5132 4435{
52b15da3
JH		 4436 int add = 0;
4437 USED_REX (REX_EXTX);
4438 if (rex & REX_EXTX)
4439 add += 8;
252b5132
RH		 4440 switch (bytemode)
4441 {
4442 case b_mode:
52b15da3
JH		 4443 USED_REX (0);
4444 if (rex)
4445 oappend (names8rex[reg + add]);
4446 else
4447 oappend (names8[reg + add]);
252b5132
RH		 4448 break;
4449 case w_mode:
52b15da3 4450 oappend (names16[reg + add]);
252b5132
RH		 4451 break;
4452 case d_mode:
52b15da3
JH		 4453 oappend (names32[reg + add]);
4454 break;
4455 case q_mode:
4456 oappend (names64[reg + add]);
252b5132
RH		 4457 break;
4458 case v_mode:
9306ca4a
JB		 4459 case dq_mode:
4460 case dqw_mode:
52b15da3
JH		 4461 USED_REX (REX_MODE64);
4462 if (rex & REX_MODE64)
4463 oappend (names64[reg + add]);
9306ca4a 4464 else if ((sizeflag & DFLAG) || bytemode != v_mode)
52b15da3 4465 oappend (names32[reg + add]);
252b5132 4466 else
52b15da3 4467 oappend (names16[reg + add]);
7d421014 4468 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132 4469 break;
90700ea2 4470 case m_mode:
cb712a9e 4471 if (address_mode == mode_64bit)
90700ea2
L		 4472 oappend (names64[reg + add]);
4473 else
4474 oappend (names32[reg + add]);
4475 break;
252b5132
RH		 4476 default:
4477 oappend (INTERNAL_DISASSEMBLER_ERROR);
4478 break;
4479 }
4480}
4481
52b15da3 4482static bfd_vma
26ca5450 4483get64 (void)
52b15da3 4484{
5dd0794d 4485 bfd_vma x;
52b15da3 4486#ifdef BFD64
5dd0794d
AM		 4487 unsigned int a;
4488 unsigned int b;
4489
52b15da3
JH		 4490 FETCH_DATA (the_info, codep + 8);
4491 a = *codep++ & 0xff;
4492 a |= (*codep++ & 0xff) << 8;
4493 a |= (*codep++ & 0xff) << 16;
4494 a |= (*codep++ & 0xff) << 24;
5dd0794d 4495 b = *codep++ & 0xff;
52b15da3
JH		 4496 b |= (*codep++ & 0xff) << 8;
4497 b |= (*codep++ & 0xff) << 16;
4498 b |= (*codep++ & 0xff) << 24;
4499 x = a + ((bfd_vma) b << 32);
4500#else
6608db57 4501 abort ();
5dd0794d 4502 x = 0;
52b15da3
JH		 4503#endif
4504 return x;
4505}
4506
4507static bfd_signed_vma
26ca5450 4508get32 (void)
252b5132 4509{
52b15da3 4510 bfd_signed_vma x = 0;
252b5132
RH		 4511
4512 FETCH_DATA (the_info, codep + 4);
52b15da3
JH		 4513 x = *codep++ & (bfd_signed_vma) 0xff;
4514 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
4515 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
4516 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
4517 return x;
4518}
4519
4520static bfd_signed_vma
26ca5450 4521get32s (void)
52b15da3
JH		 4522{
4523 bfd_signed_vma x = 0;
4524
4525 FETCH_DATA (the_info, codep + 4);
4526 x = *codep++ & (bfd_signed_vma) 0xff;
4527 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
4528 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
4529 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
4530
4531 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
4532
252b5132
RH		 4533 return x;
4534}
4535
4536static int
26ca5450 4537get16 (void)
252b5132
RH		 4538{
4539 int x = 0;
4540
4541 FETCH_DATA (the_info, codep + 2);
4542 x = *codep++ & 0xff;
4543 x |= (*codep++ & 0xff) << 8;
4544 return x;
4545}
4546
4547static void
26ca5450 4548set_op (bfd_vma op, int riprel)
252b5132
RH		 4549{
4550 op_index[op_ad] = op_ad;
cb712a9e 4551 if (address_mode == mode_64bit)
7081ff04
AJ		 4552 {
4553 op_address[op_ad] = op;
4554 op_riprel[op_ad] = riprel;
4555 }
4556 else
4557 {
4558 /* Mask to get a 32-bit address. */
4559 op_address[op_ad] = op & 0xffffffff;
4560 op_riprel[op_ad] = riprel & 0xffffffff;
4561 }
252b5132
RH		 4562}
4563
4564static void
26ca5450 4565OP_REG (int code, int sizeflag)
252b5132 4566{
2da11e11 4567 const char *s;
52b15da3
JH		 4568 int add = 0;
4569 USED_REX (REX_EXTZ);
4570 if (rex & REX_EXTZ)
4571 add = 8;
4572
4573 switch (code)
4574 {
4575 case indir_dx_reg:
d708bcba 4576 if (intel_syntax)
db6eb5be 4577 s = "[dx]";
d708bcba 4578 else
db6eb5be 4579 s = "(%dx)";
52b15da3
JH		 4580 break;
4581 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
4582 case sp_reg: case bp_reg: case si_reg: case di_reg:
4583 s = names16[code - ax_reg + add];
4584 break;
4585 case es_reg: case ss_reg: case cs_reg:
4586 case ds_reg: case fs_reg: case gs_reg:
4587 s = names_seg[code - es_reg + add];
4588 break;
4589 case al_reg: case ah_reg: case cl_reg: case ch_reg:
4590 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
4591 USED_REX (0);
4592 if (rex)
4593 s = names8rex[code - al_reg + add];
4594 else
4595 s = names8[code - al_reg];
4596 break;
6439fc28
AM		 4597 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
4598 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
cb712a9e 4599 if (address_mode == mode_64bit && (sizeflag & DFLAG))
6439fc28
AM		 4600 {
4601 s = names64[code - rAX_reg + add];
4602 break;
4603 }
4604 code += eAX_reg - rAX_reg;
6608db57 4605 /* Fall through. */
52b15da3
JH		 4606 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
4607 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
4608 USED_REX (REX_MODE64);
4609 if (rex & REX_MODE64)
4610 s = names64[code - eAX_reg + add];
4611 else if (sizeflag & DFLAG)
4612 s = names32[code - eAX_reg + add];
4613 else
4614 s = names16[code - eAX_reg + add];
4615 used_prefixes |= (prefixes & PREFIX_DATA);
4616 break;
52b15da3
JH		 4617 default:
4618 s = INTERNAL_DISASSEMBLER_ERROR;
4619 break;
4620 }
4621 oappend (s);
4622}
4623
4624static void
26ca5450 4625OP_IMREG (int code, int sizeflag)
52b15da3
JH		 4626{
4627 const char *s;
252b5132
RH		 4628
4629 switch (code)
4630 {
4631 case indir_dx_reg:
d708bcba 4632 if (intel_syntax)
db6eb5be 4633 s = "[dx]";
d708bcba 4634 else
db6eb5be 4635 s = "(%dx)";
252b5132
RH		 4636 break;
4637 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
4638 case sp_reg: case bp_reg: case si_reg: case di_reg:
4639 s = names16[code - ax_reg];
4640 break;
4641 case es_reg: case ss_reg: case cs_reg:
4642 case ds_reg: case fs_reg: case gs_reg:
4643 s = names_seg[code - es_reg];
4644 break;
4645 case al_reg: case ah_reg: case cl_reg: case ch_reg:
4646 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
52b15da3
JH		 4647 USED_REX (0);
4648 if (rex)
4649 s = names8rex[code - al_reg];
4650 else
4651 s = names8[code - al_reg];
252b5132
RH		 4652 break;
4653 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
4654 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
52b15da3
JH		 4655 USED_REX (REX_MODE64);
4656 if (rex & REX_MODE64)
4657 s = names64[code - eAX_reg];
4658 else if (sizeflag & DFLAG)
252b5132
RH		 4659 s = names32[code - eAX_reg];
4660 else
4661 s = names16[code - eAX_reg];
7d421014 4662 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 4663 break;
4664 default:
4665 s = INTERNAL_DISASSEMBLER_ERROR;
4666 break;
4667 }
4668 oappend (s);
4669}
4670
4671static void
26ca5450 4672OP_I (int bytemode, int sizeflag)
252b5132 4673{
52b15da3
JH		 4674 bfd_signed_vma op;
4675 bfd_signed_vma mask = -1;
252b5132
RH		 4676
4677 switch (bytemode)
4678 {
4679 case b_mode:
4680 FETCH_DATA (the_info, codep + 1);
52b15da3
JH		 4681 op = *codep++;
4682 mask = 0xff;
4683 break;
4684 case q_mode:
cb712a9e 4685 if (address_mode == mode_64bit)
6439fc28
AM		 4686 {
4687 op = get32s ();
4688 break;
4689 }
6608db57 4690 /* Fall through. */
252b5132 4691 case v_mode:
52b15da3
JH		 4692 USED_REX (REX_MODE64);
4693 if (rex & REX_MODE64)
4694 op = get32s ();
4695 else if (sizeflag & DFLAG)
4696 {
4697 op = get32 ();
4698 mask = 0xffffffff;
4699 }
252b5132 4700 else
52b15da3
JH		 4701 {
4702 op = get16 ();
4703 mask = 0xfffff;
4704 }
7d421014 4705 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 4706 break;
4707 case w_mode:
52b15da3 4708 mask = 0xfffff;
252b5132
RH		 4709 op = get16 ();
4710 break;
9306ca4a
JB		 4711 case const_1_mode:
4712 if (intel_syntax)
4713 oappend ("1");
4714 return;
252b5132
RH		 4715 default:
4716 oappend (INTERNAL_DISASSEMBLER_ERROR);
4717 return;
4718 }
4719
52b15da3
JH		 4720 op &= mask;
4721 scratchbuf[0] = '$';
d708bcba
AM		 4722 print_operand_value (scratchbuf + 1, 1, op);
4723 oappend (scratchbuf + intel_syntax);
52b15da3
JH		 4724 scratchbuf[0] = '\0';
4725}
4726
4727static void
26ca5450 4728OP_I64 (int bytemode, int sizeflag)
52b15da3
JH		 4729{
4730 bfd_signed_vma op;
4731 bfd_signed_vma mask = -1;
4732
cb712a9e 4733 if (address_mode != mode_64bit)
6439fc28
AM		 4734 {
4735 OP_I (bytemode, sizeflag);
4736 return;
4737 }
4738
52b15da3
JH		 4739 switch (bytemode)
4740 {
4741 case b_mode:
4742 FETCH_DATA (the_info, codep + 1);
4743 op = *codep++;
4744 mask = 0xff;
4745 break;
4746 case v_mode:
4747 USED_REX (REX_MODE64);
4748 if (rex & REX_MODE64)
4749 op = get64 ();
4750 else if (sizeflag & DFLAG)
4751 {
4752 op = get32 ();
4753 mask = 0xffffffff;
4754 }
4755 else
4756 {
4757 op = get16 ();
4758 mask = 0xfffff;
4759 }
4760 used_prefixes |= (prefixes & PREFIX_DATA);
4761 break;
4762 case w_mode:
4763 mask = 0xfffff;
4764 op = get16 ();
4765 break;
4766 default:
4767 oappend (INTERNAL_DISASSEMBLER_ERROR);
4768 return;
4769 }
4770
4771 op &= mask;
4772 scratchbuf[0] = '$';
d708bcba
AM		 4773 print_operand_value (scratchbuf + 1, 1, op);
4774 oappend (scratchbuf + intel_syntax);
252b5132
RH		 4775 scratchbuf[0] = '\0';
4776}
4777
4778static void
26ca5450 4779OP_sI (int bytemode, int sizeflag)
252b5132 4780{
52b15da3
JH		 4781 bfd_signed_vma op;
4782 bfd_signed_vma mask = -1;
252b5132
RH		 4783
4784 switch (bytemode)
4785 {
4786 case b_mode:
4787 FETCH_DATA (the_info, codep + 1);
4788 op = *codep++;
4789 if ((op & 0x80) != 0)
4790 op -= 0x100;
52b15da3 4791 mask = 0xffffffff;
252b5132
RH		 4792 break;
4793 case v_mode:
52b15da3
JH		 4794 USED_REX (REX_MODE64);
4795 if (rex & REX_MODE64)
4796 op = get32s ();
4797 else if (sizeflag & DFLAG)
4798 {
4799 op = get32s ();
4800 mask = 0xffffffff;
4801 }
252b5132
RH		 4802 else
4803 {
52b15da3 4804 mask = 0xffffffff;
6608db57 4805 op = get16 ();
252b5132
RH		 4806 if ((op & 0x8000) != 0)
4807 op -= 0x10000;
4808 }
7d421014 4809 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 4810 break;
4811 case w_mode:
4812 op = get16 ();
52b15da3 4813 mask = 0xffffffff;
252b5132
RH		 4814 if ((op & 0x8000) != 0)
4815 op -= 0x10000;
4816 break;
4817 default:
4818 oappend (INTERNAL_DISASSEMBLER_ERROR);
4819 return;
4820 }
52b15da3
JH		 4821
4822 scratchbuf[0] = '$';
4823 print_operand_value (scratchbuf + 1, 1, op);
d708bcba 4824 oappend (scratchbuf + intel_syntax);
252b5132
RH		 4825}
4826
4827static void
26ca5450 4828OP_J (int bytemode, int sizeflag)
252b5132 4829{
52b15da3 4830 bfd_vma disp;
7081ff04 4831 bfd_vma mask = -1;
252b5132
RH		 4832
4833 switch (bytemode)
4834 {
4835 case b_mode:
4836 FETCH_DATA (the_info, codep + 1);
4837 disp = *codep++;
4838 if ((disp & 0x80) != 0)
4839 disp -= 0x100;
4840 break;
4841 case v_mode:
1a114b12 4842 if ((sizeflag & DFLAG) || (rex & REX_MODE64))
52b15da3 4843 disp = get32s ();
252b5132
RH		 4844 else
4845 {
4846 disp = get16 ();
6608db57 4847 /* For some reason, a data16 prefix on a jump instruction
252b5132
RH		 4848 means that the pc is masked to 16 bits after the
4849 displacement is added! */
4850 mask = 0xffff;
4851 }
4852 break;
4853 default:
4854 oappend (INTERNAL_DISASSEMBLER_ERROR);
4855 return;
4856 }
4857 disp = (start_pc + codep - start_codep + disp) & mask;
52b15da3
JH		 4858 set_op (disp, 0);
4859 print_operand_value (scratchbuf, 1, disp);
252b5132
RH		 4860 oappend (scratchbuf);
4861}
4862
252b5132 4863static void
26ca5450 4864OP_SEG (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 4865{
d708bcba 4866 oappend (names_seg[reg]);
252b5132
RH		 4867}
4868
4869static void
26ca5450 4870OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
252b5132
RH		 4871{
4872 int seg, offset;
4873
c608c12e 4874 if (sizeflag & DFLAG)
252b5132 4875 {
c608c12e
AM		 4876 offset = get32 ();
4877 seg = get16 ();
252b5132 4878 }
c608c12e
AM		 4879 else
4880 {
4881 offset = get16 ();
4882 seg = get16 ();
4883 }
7d421014 4884 used_prefixes |= (prefixes & PREFIX_DATA);
d708bcba 4885 if (intel_syntax)
3f31e633 4886 sprintf (scratchbuf, "0x%x:0x%x", seg, offset);
d708bcba
AM		 4887 else
4888 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
c608c12e 4889 oappend (scratchbuf);
252b5132
RH		 4890}
4891
252b5132 4892static void
3f31e633 4893OP_OFF (int bytemode, int sizeflag)
252b5132 4894{
52b15da3 4895 bfd_vma off;
252b5132 4896
3f31e633
JB		 4897 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
4898 intel_operand_size (bytemode, sizeflag);
252b5132
RH		 4899 append_seg ();
4900
cb712a9e 4901 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
252b5132
RH		 4902 off = get32 ();
4903 else
4904 off = get16 ();
4905
4906 if (intel_syntax)
4907 {
4908 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
db6eb5be 4909 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
252b5132 4910 {
d708bcba 4911 oappend (names_seg[ds_reg - es_reg]);
252b5132
RH		 4912 oappend (":");
4913 }
4914 }
52b15da3
JH		 4915 print_operand_value (scratchbuf, 1, off);
4916 oappend (scratchbuf);
4917}
6439fc28 4918
52b15da3 4919static void
3f31e633 4920OP_OFF64 (int bytemode, int sizeflag)
52b15da3
JH		 4921{
4922 bfd_vma off;
4923
539e75ad
L		 4924 if (address_mode != mode_64bit
4925 || (prefixes & PREFIX_ADDR))
6439fc28
AM		 4926 {
4927 OP_OFF (bytemode, sizeflag);
4928 return;
4929 }
4930
3f31e633
JB		 4931 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
4932 intel_operand_size (bytemode, sizeflag);
52b15da3
JH		 4933 append_seg ();
4934
6608db57 4935 off = get64 ();
52b15da3
JH		 4936
4937 if (intel_syntax)
4938 {
4939 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
db6eb5be 4940 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
52b15da3 4941 {
d708bcba 4942 oappend (names_seg[ds_reg - es_reg]);
52b15da3
JH		 4943 oappend (":");
4944 }
4945 }
4946 print_operand_value (scratchbuf, 1, off);
252b5132
RH		 4947 oappend (scratchbuf);
4948}
4949
4950static void
26ca5450 4951ptr_reg (int code, int sizeflag)
252b5132 4952{
2da11e11 4953 const char *s;
d708bcba 4954
1d9f512f 4955 *obufp++ = open_char;
20f0a1fc 4956 used_prefixes |= (prefixes & PREFIX_ADDR);
cb712a9e 4957 if (address_mode == mode_64bit)
c1a64871
JH		 4958 {
4959 if (!(sizeflag & AFLAG))
db6eb5be 4960 s = names32[code - eAX_reg];
c1a64871 4961 else
db6eb5be 4962 s = names64[code - eAX_reg];
c1a64871 4963 }
52b15da3 4964 else if (sizeflag & AFLAG)
252b5132
RH		 4965 s = names32[code - eAX_reg];
4966 else
4967 s = names16[code - eAX_reg];
4968 oappend (s);
1d9f512f
AM		 4969 *obufp++ = close_char;
4970 *obufp = 0;
252b5132
RH		 4971}
4972
4973static void
26ca5450 4974OP_ESreg (int code, int sizeflag)
252b5132 4975{
9306ca4a 4976 if (intel_syntax)
3f31e633 4977 intel_operand_size (codep[-1] & 1 ? v_mode : b_mode, sizeflag);
d708bcba 4978 oappend ("%es:" + intel_syntax);
252b5132
RH		 4979 ptr_reg (code, sizeflag);
4980}
4981
4982static void
26ca5450 4983OP_DSreg (int code, int sizeflag)
252b5132 4984{
9306ca4a 4985 if (intel_syntax)
3f31e633
JB		 4986 intel_operand_size (codep[-1] != 0xd7 && (codep[-1] & 1)
4987 ? v_mode
4988 : b_mode,
4989 sizeflag);
252b5132
RH		 4990 if ((prefixes
4991 & (PREFIX_CS
4992 | PREFIX_DS
4993 | PREFIX_SS
4994 | PREFIX_ES
4995 | PREFIX_FS
4996 | PREFIX_GS)) == 0)
4997 prefixes |= PREFIX_DS;
6608db57 4998 append_seg ();
252b5132
RH		 4999 ptr_reg (code, sizeflag);
5000}
5001
252b5132 5002static void
26ca5450 5003OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 5004{
52b15da3 5005 int add = 0;
52b15da3 5006 if (rex & REX_EXTX)
c4a530c5
JB		 5007 {
5008 USED_REX (REX_EXTX);
5009 add = 8;
5010 }
cb712a9e 5011 else if (address_mode != mode_64bit && (prefixes & PREFIX_LOCK))
c4a530c5
JB		 5012 {
5013 used_prefixes |= PREFIX_LOCK;
5014 add = 8;
5015 }
d708bcba
AM		 5016 sprintf (scratchbuf, "%%cr%d", reg + add);
5017 oappend (scratchbuf + intel_syntax);
252b5132
RH		 5018}
5019
252b5132 5020static void
26ca5450 5021OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 5022{
52b15da3
JH		 5023 int add = 0;
5024 USED_REX (REX_EXTX);
5025 if (rex & REX_EXTX)
5026 add = 8;
d708bcba 5027 if (intel_syntax)
6608db57 5028 sprintf (scratchbuf, "db%d", reg + add);
d708bcba 5029 else
6608db57 5030 sprintf (scratchbuf, "%%db%d", reg + add);
252b5132
RH		 5031 oappend (scratchbuf);
5032}
5033
252b5132 5034static void
26ca5450 5035OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 5036{
252b5132 5037 sprintf (scratchbuf, "%%tr%d", reg);
d708bcba 5038 oappend (scratchbuf + intel_syntax);
252b5132
RH		 5039}
5040
5041static void
26ca5450 5042OP_Rd (int bytemode, int sizeflag)
252b5132 5043{
2da11e11
AM		 5044 if (mod == 3)
5045 OP_E (bytemode, sizeflag);
5046 else
6608db57 5047 BadOp ();
252b5132
RH		 5048}
5049
5050static void
26ca5450 5051OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 5052{
041bd2e0
JH		 5053 used_prefixes |= (prefixes & PREFIX_DATA);
5054 if (prefixes & PREFIX_DATA)
20f0a1fc
NC		 5055 {
5056 int add = 0;
5057 USED_REX (REX_EXTX);
5058 if (rex & REX_EXTX)
5059 add = 8;
5060 sprintf (scratchbuf, "%%xmm%d", reg + add);
5061 }
041bd2e0 5062 else
20f0a1fc 5063 sprintf (scratchbuf, "%%mm%d", reg);
d708bcba 5064 oappend (scratchbuf + intel_syntax);
252b5132
RH		 5065}
5066
c608c12e 5067static void
26ca5450 5068OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
c608c12e 5069{
041bd2e0
JH		 5070 int add = 0;
5071 USED_REX (REX_EXTX);
5072 if (rex & REX_EXTX)
5073 add = 8;
5074 sprintf (scratchbuf, "%%xmm%d", reg + add);
d708bcba 5075 oappend (scratchbuf + intel_syntax);
c608c12e
AM		 5076}
5077
252b5132 5078static void
26ca5450 5079OP_EM (int bytemode, int sizeflag)
252b5132
RH		 5080{
5081 if (mod != 3)
5082 {
9306ca4a
JB		 5083 if (intel_syntax && bytemode == v_mode)
5084 {
5085 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
5086 used_prefixes |= (prefixes & PREFIX_DATA);
5087 }
252b5132
RH		 5088 OP_E (bytemode, sizeflag);
5089 return;
5090 }
5091
6608db57 5092 /* Skip mod/rm byte. */
4bba6815 5093 MODRM_CHECK;
252b5132 5094 codep++;
041bd2e0
JH		 5095 used_prefixes |= (prefixes & PREFIX_DATA);
5096 if (prefixes & PREFIX_DATA)
20f0a1fc
NC		 5097 {
5098 int add = 0;
5099
5100 USED_REX (REX_EXTZ);
5101 if (rex & REX_EXTZ)
5102 add = 8;
5103 sprintf (scratchbuf, "%%xmm%d", rm + add);
5104 }
041bd2e0 5105 else
20f0a1fc 5106 sprintf (scratchbuf, "%%mm%d", rm);
d708bcba 5107 oappend (scratchbuf + intel_syntax);
252b5132
RH		 5108}
5109
4d9567e0
MM		 5110/* cvt* are the only instructions in sse2 which have
5111 both SSE and MMX operands and also have 0x66 prefix
5112 in their opcode. 0x66 was originally used to differentiate
5113 between SSE and MMX instruction(operands). So we have to handle the
5114 cvt* separately using OP_EMC and OP_MXC */
5115static void
5116OP_EMC (int bytemode, int sizeflag)
5117{
5118 if (mod != 3)
5119 {
5120 if (intel_syntax && bytemode == v_mode)
5121 {
5122 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
5123 used_prefixes |= (prefixes & PREFIX_DATA);
5124 }
5125 OP_E (bytemode, sizeflag);
5126 return;
5127 }
5128
5129 /* Skip mod/rm byte. */
5130 MODRM_CHECK;
5131 codep++;
5132 used_prefixes |= (prefixes & PREFIX_DATA);
5133 sprintf (scratchbuf, "%%mm%d", rm);
5134 oappend (scratchbuf + intel_syntax);
5135}
5136
5137static void
5138OP_MXC (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5139{
5140 used_prefixes |= (prefixes & PREFIX_DATA);
5141 sprintf (scratchbuf, "%%mm%d", reg);
5142 oappend (scratchbuf + intel_syntax);
5143}
5144
c608c12e 5145static void
26ca5450 5146OP_EX (int bytemode, int sizeflag)
c608c12e 5147{
041bd2e0 5148 int add = 0;
c608c12e
AM		 5149 if (mod != 3)
5150 {
9306ca4a
JB		 5151 if (intel_syntax && bytemode == v_mode)
5152 {
5153 switch (prefixes & (PREFIX_DATA|PREFIX_REPZ|PREFIX_REPNZ))
5154 {
5155 case 0: bytemode = x_mode; break;
5156 case PREFIX_REPZ: bytemode = d_mode; used_prefixes |= PREFIX_REPZ; break;
5157 case PREFIX_DATA: bytemode = x_mode; used_prefixes |= PREFIX_DATA; break;
5158 case PREFIX_REPNZ: bytemode = q_mode; used_prefixes |= PREFIX_REPNZ; break;
5159 default: bytemode = 0; break;
5160 }
5161 }
c608c12e
AM		 5162 OP_E (bytemode, sizeflag);
5163 return;
5164 }
041bd2e0
JH		 5165 USED_REX (REX_EXTZ);
5166 if (rex & REX_EXTZ)
5167 add = 8;
c608c12e 5168
6608db57 5169 /* Skip mod/rm byte. */
4bba6815 5170 MODRM_CHECK;
c608c12e 5171 codep++;
041bd2e0 5172 sprintf (scratchbuf, "%%xmm%d", rm + add);
d708bcba 5173 oappend (scratchbuf + intel_syntax);
c608c12e
AM		 5174}
5175
252b5132 5176static void
26ca5450 5177OP_MS (int bytemode, int sizeflag)
252b5132 5178{
2da11e11
AM		 5179 if (mod == 3)
5180 OP_EM (bytemode, sizeflag);
5181 else
6608db57 5182 BadOp ();
252b5132
RH		 5183}
5184
992aaec9 5185static void
26ca5450 5186OP_XS (int bytemode, int sizeflag)
992aaec9
AM		 5187{
5188 if (mod == 3)
5189 OP_EX (bytemode, sizeflag);
5190 else
6608db57 5191 BadOp ();
992aaec9
AM		 5192}
5193
cc0ec051
AM		 5194static void
5195OP_M (int bytemode, int sizeflag)
5196{
5197 if (mod == 3)
5198 BadOp (); /* bad lea,lds,les,lfs,lgs,lss modrm */
5199 else
5200 OP_E (bytemode, sizeflag);
5201}
5202
5203static void
5204OP_0f07 (int bytemode, int sizeflag)
5205{
5206 if (mod != 3 || rm != 0)
5207 BadOp ();
5208 else
5209 OP_E (bytemode, sizeflag);
5210}
5211
5212static void
5213OP_0fae (int bytemode, int sizeflag)
5214{
5215 if (mod == 3)
5216 {
5217 if (reg == 7)
5218 strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence");
5219
5220 if (reg < 5 || rm != 0)
5221 {
5222 BadOp (); /* bad sfence, mfence, or lfence */
5223 return;
5224 }
5225 }
5226 else if (reg != 7)
5227 {
5228 BadOp (); /* bad clflush */
5229 return;
5230 }
5231
5232 OP_E (bytemode, sizeflag);
5233}
5234
46e883c5
L		 5235/* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
5236 32bit mode and "xchg %rax,%rax" in 64bit mode. NOP with REPZ prefix
5237 is called PAUSE. We display "xchg %ax,%ax" instead of "data16 nop".
5238 */
5239
cc0ec051 5240static void
46e883c5 5241NOP_Fixup1 (int bytemode, int sizeflag)
cc0ec051 5242{
cc0ec051
AM		 5243 if (prefixes == PREFIX_REPZ)
5244 strcpy (obuf, "pause");
46e883c5
L		 5245 else if (prefixes == PREFIX_DATA
5246 || ((rex & REX_MODE64) && rex != 0x48))
5247 OP_REG (bytemode, sizeflag);
5248 else
5249 strcpy (obuf, "nop");
5250}
5251
5252static void
5253NOP_Fixup2 (int bytemode, int sizeflag)
5254{
5255 if (prefixes == PREFIX_DATA
5256 || ((rex & REX_MODE64) && rex != 0x48))
5257 OP_IMREG (bytemode, sizeflag);
cc0ec051
AM		 5258}
5259
84037f8c 5260static const char *const Suffix3DNow[] = {
252b5132
RH		 5261/* 00 */ NULL, NULL, NULL, NULL,
5262/* 04 */ NULL, NULL, NULL, NULL,
5263/* 08 */ NULL, NULL, NULL, NULL,
9e525108 5264/* 0C */ "pi2fw", "pi2fd", NULL, NULL,
252b5132
RH		 5265/* 10 */ NULL, NULL, NULL, NULL,
5266/* 14 */ NULL, NULL, NULL, NULL,
5267/* 18 */ NULL, NULL, NULL, NULL,
9e525108 5268/* 1C */ "pf2iw", "pf2id", NULL, NULL,
252b5132
RH		 5269/* 20 */ NULL, NULL, NULL, NULL,
5270/* 24 */ NULL, NULL, NULL, NULL,
5271/* 28 */ NULL, NULL, NULL, NULL,
5272/* 2C */ NULL, NULL, NULL, NULL,
5273/* 30 */ NULL, NULL, NULL, NULL,
5274/* 34 */ NULL, NULL, NULL, NULL,
5275/* 38 */ NULL, NULL, NULL, NULL,
5276/* 3C */ NULL, NULL, NULL, NULL,
5277/* 40 */ NULL, NULL, NULL, NULL,
5278/* 44 */ NULL, NULL, NULL, NULL,
5279/* 48 */ NULL, NULL, NULL, NULL,
5280/* 4C */ NULL, NULL, NULL, NULL,
5281/* 50 */ NULL, NULL, NULL, NULL,
5282/* 54 */ NULL, NULL, NULL, NULL,
5283/* 58 */ NULL, NULL, NULL, NULL,
5284/* 5C */ NULL, NULL, NULL, NULL,
5285/* 60 */ NULL, NULL, NULL, NULL,
5286/* 64 */ NULL, NULL, NULL, NULL,
5287/* 68 */ NULL, NULL, NULL, NULL,
5288/* 6C */ NULL, NULL, NULL, NULL,
5289/* 70 */ NULL, NULL, NULL, NULL,
5290/* 74 */ NULL, NULL, NULL, NULL,
5291/* 78 */ NULL, NULL, NULL, NULL,
5292/* 7C */ NULL, NULL, NULL, NULL,
5293/* 80 */ NULL, NULL, NULL, NULL,
5294/* 84 */ NULL, NULL, NULL, NULL,
9e525108
AM		 5295/* 88 */ NULL, NULL, "pfnacc", NULL,
5296/* 8C */ NULL, NULL, "pfpnacc", NULL,
252b5132
RH		 5297/* 90 */ "pfcmpge", NULL, NULL, NULL,
5298/* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
5299/* 98 */ NULL, NULL, "pfsub", NULL,
5300/* 9C */ NULL, NULL, "pfadd", NULL,
5301/* A0 */ "pfcmpgt", NULL, NULL, NULL,
5302/* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
5303/* A8 */ NULL, NULL, "pfsubr", NULL,
5304/* AC */ NULL, NULL, "pfacc", NULL,
5305/* B0 */ "pfcmpeq", NULL, NULL, NULL,
5306/* B4 */ "pfmul", NULL, "pfrcpit2", "pfmulhrw",
9e525108 5307/* B8 */ NULL, NULL, NULL, "pswapd",
252b5132
RH		 5308/* BC */ NULL, NULL, NULL, "pavgusb",
5309/* C0 */ NULL, NULL, NULL, NULL,
5310/* C4 */ NULL, NULL, NULL, NULL,
5311/* C8 */ NULL, NULL, NULL, NULL,
5312/* CC */ NULL, NULL, NULL, NULL,
5313/* D0 */ NULL, NULL, NULL, NULL,
5314/* D4 */ NULL, NULL, NULL, NULL,
5315/* D8 */ NULL, NULL, NULL, NULL,
5316/* DC */ NULL, NULL, NULL, NULL,
5317/* E0 */ NULL, NULL, NULL, NULL,
5318/* E4 */ NULL, NULL, NULL, NULL,
5319/* E8 */ NULL, NULL, NULL, NULL,
5320/* EC */ NULL, NULL, NULL, NULL,
5321/* F0 */ NULL, NULL, NULL, NULL,
5322/* F4 */ NULL, NULL, NULL, NULL,
5323/* F8 */ NULL, NULL, NULL, NULL,
5324/* FC */ NULL, NULL, NULL, NULL,
5325};
5326
5327static void
26ca5450 5328OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132
RH		 5329{
5330 const char *mnemonic;
5331
5332 FETCH_DATA (the_info, codep + 1);
5333 /* AMD 3DNow! instructions are specified by an opcode suffix in the
5334 place where an 8-bit immediate would normally go. ie. the last
5335 byte of the instruction. */
6608db57 5336 obufp = obuf + strlen (obuf);
c608c12e 5337 mnemonic = Suffix3DNow[*codep++ & 0xff];
252b5132 5338 if (mnemonic)
2da11e11 5339 oappend (mnemonic);
252b5132
RH		 5340 else
5341 {
5342 /* Since a variable sized modrm/sib chunk is between the start
5343 of the opcode (0x0f0f) and the opcode suffix, we need to do
5344 all the modrm processing first, and don't know until now that
5345 we have a bad opcode. This necessitates some cleaning up. */
2da11e11
AM		 5346 op1out[0] = '\0';
5347 op2out[0] = '\0';
6608db57 5348 BadOp ();
252b5132
RH		 5349 }
5350}
c608c12e 5351
6608db57 5352static const char *simd_cmp_op[] = {
c608c12e
AM		 5353 "eq",
5354 "lt",
5355 "le",
5356 "unord",
5357 "neq",
5358 "nlt",
5359 "nle",
5360 "ord"
5361};
5362
5363static void
26ca5450 5364OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
c608c12e
AM		 5365{
5366 unsigned int cmp_type;
5367
5368 FETCH_DATA (the_info, codep + 1);
6608db57 5369 obufp = obuf + strlen (obuf);
c608c12e
AM		 5370 cmp_type = *codep++ & 0xff;
5371 if (cmp_type < 8)
5372 {
041bd2e0
JH		 5373 char suffix1 = 'p', suffix2 = 's';
5374 used_prefixes |= (prefixes & PREFIX_REPZ);
5375 if (prefixes & PREFIX_REPZ)
5376 suffix1 = 's';
5377 else
5378 {
5379 used_prefixes |= (prefixes & PREFIX_DATA);
5380 if (prefixes & PREFIX_DATA)
5381 suffix2 = 'd';
5382 else
5383 {
5384 used_prefixes |= (prefixes & PREFIX_REPNZ);
5385 if (prefixes & PREFIX_REPNZ)
5386 suffix1 = 's', suffix2 = 'd';
5387 }
5388 }
5389 sprintf (scratchbuf, "cmp%s%c%c",
5390 simd_cmp_op[cmp_type], suffix1, suffix2);
7d421014 5391 used_prefixes |= (prefixes & PREFIX_REPZ);
2da11e11 5392 oappend (scratchbuf);
c608c12e
AM		 5393 }
5394 else
5395 {
5396 /* We have a bad extension byte. Clean up. */
2da11e11
AM		 5397 op1out[0] = '\0';
5398 op2out[0] = '\0';
6608db57 5399 BadOp ();
c608c12e
AM		 5400 }
5401}
5402
5403static void
26ca5450 5404SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED)
c608c12e
AM		 5405{
5406 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
5407 forms of these instructions. */
5408 if (mod == 3)
5409 {
6608db57
KH		 5410 char *p = obuf + strlen (obuf);
5411 *(p + 1) = '\0';
5412 *p = *(p - 1);
5413 *(p - 1) = *(p - 2);
5414 *(p - 2) = *(p - 3);
5415 *(p - 3) = extrachar;
c608c12e
AM		 5416 }
5417}
2da11e11 5418
ca164297 5419static void
4fd61dcb 5420PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
ca164297 5421{
1d9f512f 5422 if (mod == 3 && reg == 1 && rm <= 1)
ca164297 5423 {
ca164297 5424 /* Override "sidt". */
cb712a9e
L		 5425 size_t olen = strlen (obuf);
5426 char *p = obuf + olen - 4;
5427 const char **names = (address_mode == mode_64bit
5428 ? names64 : names32);
1d9f512f 5429
22cbf2e7 5430 /* We might have a suffix when disassembling with -Msuffix. */
1d9f512f
AM		 5431 if (*p == 'i')
5432 --p;
5433
cb712a9e
L		 5434 /* Remove "addr16/addr32" if we aren't in Intel mode. */
5435 if (!intel_syntax
5436 && (prefixes & PREFIX_ADDR)
5437 && olen >= (4 + 7)
5438 && *(p - 1) == ' '
0112cd26
NC		 5439 && CONST_STRNEQ (p - 7, "addr")
5440 && (CONST_STRNEQ (p - 3, "16")
5441 || CONST_STRNEQ (p - 3, "32")))
cb712a9e
L		 5442 p -= 7;
5443
ca164297
L		 5444 if (rm)
5445 {
5446 /* mwait %eax,%ecx */
1d9f512f 5447 strcpy (p, "mwait");
6128c599 5448 if (!intel_syntax)
cb712a9e 5449 strcpy (op1out, names[0]);
ca164297
L		 5450 }
5451 else
5452 {
5453 /* monitor %eax,%ecx,%edx" */
1d9f512f 5454 strcpy (p, "monitor");
6128c599
JB		 5455 if (!intel_syntax)
5456 {
cb712a9e
L		 5457 const char **op1_names;
5458 if (!(prefixes & PREFIX_ADDR))
5459 op1_names = (address_mode == mode_16bit
5460 ? names16 : names);
6128c599
JB		 5461 else
5462 {
cb712a9e
L		 5463 op1_names = (address_mode != mode_32bit
5464 ? names32 : names16);
6128c599
JB		 5465 used_prefixes |= PREFIX_ADDR;
5466 }
cb712a9e
L		 5467 strcpy (op1out, op1_names[0]);
5468 strcpy (op3out, names[2]);
6128c599
JB		 5469 }
5470 }
5471 if (!intel_syntax)
5472 {
cb712a9e 5473 strcpy (op2out, names[1]);
6128c599 5474 two_source_ops = 1;
ca164297
L		 5475 }
5476
5477 codep++;
5478 }
5479 else
30123838
JB		 5480 OP_M (0, sizeflag);
5481}
5482
5483static void
5484SVME_Fixup (int bytemode, int sizeflag)
5485{
5486 const char *alt;
5487 char *p;
5488
5489 switch (*codep)
5490 {
5491 case 0xd8:
5492 alt = "vmrun";
5493 break;
5494 case 0xd9:
5495 alt = "vmmcall";
5496 break;
5497 case 0xda:
5498 alt = "vmload";
5499 break;
5500 case 0xdb:
5501 alt = "vmsave";
5502 break;
5503 case 0xdc:
5504 alt = "stgi";
5505 break;
5506 case 0xdd:
5507 alt = "clgi";
5508 break;
5509 case 0xde:
5510 alt = "skinit";
5511 break;
5512 case 0xdf:
5513 alt = "invlpga";
5514 break;
5515 default:
5516 OP_M (bytemode, sizeflag);
5517 return;
5518 }
5519 /* Override "lidt". */
5520 p = obuf + strlen (obuf) - 4;
5521 /* We might have a suffix. */
5522 if (*p == 'i')
5523 --p;
5524 strcpy (p, alt);
5525 if (!(prefixes & PREFIX_ADDR))
5526 {
5527 ++codep;
5528 return;
5529 }
5530 used_prefixes |= PREFIX_ADDR;
5531 switch (*codep++)
5532 {
5533 case 0xdf:
5534 strcpy (op2out, names32[1]);
5535 two_source_ops = 1;
5536 /* Fall through. */
5537 case 0xd8:
5538 case 0xda:
5539 case 0xdb:
5540 *obufp++ = open_char;
cb712a9e 5541 if (address_mode == mode_64bit || (sizeflag & AFLAG))
30123838
JB		 5542 alt = names32[0];
5543 else
5544 alt = names16[0];
5545 strcpy (obufp, alt);
5546 obufp += strlen (alt);
5547 *obufp++ = close_char;
5548 *obufp = '\0';
5549 break;
5550 }
ca164297
L		 5551}
5552
4fd61dcb
JJ		 5553static void
5554INVLPG_Fixup (int bytemode, int sizeflag)
5555{
373ff435 5556 const char *alt;
4fd61dcb 5557
373ff435
JB		 5558 switch (*codep)
5559 {
5560 case 0xf8:
5561 alt = "swapgs";
5562 break;
5563 case 0xf9:
5564 alt = "rdtscp";
5565 break;
5566 default:
30123838 5567 OP_M (bytemode, sizeflag);
373ff435 5568 return;
4fd61dcb 5569 }
373ff435
JB		 5570 /* Override "invlpg". */
5571 strcpy (obuf + strlen (obuf) - 6, alt);
5572 codep++;
4fd61dcb
JJ		 5573}
5574
6608db57
KH		 5575static void
5576BadOp (void)
2da11e11 5577{
6608db57
KH		 5578 /* Throw away prefixes and 1st. opcode byte. */
5579 codep = insn_codep + 1;
2da11e11
AM		 5580 oappend ("(bad)");
5581}
4cc91dba
L		 5582
5583static void
5584SEG_Fixup (int extrachar, int sizeflag)
5585{
5586 if (mod == 3)
5587 {
5588 /* We need to add a proper suffix with
5589
5590 movw %ds,%ax
5591 movl %ds,%eax
5592 movq %ds,%rax
5593 movw %ax,%ds
5594 movl %eax,%ds
5595 movq %rax,%ds
5596 */
5597 const char *suffix;
5598
5599 if (prefixes & PREFIX_DATA)
5600 suffix = "w";
5601 else
5602 {
5603 USED_REX (REX_MODE64);
5604 if (rex & REX_MODE64)
5605 suffix = "q";
5606 else
5607 suffix = "l";
5608 }
5609 strcat (obuf, suffix);
5610 }
5611 else
5612 {
5613 /* We need to fix the suffix for
5614
5615 movw %ds,(%eax)
5616 movw %ds,(%rax)
5617 movw (%eax),%ds
5618 movw (%rax),%ds
5619
5620 Override "mov[l|q]". */
5621 char *p = obuf + strlen (obuf) - 1;
5622
5623 /* We might not have a suffix. */
5624 if (*p == 'v')
5625 ++p;
5626 *p = 'w';
5627 }
5628
5629 OP_E (extrachar, sizeflag);
5630}
90700ea2
L		 5631
5632static void
5633VMX_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
5634{
5635 if (mod == 3 && reg == 0 && rm >=1 && rm <= 4)
5636 {
5637 /* Override "sgdt". */
5638 char *p = obuf + strlen (obuf) - 4;
5639
22cbf2e7
L		 5640 /* We might have a suffix when disassembling with -Msuffix. */
5641 if (*p == 'g')
90700ea2
L		 5642 --p;
5643
5644 switch (rm)
5645 {
5646 case 1:
5647 strcpy (p, "vmcall");
5648 break;
5649 case 2:
5650 strcpy (p, "vmlaunch");
5651 break;
5652 case 3:
5653 strcpy (p, "vmresume");
5654 break;
5655 case 4:
5656 strcpy (p, "vmxoff");
5657 break;
5658 }
5659
5660 codep++;
5661 }
5662 else
5663 OP_E (0, sizeflag);
5664}
5665
5666static void
5667OP_VMX (int bytemode, int sizeflag)
5668{
5669 used_prefixes |= (prefixes & (PREFIX_DATA | PREFIX_REPZ));
5670 if (prefixes & PREFIX_DATA)
5671 strcpy (obuf, "vmclear");
5672 else if (prefixes & PREFIX_REPZ)
5673 strcpy (obuf, "vmxon");
5674 else
5675 strcpy (obuf, "vmptrld");
5676 OP_E (bytemode, sizeflag);
5677}
35c52694
L		 5678
5679static void
5680REP_Fixup (int bytemode, int sizeflag)
5681{
5682 /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
5683 lods and stos. */
5684 size_t ilen = 0;
5685
5686 if (prefixes & PREFIX_REPZ)
5687 switch (*insn_codep)
5688 {
5689 case 0x6e: /* outsb */
5690 case 0x6f: /* outsw/outsl */
5691 case 0xa4: /* movsb */
5692 case 0xa5: /* movsw/movsl/movsq */
5693 if (!intel_syntax)
5694 ilen = 5;
5695 else
5696 ilen = 4;
5697 break;
5698 case 0xaa: /* stosb */
5699 case 0xab: /* stosw/stosl/stosq */
5700 case 0xac: /* lodsb */
5701 case 0xad: /* lodsw/lodsl/lodsq */
5702 if (!intel_syntax && (sizeflag & SUFFIX_ALWAYS))
5703 ilen = 5;
5704 else
5705 ilen = 4;
5706 break;
5707 case 0x6c: /* insb */
5708 case 0x6d: /* insl/insw */
5709 if (!intel_syntax)
5710 ilen = 4;
5711 else
5712 ilen = 3;
5713 break;
5714 default:
5715 abort ();
5716 break;
5717 }
5718
5719 if (ilen != 0)
5720 {
5721 size_t olen;
5722 char *p;
5723
5724 olen = strlen (obuf);
5725 p = obuf + olen - ilen - 1 - 4;
5726 /* Handle "repz [addr16|addr32]". */
5727 if ((prefixes & PREFIX_ADDR))
5728 p -= 1 + 6;
5729
5730 memmove (p + 3, p + 4, olen - (p + 3 - obuf));
5731 }
5732
5733 switch (bytemode)
5734 {
5735 case al_reg:
5736 case eAX_reg:
5737 case indir_dx_reg:
5738 OP_IMREG (bytemode, sizeflag);
5739 break;
5740 case eDI_reg:
5741 OP_ESreg (bytemode, sizeflag);
5742 break;
5743 case eSI_reg:
5744 OP_DSreg (bytemode, sizeflag);
5745 break;
5746 default:
5747 abort ();
5748 break;
5749 }
5750}
GDB Binutils - Deliverables
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