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* compare_igen_models: Change license to GPL version 3.
[deliverable/binutils-gdb.git] / opcodes / i386-dis.c
CommitLineData
252b5132 1/* Print i386 instructions for GDB, the GNU debugger.
060d22b0 2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
9b201bb5 3 2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
252b5132 4
9b201bb5 5 This file is part of the GNU opcodes library.
20f0a1fc 6
9b201bb5 7 This library is free software; you can redistribute it and/or modify
20f0a1fc 8 it under the terms of the GNU General Public License as published by
9b201bb5
NC		 9 the Free Software Foundation; either version 3, or (at your option)
10 any later version.
20f0a1fc 11
9b201bb5
NC		 12 It is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
20f0a1fc
NC		 16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
9b201bb5
NC		 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
21
20f0a1fc
NC		 22
23/* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
24 July 1988
25 modified by John Hassey (hassey@dg-rtp.dg.com)
26 x86-64 support added by Jan Hubicka (jh@suse.cz)
27 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
28
29/* The main tables describing the instructions is essentially a copy
30 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
31 Programmers Manual. Usually, there is a capital letter, followed
32 by a small letter. The capital letter tell the addressing mode,
33 and the small letter tells about the operand size. Refer to
34 the Intel manual for details. */
252b5132
RH		 35
36#include "dis-asm.h"
37#include "sysdep.h"
38#include "opintl.h"
0b1cf022 39#include "opcode/i386.h"
252b5132
RH		 40
41#include <setjmp.h>
42
26ca5450
AJ		 43static int fetch_data (struct disassemble_info *, bfd_byte *);
44static void ckprefix (void);
45static const char *prefix_name (int, int);
46static int print_insn (bfd_vma, disassemble_info *);
47static void dofloat (int);
48static void OP_ST (int, int);
49static void OP_STi (int, int);
50static int putop (const char *, int);
51static void oappend (const char *);
52static void append_seg (void);
53static void OP_indirE (int, int);
54static void print_operand_value (char *, int, bfd_vma);
5d669648 55static void print_displacement (char *, bfd_vma);
26ca5450
AJ		 56static void OP_E (int, int);
57static void OP_G (int, int);
58static bfd_vma get64 (void);
59static bfd_signed_vma get32 (void);
60static bfd_signed_vma get32s (void);
61static int get16 (void);
62static void set_op (bfd_vma, int);
63static void OP_REG (int, int);
64static void OP_IMREG (int, int);
65static void OP_I (int, int);
66static void OP_I64 (int, int);
67static void OP_sI (int, int);
68static void OP_J (int, int);
69static void OP_SEG (int, int);
70static void OP_DIR (int, int);
71static void OP_OFF (int, int);
72static void OP_OFF64 (int, int);
73static void ptr_reg (int, int);
74static void OP_ESreg (int, int);
75static void OP_DSreg (int, int);
76static void OP_C (int, int);
77static void OP_D (int, int);
78static void OP_T (int, int);
6f74c397 79static void OP_R (int, int);
26ca5450
AJ		 80static void OP_MMX (int, int);
81static void OP_XMM (int, int);
82static void OP_EM (int, int);
83static void OP_EX (int, int);
4d9567e0
MM		 84static void OP_EMC (int,int);
85static void OP_MXC (int,int);
26ca5450
AJ		 86static void OP_MS (int, int);
87static void OP_XS (int, int);
cc0ec051 88static void OP_M (int, int);
90700ea2 89static void OP_VMX (int, int);
cc0ec051
AM		 90static void OP_0fae (int, int);
91static void OP_0f07 (int, int);
46e883c5
L		 92static void NOP_Fixup1 (int, int);
93static void NOP_Fixup2 (int, int);
26ca5450
AJ		 94static void OP_3DNowSuffix (int, int);
95static void OP_SIMD_Suffix (int, int);
96static void SIMD_Fixup (int, int);
97static void PNI_Fixup (int, int);
30123838 98static void SVME_Fixup (int, int);
4fd61dcb 99static void INVLPG_Fixup (int, int);
26ca5450 100static void BadOp (void);
90700ea2 101static void VMX_Fixup (int, int);
35c52694 102static void REP_Fixup (int, int);
f5804c90 103static void CMPXCHG8B_Fixup (int, int);
42903f7f 104static void XMM_Fixup (int, int);
381d071f 105static void CRC32_Fixup (int, int);
252b5132 106
6608db57 107struct dis_private {
252b5132
RH		 108 /* Points to first byte not fetched. */
109 bfd_byte *max_fetched;
0b1cf022 110 bfd_byte the_buffer[MAX_MNEM_SIZE];
252b5132 111 bfd_vma insn_start;
e396998b 112 int orig_sizeflag;
252b5132
RH		 113 jmp_buf bailout;
114};
115
cb712a9e
L		 116enum address_mode
117{
118 mode_16bit,
119 mode_32bit,
120 mode_64bit
121};
122
123enum address_mode address_mode;
52b15da3 124
5076851f
ILT		 125/* Flags for the prefixes for the current instruction. See below. */
126static int prefixes;
127
52b15da3
JH		 128/* REX prefix the current instruction. See below. */
129static int rex;
130/* Bits of REX we've already used. */
131static int rex_used;
52b15da3
JH		 132/* Mark parts used in the REX prefix. When we are testing for
133 empty prefix (for 8bit register REX extension), just mask it
134 out. Otherwise test for REX bit is excuse for existence of REX
135 only in case value is nonzero. */
136#define USED_REX(value) \
137 { \
138 if (value) \
161a04f6
L		 139 { \
140 if ((rex & value)) \
141 rex_used |= (value) | REX_OPCODE; \
142 } \
52b15da3 143 else \
161a04f6 144 rex_used |= REX_OPCODE; \
52b15da3
JH		 145 }
146
7d421014
ILT		 147/* Flags for prefixes which we somehow handled when printing the
148 current instruction. */
149static int used_prefixes;
150
5076851f
ILT		 151/* Flags stored in PREFIXES. */
152#define PREFIX_REPZ 1
153#define PREFIX_REPNZ 2
154#define PREFIX_LOCK 4
155#define PREFIX_CS 8
156#define PREFIX_SS 0x10
157#define PREFIX_DS 0x20
158#define PREFIX_ES 0x40
159#define PREFIX_FS 0x80
160#define PREFIX_GS 0x100
161#define PREFIX_DATA 0x200
162#define PREFIX_ADDR 0x400
163#define PREFIX_FWAIT 0x800
164
252b5132
RH		 165/* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
166 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
167 on error. */
168#define FETCH_DATA(info, addr) \
6608db57 169 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
252b5132
RH		 170 ? 1 : fetch_data ((info), (addr)))
171
172static int
26ca5450 173fetch_data (struct disassemble_info *info, bfd_byte *addr)
252b5132
RH		 174{
175 int status;
6608db57 176 struct dis_private *priv = (struct dis_private *) info->private_data;
252b5132
RH		 177 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
178
0b1cf022 179 if (addr <= priv->the_buffer + MAX_MNEM_SIZE)
272c9217
JB		 180 status = (*info->read_memory_func) (start,
181 priv->max_fetched,
182 addr - priv->max_fetched,
183 info);
184 else
185 status = -1;
252b5132
RH		 186 if (status != 0)
187 {
7d421014 188 /* If we did manage to read at least one byte, then
db6eb5be
AM		 189 print_insn_i386 will do something sensible. Otherwise, print
190 an error. We do that here because this is where we know
191 STATUS. */
7d421014 192 if (priv->max_fetched == priv->the_buffer)
5076851f 193 (*info->memory_error_func) (status, start, info);
252b5132
RH		 194 longjmp (priv->bailout, 1);
195 }
196 else
197 priv->max_fetched = addr;
198 return 1;
199}
200
ce518a5f
L		 201#define XX { NULL, 0 }
202
203#define Eb { OP_E, b_mode }
204#define Ev { OP_E, v_mode }
205#define Ed { OP_E, d_mode }
206#define Edq { OP_E, dq_mode }
207#define Edqw { OP_E, dqw_mode }
42903f7f
L		 208#define Edqb { OP_E, dqb_mode }
209#define Edqd { OP_E, dqd_mode }
09335d05 210#define Eq { OP_E, q_mode }
ce518a5f
L		 211#define indirEv { OP_indirE, stack_v_mode }
212#define indirEp { OP_indirE, f_mode }
213#define stackEv { OP_E, stack_v_mode }
214#define Em { OP_E, m_mode }
215#define Ew { OP_E, w_mode }
216#define M { OP_M, 0 } /* lea, lgdt, etc. */
217#define Ma { OP_M, v_mode }
218#define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */
219#define Mq { OP_M, q_mode }
220#define Gb { OP_G, b_mode }
221#define Gv { OP_G, v_mode }
222#define Gd { OP_G, d_mode }
223#define Gdq { OP_G, dq_mode }
224#define Gm { OP_G, m_mode }
225#define Gw { OP_G, w_mode }
6f74c397
L		 226#define Rd { OP_R, d_mode }
227#define Rm { OP_R, m_mode }
ce518a5f
L		 228#define Ib { OP_I, b_mode }
229#define sIb { OP_sI, b_mode } /* sign extened byte */
230#define Iv { OP_I, v_mode }
231#define Iq { OP_I, q_mode }
232#define Iv64 { OP_I64, v_mode }
233#define Iw { OP_I, w_mode }
234#define I1 { OP_I, const_1_mode }
235#define Jb { OP_J, b_mode }
236#define Jv { OP_J, v_mode }
237#define Cm { OP_C, m_mode }
238#define Dm { OP_D, m_mode }
239#define Td { OP_T, d_mode }
240
241#define RMeAX { OP_REG, eAX_reg }
242#define RMeBX { OP_REG, eBX_reg }
243#define RMeCX { OP_REG, eCX_reg }
244#define RMeDX { OP_REG, eDX_reg }
245#define RMeSP { OP_REG, eSP_reg }
246#define RMeBP { OP_REG, eBP_reg }
247#define RMeSI { OP_REG, eSI_reg }
248#define RMeDI { OP_REG, eDI_reg }
249#define RMrAX { OP_REG, rAX_reg }
250#define RMrBX { OP_REG, rBX_reg }
251#define RMrCX { OP_REG, rCX_reg }
252#define RMrDX { OP_REG, rDX_reg }
253#define RMrSP { OP_REG, rSP_reg }
254#define RMrBP { OP_REG, rBP_reg }
255#define RMrSI { OP_REG, rSI_reg }
256#define RMrDI { OP_REG, rDI_reg }
257#define RMAL { OP_REG, al_reg }
258#define RMAL { OP_REG, al_reg }
259#define RMCL { OP_REG, cl_reg }
260#define RMDL { OP_REG, dl_reg }
261#define RMBL { OP_REG, bl_reg }
262#define RMAH { OP_REG, ah_reg }
263#define RMCH { OP_REG, ch_reg }
264#define RMDH { OP_REG, dh_reg }
265#define RMBH { OP_REG, bh_reg }
266#define RMAX { OP_REG, ax_reg }
267#define RMDX { OP_REG, dx_reg }
268
269#define eAX { OP_IMREG, eAX_reg }
270#define eBX { OP_IMREG, eBX_reg }
271#define eCX { OP_IMREG, eCX_reg }
272#define eDX { OP_IMREG, eDX_reg }
273#define eSP { OP_IMREG, eSP_reg }
274#define eBP { OP_IMREG, eBP_reg }
275#define eSI { OP_IMREG, eSI_reg }
276#define eDI { OP_IMREG, eDI_reg }
277#define AL { OP_IMREG, al_reg }
278#define CL { OP_IMREG, cl_reg }
279#define DL { OP_IMREG, dl_reg }
280#define BL { OP_IMREG, bl_reg }
281#define AH { OP_IMREG, ah_reg }
282#define CH { OP_IMREG, ch_reg }
283#define DH { OP_IMREG, dh_reg }
284#define BH { OP_IMREG, bh_reg }
285#define AX { OP_IMREG, ax_reg }
286#define DX { OP_IMREG, dx_reg }
287#define zAX { OP_IMREG, z_mode_ax_reg }
288#define indirDX { OP_IMREG, indir_dx_reg }
289
290#define Sw { OP_SEG, w_mode }
291#define Sv { OP_SEG, v_mode }
292#define Ap { OP_DIR, 0 }
293#define Ob { OP_OFF64, b_mode }
294#define Ov { OP_OFF64, v_mode }
295#define Xb { OP_DSreg, eSI_reg }
296#define Xv { OP_DSreg, eSI_reg }
297#define Xz { OP_DSreg, eSI_reg }
298#define Yb { OP_ESreg, eDI_reg }
299#define Yv { OP_ESreg, eDI_reg }
300#define DSBX { OP_DSreg, eBX_reg }
301
302#define es { OP_REG, es_reg }
303#define ss { OP_REG, ss_reg }
304#define cs { OP_REG, cs_reg }
305#define ds { OP_REG, ds_reg }
306#define fs { OP_REG, fs_reg }
307#define gs { OP_REG, gs_reg }
308
309#define MX { OP_MMX, 0 }
310#define XM { OP_XMM, 0 }
311#define EM { OP_EM, v_mode }
09a2c6cf 312#define EMd { OP_EM, d_mode }
14051056 313#define EMx { OP_EM, x_mode }
8976381e 314#define EXw { OP_EX, w_mode }
09a2c6cf
L		 315#define EXd { OP_EX, d_mode }
316#define EXq { OP_EX, q_mode }
317#define EXx { OP_EX, x_mode }
ce518a5f
L		 318#define MS { OP_MS, v_mode }
319#define XS { OP_XS, v_mode }
09335d05 320#define EMCq { OP_EMC, q_mode }
ce518a5f
L		 321#define MXC { OP_MXC, 0 }
322#define VM { OP_VMX, q_mode }
323#define OPSUF { OP_3DNowSuffix, 0 }
324#define OPSIMD { OP_SIMD_Suffix, 0 }
42903f7f 325#define XMM0 { XMM_Fixup, 0 }
252b5132 326
35c52694 327/* Used handle "rep" prefix for string instructions. */
ce518a5f
L		 328#define Xbr { REP_Fixup, eSI_reg }
329#define Xvr { REP_Fixup, eSI_reg }
330#define Ybr { REP_Fixup, eDI_reg }
331#define Yvr { REP_Fixup, eDI_reg }
332#define Yzr { REP_Fixup, eDI_reg }
333#define indirDXr { REP_Fixup, indir_dx_reg }
334#define ALr { REP_Fixup, al_reg }
335#define eAXr { REP_Fixup, eAX_reg }
336
337#define cond_jump_flag { NULL, cond_jump_mode }
338#define loop_jcxz_flag { NULL, loop_jcxz_mode }
3ffd33cf 339
252b5132 340/* bits in sizeflag */
252b5132 341#define SUFFIX_ALWAYS 4
252b5132
RH		 342#define AFLAG 2
343#define DFLAG 1
344
52b15da3
JH		 345#define b_mode 1 /* byte operand */
346#define v_mode 2 /* operand size depends on prefixes */
347#define w_mode 3 /* word operand */
348#define d_mode 4 /* double word operand */
349#define q_mode 5 /* quad word operand */
9306ca4a
JB		 350#define t_mode 6 /* ten-byte operand */
351#define x_mode 7 /* 16-byte XMM operand */
352#define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
353#define cond_jump_mode 9
354#define loop_jcxz_mode 10
355#define dq_mode 11 /* operand size depends on REX prefixes. */
356#define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
357#define f_mode 13 /* 4- or 6-byte pointer operand */
358#define const_1_mode 14
1a114b12 359#define stack_v_mode 15 /* v_mode for stack-related opcodes. */
52fd6d94 360#define z_mode 16 /* non-quad operand size depends on prefixes */
fb9c77c7 361#define o_mode 17 /* 16-byte operand */
42903f7f
L		 362#define dqb_mode 18 /* registers like dq_mode, memory like b_mode. */
363#define dqd_mode 19 /* registers like dq_mode, memory like d_mode. */
252b5132
RH		 364
365#define es_reg 100
366#define cs_reg 101
367#define ss_reg 102
368#define ds_reg 103
369#define fs_reg 104
370#define gs_reg 105
252b5132 371
c608c12e
AM		 372#define eAX_reg 108
373#define eCX_reg 109
374#define eDX_reg 110
375#define eBX_reg 111
376#define eSP_reg 112
377#define eBP_reg 113
378#define eSI_reg 114
379#define eDI_reg 115
252b5132
RH		 380
381#define al_reg 116
382#define cl_reg 117
383#define dl_reg 118
384#define bl_reg 119
385#define ah_reg 120
386#define ch_reg 121
387#define dh_reg 122
388#define bh_reg 123
389
390#define ax_reg 124
391#define cx_reg 125
392#define dx_reg 126
393#define bx_reg 127
394#define sp_reg 128
395#define bp_reg 129
396#define si_reg 130
397#define di_reg 131
398
52b15da3
JH		 399#define rAX_reg 132
400#define rCX_reg 133
401#define rDX_reg 134
402#define rBX_reg 135
403#define rSP_reg 136
404#define rBP_reg 137
405#define rSI_reg 138
406#define rDI_reg 139
407
52fd6d94 408#define z_mode_ax_reg 149
252b5132
RH		 409#define indir_dx_reg 150
410
6439fc28
AM		 411#define FLOATCODE 1
412#define USE_GROUPS 2
413#define USE_PREFIX_USER_TABLE 3
414#define X86_64_SPECIAL 4
331d2d0d 415#define IS_3BYTE_OPCODE 5
6439fc28 416
4efba78c
L		 417#define FLOAT NULL, { { NULL, FLOATCODE } }
418
7967e09e
L		 419#define GRP1a NULL, { { NULL, USE_GROUPS }, { NULL, 0 } }
420#define GRP1b NULL, { { NULL, USE_GROUPS }, { NULL, 1 } }
421#define GRP1S NULL, { { NULL, USE_GROUPS }, { NULL, 2 } }
422#define GRP1Ss NULL, { { NULL, USE_GROUPS }, { NULL, 3 } }
423#define GRP2b NULL, { { NULL, USE_GROUPS }, { NULL, 4 } }
424#define GRP2S NULL, { { NULL, USE_GROUPS }, { NULL, 5 } }
425#define GRP2b_one NULL, { { NULL, USE_GROUPS }, { NULL, 6 } }
426#define GRP2S_one NULL, { { NULL, USE_GROUPS }, { NULL, 7 } }
427#define GRP2b_cl NULL, { { NULL, USE_GROUPS }, { NULL, 8 } }
428#define GRP2S_cl NULL, { { NULL, USE_GROUPS }, { NULL, 9 } }
429#define GRP3b NULL, { { NULL, USE_GROUPS }, { NULL, 10 } }
430#define GRP3S NULL, { { NULL, USE_GROUPS }, { NULL, 11 } }
431#define GRP4 NULL, { { NULL, USE_GROUPS }, { NULL, 12 } }
432#define GRP5 NULL, { { NULL, USE_GROUPS }, { NULL, 13 } }
433#define GRP6 NULL, { { NULL, USE_GROUPS }, { NULL, 14 } }
434#define GRP7 NULL, { { NULL, USE_GROUPS }, { NULL, 15 } }
435#define GRP8 NULL, { { NULL, USE_GROUPS }, { NULL, 16 } }
436#define GRP9 NULL, { { NULL, USE_GROUPS }, { NULL, 17 } }
437#define GRP11_C6 NULL, { { NULL, USE_GROUPS }, { NULL, 18 } }
438#define GRP11_C7 NULL, { { NULL, USE_GROUPS }, { NULL, 19 } }
439#define GRP12 NULL, { { NULL, USE_GROUPS }, { NULL, 20 } }
440#define GRP13 NULL, { { NULL, USE_GROUPS }, { NULL, 21 } }
441#define GRP14 NULL, { { NULL, USE_GROUPS }, { NULL, 22 } }
442#define GRP15 NULL, { { NULL, USE_GROUPS }, { NULL, 23 } }
443#define GRP16 NULL, { { NULL, USE_GROUPS }, { NULL, 24 } }
444#define GRPAMD NULL, { { NULL, USE_GROUPS }, { NULL, 25 } }
445#define GRPPADLCK1 NULL, { { NULL, USE_GROUPS }, { NULL, 26 } }
446#define GRPPADLCK2 NULL, { { NULL, USE_GROUPS }, { NULL, 27 } }
4efba78c
L		 447
448#define PREGRP0 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 0 } }
449#define PREGRP1 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 1 } }
450#define PREGRP2 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 2 } }
451#define PREGRP3 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 3 } }
452#define PREGRP4 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 4 } }
453#define PREGRP5 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 5 } }
454#define PREGRP6 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 6 } }
455#define PREGRP7 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 7 } }
456#define PREGRP8 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 8 } }
457#define PREGRP9 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 9 } }
458#define PREGRP10 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 10 } }
459#define PREGRP11 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 11 } }
460#define PREGRP12 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 12 } }
461#define PREGRP13 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 13 } }
462#define PREGRP14 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 14 } }
463#define PREGRP15 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 15 } }
464#define PREGRP16 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 16 } }
465#define PREGRP17 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 17 } }
466#define PREGRP18 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 18 } }
467#define PREGRP19 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 19 } }
468#define PREGRP20 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 20 } }
469#define PREGRP21 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 21 } }
470#define PREGRP22 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 22 } }
471#define PREGRP23 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 23 } }
472#define PREGRP24 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 24 } }
473#define PREGRP25 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 25 } }
474#define PREGRP26 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 26 } }
475#define PREGRP27 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 27 } }
476#define PREGRP28 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 28 } }
477#define PREGRP29 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 29 } }
478#define PREGRP30 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 30 } }
479#define PREGRP31 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 31 } }
480#define PREGRP32 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 32 } }
481#define PREGRP33 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 33 } }
482#define PREGRP34 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 34 } }
483#define PREGRP35 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 35 } }
484#define PREGRP36 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 36 } }
485#define PREGRP37 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 37 } }
8b38ad71 486#define PREGRP38 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 38 } }
42903f7f
L		 487#define PREGRP39 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 39 } }
488#define PREGRP40 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 40 } }
489#define PREGRP41 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 41 } }
490#define PREGRP42 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 42 } }
491#define PREGRP43 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 43 } }
492#define PREGRP44 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 44 } }
493#define PREGRP45 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 45 } }
494#define PREGRP46 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 46 } }
495#define PREGRP47 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 47 } }
496#define PREGRP48 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 48 } }
497#define PREGRP49 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 49 } }
498#define PREGRP50 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 50 } }
499#define PREGRP51 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 51 } }
500#define PREGRP52 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 52 } }
501#define PREGRP53 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 53 } }
502#define PREGRP54 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 54 } }
503#define PREGRP55 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 55 } }
504#define PREGRP56 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 56 } }
505#define PREGRP57 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 57 } }
506#define PREGRP58 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 58 } }
507#define PREGRP59 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 59 } }
508#define PREGRP60 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 60 } }
509#define PREGRP61 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 61 } }
510#define PREGRP62 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 62 } }
511#define PREGRP63 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 63 } }
512#define PREGRP64 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 64 } }
513#define PREGRP65 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 65 } }
514#define PREGRP66 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 66 } }
515#define PREGRP67 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 67 } }
516#define PREGRP68 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 68 } }
517#define PREGRP69 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 69 } }
518#define PREGRP70 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 70 } }
519#define PREGRP71 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 71 } }
520#define PREGRP72 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 72 } }
521#define PREGRP73 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 73 } }
522#define PREGRP74 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 74 } }
523#define PREGRP75 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 75 } }
524#define PREGRP76 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 76 } }
525#define PREGRP77 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 77 } }
526#define PREGRP78 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 78 } }
527#define PREGRP79 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 79 } }
528#define PREGRP80 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 80 } }
529#define PREGRP81 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 81 } }
530#define PREGRP82 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 82 } }
531#define PREGRP83 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 83 } }
532#define PREGRP84 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 84 } }
533#define PREGRP85 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 85 } }
381d071f
L		 534#define PREGRP86 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 86 } }
535#define PREGRP87 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 87 } }
536#define PREGRP88 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 88 } }
537#define PREGRP89 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 89 } }
538#define PREGRP90 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 90 } }
539#define PREGRP91 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 91 } }
540#define PREGRP92 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 92 } }
09a2c6cf
L		 541#define PREGRP93 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 93 } }
542#define PREGRP94 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 94 } }
543#define PREGRP95 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 95 } }
544#define PREGRP96 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 96 } }
545#define PREGRP97 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 97 } }
4efba78c
L		 546
547
548#define X86_64_0 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 0 } }
549#define X86_64_1 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 1 } }
550#define X86_64_2 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 2 } }
551#define X86_64_3 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 3 } }
552
553#define THREE_BYTE_0 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 0 } }
554#define THREE_BYTE_1 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 1 } }
331d2d0d 555
26ca5450 556typedef void (*op_rtn) (int bytemode, int sizeflag);
252b5132
RH		 557
558struct dis386 {
2da11e11 559 const char *name;
ce518a5f
L		 560 struct
561 {
562 op_rtn rtn;
563 int bytemode;
564 } op[MAX_OPERANDS];
252b5132
RH		 565};
566
567/* Upper case letters in the instruction names here are macros.
568 'A' => print 'b' if no register operands or suffix_always is true
569 'B' => print 'b' if suffix_always is true
9306ca4a
JB		 570 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
571 . size prefix
ed7841b3
JB		 572 'D' => print 'w' if no register operands or 'w', 'l' or 'q', if
573 . suffix_always is true
252b5132 574 'E' => print 'e' if 32-bit form of jcxz
3ffd33cf 575 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
52fd6d94 576 'G' => print 'w' or 'l' depending on operand size prefix (i/o insns)
5dd0794d 577 'H' => print ",pt" or ",pn" branch hint
9306ca4a
JB		 578 'I' => honor following macro letter even in Intel mode (implemented only
579 . for some of the macro letters)
580 'J' => print 'l'
42903f7f 581 'K' => print 'd' or 'q' if rex prefix is present.
252b5132
RH		 582 'L' => print 'l' if suffix_always is true
583 'N' => print 'n' if instruction has no wait "prefix"
a35ca55a 584 'O' => print 'd' or 'o' (or 'q' in Intel mode)
52b15da3 585 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
e396998b
AM		 586 . or suffix_always is true. print 'q' if rex prefix is present.
587 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
588 . is true
a35ca55a 589 'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
52b15da3 590 'S' => print 'w', 'l' or 'q' if suffix_always is true
6439fc28
AM		 591 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
592 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
1a114b12 593 'V' => print 'q' in 64bit mode and behave as 'S' otherwise
a35ca55a 594 'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
9306ca4a 595 'X' => print 's', 'd' depending on data16 prefix (for XMM)
76f227a5 596 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
6dd5059a 597 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
52b15da3 598
6439fc28
AM		 599 Many of the above letters print nothing in Intel mode. See "putop"
600 for the details.
52b15da3 601
6439fc28
AM		 602 Braces '{' and '}', and vertical bars '|', indicate alternative
603 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
604 modes. In cases where there are only two alternatives, the X86_64
605 instruction is reserved, and "(bad)" is printed.
606*/
252b5132 607
6439fc28 608static const struct dis386 dis386[] = {
252b5132 609 /* 00 */
ce518a5f
L		 610 { "addB", { Eb, Gb } },
611 { "addS", { Ev, Gv } },
612 { "addB", { Gb, Eb } },
613 { "addS", { Gv, Ev } },
614 { "addB", { AL, Ib } },
615 { "addS", { eAX, Iv } },
616 { "push{T|}", { es } },
617 { "pop{T|}", { es } },
252b5132 618 /* 08 */
ce518a5f
L		 619 { "orB", { Eb, Gb } },
620 { "orS", { Ev, Gv } },
621 { "orB", { Gb, Eb } },
622 { "orS", { Gv, Ev } },
623 { "orB", { AL, Ib } },
624 { "orS", { eAX, Iv } },
625 { "push{T|}", { cs } },
626 { "(bad)", { XX } }, /* 0x0f extended opcode escape */
252b5132 627 /* 10 */
ce518a5f
L		 628 { "adcB", { Eb, Gb } },
629 { "adcS", { Ev, Gv } },
630 { "adcB", { Gb, Eb } },
631 { "adcS", { Gv, Ev } },
632 { "adcB", { AL, Ib } },
633 { "adcS", { eAX, Iv } },
634 { "push{T|}", { ss } },
635 { "pop{T|}", { ss } },
252b5132 636 /* 18 */
ce518a5f
L		 637 { "sbbB", { Eb, Gb } },
638 { "sbbS", { Ev, Gv } },
639 { "sbbB", { Gb, Eb } },
640 { "sbbS", { Gv, Ev } },
641 { "sbbB", { AL, Ib } },
642 { "sbbS", { eAX, Iv } },
643 { "push{T|}", { ds } },
644 { "pop{T|}", { ds } },
252b5132 645 /* 20 */
ce518a5f
L		 646 { "andB", { Eb, Gb } },
647 { "andS", { Ev, Gv } },
648 { "andB", { Gb, Eb } },
649 { "andS", { Gv, Ev } },
650 { "andB", { AL, Ib } },
651 { "andS", { eAX, Iv } },
652 { "(bad)", { XX } }, /* SEG ES prefix */
653 { "daa{|}", { XX } },
252b5132 654 /* 28 */
ce518a5f
L		 655 { "subB", { Eb, Gb } },
656 { "subS", { Ev, Gv } },
657 { "subB", { Gb, Eb } },
658 { "subS", { Gv, Ev } },
659 { "subB", { AL, Ib } },
660 { "subS", { eAX, Iv } },
661 { "(bad)", { XX } }, /* SEG CS prefix */
662 { "das{|}", { XX } },
252b5132 663 /* 30 */
ce518a5f
L		 664 { "xorB", { Eb, Gb } },
665 { "xorS", { Ev, Gv } },
666 { "xorB", { Gb, Eb } },
667 { "xorS", { Gv, Ev } },
668 { "xorB", { AL, Ib } },
669 { "xorS", { eAX, Iv } },
670 { "(bad)", { XX } }, /* SEG SS prefix */
671 { "aaa{|}", { XX } },
252b5132 672 /* 38 */
ce518a5f
L		 673 { "cmpB", { Eb, Gb } },
674 { "cmpS", { Ev, Gv } },
675 { "cmpB", { Gb, Eb } },
676 { "cmpS", { Gv, Ev } },
677 { "cmpB", { AL, Ib } },
678 { "cmpS", { eAX, Iv } },
679 { "(bad)", { XX } }, /* SEG DS prefix */
680 { "aas{|}", { XX } },
252b5132 681 /* 40 */
ce518a5f
L		 682 { "inc{S|}", { RMeAX } },
683 { "inc{S|}", { RMeCX } },
684 { "inc{S|}", { RMeDX } },
685 { "inc{S|}", { RMeBX } },
686 { "inc{S|}", { RMeSP } },
687 { "inc{S|}", { RMeBP } },
688 { "inc{S|}", { RMeSI } },
689 { "inc{S|}", { RMeDI } },
252b5132 690 /* 48 */
ce518a5f
L		 691 { "dec{S|}", { RMeAX } },
692 { "dec{S|}", { RMeCX } },
693 { "dec{S|}", { RMeDX } },
694 { "dec{S|}", { RMeBX } },
695 { "dec{S|}", { RMeSP } },
696 { "dec{S|}", { RMeBP } },
697 { "dec{S|}", { RMeSI } },
698 { "dec{S|}", { RMeDI } },
252b5132 699 /* 50 */
ce518a5f
L		 700 { "pushV", { RMrAX } },
701 { "pushV", { RMrCX } },
702 { "pushV", { RMrDX } },
703 { "pushV", { RMrBX } },
704 { "pushV", { RMrSP } },
705 { "pushV", { RMrBP } },
706 { "pushV", { RMrSI } },
707 { "pushV", { RMrDI } },
252b5132 708 /* 58 */
ce518a5f
L		 709 { "popV", { RMrAX } },
710 { "popV", { RMrCX } },
711 { "popV", { RMrDX } },
712 { "popV", { RMrBX } },
713 { "popV", { RMrSP } },
714 { "popV", { RMrBP } },
715 { "popV", { RMrSI } },
716 { "popV", { RMrDI } },
252b5132 717 /* 60 */
6439fc28 718 { X86_64_0 },
5f754f58
L		 719 { X86_64_1 },
720 { X86_64_2 },
721 { X86_64_3 },
ce518a5f
L		 722 { "(bad)", { XX } }, /* seg fs */
723 { "(bad)", { XX } }, /* seg gs */
724 { "(bad)", { XX } }, /* op size prefix */
725 { "(bad)", { XX } }, /* adr size prefix */
252b5132 726 /* 68 */
ce518a5f
L		 727 { "pushT", { Iq } },
728 { "imulS", { Gv, Ev, Iv } },
729 { "pushT", { sIb } },
730 { "imulS", { Gv, Ev, sIb } },
731 { "ins{b||b|}", { Ybr, indirDX } },
732 { "ins{R||G|}", { Yzr, indirDX } },
733 { "outs{b||b|}", { indirDXr, Xb } },
734 { "outs{R||G|}", { indirDXr, Xz } },
252b5132 735 /* 70 */
ce518a5f
L		 736 { "joH", { Jb, XX, cond_jump_flag } },
737 { "jnoH", { Jb, XX, cond_jump_flag } },
738 { "jbH", { Jb, XX, cond_jump_flag } },
739 { "jaeH", { Jb, XX, cond_jump_flag } },
740 { "jeH", { Jb, XX, cond_jump_flag } },
741 { "jneH", { Jb, XX, cond_jump_flag } },
742 { "jbeH", { Jb, XX, cond_jump_flag } },
743 { "jaH", { Jb, XX, cond_jump_flag } },
252b5132 744 /* 78 */
ce518a5f
L		 745 { "jsH", { Jb, XX, cond_jump_flag } },
746 { "jnsH", { Jb, XX, cond_jump_flag } },
747 { "jpH", { Jb, XX, cond_jump_flag } },
748 { "jnpH", { Jb, XX, cond_jump_flag } },
749 { "jlH", { Jb, XX, cond_jump_flag } },
750 { "jgeH", { Jb, XX, cond_jump_flag } },
751 { "jleH", { Jb, XX, cond_jump_flag } },
752 { "jgH", { Jb, XX, cond_jump_flag } },
252b5132
RH		 753 /* 80 */
754 { GRP1b },
755 { GRP1S },
ce518a5f 756 { "(bad)", { XX } },
252b5132 757 { GRP1Ss },
ce518a5f
L		 758 { "testB", { Eb, Gb } },
759 { "testS", { Ev, Gv } },
760 { "xchgB", { Eb, Gb } },
761 { "xchgS", { Ev, Gv } },
252b5132 762 /* 88 */
ce518a5f
L		 763 { "movB", { Eb, Gb } },
764 { "movS", { Ev, Gv } },
765 { "movB", { Gb, Eb } },
766 { "movS", { Gv, Ev } },
767 { "movD", { Sv, Sw } },
768 { "leaS", { Gv, M } },
769 { "movD", { Sw, Sv } },
7967e09e 770 { GRP1a },
252b5132 771 /* 90 */
8b38ad71 772 { PREGRP38 },
ce518a5f
L		 773 { "xchgS", { RMeCX, eAX } },
774 { "xchgS", { RMeDX, eAX } },
775 { "xchgS", { RMeBX, eAX } },
776 { "xchgS", { RMeSP, eAX } },
777 { "xchgS", { RMeBP, eAX } },
778 { "xchgS", { RMeSI, eAX } },
779 { "xchgS", { RMeDI, eAX } },
252b5132 780 /* 98 */
ce518a5f
L		 781 { "cW{t||t|}R", { XX } },
782 { "cR{t||t|}O", { XX } },
783 { "Jcall{T|}", { Ap } },
784 { "(bad)", { XX } }, /* fwait */
785 { "pushfT", { XX } },
786 { "popfT", { XX } },
787 { "sahf{|}", { XX } },
788 { "lahf{|}", { XX } },
252b5132 789 /* a0 */
ce518a5f
L		 790 { "movB", { AL, Ob } },
791 { "movS", { eAX, Ov } },
792 { "movB", { Ob, AL } },
793 { "movS", { Ov, eAX } },
794 { "movs{b||b|}", { Ybr, Xb } },
795 { "movs{R||R|}", { Yvr, Xv } },
796 { "cmps{b||b|}", { Xb, Yb } },
797 { "cmps{R||R|}", { Xv, Yv } },
252b5132 798 /* a8 */
ce518a5f
L		 799 { "testB", { AL, Ib } },
800 { "testS", { eAX, Iv } },
801 { "stosB", { Ybr, AL } },
802 { "stosS", { Yvr, eAX } },
803 { "lodsB", { ALr, Xb } },
804 { "lodsS", { eAXr, Xv } },
805 { "scasB", { AL, Yb } },
806 { "scasS", { eAX, Yv } },
252b5132 807 /* b0 */
ce518a5f
L		 808 { "movB", { RMAL, Ib } },
809 { "movB", { RMCL, Ib } },
810 { "movB", { RMDL, Ib } },
811 { "movB", { RMBL, Ib } },
812 { "movB", { RMAH, Ib } },
813 { "movB", { RMCH, Ib } },
814 { "movB", { RMDH, Ib } },
815 { "movB", { RMBH, Ib } },
252b5132 816 /* b8 */
ce518a5f
L		 817 { "movS", { RMeAX, Iv64 } },
818 { "movS", { RMeCX, Iv64 } },
819 { "movS", { RMeDX, Iv64 } },
820 { "movS", { RMeBX, Iv64 } },
821 { "movS", { RMeSP, Iv64 } },
822 { "movS", { RMeBP, Iv64 } },
823 { "movS", { RMeSI, Iv64 } },
824 { "movS", { RMeDI, Iv64 } },
252b5132
RH		 825 /* c0 */
826 { GRP2b },
827 { GRP2S },
ce518a5f
L		 828 { "retT", { Iw } },
829 { "retT", { XX } },
830 { "les{S|}", { Gv, Mp } },
831 { "ldsS", { Gv, Mp } },
a6bd098c
L		 832 { GRP11_C6 },
833 { GRP11_C7 },
252b5132 834 /* c8 */
ce518a5f
L		 835 { "enterT", { Iw, Ib } },
836 { "leaveT", { XX } },
837 { "lretP", { Iw } },
838 { "lretP", { XX } },
839 { "int3", { XX } },
840 { "int", { Ib } },
841 { "into{|}", { XX } },
842 { "iretP", { XX } },
252b5132
RH		 843 /* d0 */
844 { GRP2b_one },
845 { GRP2S_one },
846 { GRP2b_cl },
847 { GRP2S_cl },
ce518a5f
L		 848 { "aam{|}", { sIb } },
849 { "aad{|}", { sIb } },
850 { "(bad)", { XX } },
851 { "xlat", { DSBX } },
252b5132
RH		 852 /* d8 */
853 { FLOAT },
854 { FLOAT },
855 { FLOAT },
856 { FLOAT },
857 { FLOAT },
858 { FLOAT },
859 { FLOAT },
860 { FLOAT },
861 /* e0 */
ce518a5f
L		 862 { "loopneFH", { Jb, XX, loop_jcxz_flag } },
863 { "loopeFH", { Jb, XX, loop_jcxz_flag } },
864 { "loopFH", { Jb, XX, loop_jcxz_flag } },
865 { "jEcxzH", { Jb, XX, loop_jcxz_flag } },
866 { "inB", { AL, Ib } },
867 { "inG", { zAX, Ib } },
868 { "outB", { Ib, AL } },
869 { "outG", { Ib, zAX } },
252b5132 870 /* e8 */
ce518a5f
L		 871 { "callT", { Jv } },
872 { "jmpT", { Jv } },
873 { "Jjmp{T|}", { Ap } },
874 { "jmp", { Jb } },
875 { "inB", { AL, indirDX } },
876 { "inG", { zAX, indirDX } },
877 { "outB", { indirDX, AL } },
878 { "outG", { indirDX, zAX } },
252b5132 879 /* f0 */
ce518a5f
L		 880 { "(bad)", { XX } }, /* lock prefix */
881 { "icebp", { XX } },
882 { "(bad)", { XX } }, /* repne */
883 { "(bad)", { XX } }, /* repz */
884 { "hlt", { XX } },
885 { "cmc", { XX } },
252b5132
RH		 886 { GRP3b },
887 { GRP3S },
888 /* f8 */
ce518a5f
L		 889 { "clc", { XX } },
890 { "stc", { XX } },
891 { "cli", { XX } },
892 { "sti", { XX } },
893 { "cld", { XX } },
894 { "std", { XX } },
252b5132
RH		 895 { GRP4 },
896 { GRP5 },
897};
898
6439fc28 899static const struct dis386 dis386_twobyte[] = {
252b5132
RH		 900 /* 00 */
901 { GRP6 },
902 { GRP7 },
ce518a5f
L		 903 { "larS", { Gv, Ew } },
904 { "lslS", { Gv, Ew } },
905 { "(bad)", { XX } },
906 { "syscall", { XX } },
907 { "clts", { XX } },
908 { "sysretP", { XX } },
252b5132 909 /* 08 */
ce518a5f
L		 910 { "invd", { XX } },
911 { "wbinvd", { XX } },
912 { "(bad)", { XX } },
913 { "ud2a", { XX } },
914 { "(bad)", { XX } },
c608c12e 915 { GRPAMD },
ce518a5f
L		 916 { "femms", { XX } },
917 { "", { MX, EM, OPSUF } }, /* See OP_3DNowSuffix. */
252b5132 918 /* 10 */
c608c12e
AM		 919 { PREGRP8 },
920 { PREGRP9 },
ca164297 921 { PREGRP30 },
09a2c6cf
L		 922 { "movlpX", { EXq, XM, { SIMD_Fixup, 'h' } } },
923 { "unpcklpX", { XM, EXq } },
924 { "unpckhpX", { XM, EXq } },
ca164297 925 { PREGRP31 },
09a2c6cf 926 { "movhpX", { EXq, XM, { SIMD_Fixup, 'l' } } },
252b5132 927 /* 18 */
b3882df9 928 { GRP16 },
ce518a5f
L		 929 { "(bad)", { XX } },
930 { "(bad)", { XX } },
931 { "(bad)", { XX } },
932 { "(bad)", { XX } },
933 { "(bad)", { XX } },
934 { "(bad)", { XX } },
935 { "nopQ", { Ev } },
252b5132 936 /* 20 */
ce518a5f
L		 937 { "movZ", { Rm, Cm } },
938 { "movZ", { Rm, Dm } },
939 { "movZ", { Cm, Rm } },
940 { "movZ", { Dm, Rm } },
941 { "movL", { Rd, Td } },
942 { "(bad)", { XX } },
943 { "movL", { Td, Rd } },
944 { "(bad)", { XX } },
252b5132 945 /* 28 */
09a2c6cf
L		 946 { "movapX", { XM, EXx } },
947 { "movapX", { EXx, XM } },
c608c12e 948 { PREGRP2 },
050dfa73 949 { PREGRP33 },
2da11e11 950 { PREGRP4 },
c608c12e 951 { PREGRP3 },
09a2c6cf
L		 952 { PREGRP93 },
953 { PREGRP94 },
252b5132 954 /* 30 */
ce518a5f
L		 955 { "wrmsr", { XX } },
956 { "rdtsc", { XX } },
957 { "rdmsr", { XX } },
958 { "rdpmc", { XX } },
959 { "sysenter", { XX } },
960 { "sysexit", { XX } },
961 { "(bad)", { XX } },
962 { "(bad)", { XX } },
252b5132 963 /* 38 */
331d2d0d 964 { THREE_BYTE_0 },
ce518a5f 965 { "(bad)", { XX } },
331d2d0d 966 { THREE_BYTE_1 },
ce518a5f
L		 967 { "(bad)", { XX } },
968 { "(bad)", { XX } },
969 { "(bad)", { XX } },
970 { "(bad)", { XX } },
971 { "(bad)", { XX } },
252b5132 972 /* 40 */
ce518a5f
L		 973 { "cmovo", { Gv, Ev } },
974 { "cmovno", { Gv, Ev } },
975 { "cmovb", { Gv, Ev } },
976 { "cmovae", { Gv, Ev } },
977 { "cmove", { Gv, Ev } },
978 { "cmovne", { Gv, Ev } },
979 { "cmovbe", { Gv, Ev } },
980 { "cmova", { Gv, Ev } },
252b5132 981 /* 48 */
ce518a5f
L		 982 { "cmovs", { Gv, Ev } },
983 { "cmovns", { Gv, Ev } },
984 { "cmovp", { Gv, Ev } },
985 { "cmovnp", { Gv, Ev } },
986 { "cmovl", { Gv, Ev } },
987 { "cmovge", { Gv, Ev } },
988 { "cmovle", { Gv, Ev } },
989 { "cmovg", { Gv, Ev } },
252b5132 990 /* 50 */
ce518a5f 991 { "movmskpX", { Gdq, XS } },
c608c12e
AM		 992 { PREGRP13 },
993 { PREGRP12 },
994 { PREGRP11 },
09a2c6cf
L		 995 { "andpX", { XM, EXx } },
996 { "andnpX", { XM, EXx } },
997 { "orpX", { XM, EXx } },
998 { "xorpX", { XM, EXx } },
252b5132 999 /* 58 */
c608c12e
AM		 1000 { PREGRP0 },
1001 { PREGRP10 },
041bd2e0
JH		 1002 { PREGRP17 },
1003 { PREGRP16 },
c608c12e
AM		 1004 { PREGRP14 },
1005 { PREGRP7 },
1006 { PREGRP5 },
2da11e11 1007 { PREGRP6 },
252b5132 1008 /* 60 */
09a2c6cf
L		 1009 { PREGRP95 },
1010 { PREGRP96 },
1011 { PREGRP97 },
ce518a5f
L		 1012 { "packsswb", { MX, EM } },
1013 { "pcmpgtb", { MX, EM } },
1014 { "pcmpgtw", { MX, EM } },
1015 { "pcmpgtd", { MX, EM } },
1016 { "packuswb", { MX, EM } },
252b5132 1017 /* 68 */
ce518a5f
L		 1018 { "punpckhbw", { MX, EM } },
1019 { "punpckhwd", { MX, EM } },
1020 { "punpckhdq", { MX, EM } },
1021 { "packssdw", { MX, EM } },
0f17484f 1022 { PREGRP26 },
041bd2e0 1023 { PREGRP24 },
231af070 1024 { "movK", { MX, Edq } },
041bd2e0 1025 { PREGRP19 },
252b5132 1026 /* 70 */
041bd2e0 1027 { PREGRP22 },
252b5132 1028 { GRP12 },
b3882df9
L		 1029 { GRP13 },
1030 { GRP14 },
ce518a5f
L		 1031 { "pcmpeqb", { MX, EM } },
1032 { "pcmpeqw", { MX, EM } },
1033 { "pcmpeqd", { MX, EM } },
1034 { "emms", { XX } },
252b5132 1035 /* 78 */
050dfa73
MM		 1036 { PREGRP34 },
1037 { PREGRP35 },
ce518a5f
L		 1038 { "(bad)", { XX } },
1039 { "(bad)", { XX } },
ca164297
L		 1040 { PREGRP28 },
1041 { PREGRP29 },
041bd2e0
JH		 1042 { PREGRP23 },
1043 { PREGRP20 },
252b5132 1044 /* 80 */
ce518a5f
L		 1045 { "joH", { Jv, XX, cond_jump_flag } },
1046 { "jnoH", { Jv, XX, cond_jump_flag } },
1047 { "jbH", { Jv, XX, cond_jump_flag } },
1048 { "jaeH", { Jv, XX, cond_jump_flag } },
1049 { "jeH", { Jv, XX, cond_jump_flag } },
1050 { "jneH", { Jv, XX, cond_jump_flag } },
1051 { "jbeH", { Jv, XX, cond_jump_flag } },
1052 { "jaH", { Jv, XX, cond_jump_flag } },
252b5132 1053 /* 88 */
ce518a5f
L		 1054 { "jsH", { Jv, XX, cond_jump_flag } },
1055 { "jnsH", { Jv, XX, cond_jump_flag } },
1056 { "jpH", { Jv, XX, cond_jump_flag } },
1057 { "jnpH", { Jv, XX, cond_jump_flag } },
1058 { "jlH", { Jv, XX, cond_jump_flag } },
1059 { "jgeH", { Jv, XX, cond_jump_flag } },
1060 { "jleH", { Jv, XX, cond_jump_flag } },
1061 { "jgH", { Jv, XX, cond_jump_flag } },
252b5132 1062 /* 90 */
ce518a5f
L		 1063 { "seto", { Eb } },
1064 { "setno", { Eb } },
1065 { "setb", { Eb } },
1066 { "setae", { Eb } },
1067 { "sete", { Eb } },
1068 { "setne", { Eb } },
1069 { "setbe", { Eb } },
1070 { "seta", { Eb } },
252b5132 1071 /* 98 */
ce518a5f
L		 1072 { "sets", { Eb } },
1073 { "setns", { Eb } },
1074 { "setp", { Eb } },
1075 { "setnp", { Eb } },
1076 { "setl", { Eb } },
1077 { "setge", { Eb } },
1078 { "setle", { Eb } },
1079 { "setg", { Eb } },
252b5132 1080 /* a0 */
ce518a5f
L		 1081 { "pushT", { fs } },
1082 { "popT", { fs } },
1083 { "cpuid", { XX } },
1084 { "btS", { Ev, Gv } },
1085 { "shldS", { Ev, Gv, Ib } },
1086 { "shldS", { Ev, Gv, CL } },
30d1c836
ML		 1087 { GRPPADLCK2 },
1088 { GRPPADLCK1 },
252b5132 1089 /* a8 */
ce518a5f
L		 1090 { "pushT", { gs } },
1091 { "popT", { gs } },
1092 { "rsm", { XX } },
1093 { "btsS", { Ev, Gv } },
1094 { "shrdS", { Ev, Gv, Ib } },
1095 { "shrdS", { Ev, Gv, CL } },
b3882df9 1096 { GRP15 },
ce518a5f 1097 { "imulS", { Gv, Ev } },
252b5132 1098 /* b0 */
ce518a5f
L		 1099 { "cmpxchgB", { Eb, Gb } },
1100 { "cmpxchgS", { Ev, Gv } },
1101 { "lssS", { Gv, Mp } },
1102 { "btrS", { Ev, Gv } },
1103 { "lfsS", { Gv, Mp } },
1104 { "lgsS", { Gv, Mp } },
1105 { "movz{bR|x|bR|x}", { Gv, Eb } },
1106 { "movz{wR|x|wR|x}", { Gv, Ew } }, /* yes, there really is movzww ! */
252b5132 1107 /* b8 */
7918206c 1108 { PREGRP37 },
ce518a5f 1109 { "ud2b", { XX } },
252b5132 1110 { GRP8 },
ce518a5f
L		 1111 { "btcS", { Ev, Gv } },
1112 { "bsfS", { Gv, Ev } },
050dfa73 1113 { PREGRP36 },
ce518a5f
L		 1114 { "movs{bR|x|bR|x}", { Gv, Eb } },
1115 { "movs{wR|x|wR|x}", { Gv, Ew } }, /* yes, there really is movsww ! */
252b5132 1116 /* c0 */
ce518a5f
L		 1117 { "xaddB", { Eb, Gb } },
1118 { "xaddS", { Ev, Gv } },
c608c12e 1119 { PREGRP1 },
ce518a5f
L		 1120 { "movntiS", { Ev, Gv } },
1121 { "pinsrw", { MX, Edqw, Ib } },
1122 { "pextrw", { Gdq, MS, Ib } },
09a2c6cf 1123 { "shufpX", { XM, EXx, Ib } },
252b5132
RH		 1124 { GRP9 },
1125 /* c8 */
ce518a5f
L		 1126 { "bswap", { RMeAX } },
1127 { "bswap", { RMeCX } },
1128 { "bswap", { RMeDX } },
1129 { "bswap", { RMeBX } },
1130 { "bswap", { RMeSP } },
1131 { "bswap", { RMeBP } },
1132 { "bswap", { RMeSI } },
1133 { "bswap", { RMeDI } },
252b5132 1134 /* d0 */
ca164297 1135 { PREGRP27 },
ce518a5f
L		 1136 { "psrlw", { MX, EM } },
1137 { "psrld", { MX, EM } },
1138 { "psrlq", { MX, EM } },
1139 { "paddq", { MX, EM } },
1140 { "pmullw", { MX, EM } },
041bd2e0 1141 { PREGRP21 },
ce518a5f 1142 { "pmovmskb", { Gdq, MS } },
252b5132 1143 /* d8 */
ce518a5f
L		 1144 { "psubusb", { MX, EM } },
1145 { "psubusw", { MX, EM } },
1146 { "pminub", { MX, EM } },
1147 { "pand", { MX, EM } },
1148 { "paddusb", { MX, EM } },
1149 { "paddusw", { MX, EM } },
1150 { "pmaxub", { MX, EM } },
1151 { "pandn", { MX, EM } },
252b5132 1152 /* e0 */
ce518a5f
L		 1153 { "pavgb", { MX, EM } },
1154 { "psraw", { MX, EM } },
1155 { "psrad", { MX, EM } },
1156 { "pavgw", { MX, EM } },
1157 { "pmulhuw", { MX, EM } },
1158 { "pmulhw", { MX, EM } },
041bd2e0 1159 { PREGRP15 },
0f17484f 1160 { PREGRP25 },
252b5132 1161 /* e8 */
ce518a5f
L		 1162 { "psubsb", { MX, EM } },
1163 { "psubsw", { MX, EM } },
1164 { "pminsw", { MX, EM } },
1165 { "por", { MX, EM } },
1166 { "paddsb", { MX, EM } },
1167 { "paddsw", { MX, EM } },
1168 { "pmaxsw", { MX, EM } },
1169 { "pxor", { MX, EM } },
252b5132 1170 /* f0 */
ca164297 1171 { PREGRP32 },
ce518a5f
L		 1172 { "psllw", { MX, EM } },
1173 { "pslld", { MX, EM } },
1174 { "psllq", { MX, EM } },
1175 { "pmuludq", { MX, EM } },
1176 { "pmaddwd", { MX, EM } },
1177 { "psadbw", { MX, EM } },
041bd2e0 1178 { PREGRP18 },
252b5132 1179 /* f8 */
ce518a5f
L		 1180 { "psubb", { MX, EM } },
1181 { "psubw", { MX, EM } },
1182 { "psubd", { MX, EM } },
1183 { "psubq", { MX, EM } },
1184 { "paddb", { MX, EM } },
1185 { "paddw", { MX, EM } },
1186 { "paddd", { MX, EM } },
1187 { "(bad)", { XX } },
252b5132
RH		 1188};
1189
1190static const unsigned char onebyte_has_modrm[256] = {
c608c12e
AM		 1191 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1192 /* ------------------------------- */
1193 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1194 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1195 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1196 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1197 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1198 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1199 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1200 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1201 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1202 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1203 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1204 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1205 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1206 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1207 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1208 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1209 /* ------------------------------- */
1210 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
252b5132
RH		 1211};
1212
1213static const unsigned char twobyte_has_modrm[256] = {
c608c12e
AM		 1214 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1215 /* ------------------------------- */
252b5132 1216 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
15965411 1217 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
4bba6815 1218 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
331d2d0d 1219 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
252b5132 1220 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
4bba6815
AM		 1221 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1222 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
90700ea2 1223 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
252b5132
RH		 1224 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1225 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
30d1c836 1226 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
050dfa73 1227 /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
252b5132 1228 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
ca164297 1229 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
4bba6815 1230 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
ca164297 1231 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
c608c12e
AM		 1232 /* ------------------------------- */
1233 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1234};
1235
eec0f4ca 1236static const unsigned char twobyte_uses_DATA_prefix[256] = {
c608c12e
AM		 1237 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1238 /* ------------------------------- */
1239 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
ca164297 1240 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
050dfa73 1241 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
331d2d0d 1242 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
c608c12e 1243 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
041bd2e0
JH		 1244 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1245 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
050dfa73 1246 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,1,1, /* 7f */
c608c12e
AM		 1247 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1248 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1249 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1250 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1251 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
ca164297 1252 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
041bd2e0 1253 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
ca164297 1254 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
c608c12e
AM		 1255 /* ------------------------------- */
1256 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
252b5132
RH		 1257};
1258
eec0f4ca
L		 1259static const unsigned char twobyte_uses_REPNZ_prefix[256] = {
1260 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1261 /* ------------------------------- */
1262 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1263 /* 10 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1264 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1265 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1266 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1267 /* 50 */ 0,1,0,0,0,0,0,0,1,1,1,0,1,1,1,1, /* 5f */
1268 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1269 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,0,0, /* 7f */
1270 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1271 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1272 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1273 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1274 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1275 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1276 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1277 /* f0 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1278 /* ------------------------------- */
1279 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1280};
1281
1282static const unsigned char twobyte_uses_REPZ_prefix[256] = {
1283 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1284 /* ------------------------------- */
1285 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1286 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1287 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1288 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1289 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1290 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1291 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* 6f */
1292 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */
1293 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1294 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1295 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1296 /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,0,1,0,0, /* bf */
1297 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1298 /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1299 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1300 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1301 /* ------------------------------- */
1302 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1303};
1304
246c51aa 1305/* This is used to determine if opcode 0f 38 XX uses DATA prefix. */
eec0f4ca
L		 1306static const unsigned char threebyte_0x38_uses_DATA_prefix[256] = {
1307 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1308 /* ------------------------------- */
1309 /* 00 */ 1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0, /* 0f */
8de28984 1310 /* 10 */ 1,0,0,0,1,1,0,1,0,0,0,0,1,1,1,0, /* 1f */
42903f7f 1311 /* 20 */ 1,1,1,1,1,1,0,0,1,1,1,1,0,0,0,0, /* 2f */
381d071f 1312 /* 30 */ 1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1, /* 3f */
42903f7f 1313 /* 40 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
eec0f4ca
L		 1314 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1315 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1316 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1317 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1318 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1319 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1320 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1321 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1322 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1323 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1324 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1325 /* ------------------------------- */
1326 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1327};
1328
246c51aa 1329/* This is used to determine if opcode 0f 38 XX uses REPNZ prefix. */
eec0f4ca
L		 1330static const unsigned char threebyte_0x38_uses_REPNZ_prefix[256] = {
1331 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1332 /* ------------------------------- */
1333 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1334 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1335 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1336 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1337 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1338 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1339 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1340 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1341 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1342 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1343 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1344 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1345 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1346 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1347 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
381d071f 1348 /* f0 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
eec0f4ca
L		 1349 /* ------------------------------- */
1350 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1351};
1352
246c51aa 1353/* This is used to determine if opcode 0f 38 XX uses REPZ prefix. */
eec0f4ca
L		 1354static const unsigned char threebyte_0x38_uses_REPZ_prefix[256] = {
1355 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1356 /* ------------------------------- */
1357 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1358 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1359 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1360 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1361 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1362 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1363 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1364 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1365 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1366 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1367 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1368 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1369 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1370 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1371 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1372 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1373 /* ------------------------------- */
1374 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1375};
1376
246c51aa 1377/* This is used to determine if opcode 0f 3a XX uses DATA prefix. */
eec0f4ca
L		 1378static const unsigned char threebyte_0x3a_uses_DATA_prefix[256] = {
1379 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1380 /* ------------------------------- */
42903f7f
L		 1381 /* 00 */ 0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1, /* 0f */
1382 /* 10 */ 0,0,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* 1f */
1383 /* 20 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
eec0f4ca 1384 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
42903f7f 1385 /* 40 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
eec0f4ca 1386 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
8de28984 1387 /* 60 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
eec0f4ca
L		 1388 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1389 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1390 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1391 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1392 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1393 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1394 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1395 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1396 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1397 /* ------------------------------- */
1398 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1399};
1400
246c51aa 1401/* This is used to determine if opcode 0f 3a XX uses REPNZ prefix. */
eec0f4ca
L		 1402static const unsigned char threebyte_0x3a_uses_REPNZ_prefix[256] = {
1403 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1404 /* ------------------------------- */
1405 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1406 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1407 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1408 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1409 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1410 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1411 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1412 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1413 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1414 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1415 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1416 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1417 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1418 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1419 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1420 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1421 /* ------------------------------- */
1422 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1423};
1424
246c51aa 1425/* This is used to determine if opcode 0f 3a XX uses REPZ prefix. */
eec0f4ca
L		 1426static const unsigned char threebyte_0x3a_uses_REPZ_prefix[256] = {
1427 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1428 /* ------------------------------- */
1429 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1430 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1431 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1432 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1433 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1434 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1435 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1436 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1437 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1438 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1439 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1440 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1441 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1442 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1443 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1444 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1445 /* ------------------------------- */
1446 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1447};
1448
252b5132
RH		 1449static char obuf[100];
1450static char *obufp;
1451static char scratchbuf[100];
1452static unsigned char *start_codep;
1453static unsigned char *insn_codep;
1454static unsigned char *codep;
1455static disassemble_info *the_info;
7967e09e
L		 1456static struct
1457 {
1458 int mod;
7967e09e 1459 int reg;
484c222e 1460 int rm;
7967e09e
L		 1461 }
1462modrm;
4bba6815 1463static unsigned char need_modrm;
252b5132 1464
4bba6815
AM		 1465/* If we are accessing mod/rm/reg without need_modrm set, then the
1466 values are stale. Hitting this abort likely indicates that you
1467 need to update onebyte_has_modrm or twobyte_has_modrm. */
1468#define MODRM_CHECK if (!need_modrm) abort ()
1469
d708bcba
AM		 1470static const char **names64;
1471static const char **names32;
1472static const char **names16;
1473static const char **names8;
1474static const char **names8rex;
1475static const char **names_seg;
1476static const char **index16;
1477
1478static const char *intel_names64[] = {
1479 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1480 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1481};
1482static const char *intel_names32[] = {
1483 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1484 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1485};
1486static const char *intel_names16[] = {
1487 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1488 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1489};
1490static const char *intel_names8[] = {
1491 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1492};
1493static const char *intel_names8rex[] = {
1494 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1495 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1496};
1497static const char *intel_names_seg[] = {
1498 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1499};
1500static const char *intel_index16[] = {
1501 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1502};
1503
1504static const char *att_names64[] = {
1505 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
52b15da3
JH		 1506 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1507};
d708bcba
AM		 1508static const char *att_names32[] = {
1509 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
52b15da3 1510 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
252b5132 1511};
d708bcba
AM		 1512static const char *att_names16[] = {
1513 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
52b15da3 1514 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
252b5132 1515};
d708bcba
AM		 1516static const char *att_names8[] = {
1517 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
252b5132 1518};
d708bcba
AM		 1519static const char *att_names8rex[] = {
1520 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
52b15da3
JH		 1521 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1522};
d708bcba
AM		 1523static const char *att_names_seg[] = {
1524 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
252b5132 1525};
d708bcba
AM		 1526static const char *att_index16[] = {
1527 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
252b5132
RH		 1528};
1529
2da11e11 1530static const struct dis386 grps[][8] = {
7967e09e
L		 1531 /* GRP1a */
1532 {
1533 { "popU", { stackEv } },
1534 { "(bad)", { XX } },
1535 { "(bad)", { XX } },
1536 { "(bad)", { XX } },
1537 { "(bad)", { XX } },
1538 { "(bad)", { XX } },
1539 { "(bad)", { XX } },
1540 { "(bad)", { XX } },
1541 },
252b5132
RH		 1542 /* GRP1b */
1543 {
ce518a5f
L		 1544 { "addA", { Eb, Ib } },
1545 { "orA", { Eb, Ib } },
1546 { "adcA", { Eb, Ib } },
1547 { "sbbA", { Eb, Ib } },
1548 { "andA", { Eb, Ib } },
1549 { "subA", { Eb, Ib } },
1550 { "xorA", { Eb, Ib } },
1551 { "cmpA", { Eb, Ib } },
252b5132
RH		 1552 },
1553 /* GRP1S */
1554 {
ce518a5f
L		 1555 { "addQ", { Ev, Iv } },
1556 { "orQ", { Ev, Iv } },
1557 { "adcQ", { Ev, Iv } },
1558 { "sbbQ", { Ev, Iv } },
1559 { "andQ", { Ev, Iv } },
1560 { "subQ", { Ev, Iv } },
1561 { "xorQ", { Ev, Iv } },
1562 { "cmpQ", { Ev, Iv } },
252b5132
RH		 1563 },
1564 /* GRP1Ss */
1565 {
ce518a5f
L		 1566 { "addQ", { Ev, sIb } },
1567 { "orQ", { Ev, sIb } },
1568 { "adcQ", { Ev, sIb } },
1569 { "sbbQ", { Ev, sIb } },
1570 { "andQ", { Ev, sIb } },
1571 { "subQ", { Ev, sIb } },
1572 { "xorQ", { Ev, sIb } },
1573 { "cmpQ", { Ev, sIb } },
252b5132
RH		 1574 },
1575 /* GRP2b */
1576 {
ce518a5f
L		 1577 { "rolA", { Eb, Ib } },
1578 { "rorA", { Eb, Ib } },
1579 { "rclA", { Eb, Ib } },
1580 { "rcrA", { Eb, Ib } },
1581 { "shlA", { Eb, Ib } },
1582 { "shrA", { Eb, Ib } },
1583 { "(bad)", { XX } },
1584 { "sarA", { Eb, Ib } },
252b5132
RH		 1585 },
1586 /* GRP2S */
1587 {
ce518a5f
L		 1588 { "rolQ", { Ev, Ib } },
1589 { "rorQ", { Ev, Ib } },
1590 { "rclQ", { Ev, Ib } },
1591 { "rcrQ", { Ev, Ib } },
1592 { "shlQ", { Ev, Ib } },
1593 { "shrQ", { Ev, Ib } },
1594 { "(bad)", { XX } },
1595 { "sarQ", { Ev, Ib } },
252b5132
RH		 1596 },
1597 /* GRP2b_one */
1598 {
ce518a5f
L		 1599 { "rolA", { Eb, I1 } },
1600 { "rorA", { Eb, I1 } },
1601 { "rclA", { Eb, I1 } },
1602 { "rcrA", { Eb, I1 } },
1603 { "shlA", { Eb, I1 } },
1604 { "shrA", { Eb, I1 } },
1605 { "(bad)", { XX } },
1606 { "sarA", { Eb, I1 } },
252b5132
RH		 1607 },
1608 /* GRP2S_one */
1609 {
ce518a5f
L		 1610 { "rolQ", { Ev, I1 } },
1611 { "rorQ", { Ev, I1 } },
1612 { "rclQ", { Ev, I1 } },
1613 { "rcrQ", { Ev, I1 } },
1614 { "shlQ", { Ev, I1 } },
1615 { "shrQ", { Ev, I1 } },
1616 { "(bad)", { XX } },
1617 { "sarQ", { Ev, I1 } },
252b5132
RH		 1618 },
1619 /* GRP2b_cl */
1620 {
ce518a5f
L		 1621 { "rolA", { Eb, CL } },
1622 { "rorA", { Eb, CL } },
1623 { "rclA", { Eb, CL } },
1624 { "rcrA", { Eb, CL } },
1625 { "shlA", { Eb, CL } },
1626 { "shrA", { Eb, CL } },
1627 { "(bad)", { XX } },
1628 { "sarA", { Eb, CL } },
252b5132
RH		 1629 },
1630 /* GRP2S_cl */
1631 {
ce518a5f
L		 1632 { "rolQ", { Ev, CL } },
1633 { "rorQ", { Ev, CL } },
1634 { "rclQ", { Ev, CL } },
1635 { "rcrQ", { Ev, CL } },
1636 { "shlQ", { Ev, CL } },
1637 { "shrQ", { Ev, CL } },
1638 { "(bad)", { XX } },
1639 { "sarQ", { Ev, CL } },
252b5132
RH		 1640 },
1641 /* GRP3b */
1642 {
ce518a5f
L		 1643 { "testA", { Eb, Ib } },
1644 { "(bad)", { Eb } },
1645 { "notA", { Eb } },
1646 { "negA", { Eb } },
1647 { "mulA", { Eb } }, /* Don't print the implicit %al register, */
1648 { "imulA", { Eb } }, /* to distinguish these opcodes from other */
1649 { "divA", { Eb } }, /* mul/imul opcodes. Do the same for div */
1650 { "idivA", { Eb } }, /* and idiv for consistency. */
252b5132
RH		 1651 },
1652 /* GRP3S */
1653 {
ce518a5f
L		 1654 { "testQ", { Ev, Iv } },
1655 { "(bad)", { XX } },
1656 { "notQ", { Ev } },
1657 { "negQ", { Ev } },
1658 { "mulQ", { Ev } }, /* Don't print the implicit register. */
1659 { "imulQ", { Ev } },
1660 { "divQ", { Ev } },
1661 { "idivQ", { Ev } },
252b5132
RH		 1662 },
1663 /* GRP4 */
1664 {
ce518a5f
L		 1665 { "incA", { Eb } },
1666 { "decA", { Eb } },
1667 { "(bad)", { XX } },
1668 { "(bad)", { XX } },
1669 { "(bad)", { XX } },
1670 { "(bad)", { XX } },
1671 { "(bad)", { XX } },
1672 { "(bad)", { XX } },
252b5132
RH		 1673 },
1674 /* GRP5 */
1675 {
ce518a5f
L		 1676 { "incQ", { Ev } },
1677 { "decQ", { Ev } },
1678 { "callT", { indirEv } },
1679 { "JcallT", { indirEp } },
1680 { "jmpT", { indirEv } },
1681 { "JjmpT", { indirEp } },
1682 { "pushU", { stackEv } },
1683 { "(bad)", { XX } },
252b5132
RH		 1684 },
1685 /* GRP6 */
1686 {
ce518a5f
L		 1687 { "sldtD", { Sv } },
1688 { "strD", { Sv } },
1689 { "lldt", { Ew } },
1690 { "ltr", { Ew } },
1691 { "verr", { Ew } },
1692 { "verw", { Ew } },
1693 { "(bad)", { XX } },
1694 { "(bad)", { XX } },
252b5132
RH		 1695 },
1696 /* GRP7 */
1697 {
ce518a5f
L		 1698 { "sgdt{Q|IQ||}", { { VMX_Fixup, 0 } } },
1699 { "sidt{Q|IQ||}", { { PNI_Fixup, 0 } } },
1700 { "lgdt{Q|Q||}", { M } },
1701 { "lidt{Q|Q||}", { { SVME_Fixup, 0 } } },
1702 { "smswD", { Sv } },
1703 { "(bad)", { XX } },
1704 { "lmsw", { Ew } },
1705 { "invlpg", { { INVLPG_Fixup, w_mode } } },
252b5132
RH		 1706 },
1707 /* GRP8 */
1708 {
ce518a5f
L		 1709 { "(bad)", { XX } },
1710 { "(bad)", { XX } },
1711 { "(bad)", { XX } },
1712 { "(bad)", { XX } },
1713 { "btQ", { Ev, Ib } },
1714 { "btsQ", { Ev, Ib } },
1715 { "btrQ", { Ev, Ib } },
1716 { "btcQ", { Ev, Ib } },
252b5132
RH		 1717 },
1718 /* GRP9 */
1719 {
ce518a5f
L		 1720 { "(bad)", { XX } },
1721 { "cmpxchg8b", { { CMPXCHG8B_Fixup, q_mode } } },
1722 { "(bad)", { XX } },
1723 { "(bad)", { XX } },
1724 { "(bad)", { XX } },
1725 { "(bad)", { XX } },
1726 { "", { VM } }, /* See OP_VMX. */
1727 { "vmptrst", { Mq } },
252b5132 1728 },
a6bd098c
L		 1729 /* GRP11_C6 */
1730 {
ce518a5f
L		 1731 { "movA", { Eb, Ib } },
1732 { "(bad)", { XX } },
1733 { "(bad)", { XX } },
1734 { "(bad)", { XX } },
1735 { "(bad)", { XX } },
1736 { "(bad)", { XX } },
1737 { "(bad)", { XX } },
1738 { "(bad)", { XX } },
a6bd098c
L		 1739 },
1740 /* GRP11_C7 */
1741 {
ce518a5f
L		 1742 { "movQ", { Ev, Iv } },
1743 { "(bad)", { XX } },
1744 { "(bad)", { XX } },
1745 { "(bad)", { XX } },
1746 { "(bad)", { XX } },
1747 { "(bad)", { XX } },
1748 { "(bad)", { XX } },
1749 { "(bad)", { XX } },
a6bd098c 1750 },
b3882df9 1751 /* GRP12 */
252b5132 1752 {
ce518a5f
L		 1753 { "(bad)", { XX } },
1754 { "(bad)", { XX } },
1755 { "psrlw", { MS, Ib } },
1756 { "(bad)", { XX } },
1757 { "psraw", { MS, Ib } },
1758 { "(bad)", { XX } },
1759 { "psllw", { MS, Ib } },
1760 { "(bad)", { XX } },
252b5132 1761 },
b3882df9 1762 /* GRP13 */
252b5132 1763 {
ce518a5f
L		 1764 { "(bad)", { XX } },
1765 { "(bad)", { XX } },
1766 { "psrld", { MS, Ib } },
1767 { "(bad)", { XX } },
1768 { "psrad", { MS, Ib } },
1769 { "(bad)", { XX } },
1770 { "pslld", { MS, Ib } },
1771 { "(bad)", { XX } },
252b5132 1772 },
b3882df9 1773 /* GRP14 */
252b5132 1774 {
ce518a5f
L		 1775 { "(bad)", { XX } },
1776 { "(bad)", { XX } },
1777 { "psrlq", { MS, Ib } },
1778 { "psrldq", { MS, Ib } },
1779 { "(bad)", { XX } },
1780 { "(bad)", { XX } },
1781 { "psllq", { MS, Ib } },
1782 { "pslldq", { MS, Ib } },
252b5132 1783 },
b3882df9 1784 /* GRP15 */
252b5132 1785 {
ce518a5f
L		 1786 { "fxsave", { Ev } },
1787 { "fxrstor", { Ev } },
1788 { "ldmxcsr", { Ev } },
1789 { "stmxcsr", { Ev } },
1790 { "(bad)", { XX } },
1791 { "lfence", { { OP_0fae, 0 } } },
1792 { "mfence", { { OP_0fae, 0 } } },
1793 { "clflush", { { OP_0fae, 0 } } },
c608c12e 1794 },
b3882df9 1795 /* GRP16 */
c608c12e 1796 {
ce518a5f
L		 1797 { "prefetchnta", { Ev } },
1798 { "prefetcht0", { Ev } },
1799 { "prefetcht1", { Ev } },
1800 { "prefetcht2", { Ev } },
1801 { "(bad)", { XX } },
1802 { "(bad)", { XX } },
1803 { "(bad)", { XX } },
1804 { "(bad)", { XX } },
252b5132 1805 },
c608c12e 1806 /* GRPAMD */
252b5132 1807 {
ce518a5f
L		 1808 { "prefetch", { Eb } },
1809 { "prefetchw", { Eb } },
1810 { "(bad)", { XX } },
1811 { "(bad)", { XX } },
1812 { "(bad)", { XX } },
1813 { "(bad)", { XX } },
1814 { "(bad)", { XX } },
1815 { "(bad)", { XX } },
0f10071e 1816 },
30d1c836 1817 /* GRPPADLCK1 */
cc0ec051 1818 {
ce518a5f
L		 1819 { "xstore-rng", { { OP_0f07, 0 } } },
1820 { "xcrypt-ecb", { { OP_0f07, 0 } } },
1821 { "xcrypt-cbc", { { OP_0f07, 0 } } },
1822 { "xcrypt-ctr", { { OP_0f07, 0 } } },
1823 { "xcrypt-cfb", { { OP_0f07, 0 } } },
1824 { "xcrypt-ofb", { { OP_0f07, 0 } } },
1825 { "(bad)", { { OP_0f07, 0 } } },
1826 { "(bad)", { { OP_0f07, 0 } } },
30d1c836
ML		 1827 },
1828 /* GRPPADLCK2 */
1829 {
ce518a5f
L		 1830 { "montmul", { { OP_0f07, 0 } } },
1831 { "xsha1", { { OP_0f07, 0 } } },
1832 { "xsha256", { { OP_0f07, 0 } } },
1833 { "(bad)", { { OP_0f07, 0 } } },
1834 { "(bad)", { { OP_0f07, 0 } } },
1835 { "(bad)", { { OP_0f07, 0 } } },
1836 { "(bad)", { { OP_0f07, 0 } } },
1837 { "(bad)", { { OP_0f07, 0 } } },
252b5132 1838 }
252b5132
RH		 1839};
1840
041bd2e0 1841static const struct dis386 prefix_user_table[][4] = {
c608c12e
AM		 1842 /* PREGRP0 */
1843 {
09a2c6cf
L		 1844 { "addps", { XM, EXx } },
1845 { "addss", { XM, EXd } },
1846 { "addpd", { XM, EXx } },
1847 { "addsd", { XM, EXq } },
c608c12e
AM		 1848 },
1849 /* PREGRP1 */
1850 {
09a2c6cf 1851 { "", { XM, EXx, OPSIMD } }, /* See OP_SIMD_SUFFIX. */
09335d05 1852 { "", { XM, EXd, OPSIMD } },
09a2c6cf 1853 { "", { XM, EXx, OPSIMD } },
09335d05 1854 { "", { XM, EXq, OPSIMD } },
c608c12e
AM		 1855 },
1856 /* PREGRP2 */
1857 {
09335d05 1858 { "cvtpi2ps", { XM, EMCq } },
ce518a5f 1859 { "cvtsi2ssY", { XM, Ev } },
09335d05 1860 { "cvtpi2pd", { XM, EMCq } },
ce518a5f 1861 { "cvtsi2sdY", { XM, Ev } },
c608c12e
AM		 1862 },
1863 /* PREGRP3 */
1864 {
09335d05
L		 1865 { "cvtps2pi", { MXC, EXq } },
1866 { "cvtss2siY", { Gv, EXd } },
09a2c6cf 1867 { "cvtpd2pi", { MXC, EXx } },
09335d05 1868 { "cvtsd2siY", { Gv, EXq } },
c608c12e
AM		 1869 },
1870 /* PREGRP4 */
1871 {
09335d05
L		 1872 { "cvttps2pi", { MXC, EXq } },
1873 { "cvttss2siY", { Gv, EXd } },
09a2c6cf 1874 { "cvttpd2pi", { MXC, EXx } },
09335d05 1875 { "cvttsd2siY", { Gv, EXq } },
c608c12e
AM		 1876 },
1877 /* PREGRP5 */
1878 {
09a2c6cf 1879 { "divps", { XM, EXx } },
09335d05 1880 { "divss", { XM, EXd } },
09a2c6cf 1881 { "divpd", { XM, EXx } },
09335d05 1882 { "divsd", { XM, EXq } },
c608c12e
AM		 1883 },
1884 /* PREGRP6 */
1885 {
09a2c6cf 1886 { "maxps", { XM, EXx } },
09335d05 1887 { "maxss", { XM, EXd } },
09a2c6cf 1888 { "maxpd", { XM, EXx } },
09335d05 1889 { "maxsd", { XM, EXq } },
c608c12e
AM		 1890 },
1891 /* PREGRP7 */
1892 {
09a2c6cf 1893 { "minps", { XM, EXx } },
09335d05 1894 { "minss", { XM, EXd } },
09a2c6cf 1895 { "minpd", { XM, EXx } },
09335d05 1896 { "minsd", { XM, EXq } },
c608c12e
AM		 1897 },
1898 /* PREGRP8 */
1899 {
09a2c6cf 1900 { "movups", { XM, EXx } },
09335d05 1901 { "movss", { XM, EXd } },
09a2c6cf 1902 { "movupd", { XM, EXx } },
09335d05 1903 { "movsd", { XM, EXq } },
c608c12e
AM		 1904 },
1905 /* PREGRP9 */
1906 {
09a2c6cf 1907 { "movups", { EXx, XM } },
09335d05 1908 { "movss", { EXd, XM } },
09a2c6cf 1909 { "movupd", { EXx, XM } },
09335d05 1910 { "movsd", { EXq, XM } },
c608c12e
AM		 1911 },
1912 /* PREGRP10 */
1913 {
09a2c6cf 1914 { "mulps", { XM, EXx } },
09335d05 1915 { "mulss", { XM, EXd } },
09a2c6cf 1916 { "mulpd", { XM, EXx } },
09335d05 1917 { "mulsd", { XM, EXq } },
c608c12e
AM		 1918 },
1919 /* PREGRP11 */
1920 {
09a2c6cf 1921 { "rcpps", { XM, EXx } },
09335d05 1922 { "rcpss", { XM, EXd } },
09a2c6cf
L		 1923 { "(bad)", { XM, EXx } },
1924 { "(bad)", { XM, EXx } },
c608c12e
AM		 1925 },
1926 /* PREGRP12 */
1927 {
09a2c6cf 1928 { "rsqrtps",{ XM, EXx } },
09335d05 1929 { "rsqrtss",{ XM, EXd } },
09a2c6cf
L		 1930 { "(bad)", { XM, EXx } },
1931 { "(bad)", { XM, EXx } },
c608c12e
AM		 1932 },
1933 /* PREGRP13 */
1934 {
09a2c6cf 1935 { "sqrtps", { XM, EXx } },
09335d05 1936 { "sqrtss", { XM, EXd } },
09a2c6cf 1937 { "sqrtpd", { XM, EXx } },
09335d05 1938 { "sqrtsd", { XM, EXq } },
c608c12e
AM		 1939 },
1940 /* PREGRP14 */
1941 {
09a2c6cf 1942 { "subps", { XM, EXx } },
09335d05 1943 { "subss", { XM, EXd } },
09a2c6cf 1944 { "subpd", { XM, EXx } },
09335d05 1945 { "subsd", { XM, EXq } },
041bd2e0
JH		 1946 },
1947 /* PREGRP15 */
1948 {
09a2c6cf
L		 1949 { "(bad)", { XM, EXx } },
1950 { "cvtdq2pd", { XM, EXq } },
1951 { "cvttpd2dq", { XM, EXx } },
1952 { "cvtpd2dq", { XM, EXx } },
041bd2e0
JH		 1953 },
1954 /* PREGRP16 */
1955 {
09a2c6cf
L		 1956 { "cvtdq2ps", { XM, EXx } },
1957 { "cvttps2dq", { XM, EXx } },
1958 { "cvtps2dq", { XM, EXx } },
1959 { "(bad)", { XM, EXx } },
041bd2e0
JH		 1960 },
1961 /* PREGRP17 */
1962 {
09a2c6cf 1963 { "cvtps2pd", { XM, EXq } },
09335d05 1964 { "cvtss2sd", { XM, EXd } },
09a2c6cf 1965 { "cvtpd2ps", { XM, EXx } },
09335d05 1966 { "cvtsd2ss", { XM, EXq } },
041bd2e0
JH		 1967 },
1968 /* PREGRP18 */
1969 {
ce518a5f 1970 { "maskmovq", { MX, MS } },
09a2c6cf 1971 { "(bad)", { XM, EXx } },
ce518a5f 1972 { "maskmovdqu", { XM, XS } },
09a2c6cf 1973 { "(bad)", { XM, EXx } },
041bd2e0
JH		 1974 },
1975 /* PREGRP19 */
1976 {
ce518a5f 1977 { "movq", { MX, EM } },
09a2c6cf
L		 1978 { "movdqu", { XM, EXx } },
1979 { "movdqa", { XM, EXx } },
1980 { "(bad)", { XM, EXx } },
041bd2e0
JH		 1981 },
1982 /* PREGRP20 */
1983 {
ce518a5f 1984 { "movq", { EM, MX } },
09a2c6cf
L		 1985 { "movdqu", { EXx, XM } },
1986 { "movdqa", { EXx, XM } },
1987 { "(bad)", { EXx, XM } },
041bd2e0
JH		 1988 },
1989 /* PREGRP21 */
1990 {
09a2c6cf 1991 { "(bad)", { EXx, XM } },
ce518a5f 1992 { "movq2dq",{ XM, MS } },
231af070 1993 { "movq", { EXq, XM } },
ce518a5f 1994 { "movdq2q",{ MX, XS } },
041bd2e0
JH		 1995 },
1996 /* PREGRP22 */
1997 {
ce518a5f 1998 { "pshufw", { MX, EM, Ib } },
09a2c6cf
L		 1999 { "pshufhw",{ XM, EXx, Ib } },
2000 { "pshufd", { XM, EXx, Ib } },
2001 { "pshuflw",{ XM, EXx, Ib } },
041bd2e0
JH		 2002 },
2003 /* PREGRP23 */
2004 {
231af070
L		 2005 { "movK", { Edq, MX } },
2006 { "movq", { XM, EXq } },
2007 { "movK", { Edq, XM } },
ce518a5f 2008 { "(bad)", { Ed, XM } },
041bd2e0
JH		 2009 },
2010 /* PREGRP24 */
2011 {
09a2c6cf
L		 2012 { "(bad)", { MX, EXx } },
2013 { "(bad)", { XM, EXx } },
2014 { "punpckhqdq", { XM, EXx } },
2015 { "(bad)", { XM, EXx } },
0f17484f
AM		 2016 },
2017 /* PREGRP25 */
2018 {
ce518a5f
L		 2019 { "movntq", { EM, MX } },
2020 { "(bad)", { EM, XM } },
2021 { "movntdq",{ EM, XM } },
2022 { "(bad)", { EM, XM } },
0f17484f
AM		 2023 },
2024 /* PREGRP26 */
2025 {
09a2c6cf
L		 2026 { "(bad)", { MX, EXx } },
2027 { "(bad)", { XM, EXx } },
2028 { "punpcklqdq", { XM, EXx } },
2029 { "(bad)", { XM, EXx } },
041bd2e0 2030 },
ca164297
L		 2031 /* PREGRP27 */
2032 {
09a2c6cf
L		 2033 { "(bad)", { MX, EXx } },
2034 { "(bad)", { XM, EXx } },
2035 { "addsubpd", { XM, EXx } },
2036 { "addsubps", { XM, EXx } },
ca164297
L		 2037 },
2038 /* PREGRP28 */
2039 {
09a2c6cf
L		 2040 { "(bad)", { MX, EXx } },
2041 { "(bad)", { XM, EXx } },
2042 { "haddpd", { XM, EXx } },
2043 { "haddps", { XM, EXx } },
ca164297
L		 2044 },
2045 /* PREGRP29 */
2046 {
09a2c6cf
L		 2047 { "(bad)", { MX, EXx } },
2048 { "(bad)", { XM, EXx } },
2049 { "hsubpd", { XM, EXx } },
2050 { "hsubps", { XM, EXx } },
ca164297
L		 2051 },
2052 /* PREGRP30 */
2053 {
09a2c6cf
L		 2054 { "movlpX", { XM, EXq, { SIMD_Fixup, 'h' } } }, /* really only 2 operands */
2055 { "movsldup", { XM, EXx } },
2056 { "movlpd", { XM, EXq } },
2057 { "movddup", { XM, EXq } },
ca164297
L		 2058 },
2059 /* PREGRP31 */
2060 {
09a2c6cf
L		 2061 { "movhpX", { XM, EXq, { SIMD_Fixup, 'l' } } },
2062 { "movshdup", { XM, EXx } },
2063 { "movhpd", { XM, EXq } },
2064 { "(bad)", { XM, EXq } },
ca164297
L		 2065 },
2066 /* PREGRP32 */
2067 {
09a2c6cf
L		 2068 { "(bad)", { XM, EXx } },
2069 { "(bad)", { XM, EXx } },
2070 { "(bad)", { XM, EXx } },
ce518a5f 2071 { "lddqu", { XM, M } },
ca164297 2072 },
050dfa73
MM		 2073 /* PREGRP33 */
2074 {
ce518a5f 2075 {"movntps", { Ev, XM } },
09335d05 2076 {"movntss", { Ed, XM } },
ce518a5f 2077 {"movntpd", { Ev, XM } },
09335d05 2078 {"movntsd", { Eq, XM } },
050dfa73
MM		 2079 },
2080
2081 /* PREGRP34 */
2082 {
ce518a5f
L		 2083 {"vmread", { Em, Gm } },
2084 {"(bad)", { XX } },
2085 {"extrq", { XS, Ib, Ib } },
2086 {"insertq", { XM, XS, Ib, Ib } },
050dfa73 2087 },
246c51aa
L		 2088
2089 /* PREGRP35 */
050dfa73 2090 {
ce518a5f
L		 2091 {"vmwrite", { Gm, Em } },
2092 {"(bad)", { XX } },
2093 {"extrq", { XM, XS } },
2094 {"insertq", { XM, XS } },
246c51aa 2095 },
050dfa73
MM		 2096
2097 /* PREGRP36 */
2098 {
ce518a5f
L		 2099 { "bsrS", { Gv, Ev } },
2100 { "lzcntS", { Gv, Ev } },
2101 { "bsrS", { Gv, Ev } },
2102 { "(bad)", { XX } },
050dfa73
MM		 2103 },
2104
7918206c
MM		 2105 /* PREGRP37 */
2106 {
d25a0fc5 2107 { "(bad)", { XX } },
ce518a5f 2108 { "popcntS", { Gv, Ev } },
d25a0fc5 2109 { "(bad)", { XX } },
246c51aa 2110 { "(bad)", { XX } },
7918206c 2111 },
8b38ad71
L		 2112
2113 /* PREGRP38 */
2114 {
2115 { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
2116 { "pause", { XX } },
2117 { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
246c51aa 2118 { "(bad)", { XX } },
8b38ad71 2119 },
42903f7f
L		 2120
2121 /* PREGRP39 */
2122 {
2123 { "(bad)", { XX } },
2124 { "(bad)", { XX } },
09a2c6cf 2125 { "pblendvb", {XM, EXx, XMM0 } },
42903f7f
L		 2126 { "(bad)", { XX } },
2127 },
2128
2129 /* PREGRP40 */
2130 {
2131 { "(bad)", { XX } },
2132 { "(bad)", { XX } },
09a2c6cf 2133 { "blendvps", {XM, EXx, XMM0 } },
42903f7f
L		 2134 { "(bad)", { XX } },
2135 },
2136
2137 /* PREGRP41 */
2138 {
2139 { "(bad)", { XX } },
2140 { "(bad)", { XX } },
09a2c6cf 2141 { "blendvpd", { XM, EXx, XMM0 } },
42903f7f
L		 2142 { "(bad)", { XX } },
2143 },
2144
2145 /* PREGRP42 */
2146 {
2147 { "(bad)", { XX } },
2148 { "(bad)", { XX } },
09a2c6cf 2149 { "ptest", { XM, EXx } },
42903f7f
L		 2150 { "(bad)", { XX } },
2151 },
2152
2153 /* PREGRP43 */
2154 {
2155 { "(bad)", { XX } },
2156 { "(bad)", { XX } },
8976381e 2157 { "pmovsxbw", { XM, EXq } },
42903f7f
L		 2158 { "(bad)", { XX } },
2159 },
2160
2161 /* PREGRP44 */
2162 {
2163 { "(bad)", { XX } },
2164 { "(bad)", { XX } },
8976381e 2165 { "pmovsxbd", { XM, EXd } },
42903f7f
L		 2166 { "(bad)", { XX } },
2167 },
2168
2169 /* PREGRP45 */
2170 {
2171 { "(bad)", { XX } },
2172 { "(bad)", { XX } },
8976381e 2173 { "pmovsxbq", { XM, EXw } },
42903f7f
L		 2174 { "(bad)", { XX } },
2175 },
2176
2177 /* PREGRP46 */
2178 {
2179 { "(bad)", { XX } },
2180 { "(bad)", { XX } },
8976381e 2181 { "pmovsxwd", { XM, EXq } },
42903f7f
L		 2182 { "(bad)", { XX } },
2183 },
2184
2185 /* PREGRP47 */
2186 {
2187 { "(bad)", { XX } },
2188 { "(bad)", { XX } },
8976381e 2189 { "pmovsxwq", { XM, EXd } },
42903f7f
L		 2190 { "(bad)", { XX } },
2191 },
2192
2193 /* PREGRP48 */
2194 {
2195 { "(bad)", { XX } },
2196 { "(bad)", { XX } },
8976381e 2197 { "pmovsxdq", { XM, EXq } },
42903f7f
L		 2198 { "(bad)", { XX } },
2199 },
2200
2201 /* PREGRP49 */
2202 {
2203 { "(bad)", { XX } },
2204 { "(bad)", { XX } },
09a2c6cf 2205 { "pmuldq", { XM, EXx } },
42903f7f
L		 2206 { "(bad)", { XX } },
2207 },
2208
2209 /* PREGRP50 */
2210 {
2211 { "(bad)", { XX } },
2212 { "(bad)", { XX } },
09a2c6cf 2213 { "pcmpeqq", { XM, EXx } },
42903f7f
L		 2214 { "(bad)", { XX } },
2215 },
2216
2217 /* PREGRP51 */
2218 {
2219 { "(bad)", { XX } },
2220 { "(bad)", { XX } },
2221 { "movntdqa", { XM, EM } },
2222 { "(bad)", { XX } },
2223 },
2224
2225 /* PREGRP52 */
2226 {
2227 { "(bad)", { XX } },
2228 { "(bad)", { XX } },
09a2c6cf 2229 { "packusdw", { XM, EXx } },
42903f7f
L		 2230 { "(bad)", { XX } },
2231 },
2232
2233 /* PREGRP53 */
2234 {
2235 { "(bad)", { XX } },
2236 { "(bad)", { XX } },
8976381e 2237 { "pmovzxbw", { XM, EXq } },
42903f7f
L		 2238 { "(bad)", { XX } },
2239 },
2240
2241 /* PREGRP54 */
2242 {
2243 { "(bad)", { XX } },
2244 { "(bad)", { XX } },
8976381e 2245 { "pmovzxbd", { XM, EXd } },
42903f7f
L		 2246 { "(bad)", { XX } },
2247 },
2248
2249 /* PREGRP55 */
2250 {
2251 { "(bad)", { XX } },
2252 { "(bad)", { XX } },
8976381e 2253 { "pmovzxbq", { XM, EXw } },
42903f7f
L		 2254 { "(bad)", { XX } },
2255 },
2256
2257 /* PREGRP56 */
2258 {
2259 { "(bad)", { XX } },
2260 { "(bad)", { XX } },
8976381e 2261 { "pmovzxwd", { XM, EXq } },
42903f7f
L		 2262 { "(bad)", { XX } },
2263 },
2264
2265 /* PREGRP57 */
2266 {
2267 { "(bad)", { XX } },
2268 { "(bad)", { XX } },
8976381e 2269 { "pmovzxwq", { XM, EXd } },
42903f7f
L		 2270 { "(bad)", { XX } },
2271 },
2272
2273 /* PREGRP58 */
2274 {
2275 { "(bad)", { XX } },
2276 { "(bad)", { XX } },
8976381e 2277 { "pmovzxdq", { XM, EXq } },
42903f7f
L		 2278 { "(bad)", { XX } },
2279 },
2280
2281 /* PREGRP59 */
2282 {
2283 { "(bad)", { XX } },
2284 { "(bad)", { XX } },
09a2c6cf 2285 { "pminsb", { XM, EXx } },
42903f7f
L		 2286 { "(bad)", { XX } },
2287 },
2288
2289 /* PREGRP60 */
2290 {
2291 { "(bad)", { XX } },
2292 { "(bad)", { XX } },
09a2c6cf 2293 { "pminsd", { XM, EXx } },
42903f7f
L		 2294 { "(bad)", { XX } },
2295 },
2296
2297 /* PREGRP61 */
2298 {
2299 { "(bad)", { XX } },
2300 { "(bad)", { XX } },
09a2c6cf 2301 { "pminuw", { XM, EXx } },
42903f7f
L		 2302 { "(bad)", { XX } },
2303 },
2304
2305 /* PREGRP62 */
2306 {
2307 { "(bad)", { XX } },
2308 { "(bad)", { XX } },
09a2c6cf 2309 { "pminud", { XM, EXx } },
42903f7f
L		 2310 { "(bad)", { XX } },
2311 },
2312
2313 /* PREGRP63 */
2314 {
2315 { "(bad)", { XX } },
2316 { "(bad)", { XX } },
09a2c6cf 2317 { "pmaxsb", { XM, EXx } },
42903f7f
L		 2318 { "(bad)", { XX } },
2319 },
2320
2321 /* PREGRP64 */
2322 {
2323 { "(bad)", { XX } },
2324 { "(bad)", { XX } },
09a2c6cf 2325 { "pmaxsd", { XM, EXx } },
42903f7f
L		 2326 { "(bad)", { XX } },
2327 },
2328
2329 /* PREGRP65 */
2330 {
2331 { "(bad)", { XX } },
2332 { "(bad)", { XX } },
09a2c6cf 2333 { "pmaxuw", { XM, EXx } },
42903f7f
L		 2334 { "(bad)", { XX } },
2335 },
2336
2337 /* PREGRP66 */
2338 {
2339 { "(bad)", { XX } },
2340 { "(bad)", { XX } },
09a2c6cf 2341 { "pmaxud", { XM, EXx } },
42903f7f
L		 2342 { "(bad)", { XX } },
2343 },
2344
2345 /* PREGRP67 */
2346 {
2347 { "(bad)", { XX } },
2348 { "(bad)", { XX } },
09a2c6cf 2349 { "pmulld", { XM, EXx } },
42903f7f
L		 2350 { "(bad)", { XX } },
2351 },
2352
2353 /* PREGRP68 */
2354 {
2355 { "(bad)", { XX } },
2356 { "(bad)", { XX } },
09a2c6cf 2357 { "phminposuw", { XM, EXx } },
42903f7f
L		 2358 { "(bad)", { XX } },
2359 },
2360
2361 /* PREGRP69 */
2362 {
2363 { "(bad)", { XX } },
2364 { "(bad)", { XX } },
09a2c6cf 2365 { "roundps", { XM, EXx, Ib } },
42903f7f
L		 2366 { "(bad)", { XX } },
2367 },
2368
2369 /* PREGRP70 */
2370 {
2371 { "(bad)", { XX } },
2372 { "(bad)", { XX } },
09a2c6cf 2373 { "roundpd", { XM, EXx, Ib } },
42903f7f
L		 2374 { "(bad)", { XX } },
2375 },
2376
2377 /* PREGRP71 */
2378 {
2379 { "(bad)", { XX } },
2380 { "(bad)", { XX } },
09335d05 2381 { "roundss", { XM, EXd, Ib } },
42903f7f
L		 2382 { "(bad)", { XX } },
2383 },
2384
2385 /* PREGRP72 */
2386 {
2387 { "(bad)", { XX } },
2388 { "(bad)", { XX } },
09335d05 2389 { "roundsd", { XM, EXq, Ib } },
42903f7f
L		 2390 { "(bad)", { XX } },
2391 },
2392
2393 /* PREGRP73 */
2394 {
2395 { "(bad)", { XX } },
2396 { "(bad)", { XX } },
09a2c6cf 2397 { "blendps", { XM, EXx, Ib } },
42903f7f
L		 2398 { "(bad)", { XX } },
2399 },
2400
2401 /* PREGRP74 */
2402 {
2403 { "(bad)", { XX } },
2404 { "(bad)", { XX } },
09a2c6cf 2405 { "blendpd", { XM, EXx, Ib } },
42903f7f
L		 2406 { "(bad)", { XX } },
2407 },
2408
2409 /* PREGRP75 */
2410 {
2411 { "(bad)", { XX } },
2412 { "(bad)", { XX } },
09a2c6cf 2413 { "pblendw", { XM, EXx, Ib } },
42903f7f
L		 2414 { "(bad)", { XX } },
2415 },
2416
2417 /* PREGRP76 */
2418 {
2419 { "(bad)", { XX } },
2420 { "(bad)", { XX } },
2421 { "pextrb", { Edqb, XM, Ib } },
2422 { "(bad)", { XX } },
2423 },
2424
2425 /* PREGRP77 */
2426 {
2427 { "(bad)", { XX } },
2428 { "(bad)", { XX } },
2429 { "pextrw", { Edqw, XM, Ib } },
2430 { "(bad)", { XX } },
2431 },
2432
2433 /* PREGRP78 */
2434 {
2435 { "(bad)", { XX } },
2436 { "(bad)", { XX } },
2437 { "pextrK", { Edq, XM, Ib } },
2438 { "(bad)", { XX } },
2439 },
2440
2441 /* PREGRP79 */
2442 {
2443 { "(bad)", { XX } },
2444 { "(bad)", { XX } },
2445 { "extractps", { Edqd, XM, Ib } },
2446 { "(bad)", { XX } },
2447 },
2448
2449 /* PREGRP80 */
2450 {
2451 { "(bad)", { XX } },
2452 { "(bad)", { XX } },
2453 { "pinsrb", { XM, Edqb, Ib } },
2454 { "(bad)", { XX } },
2455 },
2456
2457 /* PREGRP81 */
2458 {
2459 { "(bad)", { XX } },
2460 { "(bad)", { XX } },
8976381e 2461 { "insertps", { XM, EXd, Ib } },
42903f7f
L		 2462 { "(bad)", { XX } },
2463 },
2464
2465 /* PREGRP82 */
2466 {
2467 { "(bad)", { XX } },
2468 { "(bad)", { XX } },
2469 { "pinsrK", { XM, Edq, Ib } },
2470 { "(bad)", { XX } },
2471 },
2472
2473 /* PREGRP83 */
2474 {
2475 { "(bad)", { XX } },
2476 { "(bad)", { XX } },
09a2c6cf 2477 { "dpps", { XM, EXx, Ib } },
42903f7f
L		 2478 { "(bad)", { XX } },
2479 },
2480
2481 /* PREGRP84 */
2482 {
2483 { "(bad)", { XX } },
2484 { "(bad)", { XX } },
09a2c6cf 2485 { "dppd", { XM, EXx, Ib } },
42903f7f
L		 2486 { "(bad)", { XX } },
2487 },
2488
2489 /* PREGRP85 */
2490 {
2491 { "(bad)", { XX } },
2492 { "(bad)", { XX } },
09a2c6cf 2493 { "mpsadbw", { XM, EXx, Ib } },
42903f7f
L		 2494 { "(bad)", { XX } },
2495 },
381d071f
L		 2496
2497 /* PREGRP86 */
2498 {
2499 { "(bad)", { XX } },
2500 { "(bad)", { XX } },
09a2c6cf 2501 { "pcmpgtq", { XM, EXx } },
381d071f
L		 2502 { "(bad)", { XX } },
2503 },
2504
2505 /* PREGRP87 */
2506 {
2507 { "(bad)", { XX } },
2508 { "(bad)", { XX } },
2509 { "(bad)", { XX } },
2510 { "crc32", { Gdq, { CRC32_Fixup, b_mode } } },
2511 },
2512
2513 /* PREGRP88 */
2514 {
2515 { "(bad)", { XX } },
2516 { "(bad)", { XX } },
2517 { "(bad)", { XX } },
2518 { "crc32", { Gdq, { CRC32_Fixup, v_mode } } },
2519 },
2520
2521 /* PREGRP89 */
2522 {
2523 { "(bad)", { XX } },
2524 { "(bad)", { XX } },
09a2c6cf 2525 { "pcmpestrm", { XM, EXx, Ib } },
381d071f
L		 2526 { "(bad)", { XX } },
2527 },
2528
2529 /* PREGRP90 */
2530 {
2531 { "(bad)", { XX } },
2532 { "(bad)", { XX } },
09a2c6cf 2533 { "pcmpestri", { XM, EXx, Ib } },
381d071f
L		 2534 { "(bad)", { XX } },
2535 },
2536
2537 /* PREGRP91 */
2538 {
2539 { "(bad)", { XX } },
2540 { "(bad)", { XX } },
09a2c6cf 2541 { "pcmpistrm", { XM, EXx, Ib } },
381d071f
L		 2542 { "(bad)", { XX } },
2543 },
2544
2545 /* PREGRP92 */
2546 {
2547 { "(bad)", { XX } },
2548 { "(bad)", { XX } },
09a2c6cf
L		 2549 { "pcmpistri", { XM, EXx, Ib } },
2550 { "(bad)", { XX } },
2551 },
2552
2553 /* PREGRP93 */
2554 {
2555 { "ucomiss",{ XM, EXd } },
2556 { "(bad)", { XX } },
2557 { "ucomisd",{ XM, EXq } },
2558 { "(bad)", { XX } },
2559 },
2560
2561 /* PREGRP94 */
2562 {
2563 { "comiss", { XM, EXd } },
2564 { "(bad)", { XX } },
2565 { "comisd", { XM, EXq } },
2566 { "(bad)", { XX } },
2567 },
2568
2569 /* PREGRP95 */
2570 {
2571 { "punpcklbw",{ MX, EMd } },
2572 { "(bad)", { XX } },
14051056 2573 { "punpcklbw",{ MX, EMx } },
09a2c6cf
L		 2574 { "(bad)", { XX } },
2575 },
2576
2577 /* PREGRP96 */
2578 {
2579 { "punpcklwd",{ MX, EMd } },
2580 { "(bad)", { XX } },
14051056 2581 { "punpcklwd",{ MX, EMx } },
09a2c6cf
L		 2582 { "(bad)", { XX } },
2583 },
2584
2585 /* PREGRP97 */
2586 {
2587 { "punpckldq",{ MX, EMd } },
2588 { "(bad)", { XX } },
14051056 2589 { "punpckldq",{ MX, EMx } },
381d071f
L		 2590 { "(bad)", { XX } },
2591 },
c608c12e
AM		 2592};
2593
6439fc28
AM		 2594static const struct dis386 x86_64_table[][2] = {
2595 {
ce518a5f
L		 2596 { "pusha{P|}", { XX } },
2597 { "(bad)", { XX } },
5f754f58
L		 2598 },
2599 {
ce518a5f
L		 2600 { "popa{P|}", { XX } },
2601 { "(bad)", { XX } },
5f754f58
L		 2602 },
2603 {
ce518a5f
L		 2604 { "bound{S|}", { Gv, Ma } },
2605 { "(bad)", { XX } },
5f754f58
L		 2606 },
2607 {
ce518a5f
L		 2608 { "arpl", { Ew, Gw } },
2609 { "movs{||lq|xd}", { Gv, Ed } },
6439fc28
AM		 2610 },
2611};
2612
96fbad73 2613static const struct dis386 three_byte_table[][256] = {
331d2d0d
L		 2614 /* THREE_BYTE_0 */
2615 {
96fbad73 2616 /* 00 */
ce518a5f
L		 2617 { "pshufb", { MX, EM } },
2618 { "phaddw", { MX, EM } },
2619 { "phaddd", { MX, EM } },
2620 { "phaddsw", { MX, EM } },
2621 { "pmaddubsw", { MX, EM } },
2622 { "phsubw", { MX, EM } },
2623 { "phsubd", { MX, EM } },
2624 { "phsubsw", { MX, EM } },
96fbad73 2625 /* 08 */
ce518a5f
L		 2626 { "psignb", { MX, EM } },
2627 { "psignw", { MX, EM } },
2628 { "psignd", { MX, EM } },
2629 { "pmulhrsw", { MX, EM } },
2630 { "(bad)", { XX } },
2631 { "(bad)", { XX } },
2632 { "(bad)", { XX } },
2633 { "(bad)", { XX } },
96fbad73 2634 /* 10 */
42903f7f 2635 { PREGRP39 },
ce518a5f
L		 2636 { "(bad)", { XX } },
2637 { "(bad)", { XX } },
2638 { "(bad)", { XX } },
42903f7f
L		 2639 { PREGRP40 },
2640 { PREGRP41 },
ce518a5f 2641 { "(bad)", { XX } },
42903f7f 2642 { PREGRP42 },
96fbad73 2643 /* 18 */
ce518a5f
L		 2644 { "(bad)", { XX } },
2645 { "(bad)", { XX } },
2646 { "(bad)", { XX } },
2647 { "(bad)", { XX } },
2648 { "pabsb", { MX, EM } },
2649 { "pabsw", { MX, EM } },
2650 { "pabsd", { MX, EM } },
2651 { "(bad)", { XX } },
96fbad73 2652 /* 20 */
42903f7f
L		 2653 { PREGRP43 },
2654 { PREGRP44 },
2655 { PREGRP45 },
2656 { PREGRP46 },
2657 { PREGRP47 },
2658 { PREGRP48 },
ce518a5f
L		 2659 { "(bad)", { XX } },
2660 { "(bad)", { XX } },
96fbad73 2661 /* 28 */
42903f7f
L		 2662 { PREGRP49 },
2663 { PREGRP50 },
2664 { PREGRP51 },
2665 { PREGRP52 },
ce518a5f
L		 2666 { "(bad)", { XX } },
2667 { "(bad)", { XX } },
2668 { "(bad)", { XX } },
2669 { "(bad)", { XX } },
96fbad73 2670 /* 30 */
42903f7f
L		 2671 { PREGRP53 },
2672 { PREGRP54 },
2673 { PREGRP55 },
2674 { PREGRP56 },
2675 { PREGRP57 },
2676 { PREGRP58 },
ce518a5f 2677 { "(bad)", { XX } },
381d071f 2678 { PREGRP86 },
96fbad73 2679 /* 38 */
42903f7f
L		 2680 { PREGRP59 },
2681 { PREGRP60 },
2682 { PREGRP61 },
2683 { PREGRP62 },
2684 { PREGRP63 },
2685 { PREGRP64 },
2686 { PREGRP65 },
2687 { PREGRP66 },
96fbad73 2688 /* 40 */
42903f7f
L		 2689 { PREGRP67 },
2690 { PREGRP68 },
ce518a5f
L		 2691 { "(bad)", { XX } },
2692 { "(bad)", { XX } },
2693 { "(bad)", { XX } },
2694 { "(bad)", { XX } },
2695 { "(bad)", { XX } },
2696 { "(bad)", { XX } },
96fbad73 2697 /* 48 */
ce518a5f
L		 2698 { "(bad)", { XX } },
2699 { "(bad)", { XX } },
2700 { "(bad)", { XX } },
2701 { "(bad)", { XX } },
2702 { "(bad)", { XX } },
2703 { "(bad)", { XX } },
2704 { "(bad)", { XX } },
2705 { "(bad)", { XX } },
96fbad73 2706 /* 50 */
ce518a5f
L		 2707 { "(bad)", { XX } },
2708 { "(bad)", { XX } },
2709 { "(bad)", { XX } },
2710 { "(bad)", { XX } },
2711 { "(bad)", { XX } },
2712 { "(bad)", { XX } },
2713 { "(bad)", { XX } },
2714 { "(bad)", { XX } },
96fbad73 2715 /* 58 */
ce518a5f
L		 2716 { "(bad)", { XX } },
2717 { "(bad)", { XX } },
2718 { "(bad)", { XX } },
2719 { "(bad)", { XX } },
2720 { "(bad)", { XX } },
2721 { "(bad)", { XX } },
2722 { "(bad)", { XX } },
2723 { "(bad)", { XX } },
96fbad73 2724 /* 60 */
ce518a5f
L		 2725 { "(bad)", { XX } },
2726 { "(bad)", { XX } },
2727 { "(bad)", { XX } },
2728 { "(bad)", { XX } },
2729 { "(bad)", { XX } },
2730 { "(bad)", { XX } },
2731 { "(bad)", { XX } },
2732 { "(bad)", { XX } },
96fbad73 2733 /* 68 */
ce518a5f
L		 2734 { "(bad)", { XX } },
2735 { "(bad)", { XX } },
2736 { "(bad)", { XX } },
2737 { "(bad)", { XX } },
2738 { "(bad)", { XX } },
2739 { "(bad)", { XX } },
2740 { "(bad)", { XX } },
2741 { "(bad)", { XX } },
96fbad73 2742 /* 70 */
ce518a5f
L		 2743 { "(bad)", { XX } },
2744 { "(bad)", { XX } },
2745 { "(bad)", { XX } },
2746 { "(bad)", { XX } },
2747 { "(bad)", { XX } },
2748 { "(bad)", { XX } },
2749 { "(bad)", { XX } },
2750 { "(bad)", { XX } },
96fbad73 2751 /* 78 */
ce518a5f
L		 2752 { "(bad)", { XX } },
2753 { "(bad)", { XX } },
2754 { "(bad)", { XX } },
2755 { "(bad)", { XX } },
2756 { "(bad)", { XX } },
2757 { "(bad)", { XX } },
2758 { "(bad)", { XX } },
2759 { "(bad)", { XX } },
96fbad73 2760 /* 80 */
ce518a5f
L		 2761 { "(bad)", { XX } },
2762 { "(bad)", { XX } },
2763 { "(bad)", { XX } },
2764 { "(bad)", { XX } },
2765 { "(bad)", { XX } },
2766 { "(bad)", { XX } },
2767 { "(bad)", { XX } },
2768 { "(bad)", { XX } },
96fbad73 2769 /* 88 */
ce518a5f
L		 2770 { "(bad)", { XX } },
2771 { "(bad)", { XX } },
2772 { "(bad)", { XX } },
2773 { "(bad)", { XX } },
2774 { "(bad)", { XX } },
2775 { "(bad)", { XX } },
2776 { "(bad)", { XX } },
2777 { "(bad)", { XX } },
96fbad73 2778 /* 90 */
ce518a5f
L		 2779 { "(bad)", { XX } },
2780 { "(bad)", { XX } },
2781 { "(bad)", { XX } },
2782 { "(bad)", { XX } },
2783 { "(bad)", { XX } },
2784 { "(bad)", { XX } },
2785 { "(bad)", { XX } },
2786 { "(bad)", { XX } },
96fbad73 2787 /* 98 */
ce518a5f
L		 2788 { "(bad)", { XX } },
2789 { "(bad)", { XX } },
2790 { "(bad)", { XX } },
2791 { "(bad)", { XX } },
2792 { "(bad)", { XX } },
2793 { "(bad)", { XX } },
2794 { "(bad)", { XX } },
2795 { "(bad)", { XX } },
96fbad73 2796 /* a0 */
ce518a5f
L		 2797 { "(bad)", { XX } },
2798 { "(bad)", { XX } },
2799 { "(bad)", { XX } },
2800 { "(bad)", { XX } },
2801 { "(bad)", { XX } },
2802 { "(bad)", { XX } },
2803 { "(bad)", { XX } },
2804 { "(bad)", { XX } },
96fbad73 2805 /* a8 */
ce518a5f
L		 2806 { "(bad)", { XX } },
2807 { "(bad)", { XX } },
2808 { "(bad)", { XX } },
2809 { "(bad)", { XX } },
2810 { "(bad)", { XX } },
2811 { "(bad)", { XX } },
2812 { "(bad)", { XX } },
2813 { "(bad)", { XX } },
96fbad73 2814 /* b0 */
ce518a5f
L		 2815 { "(bad)", { XX } },
2816 { "(bad)", { XX } },
2817 { "(bad)", { XX } },
2818 { "(bad)", { XX } },
2819 { "(bad)", { XX } },
2820 { "(bad)", { XX } },
2821 { "(bad)", { XX } },
2822 { "(bad)", { XX } },
96fbad73 2823 /* b8 */
ce518a5f
L		 2824 { "(bad)", { XX } },
2825 { "(bad)", { XX } },
2826 { "(bad)", { XX } },
2827 { "(bad)", { XX } },
2828 { "(bad)", { XX } },
2829 { "(bad)", { XX } },
2830 { "(bad)", { XX } },
2831 { "(bad)", { XX } },
96fbad73 2832 /* c0 */
ce518a5f
L		 2833 { "(bad)", { XX } },
2834 { "(bad)", { XX } },
2835 { "(bad)", { XX } },
2836 { "(bad)", { XX } },
2837 { "(bad)", { XX } },
2838 { "(bad)", { XX } },
2839 { "(bad)", { XX } },
2840 { "(bad)", { XX } },
96fbad73 2841 /* c8 */
ce518a5f
L		 2842 { "(bad)", { XX } },
2843 { "(bad)", { XX } },
2844 { "(bad)", { XX } },
2845 { "(bad)", { XX } },
2846 { "(bad)", { XX } },
2847 { "(bad)", { XX } },
2848 { "(bad)", { XX } },
2849 { "(bad)", { XX } },
96fbad73 2850 /* d0 */
ce518a5f
L		 2851 { "(bad)", { XX } },
2852 { "(bad)", { XX } },
2853 { "(bad)", { XX } },
2854 { "(bad)", { XX } },
2855 { "(bad)", { XX } },
2856 { "(bad)", { XX } },
2857 { "(bad)", { XX } },
2858 { "(bad)", { XX } },
96fbad73 2859 /* d8 */
ce518a5f
L		 2860 { "(bad)", { XX } },
2861 { "(bad)", { XX } },
2862 { "(bad)", { XX } },
2863 { "(bad)", { XX } },
2864 { "(bad)", { XX } },
2865 { "(bad)", { XX } },
2866 { "(bad)", { XX } },
2867 { "(bad)", { XX } },
96fbad73 2868 /* e0 */
ce518a5f
L		 2869 { "(bad)", { XX } },
2870 { "(bad)", { XX } },
2871 { "(bad)", { XX } },
2872 { "(bad)", { XX } },
2873 { "(bad)", { XX } },
2874 { "(bad)", { XX } },
2875 { "(bad)", { XX } },
2876 { "(bad)", { XX } },
96fbad73 2877 /* e8 */
ce518a5f
L		 2878 { "(bad)", { XX } },
2879 { "(bad)", { XX } },
2880 { "(bad)", { XX } },
2881 { "(bad)", { XX } },
2882 { "(bad)", { XX } },
2883 { "(bad)", { XX } },
2884 { "(bad)", { XX } },
2885 { "(bad)", { XX } },
96fbad73 2886 /* f0 */
381d071f
L		 2887 { PREGRP87 },
2888 { PREGRP88 },
ce518a5f
L		 2889 { "(bad)", { XX } },
2890 { "(bad)", { XX } },
2891 { "(bad)", { XX } },
2892 { "(bad)", { XX } },
2893 { "(bad)", { XX } },
2894 { "(bad)", { XX } },
96fbad73 2895 /* f8 */
ce518a5f
L		 2896 { "(bad)", { XX } },
2897 { "(bad)", { XX } },
2898 { "(bad)", { XX } },
2899 { "(bad)", { XX } },
2900 { "(bad)", { XX } },
2901 { "(bad)", { XX } },
2902 { "(bad)", { XX } },
2903 { "(bad)", { XX } },
331d2d0d
L		 2904 },
2905 /* THREE_BYTE_1 */
2906 {
96fbad73 2907 /* 00 */
ce518a5f
L		 2908 { "(bad)", { XX } },
2909 { "(bad)", { XX } },
2910 { "(bad)", { XX } },
2911 { "(bad)", { XX } },
2912 { "(bad)", { XX } },
2913 { "(bad)", { XX } },
2914 { "(bad)", { XX } },
2915 { "(bad)", { XX } },
96fbad73 2916 /* 08 */
42903f7f
L		 2917 { PREGRP69 },
2918 { PREGRP70 },
2919 { PREGRP71 },
2920 { PREGRP72 },
2921 { PREGRP73 },
2922 { PREGRP74 },
2923 { PREGRP75 },
ce518a5f 2924 { "palignr", { MX, EM, Ib } },
96fbad73 2925 /* 10 */
ce518a5f
L		 2926 { "(bad)", { XX } },
2927 { "(bad)", { XX } },
2928 { "(bad)", { XX } },
2929 { "(bad)", { XX } },
42903f7f
L		 2930 { PREGRP76 },
2931 { PREGRP77 },
2932 { PREGRP78 },
2933 { PREGRP79 },
96fbad73 2934 /* 18 */
ce518a5f
L		 2935 { "(bad)", { XX } },
2936 { "(bad)", { XX } },
2937 { "(bad)", { XX } },
2938 { "(bad)", { XX } },
2939 { "(bad)", { XX } },
2940 { "(bad)", { XX } },
2941 { "(bad)", { XX } },
2942 { "(bad)", { XX } },
96fbad73 2943 /* 20 */
42903f7f
L		 2944 { PREGRP80 },
2945 { PREGRP81 },
2946 { PREGRP82 },
ce518a5f
L		 2947 { "(bad)", { XX } },
2948 { "(bad)", { XX } },
2949 { "(bad)", { XX } },
2950 { "(bad)", { XX } },
2951 { "(bad)", { XX } },
96fbad73 2952 /* 28 */
ce518a5f
L		 2953 { "(bad)", { XX } },
2954 { "(bad)", { XX } },
2955 { "(bad)", { XX } },
2956 { "(bad)", { XX } },
2957 { "(bad)", { XX } },
2958 { "(bad)", { XX } },
2959 { "(bad)", { XX } },
2960 { "(bad)", { XX } },
96fbad73 2961 /* 30 */
ce518a5f
L		 2962 { "(bad)", { XX } },
2963 { "(bad)", { XX } },
2964 { "(bad)", { XX } },
2965 { "(bad)", { XX } },
2966 { "(bad)", { XX } },
2967 { "(bad)", { XX } },
2968 { "(bad)", { XX } },
2969 { "(bad)", { XX } },
96fbad73 2970 /* 38 */
ce518a5f
L		 2971 { "(bad)", { XX } },
2972 { "(bad)", { XX } },
2973 { "(bad)", { XX } },
2974 { "(bad)", { XX } },
2975 { "(bad)", { XX } },
2976 { "(bad)", { XX } },
2977 { "(bad)", { XX } },
2978 { "(bad)", { XX } },
96fbad73 2979 /* 40 */
42903f7f
L		 2980 { PREGRP83 },
2981 { PREGRP84 },
2982 { PREGRP85 },
ce518a5f
L		 2983 { "(bad)", { XX } },
2984 { "(bad)", { XX } },
2985 { "(bad)", { XX } },
2986 { "(bad)", { XX } },
2987 { "(bad)", { XX } },
96fbad73 2988 /* 48 */
ce518a5f
L		 2989 { "(bad)", { XX } },
2990 { "(bad)", { XX } },
2991 { "(bad)", { XX } },
2992 { "(bad)", { XX } },
2993 { "(bad)", { XX } },
2994 { "(bad)", { XX } },
2995 { "(bad)", { XX } },
2996 { "(bad)", { XX } },
96fbad73 2997 /* 50 */
ce518a5f
L		 2998 { "(bad)", { XX } },
2999 { "(bad)", { XX } },
3000 { "(bad)", { XX } },
3001 { "(bad)", { XX } },
3002 { "(bad)", { XX } },
3003 { "(bad)", { XX } },
3004 { "(bad)", { XX } },
3005 { "(bad)", { XX } },
96fbad73 3006 /* 58 */
ce518a5f
L		 3007 { "(bad)", { XX } },
3008 { "(bad)", { XX } },
3009 { "(bad)", { XX } },
3010 { "(bad)", { XX } },
3011 { "(bad)", { XX } },
3012 { "(bad)", { XX } },
3013 { "(bad)", { XX } },
3014 { "(bad)", { XX } },
96fbad73 3015 /* 60 */
381d071f
L		 3016 { PREGRP89 },
3017 { PREGRP90 },
3018 { PREGRP91 },
3019 { PREGRP92 },
ce518a5f
L		 3020 { "(bad)", { XX } },
3021 { "(bad)", { XX } },
3022 { "(bad)", { XX } },
3023 { "(bad)", { XX } },
96fbad73 3024 /* 68 */
ce518a5f
L		 3025 { "(bad)", { XX } },
3026 { "(bad)", { XX } },
3027 { "(bad)", { XX } },
3028 { "(bad)", { XX } },
3029 { "(bad)", { XX } },
3030 { "(bad)", { XX } },
3031 { "(bad)", { XX } },
3032 { "(bad)", { XX } },
96fbad73 3033 /* 70 */
ce518a5f
L		 3034 { "(bad)", { XX } },
3035 { "(bad)", { XX } },
3036 { "(bad)", { XX } },
3037 { "(bad)", { XX } },
3038 { "(bad)", { XX } },
3039 { "(bad)", { XX } },
3040 { "(bad)", { XX } },
3041 { "(bad)", { XX } },
96fbad73 3042 /* 78 */
ce518a5f
L		 3043 { "(bad)", { XX } },
3044 { "(bad)", { XX } },
3045 { "(bad)", { XX } },
3046 { "(bad)", { XX } },
3047 { "(bad)", { XX } },
3048 { "(bad)", { XX } },
3049 { "(bad)", { XX } },
3050 { "(bad)", { XX } },
96fbad73 3051 /* 80 */
ce518a5f
L		 3052 { "(bad)", { XX } },
3053 { "(bad)", { XX } },
3054 { "(bad)", { XX } },
3055 { "(bad)", { XX } },
3056 { "(bad)", { XX } },
3057 { "(bad)", { XX } },
3058 { "(bad)", { XX } },
3059 { "(bad)", { XX } },
96fbad73 3060 /* 88 */
ce518a5f
L		 3061 { "(bad)", { XX } },
3062 { "(bad)", { XX } },
3063 { "(bad)", { XX } },
3064 { "(bad)", { XX } },
3065 { "(bad)", { XX } },
3066 { "(bad)", { XX } },
3067 { "(bad)", { XX } },
3068 { "(bad)", { XX } },
96fbad73 3069 /* 90 */
ce518a5f
L		 3070 { "(bad)", { XX } },
3071 { "(bad)", { XX } },
3072 { "(bad)", { XX } },
3073 { "(bad)", { XX } },
3074 { "(bad)", { XX } },
3075 { "(bad)", { XX } },
3076 { "(bad)", { XX } },
3077 { "(bad)", { XX } },
96fbad73 3078 /* 98 */
ce518a5f
L		 3079 { "(bad)", { XX } },
3080 { "(bad)", { XX } },
3081 { "(bad)", { XX } },
3082 { "(bad)", { XX } },
3083 { "(bad)", { XX } },
3084 { "(bad)", { XX } },
3085 { "(bad)", { XX } },
3086 { "(bad)", { XX } },
96fbad73 3087 /* a0 */
ce518a5f
L		 3088 { "(bad)", { XX } },
3089 { "(bad)", { XX } },
3090 { "(bad)", { XX } },
3091 { "(bad)", { XX } },
3092 { "(bad)", { XX } },
3093 { "(bad)", { XX } },
3094 { "(bad)", { XX } },
3095 { "(bad)", { XX } },
96fbad73 3096 /* a8 */
ce518a5f
L		 3097 { "(bad)", { XX } },
3098 { "(bad)", { XX } },
3099 { "(bad)", { XX } },
3100 { "(bad)", { XX } },
3101 { "(bad)", { XX } },
3102 { "(bad)", { XX } },
3103 { "(bad)", { XX } },
3104 { "(bad)", { XX } },
96fbad73 3105 /* b0 */
ce518a5f
L		 3106 { "(bad)", { XX } },
3107 { "(bad)", { XX } },
3108 { "(bad)", { XX } },
3109 { "(bad)", { XX } },
3110 { "(bad)", { XX } },
3111 { "(bad)", { XX } },
3112 { "(bad)", { XX } },
3113 { "(bad)", { XX } },
96fbad73 3114 /* b8 */
ce518a5f
L		 3115 { "(bad)", { XX } },
3116 { "(bad)", { XX } },
3117 { "(bad)", { XX } },
3118 { "(bad)", { XX } },
3119 { "(bad)", { XX } },
3120 { "(bad)", { XX } },
3121 { "(bad)", { XX } },
3122 { "(bad)", { XX } },
96fbad73 3123 /* c0 */
ce518a5f
L		 3124 { "(bad)", { XX } },
3125 { "(bad)", { XX } },
3126 { "(bad)", { XX } },
3127 { "(bad)", { XX } },
3128 { "(bad)", { XX } },
3129 { "(bad)", { XX } },
3130 { "(bad)", { XX } },
3131 { "(bad)", { XX } },
96fbad73 3132 /* c8 */
ce518a5f
L		 3133 { "(bad)", { XX } },
3134 { "(bad)", { XX } },
3135 { "(bad)", { XX } },
3136 { "(bad)", { XX } },
3137 { "(bad)", { XX } },
3138 { "(bad)", { XX } },
3139 { "(bad)", { XX } },
3140 { "(bad)", { XX } },
96fbad73 3141 /* d0 */
ce518a5f
L		 3142 { "(bad)", { XX } },
3143 { "(bad)", { XX } },
3144 { "(bad)", { XX } },
3145 { "(bad)", { XX } },
3146 { "(bad)", { XX } },
3147 { "(bad)", { XX } },
3148 { "(bad)", { XX } },
3149 { "(bad)", { XX } },
96fbad73 3150 /* d8 */
ce518a5f
L		 3151 { "(bad)", { XX } },
3152 { "(bad)", { XX } },
3153 { "(bad)", { XX } },
3154 { "(bad)", { XX } },
3155 { "(bad)", { XX } },
3156 { "(bad)", { XX } },
3157 { "(bad)", { XX } },
3158 { "(bad)", { XX } },
96fbad73 3159 /* e0 */
ce518a5f
L		 3160 { "(bad)", { XX } },
3161 { "(bad)", { XX } },
3162 { "(bad)", { XX } },
3163 { "(bad)", { XX } },
3164 { "(bad)", { XX } },
3165 { "(bad)", { XX } },
3166 { "(bad)", { XX } },
3167 { "(bad)", { XX } },
96fbad73 3168 /* e8 */
ce518a5f
L		 3169 { "(bad)", { XX } },
3170 { "(bad)", { XX } },
3171 { "(bad)", { XX } },
3172 { "(bad)", { XX } },
3173 { "(bad)", { XX } },
3174 { "(bad)", { XX } },
3175 { "(bad)", { XX } },
3176 { "(bad)", { XX } },
96fbad73 3177 /* f0 */
ce518a5f
L		 3178 { "(bad)", { XX } },
3179 { "(bad)", { XX } },
3180 { "(bad)", { XX } },
3181 { "(bad)", { XX } },
3182 { "(bad)", { XX } },
3183 { "(bad)", { XX } },
3184 { "(bad)", { XX } },
3185 { "(bad)", { XX } },
96fbad73 3186 /* f8 */
ce518a5f
L		 3187 { "(bad)", { XX } },
3188 { "(bad)", { XX } },
3189 { "(bad)", { XX } },
3190 { "(bad)", { XX } },
3191 { "(bad)", { XX } },
3192 { "(bad)", { XX } },
3193 { "(bad)", { XX } },
3194 { "(bad)", { XX } },
3195 }
331d2d0d
L		 3196};
3197
c608c12e
AM		 3198#define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
3199
252b5132 3200static void
26ca5450 3201ckprefix (void)
252b5132 3202{
52b15da3
JH		 3203 int newrex;
3204 rex = 0;
252b5132 3205 prefixes = 0;
7d421014 3206 used_prefixes = 0;
52b15da3 3207 rex_used = 0;
252b5132
RH		 3208 while (1)
3209 {
3210 FETCH_DATA (the_info, codep + 1);
52b15da3 3211 newrex = 0;
252b5132
RH		 3212 switch (*codep)
3213 {
52b15da3
JH		 3214 /* REX prefixes family. */
3215 case 0x40:
3216 case 0x41:
3217 case 0x42:
3218 case 0x43:
3219 case 0x44:
3220 case 0x45:
3221 case 0x46:
3222 case 0x47:
3223 case 0x48:
3224 case 0x49:
3225 case 0x4a:
3226 case 0x4b:
3227 case 0x4c:
3228 case 0x4d:
3229 case 0x4e:
3230 case 0x4f:
cb712a9e 3231 if (address_mode == mode_64bit)
52b15da3
JH		 3232 newrex = *codep;
3233 else
3234 return;
3235 break;
252b5132
RH		 3236 case 0xf3:
3237 prefixes |= PREFIX_REPZ;
3238 break;
3239 case 0xf2:
3240 prefixes |= PREFIX_REPNZ;
3241 break;
3242 case 0xf0:
3243 prefixes |= PREFIX_LOCK;
3244 break;
3245 case 0x2e:
3246 prefixes |= PREFIX_CS;
3247 break;
3248 case 0x36:
3249 prefixes |= PREFIX_SS;
3250 break;
3251 case 0x3e:
3252 prefixes |= PREFIX_DS;
3253 break;
3254 case 0x26:
3255 prefixes |= PREFIX_ES;
3256 break;
3257 case 0x64:
3258 prefixes |= PREFIX_FS;
3259 break;
3260 case 0x65:
3261 prefixes |= PREFIX_GS;
3262 break;
3263 case 0x66:
3264 prefixes |= PREFIX_DATA;
3265 break;
3266 case 0x67:
3267 prefixes |= PREFIX_ADDR;
3268 break;
5076851f 3269 case FWAIT_OPCODE:
252b5132
RH		 3270 /* fwait is really an instruction. If there are prefixes
3271 before the fwait, they belong to the fwait, *not* to the
3272 following instruction. */
3e7d61b2 3273 if (prefixes || rex)
252b5132
RH		 3274 {
3275 prefixes |= PREFIX_FWAIT;
3276 codep++;
3277 return;
3278 }
3279 prefixes = PREFIX_FWAIT;
3280 break;
3281 default:
3282 return;
3283 }
52b15da3
JH		 3284 /* Rex is ignored when followed by another prefix. */
3285 if (rex)
3286 {
3e7d61b2
AM		 3287 rex_used = rex;
3288 return;
52b15da3
JH		 3289 }
3290 rex = newrex;
252b5132
RH		 3291 codep++;
3292 }
3293}
3294
7d421014
ILT		 3295/* Return the name of the prefix byte PREF, or NULL if PREF is not a
3296 prefix byte. */
3297
3298static const char *
26ca5450 3299prefix_name (int pref, int sizeflag)
7d421014 3300{
0003779b
L		 3301 static const char *rexes [16] =
3302 {
3303 "rex", /* 0x40 */
3304 "rex.B", /* 0x41 */
3305 "rex.X", /* 0x42 */
3306 "rex.XB", /* 0x43 */
3307 "rex.R", /* 0x44 */
3308 "rex.RB", /* 0x45 */
3309 "rex.RX", /* 0x46 */
3310 "rex.RXB", /* 0x47 */
3311 "rex.W", /* 0x48 */
3312 "rex.WB", /* 0x49 */
3313 "rex.WX", /* 0x4a */
3314 "rex.WXB", /* 0x4b */
3315 "rex.WR", /* 0x4c */
3316 "rex.WRB", /* 0x4d */
3317 "rex.WRX", /* 0x4e */
3318 "rex.WRXB", /* 0x4f */
3319 };
3320
7d421014
ILT		 3321 switch (pref)
3322 {
52b15da3
JH		 3323 /* REX prefixes family. */
3324 case 0x40:
52b15da3 3325 case 0x41:
52b15da3 3326 case 0x42:
52b15da3 3327 case 0x43:
52b15da3 3328 case 0x44:
52b15da3 3329 case 0x45:
52b15da3 3330 case 0x46:
52b15da3 3331 case 0x47:
52b15da3 3332 case 0x48:
52b15da3 3333 case 0x49:
52b15da3 3334 case 0x4a:
52b15da3 3335 case 0x4b:
52b15da3 3336 case 0x4c:
52b15da3 3337 case 0x4d:
52b15da3 3338 case 0x4e:
52b15da3 3339 case 0x4f:
0003779b 3340 return rexes [pref - 0x40];
7d421014
ILT		 3341 case 0xf3:
3342 return "repz";
3343 case 0xf2:
3344 return "repnz";
3345 case 0xf0:
3346 return "lock";
3347 case 0x2e:
3348 return "cs";
3349 case 0x36:
3350 return "ss";
3351 case 0x3e:
3352 return "ds";
3353 case 0x26:
3354 return "es";
3355 case 0x64:
3356 return "fs";
3357 case 0x65:
3358 return "gs";
3359 case 0x66:
3360 return (sizeflag & DFLAG) ? "data16" : "data32";
3361 case 0x67:
cb712a9e 3362 if (address_mode == mode_64bit)
db6eb5be 3363 return (sizeflag & AFLAG) ? "addr32" : "addr64";
c1a64871 3364 else
2888cb7a 3365 return (sizeflag & AFLAG) ? "addr16" : "addr32";
7d421014
ILT		 3366 case FWAIT_OPCODE:
3367 return "fwait";
3368 default:
3369 return NULL;
3370 }
3371}
3372
ce518a5f
L		 3373static char op_out[MAX_OPERANDS][100];
3374static int op_ad, op_index[MAX_OPERANDS];
1d9f512f 3375static int two_source_ops;
ce518a5f
L		 3376static bfd_vma op_address[MAX_OPERANDS];
3377static bfd_vma op_riprel[MAX_OPERANDS];
52b15da3 3378static bfd_vma start_pc;
ce518a5f 3379
252b5132
RH		 3380/*
3381 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
3382 * (see topic "Redundant prefixes" in the "Differences from 8086"
3383 * section of the "Virtual 8086 Mode" chapter.)
3384 * 'pc' should be the address of this instruction, it will
3385 * be used to print the target address if this is a relative jump or call
3386 * The function returns the length of this instruction in bytes.
3387 */
3388
252b5132
RH		 3389static char intel_syntax;
3390static char open_char;
3391static char close_char;
3392static char separator_char;
3393static char scale_char;
3394
e396998b
AM		 3395/* Here for backwards compatibility. When gdb stops using
3396 print_insn_i386_att and print_insn_i386_intel these functions can
3397 disappear, and print_insn_i386 be merged into print_insn. */
252b5132 3398int
26ca5450 3399print_insn_i386_att (bfd_vma pc, disassemble_info *info)
252b5132
RH		 3400{
3401 intel_syntax = 0;
e396998b
AM		 3402
3403 return print_insn (pc, info);
252b5132
RH		 3404}
3405
3406int
26ca5450 3407print_insn_i386_intel (bfd_vma pc, disassemble_info *info)
252b5132
RH		 3408{
3409 intel_syntax = 1;
e396998b
AM		 3410
3411 return print_insn (pc, info);
252b5132
RH		 3412}
3413
e396998b 3414int
26ca5450 3415print_insn_i386 (bfd_vma pc, disassemble_info *info)
e396998b
AM		 3416{
3417 intel_syntax = -1;
3418
3419 return print_insn (pc, info);
3420}
3421
f59a29b9
L		 3422void
3423print_i386_disassembler_options (FILE *stream)
3424{
3425 fprintf (stream, _("\n\
3426The following i386/x86-64 specific disassembler options are supported for use\n\
3427with the -M switch (multiple options should be separated by commas):\n"));
3428
3429 fprintf (stream, _(" x86-64 Disassemble in 64bit mode\n"));
3430 fprintf (stream, _(" i386 Disassemble in 32bit mode\n"));
3431 fprintf (stream, _(" i8086 Disassemble in 16bit mode\n"));
3432 fprintf (stream, _(" att Display instruction in AT&T syntax\n"));
3433 fprintf (stream, _(" intel Display instruction in Intel syntax\n"));
3434 fprintf (stream, _(" addr64 Assume 64bit address size\n"));
3435 fprintf (stream, _(" addr32 Assume 32bit address size\n"));
3436 fprintf (stream, _(" addr16 Assume 16bit address size\n"));
3437 fprintf (stream, _(" data32 Assume 32bit data size\n"));
3438 fprintf (stream, _(" data16 Assume 16bit data size\n"));
3439 fprintf (stream, _(" suffix Always display instruction suffix in AT&T syntax\n"));
3440}
3441
e396998b 3442static int
26ca5450 3443print_insn (bfd_vma pc, disassemble_info *info)
252b5132 3444{
2da11e11 3445 const struct dis386 *dp;
252b5132 3446 int i;
ce518a5f 3447 char *op_txt[MAX_OPERANDS];
252b5132 3448 int needcomma;
eec0f4ca
L		 3449 unsigned char uses_DATA_prefix, uses_LOCK_prefix;
3450 unsigned char uses_REPNZ_prefix, uses_REPZ_prefix;
e396998b
AM		 3451 int sizeflag;
3452 const char *p;
252b5132 3453 struct dis_private priv;
eec0f4ca 3454 unsigned char op;
252b5132 3455
cb712a9e
L		 3456 if (info->mach == bfd_mach_x86_64_intel_syntax
3457 || info->mach == bfd_mach_x86_64)
3458 address_mode = mode_64bit;
3459 else
3460 address_mode = mode_32bit;
52b15da3 3461
8373f971 3462 if (intel_syntax == (char) -1)
e396998b
AM		 3463 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
3464 || info->mach == bfd_mach_x86_64_intel_syntax);
3465
2da11e11 3466 if (info->mach == bfd_mach_i386_i386
52b15da3
JH		 3467 || info->mach == bfd_mach_x86_64
3468 || info->mach == bfd_mach_i386_i386_intel_syntax
3469 || info->mach == bfd_mach_x86_64_intel_syntax)
e396998b 3470 priv.orig_sizeflag = AFLAG | DFLAG;
2da11e11 3471 else if (info->mach == bfd_mach_i386_i8086)
e396998b 3472 priv.orig_sizeflag = 0;
2da11e11
AM		 3473 else
3474 abort ();
e396998b
AM		 3475
3476 for (p = info->disassembler_options; p != NULL; )
3477 {
0112cd26 3478 if (CONST_STRNEQ (p, "x86-64"))
e396998b 3479 {
cb712a9e 3480 address_mode = mode_64bit;
e396998b
AM		 3481 priv.orig_sizeflag = AFLAG | DFLAG;
3482 }
0112cd26 3483 else if (CONST_STRNEQ (p, "i386"))
e396998b 3484 {
cb712a9e 3485 address_mode = mode_32bit;
e396998b
AM		 3486 priv.orig_sizeflag = AFLAG | DFLAG;
3487 }
0112cd26 3488 else if (CONST_STRNEQ (p, "i8086"))
e396998b 3489 {
cb712a9e 3490 address_mode = mode_16bit;
e396998b
AM		 3491 priv.orig_sizeflag = 0;
3492 }
0112cd26 3493 else if (CONST_STRNEQ (p, "intel"))
e396998b
AM		 3494 {
3495 intel_syntax = 1;
3496 }
0112cd26 3497 else if (CONST_STRNEQ (p, "att"))
e396998b
AM		 3498 {
3499 intel_syntax = 0;
3500 }
0112cd26 3501 else if (CONST_STRNEQ (p, "addr"))
e396998b 3502 {
f59a29b9
L		 3503 if (address_mode == mode_64bit)
3504 {
3505 if (p[4] == '3' && p[5] == '2')
3506 priv.orig_sizeflag &= ~AFLAG;
3507 else if (p[4] == '6' && p[5] == '4')
3508 priv.orig_sizeflag |= AFLAG;
3509 }
3510 else
3511 {
3512 if (p[4] == '1' && p[5] == '6')
3513 priv.orig_sizeflag &= ~AFLAG;
3514 else if (p[4] == '3' && p[5] == '2')
3515 priv.orig_sizeflag |= AFLAG;
3516 }
e396998b 3517 }
0112cd26 3518 else if (CONST_STRNEQ (p, "data"))
e396998b
AM		 3519 {
3520 if (p[4] == '1' && p[5] == '6')
3521 priv.orig_sizeflag &= ~DFLAG;
3522 else if (p[4] == '3' && p[5] == '2')
3523 priv.orig_sizeflag |= DFLAG;
3524 }
0112cd26 3525 else if (CONST_STRNEQ (p, "suffix"))
e396998b
AM		 3526 priv.orig_sizeflag |= SUFFIX_ALWAYS;
3527
3528 p = strchr (p, ',');
3529 if (p != NULL)
3530 p++;
3531 }
3532
3533 if (intel_syntax)
3534 {
3535 names64 = intel_names64;
3536 names32 = intel_names32;
3537 names16 = intel_names16;
3538 names8 = intel_names8;
3539 names8rex = intel_names8rex;
3540 names_seg = intel_names_seg;
3541 index16 = intel_index16;
3542 open_char = '[';
3543 close_char = ']';
3544 separator_char = '+';
3545 scale_char = '*';
3546 }
3547 else
3548 {
3549 names64 = att_names64;
3550 names32 = att_names32;
3551 names16 = att_names16;
3552 names8 = att_names8;
3553 names8rex = att_names8rex;
3554 names_seg = att_names_seg;
3555 index16 = att_index16;
3556 open_char = '(';
3557 close_char = ')';
3558 separator_char = ',';
3559 scale_char = ',';
3560 }
2da11e11 3561
4fe53c98 3562 /* The output looks better if we put 7 bytes on a line, since that
c608c12e 3563 puts most long word instructions on a single line. */
4fe53c98 3564 info->bytes_per_line = 7;
252b5132 3565
26ca5450 3566 info->private_data = &priv;
252b5132
RH		 3567 priv.max_fetched = priv.the_buffer;
3568 priv.insn_start = pc;
252b5132
RH		 3569
3570 obuf[0] = 0;
ce518a5f
L		 3571 for (i = 0; i < MAX_OPERANDS; ++i)
3572 {
3573 op_out[i][0] = 0;
3574 op_index[i] = -1;
3575 }
252b5132
RH		 3576
3577 the_info = info;
3578 start_pc = pc;
e396998b
AM		 3579 start_codep = priv.the_buffer;
3580 codep = priv.the_buffer;
252b5132 3581
5076851f
ILT		 3582 if (setjmp (priv.bailout) != 0)
3583 {
7d421014
ILT		 3584 const char *name;
3585
5076851f 3586 /* Getting here means we tried for data but didn't get it. That
e396998b
AM		 3587 means we have an incomplete instruction of some sort. Just
3588 print the first byte as a prefix or a .byte pseudo-op. */
3589 if (codep > priv.the_buffer)
5076851f 3590 {
e396998b 3591 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
7d421014
ILT		 3592 if (name != NULL)
3593 (*info->fprintf_func) (info->stream, "%s", name);
3594 else
5076851f 3595 {
7d421014
ILT		 3596 /* Just print the first byte as a .byte instruction. */
3597 (*info->fprintf_func) (info->stream, ".byte 0x%x",
e396998b 3598 (unsigned int) priv.the_buffer[0]);
5076851f 3599 }
5076851f 3600
7d421014 3601 return 1;
5076851f
ILT		 3602 }
3603
3604 return -1;
3605 }
3606
52b15da3 3607 obufp = obuf;
252b5132
RH		 3608 ckprefix ();
3609
3610 insn_codep = codep;
e396998b 3611 sizeflag = priv.orig_sizeflag;
252b5132
RH		 3612
3613 FETCH_DATA (info, codep + 1);
3614 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
3615
3e7d61b2
AM		 3616 if (((prefixes & PREFIX_FWAIT)
3617 && ((*codep < 0xd8) || (*codep > 0xdf)))
3618 || (rex && rex_used))
252b5132 3619 {
7d421014
ILT		 3620 const char *name;
3621
3e7d61b2
AM		 3622 /* fwait not followed by floating point instruction, or rex followed
3623 by other prefixes. Print the first prefix. */
e396998b 3624 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
7d421014
ILT		 3625 if (name == NULL)
3626 name = INTERNAL_DISASSEMBLER_ERROR;
3627 (*info->fprintf_func) (info->stream, "%s", name);
3628 return 1;
252b5132
RH		 3629 }
3630
eec0f4ca 3631 op = 0;
252b5132
RH		 3632 if (*codep == 0x0f)
3633 {
eec0f4ca 3634 unsigned char threebyte;
252b5132 3635 FETCH_DATA (info, codep + 2);
eec0f4ca
L		 3636 threebyte = *++codep;
3637 dp = &dis386_twobyte[threebyte];
252b5132 3638 need_modrm = twobyte_has_modrm[*codep];
eec0f4ca
L		 3639 uses_DATA_prefix = twobyte_uses_DATA_prefix[*codep];
3640 uses_REPNZ_prefix = twobyte_uses_REPNZ_prefix[*codep];
3641 uses_REPZ_prefix = twobyte_uses_REPZ_prefix[*codep];
c4a530c5 3642 uses_LOCK_prefix = (*codep & ~0x02) == 0x20;
eec0f4ca 3643 codep++;
ce518a5f 3644 if (dp->name == NULL && dp->op[0].bytemode == IS_3BYTE_OPCODE)
eec0f4ca
L		 3645 {
3646 FETCH_DATA (info, codep + 2);
3647 op = *codep++;
3648 switch (threebyte)
3649 {
3650 case 0x38:
3651 uses_DATA_prefix = threebyte_0x38_uses_DATA_prefix[op];
3652 uses_REPNZ_prefix = threebyte_0x38_uses_REPNZ_prefix[op];
3653 uses_REPZ_prefix = threebyte_0x38_uses_REPZ_prefix[op];
3654 break;
3655 case 0x3a:
3656 uses_DATA_prefix = threebyte_0x3a_uses_DATA_prefix[op];
3657 uses_REPNZ_prefix = threebyte_0x3a_uses_REPNZ_prefix[op];
3658 uses_REPZ_prefix = threebyte_0x3a_uses_REPZ_prefix[op];
3659 break;
3660 default:
3661 break;
3662 }
3663 }
252b5132
RH		 3664 }
3665 else
3666 {
6439fc28 3667 dp = &dis386[*codep];
252b5132 3668 need_modrm = onebyte_has_modrm[*codep];
eec0f4ca
L		 3669 uses_DATA_prefix = 0;
3670 uses_REPNZ_prefix = 0;
8b38ad71
L		 3671 /* pause is 0xf3 0x90. */
3672 uses_REPZ_prefix = *codep == 0x90;
c4a530c5 3673 uses_LOCK_prefix = 0;
eec0f4ca 3674 codep++;
252b5132 3675 }
246c51aa 3676
eec0f4ca 3677 if (!uses_REPZ_prefix && (prefixes & PREFIX_REPZ))
7d421014
ILT		 3678 {
3679 oappend ("repz ");
3680 used_prefixes |= PREFIX_REPZ;
3681 }
eec0f4ca 3682 if (!uses_REPNZ_prefix && (prefixes & PREFIX_REPNZ))
7d421014
ILT		 3683 {
3684 oappend ("repnz ");
3685 used_prefixes |= PREFIX_REPNZ;
3686 }
050dfa73 3687
c4a530c5 3688 if (!uses_LOCK_prefix && (prefixes & PREFIX_LOCK))
7d421014
ILT		 3689 {
3690 oappend ("lock ");
3691 used_prefixes |= PREFIX_LOCK;
3692 }
c608c12e 3693
c608c12e
AM		 3694 if (prefixes & PREFIX_ADDR)
3695 {
3696 sizeflag ^= AFLAG;
ce518a5f 3697 if (dp->op[2].bytemode != loop_jcxz_mode || intel_syntax)
3ffd33cf 3698 {
cb712a9e 3699 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
3ffd33cf
AM		 3700 oappend ("addr32 ");
3701 else
3702 oappend ("addr16 ");
3703 used_prefixes |= PREFIX_ADDR;
3704 }
3705 }
3706
eec0f4ca 3707 if (!uses_DATA_prefix && (prefixes & PREFIX_DATA))
3ffd33cf
AM		 3708 {
3709 sizeflag ^= DFLAG;
ce518a5f
L		 3710 if (dp->op[2].bytemode == cond_jump_mode
3711 && dp->op[0].bytemode == v_mode
6439fc28 3712 && !intel_syntax)
3ffd33cf
AM		 3713 {
3714 if (sizeflag & DFLAG)
3715 oappend ("data32 ");
3716 else
3717 oappend ("data16 ");
3718 used_prefixes |= PREFIX_DATA;
3719 }
3720 }
3721
ce518a5f 3722 if (dp->name == NULL && dp->op[0].bytemode == IS_3BYTE_OPCODE)
331d2d0d 3723 {
ce518a5f 3724 dp = &three_byte_table[dp->op[1].bytemode][op];
7967e09e
L		 3725 modrm.mod = (*codep >> 6) & 3;
3726 modrm.reg = (*codep >> 3) & 7;
3727 modrm.rm = *codep & 7;
331d2d0d
L		 3728 }
3729 else if (need_modrm)
252b5132
RH		 3730 {
3731 FETCH_DATA (info, codep + 1);
7967e09e
L		 3732 modrm.mod = (*codep >> 6) & 3;
3733 modrm.reg = (*codep >> 3) & 7;
3734 modrm.rm = *codep & 7;
252b5132
RH		 3735 }
3736
ce518a5f 3737 if (dp->name == NULL && dp->op[0].bytemode == FLOATCODE)
252b5132
RH		 3738 {
3739 dofloat (sizeflag);
3740 }
3741 else
3742 {
041bd2e0 3743 int index;
252b5132 3744 if (dp->name == NULL)
c608c12e 3745 {
ce518a5f 3746 switch (dp->op[0].bytemode)
c608c12e 3747 {
6439fc28 3748 case USE_GROUPS:
7967e09e 3749 dp = &grps[dp->op[1].bytemode][modrm.reg];
6439fc28
AM		 3750 break;
3751
3752 case USE_PREFIX_USER_TABLE:
3753 index = 0;
3754 used_prefixes |= (prefixes & PREFIX_REPZ);
3755 if (prefixes & PREFIX_REPZ)
3756 index = 1;
3757 else
3758 {
d81afd0c
L		 3759 /* We should check PREFIX_REPNZ and PREFIX_REPZ
3760 before PREFIX_DATA. */
3761 used_prefixes |= (prefixes & PREFIX_REPNZ);
3762 if (prefixes & PREFIX_REPNZ)
3763 index = 3;
6439fc28
AM		 3764 else
3765 {
d81afd0c
L		 3766 used_prefixes |= (prefixes & PREFIX_DATA);
3767 if (prefixes & PREFIX_DATA)
3768 index = 2;
6439fc28
AM		 3769 }
3770 }
ce518a5f 3771 dp = &prefix_user_table[dp->op[1].bytemode][index];
6439fc28 3772 break;
252b5132 3773
6439fc28 3774 case X86_64_SPECIAL:
cb712a9e 3775 index = address_mode == mode_64bit ? 1 : 0;
ce518a5f 3776 dp = &x86_64_table[dp->op[1].bytemode][index];
6439fc28 3777 break;
252b5132 3778
6439fc28
AM		 3779 default:
3780 oappend (INTERNAL_DISASSEMBLER_ERROR);
3781 break;
3782 }
3783 }
252b5132 3784
7a3c21c9 3785 if (dp->name != NULL && putop (dp->name, sizeflag) == 0)
ce518a5f
L		 3786 {
3787 for (i = 0; i < MAX_OPERANDS; ++i)
3788 {
246c51aa 3789 obufp = op_out[i];
ce518a5f
L		 3790 op_ad = MAX_OPERANDS - 1 - i;
3791 if (dp->op[i].rtn)
3792 (*dp->op[i].rtn) (dp->op[i].bytemode, sizeflag);
3793 }
6439fc28 3794 }
252b5132
RH		 3795 }
3796
7d421014
ILT		 3797 /* See if any prefixes were not used. If so, print the first one
3798 separately. If we don't do this, we'll wind up printing an
3799 instruction stream which does not precisely correspond to the
3800 bytes we are disassembling. */
3801 if ((prefixes & ~used_prefixes) != 0)
3802 {
3803 const char *name;
3804
e396998b 3805 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
7d421014
ILT		 3806 if (name == NULL)
3807 name = INTERNAL_DISASSEMBLER_ERROR;
3808 (*info->fprintf_func) (info->stream, "%s", name);
3809 return 1;
3810 }
52b15da3
JH		 3811 if (rex & ~rex_used)
3812 {
3813 const char *name;
e396998b 3814 name = prefix_name (rex | 0x40, priv.orig_sizeflag);
52b15da3
JH		 3815 if (name == NULL)
3816 name = INTERNAL_DISASSEMBLER_ERROR;
3817 (*info->fprintf_func) (info->stream, "%s ", name);
3818 }
7d421014 3819
252b5132
RH		 3820 obufp = obuf + strlen (obuf);
3821 for (i = strlen (obuf); i < 6; i++)
3822 oappend (" ");
3823 oappend (" ");
3824 (*info->fprintf_func) (info->stream, "%s", obuf);
3825
3826 /* The enter and bound instructions are printed with operands in the same
3827 order as the intel book; everything else is printed in reverse order. */
2da11e11 3828 if (intel_syntax || two_source_ops)
252b5132 3829 {
185b1163
L		 3830 bfd_vma riprel;
3831
ce518a5f
L		 3832 for (i = 0; i < MAX_OPERANDS; ++i)
3833 op_txt[i] = op_out[i];
246c51aa 3834
ce518a5f
L		 3835 for (i = 0; i < (MAX_OPERANDS >> 1); ++i)
3836 {
3837 op_ad = op_index[i];
3838 op_index[i] = op_index[MAX_OPERANDS - 1 - i];
3839 op_index[MAX_OPERANDS - 1 - i] = op_ad;
185b1163
L		 3840 riprel = op_riprel[i];
3841 op_riprel[i] = op_riprel [MAX_OPERANDS - 1 - i];
3842 op_riprel[MAX_OPERANDS - 1 - i] = riprel;
ce518a5f 3843 }
252b5132
RH		 3844 }
3845 else
3846 {
ce518a5f
L		 3847 for (i = 0; i < MAX_OPERANDS; ++i)
3848 op_txt[MAX_OPERANDS - 1 - i] = op_out[i];
050dfa73
MM		 3849 }
3850
ce518a5f
L		 3851 needcomma = 0;
3852 for (i = 0; i < MAX_OPERANDS; ++i)
3853 if (*op_txt[i])
3854 {
3855 if (needcomma)
3856 (*info->fprintf_func) (info->stream, ",");
3857 if (op_index[i] != -1 && !op_riprel[i])
3858 (*info->print_address_func) ((bfd_vma) op_address[op_index[i]], info);
3859 else
3860 (*info->fprintf_func) (info->stream, "%s", op_txt[i]);
3861 needcomma = 1;
3862 }
050dfa73 3863
ce518a5f 3864 for (i = 0; i < MAX_OPERANDS; i++)
52b15da3
JH		 3865 if (op_index[i] != -1 && op_riprel[i])
3866 {
3867 (*info->fprintf_func) (info->stream, " # ");
3868 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
3869 + op_address[op_index[i]]), info);
185b1163 3870 break;
52b15da3 3871 }
e396998b 3872 return codep - priv.the_buffer;
252b5132
RH		 3873}
3874
6439fc28 3875static const char *float_mem[] = {
252b5132 3876 /* d8 */
6439fc28
AM		 3877 "fadd{s||s|}",
3878 "fmul{s||s|}",
3879 "fcom{s||s|}",
3880 "fcomp{s||s|}",
3881 "fsub{s||s|}",
3882 "fsubr{s||s|}",
3883 "fdiv{s||s|}",
3884 "fdivr{s||s|}",
db6eb5be 3885 /* d9 */
6439fc28 3886 "fld{s||s|}",
252b5132 3887 "(bad)",
6439fc28
AM		 3888 "fst{s||s|}",
3889 "fstp{s||s|}",
9306ca4a 3890 "fldenvIC",
252b5132 3891 "fldcw",
9306ca4a 3892 "fNstenvIC",
252b5132
RH		 3893 "fNstcw",
3894 /* da */
6439fc28
AM		 3895 "fiadd{l||l|}",
3896 "fimul{l||l|}",
3897 "ficom{l||l|}",
3898 "ficomp{l||l|}",
3899 "fisub{l||l|}",
3900 "fisubr{l||l|}",
3901 "fidiv{l||l|}",
3902 "fidivr{l||l|}",
252b5132 3903 /* db */
6439fc28 3904 "fild{l||l|}",
ca164297 3905 "fisttp{l||l|}",
6439fc28
AM		 3906 "fist{l||l|}",
3907 "fistp{l||l|}",
252b5132 3908 "(bad)",
6439fc28 3909 "fld{t||t|}",
252b5132 3910 "(bad)",
6439fc28 3911 "fstp{t||t|}",
252b5132 3912 /* dc */
6439fc28
AM		 3913 "fadd{l||l|}",
3914 "fmul{l||l|}",
3915 "fcom{l||l|}",
3916 "fcomp{l||l|}",
3917 "fsub{l||l|}",
3918 "fsubr{l||l|}",
3919 "fdiv{l||l|}",
3920 "fdivr{l||l|}",
252b5132 3921 /* dd */
6439fc28 3922 "fld{l||l|}",
1d9f512f 3923 "fisttp{ll||ll|}",
6439fc28
AM		 3924 "fst{l||l|}",
3925 "fstp{l||l|}",
9306ca4a 3926 "frstorIC",
252b5132 3927 "(bad)",
9306ca4a 3928 "fNsaveIC",
252b5132
RH		 3929 "fNstsw",
3930 /* de */
3931 "fiadd",
3932 "fimul",
3933 "ficom",
3934 "ficomp",
3935 "fisub",
3936 "fisubr",
3937 "fidiv",
3938 "fidivr",
3939 /* df */
3940 "fild",
ca164297 3941 "fisttp",
252b5132
RH		 3942 "fist",
3943 "fistp",
3944 "fbld",
6439fc28 3945 "fild{ll||ll|}",
252b5132 3946 "fbstp",
1d9f512f
AM		 3947 "fistp{ll||ll|}",
3948};
3949
3950static const unsigned char float_mem_mode[] = {
3951 /* d8 */
3952 d_mode,
3953 d_mode,
3954 d_mode,
3955 d_mode,
3956 d_mode,
3957 d_mode,
3958 d_mode,
3959 d_mode,
3960 /* d9 */
3961 d_mode,
3962 0,
3963 d_mode,
3964 d_mode,
3965 0,
3966 w_mode,
3967 0,
3968 w_mode,
3969 /* da */
3970 d_mode,
3971 d_mode,
3972 d_mode,
3973 d_mode,
3974 d_mode,
3975 d_mode,
3976 d_mode,
3977 d_mode,
3978 /* db */
3979 d_mode,
3980 d_mode,
3981 d_mode,
3982 d_mode,
3983 0,
9306ca4a 3984 t_mode,
1d9f512f 3985 0,
9306ca4a 3986 t_mode,
1d9f512f
AM		 3987 /* dc */
3988 q_mode,
3989 q_mode,
3990 q_mode,
3991 q_mode,
3992 q_mode,
3993 q_mode,
3994 q_mode,
3995 q_mode,
3996 /* dd */
3997 q_mode,
3998 q_mode,
3999 q_mode,
4000 q_mode,
4001 0,
4002 0,
4003 0,
4004 w_mode,
4005 /* de */
4006 w_mode,
4007 w_mode,
4008 w_mode,
4009 w_mode,
4010 w_mode,
4011 w_mode,
4012 w_mode,
4013 w_mode,
4014 /* df */
4015 w_mode,
4016 w_mode,
4017 w_mode,
4018 w_mode,
9306ca4a 4019 t_mode,
1d9f512f 4020 q_mode,
9306ca4a 4021 t_mode,
1d9f512f 4022 q_mode
252b5132
RH		 4023};
4024
ce518a5f
L		 4025#define ST { OP_ST, 0 }
4026#define STi { OP_STi, 0 }
252b5132 4027
4efba78c
L		 4028#define FGRPd9_2 NULL, { { NULL, 0 } }
4029#define FGRPd9_4 NULL, { { NULL, 1 } }
4030#define FGRPd9_5 NULL, { { NULL, 2 } }
4031#define FGRPd9_6 NULL, { { NULL, 3 } }
4032#define FGRPd9_7 NULL, { { NULL, 4 } }
4033#define FGRPda_5 NULL, { { NULL, 5 } }
4034#define FGRPdb_4 NULL, { { NULL, 6 } }
4035#define FGRPde_3 NULL, { { NULL, 7 } }
4036#define FGRPdf_4 NULL, { { NULL, 8 } }
252b5132 4037
2da11e11 4038static const struct dis386 float_reg[][8] = {
252b5132
RH		 4039 /* d8 */
4040 {
ce518a5f
L		 4041 { "fadd", { ST, STi } },
4042 { "fmul", { ST, STi } },
4043 { "fcom", { STi } },
4044 { "fcomp", { STi } },
4045 { "fsub", { ST, STi } },
4046 { "fsubr", { ST, STi } },
4047 { "fdiv", { ST, STi } },
4048 { "fdivr", { ST, STi } },
252b5132
RH		 4049 },
4050 /* d9 */
4051 {
ce518a5f
L		 4052 { "fld", { STi } },
4053 { "fxch", { STi } },
252b5132 4054 { FGRPd9_2 },
ce518a5f 4055 { "(bad)", { XX } },
252b5132
RH		 4056 { FGRPd9_4 },
4057 { FGRPd9_5 },
4058 { FGRPd9_6 },
4059 { FGRPd9_7 },
4060 },
4061 /* da */
4062 {
ce518a5f
L		 4063 { "fcmovb", { ST, STi } },
4064 { "fcmove", { ST, STi } },
4065 { "fcmovbe",{ ST, STi } },
4066 { "fcmovu", { ST, STi } },
4067 { "(bad)", { XX } },
252b5132 4068 { FGRPda_5 },
ce518a5f
L		 4069 { "(bad)", { XX } },
4070 { "(bad)", { XX } },
252b5132
RH		 4071 },
4072 /* db */
4073 {
ce518a5f
L		 4074 { "fcmovnb",{ ST, STi } },
4075 { "fcmovne",{ ST, STi } },
4076 { "fcmovnbe",{ ST, STi } },
4077 { "fcmovnu",{ ST, STi } },
252b5132 4078 { FGRPdb_4 },
ce518a5f
L		 4079 { "fucomi", { ST, STi } },
4080 { "fcomi", { ST, STi } },
4081 { "(bad)", { XX } },
252b5132
RH		 4082 },
4083 /* dc */
4084 {
ce518a5f
L		 4085 { "fadd", { STi, ST } },
4086 { "fmul", { STi, ST } },
4087 { "(bad)", { XX } },
4088 { "(bad)", { XX } },
0b1cf022 4089#if SYSV386_COMPAT
ce518a5f
L		 4090 { "fsub", { STi, ST } },
4091 { "fsubr", { STi, ST } },
4092 { "fdiv", { STi, ST } },
4093 { "fdivr", { STi, ST } },
252b5132 4094#else
ce518a5f
L		 4095 { "fsubr", { STi, ST } },
4096 { "fsub", { STi, ST } },
4097 { "fdivr", { STi, ST } },
4098 { "fdiv", { STi, ST } },
252b5132
RH		 4099#endif
4100 },
4101 /* dd */
4102 {
ce518a5f
L		 4103 { "ffree", { STi } },
4104 { "(bad)", { XX } },
4105 { "fst", { STi } },
4106 { "fstp", { STi } },
4107 { "fucom", { STi } },
4108 { "fucomp", { STi } },
4109 { "(bad)", { XX } },
4110 { "(bad)", { XX } },
252b5132
RH		 4111 },
4112 /* de */
4113 {
ce518a5f
L		 4114 { "faddp", { STi, ST } },
4115 { "fmulp", { STi, ST } },
4116 { "(bad)", { XX } },
252b5132 4117 { FGRPde_3 },
0b1cf022 4118#if SYSV386_COMPAT
ce518a5f
L		 4119 { "fsubp", { STi, ST } },
4120 { "fsubrp", { STi, ST } },
4121 { "fdivp", { STi, ST } },
4122 { "fdivrp", { STi, ST } },
252b5132 4123#else
ce518a5f
L		 4124 { "fsubrp", { STi, ST } },
4125 { "fsubp", { STi, ST } },
4126 { "fdivrp", { STi, ST } },
4127 { "fdivp", { STi, ST } },
252b5132
RH		 4128#endif
4129 },
4130 /* df */
4131 {
ce518a5f
L		 4132 { "ffreep", { STi } },
4133 { "(bad)", { XX } },
4134 { "(bad)", { XX } },
4135 { "(bad)", { XX } },
252b5132 4136 { FGRPdf_4 },
ce518a5f
L		 4137 { "fucomip", { ST, STi } },
4138 { "fcomip", { ST, STi } },
4139 { "(bad)", { XX } },
252b5132
RH		 4140 },
4141};
4142
252b5132
RH		 4143static char *fgrps[][8] = {
4144 /* d9_2 0 */
4145 {
4146 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4147 },
4148
4149 /* d9_4 1 */
4150 {
4151 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
4152 },
4153
4154 /* d9_5 2 */
4155 {
4156 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
4157 },
4158
4159 /* d9_6 3 */
4160 {
4161 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
4162 },
4163
4164 /* d9_7 4 */
4165 {
4166 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
4167 },
4168
4169 /* da_5 5 */
4170 {
4171 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4172 },
4173
4174 /* db_4 6 */
4175 {
4176 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
4177 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
4178 },
4179
4180 /* de_3 7 */
4181 {
4182 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4183 },
4184
4185 /* df_4 8 */
4186 {
4187 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4188 },
4189};
4190
4191static void
26ca5450 4192dofloat (int sizeflag)
252b5132 4193{
2da11e11 4194 const struct dis386 *dp;
252b5132
RH		 4195 unsigned char floatop;
4196
4197 floatop = codep[-1];
4198
7967e09e 4199 if (modrm.mod != 3)
252b5132 4200 {
7967e09e 4201 int fp_indx = (floatop - 0xd8) * 8 + modrm.reg;
1d9f512f
AM		 4202
4203 putop (float_mem[fp_indx], sizeflag);
ce518a5f 4204 obufp = op_out[0];
6e50d963 4205 op_ad = 2;
1d9f512f 4206 OP_E (float_mem_mode[fp_indx], sizeflag);
252b5132
RH		 4207 return;
4208 }
6608db57 4209 /* Skip mod/rm byte. */
4bba6815 4210 MODRM_CHECK;
252b5132
RH		 4211 codep++;
4212
7967e09e 4213 dp = &float_reg[floatop - 0xd8][modrm.reg];
252b5132
RH		 4214 if (dp->name == NULL)
4215 {
7967e09e 4216 putop (fgrps[dp->op[0].bytemode][modrm.rm], sizeflag);
252b5132 4217
6608db57 4218 /* Instruction fnstsw is only one with strange arg. */
252b5132 4219 if (floatop == 0xdf && codep[-1] == 0xe0)
ce518a5f 4220 strcpy (op_out[0], names16[0]);
252b5132
RH		 4221 }
4222 else
4223 {
4224 putop (dp->name, sizeflag);
4225
ce518a5f 4226 obufp = op_out[0];
6e50d963 4227 op_ad = 2;
ce518a5f
L		 4228 if (dp->op[0].rtn)
4229 (*dp->op[0].rtn) (dp->op[0].bytemode, sizeflag);
6e50d963 4230
ce518a5f 4231 obufp = op_out[1];
6e50d963 4232 op_ad = 1;
ce518a5f
L		 4233 if (dp->op[1].rtn)
4234 (*dp->op[1].rtn) (dp->op[1].bytemode, sizeflag);
252b5132
RH		 4235 }
4236}
4237
252b5132 4238static void
26ca5450 4239OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 4240{
422673a9 4241 oappend ("%st" + intel_syntax);
252b5132
RH		 4242}
4243
252b5132 4244static void
26ca5450 4245OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 4246{
7967e09e 4247 sprintf (scratchbuf, "%%st(%d)", modrm.rm);
d708bcba 4248 oappend (scratchbuf + intel_syntax);
252b5132
RH		 4249}
4250
6608db57 4251/* Capital letters in template are macros. */
6439fc28 4252static int
26ca5450 4253putop (const char *template, int sizeflag)
252b5132 4254{
2da11e11 4255 const char *p;
9306ca4a 4256 int alt = 0;
252b5132
RH		 4257
4258 for (p = template; *p; p++)
4259 {
4260 switch (*p)
4261 {
4262 default:
4263 *obufp++ = *p;
4264 break;
6439fc28
AM		 4265 case '{':
4266 alt = 0;
4267 if (intel_syntax)
4268 alt += 1;
cb712a9e 4269 if (address_mode == mode_64bit)
6439fc28
AM		 4270 alt += 2;
4271 while (alt != 0)
4272 {
4273 while (*++p != '|')
4274 {
4275 if (*p == '}')
4276 {
4277 /* Alternative not valid. */
4278 strcpy (obuf, "(bad)");
4279 obufp = obuf + 5;
4280 return 1;
4281 }
4282 else if (*p == '\0')
4283 abort ();
4284 }
4285 alt--;
4286 }
9306ca4a
JB		 4287 /* Fall through. */
4288 case 'I':
4289 alt = 1;
4290 continue;
6439fc28
AM		 4291 case '|':
4292 while (*++p != '}')
4293 {
4294 if (*p == '\0')
4295 abort ();
4296 }
4297 break;
4298 case '}':
4299 break;
252b5132 4300 case 'A':
db6eb5be
AM		 4301 if (intel_syntax)
4302 break;
7967e09e 4303 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
252b5132
RH		 4304 *obufp++ = 'b';
4305 break;
4306 case 'B':
db6eb5be
AM		 4307 if (intel_syntax)
4308 break;
252b5132
RH		 4309 if (sizeflag & SUFFIX_ALWAYS)
4310 *obufp++ = 'b';
252b5132 4311 break;
9306ca4a
JB		 4312 case 'C':
4313 if (intel_syntax && !alt)
4314 break;
4315 if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
4316 {
4317 if (sizeflag & DFLAG)
4318 *obufp++ = intel_syntax ? 'd' : 'l';
4319 else
4320 *obufp++ = intel_syntax ? 'w' : 's';
4321 used_prefixes |= (prefixes & PREFIX_DATA);
4322 }
4323 break;
ed7841b3
JB		 4324 case 'D':
4325 if (intel_syntax || !(sizeflag & SUFFIX_ALWAYS))
4326 break;
161a04f6 4327 USED_REX (REX_W);
7967e09e 4328 if (modrm.mod == 3)
ed7841b3 4329 {
161a04f6 4330 if (rex & REX_W)
ed7841b3
JB		 4331 *obufp++ = 'q';
4332 else if (sizeflag & DFLAG)
4333 *obufp++ = intel_syntax ? 'd' : 'l';
4334 else
4335 *obufp++ = 'w';
4336 used_prefixes |= (prefixes & PREFIX_DATA);
4337 }
4338 else
4339 *obufp++ = 'w';
4340 break;
252b5132 4341 case 'E': /* For jcxz/jecxz */
cb712a9e 4342 if (address_mode == mode_64bit)
c1a64871
JH		 4343 {
4344 if (sizeflag & AFLAG)
4345 *obufp++ = 'r';
4346 else
4347 *obufp++ = 'e';
4348 }
4349 else
4350 if (sizeflag & AFLAG)
4351 *obufp++ = 'e';
3ffd33cf
AM		 4352 used_prefixes |= (prefixes & PREFIX_ADDR);
4353 break;
4354 case 'F':
db6eb5be
AM		 4355 if (intel_syntax)
4356 break;
e396998b 4357 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
3ffd33cf
AM		 4358 {
4359 if (sizeflag & AFLAG)
cb712a9e 4360 *obufp++ = address_mode == mode_64bit ? 'q' : 'l';
3ffd33cf 4361 else
cb712a9e 4362 *obufp++ = address_mode == mode_64bit ? 'l' : 'w';
3ffd33cf
AM		 4363 used_prefixes |= (prefixes & PREFIX_ADDR);
4364 }
252b5132 4365 break;
52fd6d94
JB		 4366 case 'G':
4367 if (intel_syntax || (obufp[-1] != 's' && !(sizeflag & SUFFIX_ALWAYS)))
4368 break;
161a04f6 4369 if ((rex & REX_W) || (sizeflag & DFLAG))
52fd6d94
JB		 4370 *obufp++ = 'l';
4371 else
4372 *obufp++ = 'w';
161a04f6 4373 if (!(rex & REX_W))
52fd6d94
JB		 4374 used_prefixes |= (prefixes & PREFIX_DATA);
4375 break;
5dd0794d 4376 case 'H':
db6eb5be
AM		 4377 if (intel_syntax)
4378 break;
5dd0794d
AM		 4379 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
4380 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
4381 {
4382 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
4383 *obufp++ = ',';
4384 *obufp++ = 'p';
4385 if (prefixes & PREFIX_DS)
4386 *obufp++ = 't';
4387 else
4388 *obufp++ = 'n';
4389 }
4390 break;
9306ca4a
JB		 4391 case 'J':
4392 if (intel_syntax)
4393 break;
4394 *obufp++ = 'l';
4395 break;
42903f7f
L		 4396 case 'K':
4397 USED_REX (REX_W);
4398 if (rex & REX_W)
4399 *obufp++ = 'q';
4400 else
4401 *obufp++ = 'd';
4402 break;
6dd5059a
L		 4403 case 'Z':
4404 if (intel_syntax)
4405 break;
4406 if (address_mode == mode_64bit && (sizeflag & SUFFIX_ALWAYS))
4407 {
4408 *obufp++ = 'q';
4409 break;
4410 }
4411 /* Fall through. */
252b5132 4412 case 'L':
db6eb5be
AM		 4413 if (intel_syntax)
4414 break;
252b5132
RH		 4415 if (sizeflag & SUFFIX_ALWAYS)
4416 *obufp++ = 'l';
252b5132
RH		 4417 break;
4418 case 'N':
4419 if ((prefixes & PREFIX_FWAIT) == 0)
4420 *obufp++ = 'n';
7d421014
ILT		 4421 else
4422 used_prefixes |= PREFIX_FWAIT;
252b5132 4423 break;
52b15da3 4424 case 'O':
161a04f6
L		 4425 USED_REX (REX_W);
4426 if (rex & REX_W)
6439fc28 4427 *obufp++ = 'o';
a35ca55a
JB		 4428 else if (intel_syntax && (sizeflag & DFLAG))
4429 *obufp++ = 'q';
52b15da3
JH		 4430 else
4431 *obufp++ = 'd';
161a04f6 4432 if (!(rex & REX_W))
a35ca55a 4433 used_prefixes |= (prefixes & PREFIX_DATA);
52b15da3 4434 break;
6439fc28 4435 case 'T':
db6eb5be
AM		 4436 if (intel_syntax)
4437 break;
cb712a9e 4438 if (address_mode == mode_64bit && (sizeflag & DFLAG))
6439fc28
AM		 4439 {
4440 *obufp++ = 'q';
4441 break;
4442 }
6608db57 4443 /* Fall through. */
252b5132 4444 case 'P':
db6eb5be
AM		 4445 if (intel_syntax)
4446 break;
252b5132 4447 if ((prefixes & PREFIX_DATA)
161a04f6 4448 || (rex & REX_W)
e396998b 4449 || (sizeflag & SUFFIX_ALWAYS))
252b5132 4450 {
161a04f6
L		 4451 USED_REX (REX_W);
4452 if (rex & REX_W)
52b15da3 4453 *obufp++ = 'q';
c2419411 4454 else
52b15da3
JH		 4455 {
4456 if (sizeflag & DFLAG)
4457 *obufp++ = 'l';
4458 else
4459 *obufp++ = 'w';
52b15da3 4460 }
1a114b12 4461 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 4462 }
4463 break;
6439fc28 4464 case 'U':
db6eb5be
AM		 4465 if (intel_syntax)
4466 break;
cb712a9e 4467 if (address_mode == mode_64bit && (sizeflag & DFLAG))
6439fc28 4468 {
7967e09e 4469 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
1a114b12 4470 *obufp++ = 'q';
6439fc28
AM		 4471 break;
4472 }
6608db57 4473 /* Fall through. */
252b5132 4474 case 'Q':
9306ca4a 4475 if (intel_syntax && !alt)
db6eb5be 4476 break;
161a04f6 4477 USED_REX (REX_W);
7967e09e 4478 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
252b5132 4479 {
161a04f6 4480 if (rex & REX_W)
52b15da3 4481 *obufp++ = 'q';
252b5132 4482 else
52b15da3
JH		 4483 {
4484 if (sizeflag & DFLAG)
9306ca4a 4485 *obufp++ = intel_syntax ? 'd' : 'l';
52b15da3
JH		 4486 else
4487 *obufp++ = 'w';
52b15da3 4488 }
1a114b12 4489 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 4490 }
4491 break;
4492 case 'R':
161a04f6
L		 4493 USED_REX (REX_W);
4494 if (rex & REX_W)
a35ca55a
JB		 4495 *obufp++ = 'q';
4496 else if (sizeflag & DFLAG)
c608c12e 4497 {
a35ca55a 4498 if (intel_syntax)
c608c12e 4499 *obufp++ = 'd';
c608c12e 4500 else
a35ca55a 4501 *obufp++ = 'l';
c608c12e 4502 }
252b5132 4503 else
a35ca55a
JB		 4504 *obufp++ = 'w';
4505 if (intel_syntax && !p[1]
161a04f6 4506 && ((rex & REX_W) || (sizeflag & DFLAG)))
a35ca55a 4507 *obufp++ = 'e';
161a04f6 4508 if (!(rex & REX_W))
52b15da3 4509 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132 4510 break;
1a114b12
JB		 4511 case 'V':
4512 if (intel_syntax)
4513 break;
cb712a9e 4514 if (address_mode == mode_64bit && (sizeflag & DFLAG))
1a114b12
JB		 4515 {
4516 if (sizeflag & SUFFIX_ALWAYS)
4517 *obufp++ = 'q';
4518 break;
4519 }
4520 /* Fall through. */
252b5132 4521 case 'S':
db6eb5be
AM		 4522 if (intel_syntax)
4523 break;
252b5132
RH		 4524 if (sizeflag & SUFFIX_ALWAYS)
4525 {
161a04f6 4526 if (rex & REX_W)
52b15da3 4527 *obufp++ = 'q';
252b5132 4528 else
52b15da3
JH		 4529 {
4530 if (sizeflag & DFLAG)
4531 *obufp++ = 'l';
4532 else
4533 *obufp++ = 'w';
4534 used_prefixes |= (prefixes & PREFIX_DATA);
4535 }
252b5132 4536 }
252b5132 4537 break;
041bd2e0
JH		 4538 case 'X':
4539 if (prefixes & PREFIX_DATA)
4540 *obufp++ = 'd';
4541 else
4542 *obufp++ = 's';
db6eb5be 4543 used_prefixes |= (prefixes & PREFIX_DATA);
041bd2e0 4544 break;
76f227a5 4545 case 'Y':
db6eb5be
AM		 4546 if (intel_syntax)
4547 break;
161a04f6 4548 if (rex & REX_W)
76f227a5 4549 {
161a04f6 4550 USED_REX (REX_W);
76f227a5
JH		 4551 *obufp++ = 'q';
4552 }
4553 break;
52b15da3 4554 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
252b5132 4555 case 'W':
252b5132 4556 /* operand size flag for cwtl, cbtw */
161a04f6
L		 4557 USED_REX (REX_W);
4558 if (rex & REX_W)
a35ca55a
JB		 4559 {
4560 if (intel_syntax)
4561 *obufp++ = 'd';
4562 else
4563 *obufp++ = 'l';
4564 }
52b15da3 4565 else if (sizeflag & DFLAG)
252b5132
RH		 4566 *obufp++ = 'w';
4567 else
4568 *obufp++ = 'b';
161a04f6 4569 if (!(rex & REX_W))
52b15da3 4570 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 4571 break;
4572 }
9306ca4a 4573 alt = 0;
252b5132
RH		 4574 }
4575 *obufp = 0;
6439fc28 4576 return 0;
252b5132
RH		 4577}
4578
4579static void
26ca5450 4580oappend (const char *s)
252b5132
RH		 4581{
4582 strcpy (obufp, s);
4583 obufp += strlen (s);
4584}
4585
4586static void
26ca5450 4587append_seg (void)
252b5132
RH		 4588{
4589 if (prefixes & PREFIX_CS)
7d421014 4590 {
7d421014 4591 used_prefixes |= PREFIX_CS;
d708bcba 4592 oappend ("%cs:" + intel_syntax);
7d421014 4593 }
252b5132 4594 if (prefixes & PREFIX_DS)
7d421014 4595 {
7d421014 4596 used_prefixes |= PREFIX_DS;
d708bcba 4597 oappend ("%ds:" + intel_syntax);
7d421014 4598 }
252b5132 4599 if (prefixes & PREFIX_SS)
7d421014 4600 {
7d421014 4601 used_prefixes |= PREFIX_SS;
d708bcba 4602 oappend ("%ss:" + intel_syntax);
7d421014 4603 }
252b5132 4604 if (prefixes & PREFIX_ES)
7d421014 4605 {
7d421014 4606 used_prefixes |= PREFIX_ES;
d708bcba 4607 oappend ("%es:" + intel_syntax);
7d421014 4608 }
252b5132 4609 if (prefixes & PREFIX_FS)
7d421014 4610 {
7d421014 4611 used_prefixes |= PREFIX_FS;
d708bcba 4612 oappend ("%fs:" + intel_syntax);
7d421014 4613 }
252b5132 4614 if (prefixes & PREFIX_GS)
7d421014 4615 {
7d421014 4616 used_prefixes |= PREFIX_GS;
d708bcba 4617 oappend ("%gs:" + intel_syntax);
7d421014 4618 }
252b5132
RH		 4619}
4620
4621static void
26ca5450 4622OP_indirE (int bytemode, int sizeflag)
252b5132
RH		 4623{
4624 if (!intel_syntax)
4625 oappend ("*");
4626 OP_E (bytemode, sizeflag);
4627}
4628
52b15da3 4629static void
26ca5450 4630print_operand_value (char *buf, int hex, bfd_vma disp)
52b15da3 4631{
cb712a9e 4632 if (address_mode == mode_64bit)
52b15da3
JH		 4633 {
4634 if (hex)
4635 {
4636 char tmp[30];
4637 int i;
4638 buf[0] = '0';
4639 buf[1] = 'x';
4640 sprintf_vma (tmp, disp);
6608db57 4641 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++);
52b15da3
JH		 4642 strcpy (buf + 2, tmp + i);
4643 }
4644 else
4645 {
4646 bfd_signed_vma v = disp;
4647 char tmp[30];
4648 int i;
4649 if (v < 0)
4650 {
4651 *(buf++) = '-';
4652 v = -disp;
6608db57 4653 /* Check for possible overflow on 0x8000000000000000. */
52b15da3
JH		 4654 if (v < 0)
4655 {
4656 strcpy (buf, "9223372036854775808");
4657 return;
4658 }
4659 }
4660 if (!v)
4661 {
4662 strcpy (buf, "0");
4663 return;
4664 }
4665
4666 i = 0;
4667 tmp[29] = 0;
4668 while (v)
4669 {
6608db57 4670 tmp[28 - i] = (v % 10) + '0';
52b15da3
JH		 4671 v /= 10;
4672 i++;
4673 }
4674 strcpy (buf, tmp + 29 - i);
4675 }
4676 }
4677 else
4678 {
4679 if (hex)
4680 sprintf (buf, "0x%x", (unsigned int) disp);
4681 else
4682 sprintf (buf, "%d", (int) disp);
4683 }
4684}
4685
5d669648
L		 4686/* Put DISP in BUF as signed hex number. */
4687
4688static void
4689print_displacement (char *buf, bfd_vma disp)
4690{
4691 bfd_signed_vma val = disp;
4692 char tmp[30];
4693 int i, j = 0;
4694
4695 if (val < 0)
4696 {
4697 buf[j++] = '-';
4698 val = -disp;
4699
4700 /* Check for possible overflow. */
4701 if (val < 0)
4702 {
4703 switch (address_mode)
4704 {
4705 case mode_64bit:
4706 strcpy (buf + j, "0x8000000000000000");
4707 break;
4708 case mode_32bit:
4709 strcpy (buf + j, "0x80000000");
4710 break;
4711 case mode_16bit:
4712 strcpy (buf + j, "0x8000");
4713 break;
4714 }
4715 return;
4716 }
4717 }
4718
4719 buf[j++] = '0';
4720 buf[j++] = 'x';
4721
4722 sprintf_vma (tmp, val);
4723 for (i = 0; tmp[i] == '0'; i++)
4724 continue;
4725 if (tmp[i] == '\0')
4726 i--;
4727 strcpy (buf + j, tmp + i);
4728}
4729
3f31e633
JB		 4730static void
4731intel_operand_size (int bytemode, int sizeflag)
4732{
4733 switch (bytemode)
4734 {
4735 case b_mode:
42903f7f 4736 case dqb_mode:
3f31e633
JB		 4737 oappend ("BYTE PTR ");
4738 break;
4739 case w_mode:
4740 case dqw_mode:
4741 oappend ("WORD PTR ");
4742 break;
1a114b12 4743 case stack_v_mode:
cb712a9e 4744 if (address_mode == mode_64bit && (sizeflag & DFLAG))
3f31e633
JB		 4745 {
4746 oappend ("QWORD PTR ");
4747 used_prefixes |= (prefixes & PREFIX_DATA);
4748 break;
4749 }
4750 /* FALLTHRU */
4751 case v_mode:
4752 case dq_mode:
161a04f6
L		 4753 USED_REX (REX_W);
4754 if (rex & REX_W)
3f31e633
JB		 4755 oappend ("QWORD PTR ");
4756 else if ((sizeflag & DFLAG) || bytemode == dq_mode)
4757 oappend ("DWORD PTR ");
4758 else
4759 oappend ("WORD PTR ");
4760 used_prefixes |= (prefixes & PREFIX_DATA);
4761 break;
52fd6d94 4762 case z_mode:
161a04f6 4763 if ((rex & REX_W) || (sizeflag & DFLAG))
52fd6d94
JB		 4764 *obufp++ = 'D';
4765 oappend ("WORD PTR ");
161a04f6 4766 if (!(rex & REX_W))
52fd6d94
JB		 4767 used_prefixes |= (prefixes & PREFIX_DATA);
4768 break;
3f31e633 4769 case d_mode:
42903f7f 4770 case dqd_mode:
3f31e633
JB		 4771 oappend ("DWORD PTR ");
4772 break;
4773 case q_mode:
4774 oappend ("QWORD PTR ");
4775 break;
4776 case m_mode:
cb712a9e 4777 if (address_mode == mode_64bit)
3f31e633
JB		 4778 oappend ("QWORD PTR ");
4779 else
4780 oappend ("DWORD PTR ");
4781 break;
4782 case f_mode:
4783 if (sizeflag & DFLAG)
4784 oappend ("FWORD PTR ");
4785 else
4786 oappend ("DWORD PTR ");
4787 used_prefixes |= (prefixes & PREFIX_DATA);
4788 break;
4789 case t_mode:
4790 oappend ("TBYTE PTR ");
4791 break;
4792 case x_mode:
4793 oappend ("XMMWORD PTR ");
4794 break;
fb9c77c7
L		 4795 case o_mode:
4796 oappend ("OWORD PTR ");
4797 break;
3f31e633
JB		 4798 default:
4799 break;
4800 }
4801}
4802
252b5132 4803static void
26ca5450 4804OP_E (int bytemode, int sizeflag)
252b5132 4805{
52b15da3
JH		 4806 bfd_vma disp;
4807 int add = 0;
4808 int riprel = 0;
161a04f6
L		 4809 USED_REX (REX_B);
4810 if (rex & REX_B)
52b15da3 4811 add += 8;
252b5132 4812
6608db57 4813 /* Skip mod/rm byte. */
4bba6815 4814 MODRM_CHECK;
252b5132
RH		 4815 codep++;
4816
7967e09e 4817 if (modrm.mod == 3)
252b5132
RH		 4818 {
4819 switch (bytemode)
4820 {
4821 case b_mode:
52b15da3
JH		 4822 USED_REX (0);
4823 if (rex)
7967e09e 4824 oappend (names8rex[modrm.rm + add]);
52b15da3 4825 else
7967e09e 4826 oappend (names8[modrm.rm + add]);
252b5132
RH		 4827 break;
4828 case w_mode:
7967e09e 4829 oappend (names16[modrm.rm + add]);
252b5132 4830 break;
2da11e11 4831 case d_mode:
7967e09e 4832 oappend (names32[modrm.rm + add]);
52b15da3
JH		 4833 break;
4834 case q_mode:
7967e09e 4835 oappend (names64[modrm.rm + add]);
52b15da3
JH		 4836 break;
4837 case m_mode:
cb712a9e 4838 if (address_mode == mode_64bit)
7967e09e 4839 oappend (names64[modrm.rm + add]);
52b15da3 4840 else
7967e09e 4841 oappend (names32[modrm.rm + add]);
2da11e11 4842 break;
1a114b12 4843 case stack_v_mode:
cb712a9e 4844 if (address_mode == mode_64bit && (sizeflag & DFLAG))
003519a7 4845 {
7967e09e 4846 oappend (names64[modrm.rm + add]);
003519a7 4847 used_prefixes |= (prefixes & PREFIX_DATA);
1a114b12 4848 break;
003519a7 4849 }
1a114b12
JB		 4850 bytemode = v_mode;
4851 /* FALLTHRU */
252b5132 4852 case v_mode:
db6eb5be 4853 case dq_mode:
42903f7f
L		 4854 case dqb_mode:
4855 case dqd_mode:
9306ca4a 4856 case dqw_mode:
161a04f6
L		 4857 USED_REX (REX_W);
4858 if (rex & REX_W)
7967e09e 4859 oappend (names64[modrm.rm + add]);
9306ca4a 4860 else if ((sizeflag & DFLAG) || bytemode != v_mode)
7967e09e 4861 oappend (names32[modrm.rm + add]);
252b5132 4862 else
7967e09e 4863 oappend (names16[modrm.rm + add]);
7d421014 4864 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132 4865 break;
2da11e11 4866 case 0:
c608c12e 4867 break;
252b5132 4868 default:
c608c12e 4869 oappend (INTERNAL_DISASSEMBLER_ERROR);
252b5132
RH		 4870 break;
4871 }
4872 return;
4873 }
4874
4875 disp = 0;
3f31e633
JB		 4876 if (intel_syntax)
4877 intel_operand_size (bytemode, sizeflag);
252b5132
RH		 4878 append_seg ();
4879
5d669648 4880 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
252b5132 4881 {
5d669648
L		 4882 /* 32/64 bit address mode */
4883 int havedisp;
252b5132
RH		 4884 int havesib;
4885 int havebase;
4886 int base;
4887 int index = 0;
4888 int scale = 0;
4889
4890 havesib = 0;
4891 havebase = 1;
7967e09e 4892 base = modrm.rm;
252b5132
RH		 4893
4894 if (base == 4)
4895 {
4896 havesib = 1;
4897 FETCH_DATA (the_info, codep + 1);
252b5132 4898 index = (*codep >> 3) & 7;
cb712a9e 4899 if (address_mode == mode_64bit || index != 0x4)
9df48ba9 4900 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
2033b4b9 4901 scale = (*codep >> 6) & 3;
252b5132 4902 base = *codep & 7;
161a04f6
L		 4903 USED_REX (REX_X);
4904 if (rex & REX_X)
52b15da3 4905 index += 8;
252b5132
RH		 4906 codep++;
4907 }
2888cb7a 4908 base += add;
252b5132 4909
7967e09e 4910 switch (modrm.mod)
252b5132
RH		 4911 {
4912 case 0:
52b15da3 4913 if ((base & 7) == 5)
252b5132
RH		 4914 {
4915 havebase = 0;
cb712a9e 4916 if (address_mode == mode_64bit && !havesib)
52b15da3
JH		 4917 riprel = 1;
4918 disp = get32s ();
252b5132
RH		 4919 }
4920 break;
4921 case 1:
4922 FETCH_DATA (the_info, codep + 1);
4923 disp = *codep++;
4924 if ((disp & 0x80) != 0)
4925 disp -= 0x100;
4926 break;
4927 case 2:
52b15da3 4928 disp = get32s ();
252b5132
RH		 4929 break;
4930 }
4931
5d669648
L		 4932 havedisp = havebase || (havesib && (index != 4 || scale != 0));
4933
252b5132 4934 if (!intel_syntax)
7967e09e 4935 if (modrm.mod != 0 || (base & 7) == 5)
db6eb5be 4936 {
5d669648
L		 4937 if (havedisp || riprel)
4938 print_displacement (scratchbuf, disp);
4939 else
4940 print_operand_value (scratchbuf, 1, disp);
db6eb5be 4941 oappend (scratchbuf);
52b15da3
JH		 4942 if (riprel)
4943 {
4944 set_op (disp, 1);
4945 oappend ("(%rip)");
4946 }
db6eb5be 4947 }
2da11e11 4948
5d669648 4949 if (havedisp || (intel_syntax && riprel))
252b5132 4950 {
252b5132 4951 *obufp++ = open_char;
52b15da3 4952 if (intel_syntax && riprel)
185b1163
L		 4953 {
4954 set_op (disp, 1);
4955 oappend ("rip");
4956 }
db6eb5be 4957 *obufp = '\0';
252b5132 4958 if (havebase)
cb712a9e 4959 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
c1a64871 4960 ? names64[base] : names32[base]);
252b5132
RH		 4961 if (havesib)
4962 {
4963 if (index != 4)
4964 {
9306ca4a 4965 if (!intel_syntax || havebase)
db6eb5be 4966 {
9306ca4a
JB		 4967 *obufp++ = separator_char;
4968 *obufp = '\0';
db6eb5be 4969 }
cb712a9e 4970 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
9306ca4a 4971 ? names64[index] : names32[index]);
252b5132 4972 }
a02a862a 4973 if (scale != 0 || (!intel_syntax && index != 4))
db6eb5be
AM		 4974 {
4975 *obufp++ = scale_char;
4976 *obufp = '\0';
4977 sprintf (scratchbuf, "%d", 1 << scale);
4978 oappend (scratchbuf);
4979 }
252b5132 4980 }
185b1163
L		 4981 if (intel_syntax
4982 && (disp || modrm.mod != 0 || (base & 7) == 5))
3d456fa1 4983 {
185b1163 4984 if ((bfd_signed_vma) disp >= 0)
3d456fa1
JB		 4985 {
4986 *obufp++ = '+';
4987 *obufp = '\0';
4988 }
7967e09e 4989 else if (modrm.mod != 1)
3d456fa1
JB		 4990 {
4991 *obufp++ = '-';
4992 *obufp = '\0';
4993 disp = - (bfd_signed_vma) disp;
4994 }
4995
5d669648 4996 print_displacement (scratchbuf, disp);
3d456fa1
JB		 4997 oappend (scratchbuf);
4998 }
252b5132
RH		 4999
5000 *obufp++ = close_char;
db6eb5be 5001 *obufp = '\0';
252b5132
RH		 5002 }
5003 else if (intel_syntax)
db6eb5be 5004 {
7967e09e 5005 if (modrm.mod != 0 || (base & 7) == 5)
db6eb5be 5006 {
252b5132
RH		 5007 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5008 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
5009 ;
5010 else
5011 {
d708bcba 5012 oappend (names_seg[ds_reg - es_reg]);
252b5132
RH		 5013 oappend (":");
5014 }
52b15da3 5015 print_operand_value (scratchbuf, 1, disp);
db6eb5be
AM		 5016 oappend (scratchbuf);
5017 }
5018 }
252b5132
RH		 5019 }
5020 else
5021 { /* 16 bit address mode */
7967e09e 5022 switch (modrm.mod)
252b5132
RH		 5023 {
5024 case 0:
7967e09e 5025 if (modrm.rm == 6)
252b5132
RH		 5026 {
5027 disp = get16 ();
5028 if ((disp & 0x8000) != 0)
5029 disp -= 0x10000;
5030 }
5031 break;
5032 case 1:
5033 FETCH_DATA (the_info, codep + 1);
5034 disp = *codep++;
5035 if ((disp & 0x80) != 0)
5036 disp -= 0x100;
5037 break;
5038 case 2:
5039 disp = get16 ();
5040 if ((disp & 0x8000) != 0)
5041 disp -= 0x10000;
5042 break;
5043 }
5044
5045 if (!intel_syntax)
7967e09e 5046 if (modrm.mod != 0 || modrm.rm == 6)
db6eb5be 5047 {
5d669648 5048 print_displacement (scratchbuf, disp);
db6eb5be
AM		 5049 oappend (scratchbuf);
5050 }
252b5132 5051
7967e09e 5052 if (modrm.mod != 0 || modrm.rm != 6)
252b5132
RH		 5053 {
5054 *obufp++ = open_char;
db6eb5be 5055 *obufp = '\0';
7967e09e 5056 oappend (index16[modrm.rm]);
5d669648
L		 5057 if (intel_syntax
5058 && (disp || modrm.mod != 0 || modrm.rm == 6))
3d456fa1 5059 {
5d669648 5060 if ((bfd_signed_vma) disp >= 0)
3d456fa1
JB		 5061 {
5062 *obufp++ = '+';
5063 *obufp = '\0';
5064 }
7967e09e 5065 else if (modrm.mod != 1)
3d456fa1
JB		 5066 {
5067 *obufp++ = '-';
5068 *obufp = '\0';
5069 disp = - (bfd_signed_vma) disp;
5070 }
5071
5d669648 5072 print_displacement (scratchbuf, disp);
3d456fa1
JB		 5073 oappend (scratchbuf);
5074 }
5075
db6eb5be
AM		 5076 *obufp++ = close_char;
5077 *obufp = '\0';
252b5132 5078 }
3d456fa1
JB		 5079 else if (intel_syntax)
5080 {
5081 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5082 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
5083 ;
5084 else
5085 {
5086 oappend (names_seg[ds_reg - es_reg]);
5087 oappend (":");
5088 }
5089 print_operand_value (scratchbuf, 1, disp & 0xffff);
5090 oappend (scratchbuf);
5091 }
252b5132
RH		 5092 }
5093}
5094
252b5132 5095static void
26ca5450 5096OP_G (int bytemode, int sizeflag)
252b5132 5097{
52b15da3 5098 int add = 0;
161a04f6
L		 5099 USED_REX (REX_R);
5100 if (rex & REX_R)
52b15da3 5101 add += 8;
252b5132
RH		 5102 switch (bytemode)
5103 {
5104 case b_mode:
52b15da3
JH		 5105 USED_REX (0);
5106 if (rex)
7967e09e 5107 oappend (names8rex[modrm.reg + add]);
52b15da3 5108 else
7967e09e 5109 oappend (names8[modrm.reg + add]);
252b5132
RH		 5110 break;
5111 case w_mode:
7967e09e 5112 oappend (names16[modrm.reg + add]);
252b5132
RH		 5113 break;
5114 case d_mode:
7967e09e 5115 oappend (names32[modrm.reg + add]);
52b15da3
JH		 5116 break;
5117 case q_mode:
7967e09e 5118 oappend (names64[modrm.reg + add]);
252b5132
RH		 5119 break;
5120 case v_mode:
9306ca4a 5121 case dq_mode:
42903f7f
L		 5122 case dqb_mode:
5123 case dqd_mode:
9306ca4a 5124 case dqw_mode:
161a04f6
L		 5125 USED_REX (REX_W);
5126 if (rex & REX_W)
7967e09e 5127 oappend (names64[modrm.reg + add]);
9306ca4a 5128 else if ((sizeflag & DFLAG) || bytemode != v_mode)
7967e09e 5129 oappend (names32[modrm.reg + add]);
252b5132 5130 else
7967e09e 5131 oappend (names16[modrm.reg + add]);
7d421014 5132 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132 5133 break;
90700ea2 5134 case m_mode:
cb712a9e 5135 if (address_mode == mode_64bit)
7967e09e 5136 oappend (names64[modrm.reg + add]);
90700ea2 5137 else
7967e09e 5138 oappend (names32[modrm.reg + add]);
90700ea2 5139 break;
252b5132
RH		 5140 default:
5141 oappend (INTERNAL_DISASSEMBLER_ERROR);
5142 break;
5143 }
5144}
5145
52b15da3 5146static bfd_vma
26ca5450 5147get64 (void)
52b15da3 5148{
5dd0794d 5149 bfd_vma x;
52b15da3 5150#ifdef BFD64
5dd0794d
AM		 5151 unsigned int a;
5152 unsigned int b;
5153
52b15da3
JH		 5154 FETCH_DATA (the_info, codep + 8);
5155 a = *codep++ & 0xff;
5156 a |= (*codep++ & 0xff) << 8;
5157 a |= (*codep++ & 0xff) << 16;
5158 a |= (*codep++ & 0xff) << 24;
5dd0794d 5159 b = *codep++ & 0xff;
52b15da3
JH		 5160 b |= (*codep++ & 0xff) << 8;
5161 b |= (*codep++ & 0xff) << 16;
5162 b |= (*codep++ & 0xff) << 24;
5163 x = a + ((bfd_vma) b << 32);
5164#else
6608db57 5165 abort ();
5dd0794d 5166 x = 0;
52b15da3
JH		 5167#endif
5168 return x;
5169}
5170
5171static bfd_signed_vma
26ca5450 5172get32 (void)
252b5132 5173{
52b15da3 5174 bfd_signed_vma x = 0;
252b5132
RH		 5175
5176 FETCH_DATA (the_info, codep + 4);
52b15da3
JH		 5177 x = *codep++ & (bfd_signed_vma) 0xff;
5178 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
5179 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
5180 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
5181 return x;
5182}
5183
5184static bfd_signed_vma
26ca5450 5185get32s (void)
52b15da3
JH		 5186{
5187 bfd_signed_vma x = 0;
5188
5189 FETCH_DATA (the_info, codep + 4);
5190 x = *codep++ & (bfd_signed_vma) 0xff;
5191 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
5192 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
5193 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
5194
5195 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
5196
252b5132
RH		 5197 return x;
5198}
5199
5200static int
26ca5450 5201get16 (void)
252b5132
RH		 5202{
5203 int x = 0;
5204
5205 FETCH_DATA (the_info, codep + 2);
5206 x = *codep++ & 0xff;
5207 x |= (*codep++ & 0xff) << 8;
5208 return x;
5209}
5210
5211static void
26ca5450 5212set_op (bfd_vma op, int riprel)
252b5132
RH		 5213{
5214 op_index[op_ad] = op_ad;
cb712a9e 5215 if (address_mode == mode_64bit)
7081ff04
AJ		 5216 {
5217 op_address[op_ad] = op;
5218 op_riprel[op_ad] = riprel;
5219 }
5220 else
5221 {
5222 /* Mask to get a 32-bit address. */
5223 op_address[op_ad] = op & 0xffffffff;
5224 op_riprel[op_ad] = riprel & 0xffffffff;
5225 }
252b5132
RH		 5226}
5227
5228static void
26ca5450 5229OP_REG (int code, int sizeflag)
252b5132 5230{
2da11e11 5231 const char *s;
52b15da3 5232 int add = 0;
161a04f6
L		 5233 USED_REX (REX_B);
5234 if (rex & REX_B)
52b15da3
JH		 5235 add = 8;
5236
5237 switch (code)
5238 {
52b15da3
JH		 5239 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
5240 case sp_reg: case bp_reg: case si_reg: case di_reg:
5241 s = names16[code - ax_reg + add];
5242 break;
5243 case es_reg: case ss_reg: case cs_reg:
5244 case ds_reg: case fs_reg: case gs_reg:
5245 s = names_seg[code - es_reg + add];
5246 break;
5247 case al_reg: case ah_reg: case cl_reg: case ch_reg:
5248 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
5249 USED_REX (0);
5250 if (rex)
5251 s = names8rex[code - al_reg + add];
5252 else
5253 s = names8[code - al_reg];
5254 break;
6439fc28
AM		 5255 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
5256 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
cb712a9e 5257 if (address_mode == mode_64bit && (sizeflag & DFLAG))
6439fc28
AM		 5258 {
5259 s = names64[code - rAX_reg + add];
5260 break;
5261 }
5262 code += eAX_reg - rAX_reg;
6608db57 5263 /* Fall through. */
52b15da3
JH		 5264 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
5265 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
161a04f6
L		 5266 USED_REX (REX_W);
5267 if (rex & REX_W)
52b15da3
JH		 5268 s = names64[code - eAX_reg + add];
5269 else if (sizeflag & DFLAG)
5270 s = names32[code - eAX_reg + add];
5271 else
5272 s = names16[code - eAX_reg + add];
5273 used_prefixes |= (prefixes & PREFIX_DATA);
5274 break;
52b15da3
JH		 5275 default:
5276 s = INTERNAL_DISASSEMBLER_ERROR;
5277 break;
5278 }
5279 oappend (s);
5280}
5281
5282static void
26ca5450 5283OP_IMREG (int code, int sizeflag)
52b15da3
JH		 5284{
5285 const char *s;
252b5132
RH		 5286
5287 switch (code)
5288 {
5289 case indir_dx_reg:
d708bcba 5290 if (intel_syntax)
52fd6d94 5291 s = "dx";
d708bcba 5292 else
db6eb5be 5293 s = "(%dx)";
252b5132
RH		 5294 break;
5295 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
5296 case sp_reg: case bp_reg: case si_reg: case di_reg:
5297 s = names16[code - ax_reg];
5298 break;
5299 case es_reg: case ss_reg: case cs_reg:
5300 case ds_reg: case fs_reg: case gs_reg:
5301 s = names_seg[code - es_reg];
5302 break;
5303 case al_reg: case ah_reg: case cl_reg: case ch_reg:
5304 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
52b15da3
JH		 5305 USED_REX (0);
5306 if (rex)
5307 s = names8rex[code - al_reg];
5308 else
5309 s = names8[code - al_reg];
252b5132
RH		 5310 break;
5311 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
5312 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
161a04f6
L		 5313 USED_REX (REX_W);
5314 if (rex & REX_W)
52b15da3
JH		 5315 s = names64[code - eAX_reg];
5316 else if (sizeflag & DFLAG)
252b5132
RH		 5317 s = names32[code - eAX_reg];
5318 else
5319 s = names16[code - eAX_reg];
7d421014 5320 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132 5321 break;
52fd6d94 5322 case z_mode_ax_reg:
161a04f6 5323 if ((rex & REX_W) || (sizeflag & DFLAG))
52fd6d94
JB		 5324 s = *names32;
5325 else
5326 s = *names16;
161a04f6 5327 if (!(rex & REX_W))
52fd6d94
JB		 5328 used_prefixes |= (prefixes & PREFIX_DATA);
5329 break;
252b5132
RH		 5330 default:
5331 s = INTERNAL_DISASSEMBLER_ERROR;
5332 break;
5333 }
5334 oappend (s);
5335}
5336
5337static void
26ca5450 5338OP_I (int bytemode, int sizeflag)
252b5132 5339{
52b15da3
JH		 5340 bfd_signed_vma op;
5341 bfd_signed_vma mask = -1;
252b5132
RH		 5342
5343 switch (bytemode)
5344 {
5345 case b_mode:
5346 FETCH_DATA (the_info, codep + 1);
52b15da3
JH		 5347 op = *codep++;
5348 mask = 0xff;
5349 break;
5350 case q_mode:
cb712a9e 5351 if (address_mode == mode_64bit)
6439fc28
AM		 5352 {
5353 op = get32s ();
5354 break;
5355 }
6608db57 5356 /* Fall through. */
252b5132 5357 case v_mode:
161a04f6
L		 5358 USED_REX (REX_W);
5359 if (rex & REX_W)
52b15da3
JH		 5360 op = get32s ();
5361 else if (sizeflag & DFLAG)
5362 {
5363 op = get32 ();
5364 mask = 0xffffffff;
5365 }
252b5132 5366 else
52b15da3
JH		 5367 {
5368 op = get16 ();
5369 mask = 0xfffff;
5370 }
7d421014 5371 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 5372 break;
5373 case w_mode:
52b15da3 5374 mask = 0xfffff;
252b5132
RH		 5375 op = get16 ();
5376 break;
9306ca4a
JB		 5377 case const_1_mode:
5378 if (intel_syntax)
5379 oappend ("1");
5380 return;
252b5132
RH		 5381 default:
5382 oappend (INTERNAL_DISASSEMBLER_ERROR);
5383 return;
5384 }
5385
52b15da3
JH		 5386 op &= mask;
5387 scratchbuf[0] = '$';
d708bcba
AM		 5388 print_operand_value (scratchbuf + 1, 1, op);
5389 oappend (scratchbuf + intel_syntax);
52b15da3
JH		 5390 scratchbuf[0] = '\0';
5391}
5392
5393static void
26ca5450 5394OP_I64 (int bytemode, int sizeflag)
52b15da3
JH		 5395{
5396 bfd_signed_vma op;
5397 bfd_signed_vma mask = -1;
5398
cb712a9e 5399 if (address_mode != mode_64bit)
6439fc28
AM		 5400 {
5401 OP_I (bytemode, sizeflag);
5402 return;
5403 }
5404
52b15da3
JH		 5405 switch (bytemode)
5406 {
5407 case b_mode:
5408 FETCH_DATA (the_info, codep + 1);
5409 op = *codep++;
5410 mask = 0xff;
5411 break;
5412 case v_mode:
161a04f6
L		 5413 USED_REX (REX_W);
5414 if (rex & REX_W)
52b15da3
JH		 5415 op = get64 ();
5416 else if (sizeflag & DFLAG)
5417 {
5418 op = get32 ();
5419 mask = 0xffffffff;
5420 }
5421 else
5422 {
5423 op = get16 ();
5424 mask = 0xfffff;
5425 }
5426 used_prefixes |= (prefixes & PREFIX_DATA);
5427 break;
5428 case w_mode:
5429 mask = 0xfffff;
5430 op = get16 ();
5431 break;
5432 default:
5433 oappend (INTERNAL_DISASSEMBLER_ERROR);
5434 return;
5435 }
5436
5437 op &= mask;
5438 scratchbuf[0] = '$';
d708bcba
AM		 5439 print_operand_value (scratchbuf + 1, 1, op);
5440 oappend (scratchbuf + intel_syntax);
252b5132
RH		 5441 scratchbuf[0] = '\0';
5442}
5443
5444static void
26ca5450 5445OP_sI (int bytemode, int sizeflag)
252b5132 5446{
52b15da3
JH		 5447 bfd_signed_vma op;
5448 bfd_signed_vma mask = -1;
252b5132
RH		 5449
5450 switch (bytemode)
5451 {
5452 case b_mode:
5453 FETCH_DATA (the_info, codep + 1);
5454 op = *codep++;
5455 if ((op & 0x80) != 0)
5456 op -= 0x100;
52b15da3 5457 mask = 0xffffffff;
252b5132
RH		 5458 break;
5459 case v_mode:
161a04f6
L		 5460 USED_REX (REX_W);
5461 if (rex & REX_W)
52b15da3
JH		 5462 op = get32s ();
5463 else if (sizeflag & DFLAG)
5464 {
5465 op = get32s ();
5466 mask = 0xffffffff;
5467 }
252b5132
RH		 5468 else
5469 {
52b15da3 5470 mask = 0xffffffff;
6608db57 5471 op = get16 ();
252b5132
RH		 5472 if ((op & 0x8000) != 0)
5473 op -= 0x10000;
5474 }
7d421014 5475 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 5476 break;
5477 case w_mode:
5478 op = get16 ();
52b15da3 5479 mask = 0xffffffff;
252b5132
RH		 5480 if ((op & 0x8000) != 0)
5481 op -= 0x10000;
5482 break;
5483 default:
5484 oappend (INTERNAL_DISASSEMBLER_ERROR);
5485 return;
5486 }
52b15da3
JH		 5487
5488 scratchbuf[0] = '$';
5489 print_operand_value (scratchbuf + 1, 1, op);
d708bcba 5490 oappend (scratchbuf + intel_syntax);
252b5132
RH		 5491}
5492
5493static void
26ca5450 5494OP_J (int bytemode, int sizeflag)
252b5132 5495{
52b15da3 5496 bfd_vma disp;
7081ff04 5497 bfd_vma mask = -1;
65ca155d 5498 bfd_vma segment = 0;
252b5132
RH		 5499
5500 switch (bytemode)
5501 {
5502 case b_mode:
5503 FETCH_DATA (the_info, codep + 1);
5504 disp = *codep++;
5505 if ((disp & 0x80) != 0)
5506 disp -= 0x100;
5507 break;
5508 case v_mode:
161a04f6 5509 if ((sizeflag & DFLAG) || (rex & REX_W))
52b15da3 5510 disp = get32s ();
252b5132
RH		 5511 else
5512 {
5513 disp = get16 ();
206717e8
L		 5514 if ((disp & 0x8000) != 0)
5515 disp -= 0x10000;
65ca155d
L		 5516 /* In 16bit mode, address is wrapped around at 64k within
5517 the same segment. Otherwise, a data16 prefix on a jump
5518 instruction means that the pc is masked to 16 bits after
5519 the displacement is added! */
5520 mask = 0xffff;
5521 if ((prefixes & PREFIX_DATA) == 0)
5522 segment = ((start_pc + codep - start_codep)
5523 & ~((bfd_vma) 0xffff));
252b5132 5524 }
d807a492 5525 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 5526 break;
5527 default:
5528 oappend (INTERNAL_DISASSEMBLER_ERROR);
5529 return;
5530 }
65ca155d 5531 disp = ((start_pc + codep - start_codep + disp) & mask) | segment;
52b15da3
JH		 5532 set_op (disp, 0);
5533 print_operand_value (scratchbuf, 1, disp);
252b5132
RH		 5534 oappend (scratchbuf);
5535}
5536
252b5132 5537static void
ed7841b3 5538OP_SEG (int bytemode, int sizeflag)
252b5132 5539{
ed7841b3 5540 if (bytemode == w_mode)
7967e09e 5541 oappend (names_seg[modrm.reg]);
ed7841b3 5542 else
7967e09e 5543 OP_E (modrm.mod == 3 ? bytemode : w_mode, sizeflag);
252b5132
RH		 5544}
5545
5546static void
26ca5450 5547OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
252b5132
RH		 5548{
5549 int seg, offset;
5550
c608c12e 5551 if (sizeflag & DFLAG)
252b5132 5552 {
c608c12e
AM		 5553 offset = get32 ();
5554 seg = get16 ();
252b5132 5555 }
c608c12e
AM		 5556 else
5557 {
5558 offset = get16 ();
5559 seg = get16 ();
5560 }
7d421014 5561 used_prefixes |= (prefixes & PREFIX_DATA);
d708bcba 5562 if (intel_syntax)
3f31e633 5563 sprintf (scratchbuf, "0x%x:0x%x", seg, offset);
d708bcba
AM		 5564 else
5565 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
c608c12e 5566 oappend (scratchbuf);
252b5132
RH		 5567}
5568
252b5132 5569static void
3f31e633 5570OP_OFF (int bytemode, int sizeflag)
252b5132 5571{
52b15da3 5572 bfd_vma off;
252b5132 5573
3f31e633
JB		 5574 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
5575 intel_operand_size (bytemode, sizeflag);
252b5132
RH		 5576 append_seg ();
5577
cb712a9e 5578 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
252b5132
RH		 5579 off = get32 ();
5580 else
5581 off = get16 ();
5582
5583 if (intel_syntax)
5584 {
5585 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
db6eb5be 5586 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
252b5132 5587 {
d708bcba 5588 oappend (names_seg[ds_reg - es_reg]);
252b5132
RH		 5589 oappend (":");
5590 }
5591 }
52b15da3
JH		 5592 print_operand_value (scratchbuf, 1, off);
5593 oappend (scratchbuf);
5594}
6439fc28 5595
52b15da3 5596static void
3f31e633 5597OP_OFF64 (int bytemode, int sizeflag)
52b15da3
JH		 5598{
5599 bfd_vma off;
5600
539e75ad
L		 5601 if (address_mode != mode_64bit
5602 || (prefixes & PREFIX_ADDR))
6439fc28
AM		 5603 {
5604 OP_OFF (bytemode, sizeflag);
5605 return;
5606 }
5607
3f31e633
JB		 5608 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
5609 intel_operand_size (bytemode, sizeflag);
52b15da3
JH		 5610 append_seg ();
5611
6608db57 5612 off = get64 ();
52b15da3
JH		 5613
5614 if (intel_syntax)
5615 {
5616 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
db6eb5be 5617 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
52b15da3 5618 {
d708bcba 5619 oappend (names_seg[ds_reg - es_reg]);
52b15da3
JH		 5620 oappend (":");
5621 }
5622 }
5623 print_operand_value (scratchbuf, 1, off);
252b5132
RH		 5624 oappend (scratchbuf);
5625}
5626
5627static void
26ca5450 5628ptr_reg (int code, int sizeflag)
252b5132 5629{
2da11e11 5630 const char *s;
d708bcba 5631
1d9f512f 5632 *obufp++ = open_char;
20f0a1fc 5633 used_prefixes |= (prefixes & PREFIX_ADDR);
cb712a9e 5634 if (address_mode == mode_64bit)
c1a64871
JH		 5635 {
5636 if (!(sizeflag & AFLAG))
db6eb5be 5637 s = names32[code - eAX_reg];
c1a64871 5638 else
db6eb5be 5639 s = names64[code - eAX_reg];
c1a64871 5640 }
52b15da3 5641 else if (sizeflag & AFLAG)
252b5132
RH		 5642 s = names32[code - eAX_reg];
5643 else
5644 s = names16[code - eAX_reg];
5645 oappend (s);
1d9f512f
AM		 5646 *obufp++ = close_char;
5647 *obufp = 0;
252b5132
RH		 5648}
5649
5650static void
26ca5450 5651OP_ESreg (int code, int sizeflag)
252b5132 5652{
9306ca4a 5653 if (intel_syntax)
52fd6d94
JB		 5654 {
5655 switch (codep[-1])
5656 {
5657 case 0x6d: /* insw/insl */
5658 intel_operand_size (z_mode, sizeflag);
5659 break;
5660 case 0xa5: /* movsw/movsl/movsq */
5661 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5662 case 0xab: /* stosw/stosl */
5663 case 0xaf: /* scasw/scasl */
5664 intel_operand_size (v_mode, sizeflag);
5665 break;
5666 default:
5667 intel_operand_size (b_mode, sizeflag);
5668 }
5669 }
d708bcba 5670 oappend ("%es:" + intel_syntax);
252b5132
RH		 5671 ptr_reg (code, sizeflag);
5672}
5673
5674static void
26ca5450 5675OP_DSreg (int code, int sizeflag)
252b5132 5676{
9306ca4a 5677 if (intel_syntax)
52fd6d94
JB		 5678 {
5679 switch (codep[-1])
5680 {
5681 case 0x6f: /* outsw/outsl */
5682 intel_operand_size (z_mode, sizeflag);
5683 break;
5684 case 0xa5: /* movsw/movsl/movsq */
5685 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5686 case 0xad: /* lodsw/lodsl/lodsq */
5687 intel_operand_size (v_mode, sizeflag);
5688 break;
5689 default:
5690 intel_operand_size (b_mode, sizeflag);
5691 }
5692 }
252b5132
RH		 5693 if ((prefixes
5694 & (PREFIX_CS
5695 | PREFIX_DS
5696 | PREFIX_SS
5697 | PREFIX_ES
5698 | PREFIX_FS
5699 | PREFIX_GS)) == 0)
5700 prefixes |= PREFIX_DS;
6608db57 5701 append_seg ();
252b5132
RH		 5702 ptr_reg (code, sizeflag);
5703}
5704
252b5132 5705static void
26ca5450 5706OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 5707{
52b15da3 5708 int add = 0;
161a04f6 5709 if (rex & REX_R)
c4a530c5 5710 {
161a04f6 5711 USED_REX (REX_R);
c4a530c5
JB		 5712 add = 8;
5713 }
cb712a9e 5714 else if (address_mode != mode_64bit && (prefixes & PREFIX_LOCK))
c4a530c5
JB		 5715 {
5716 used_prefixes |= PREFIX_LOCK;
5717 add = 8;
5718 }
7967e09e 5719 sprintf (scratchbuf, "%%cr%d", modrm.reg + add);
d708bcba 5720 oappend (scratchbuf + intel_syntax);
252b5132
RH		 5721}
5722
252b5132 5723static void
26ca5450 5724OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 5725{
52b15da3 5726 int add = 0;
161a04f6
L		 5727 USED_REX (REX_R);
5728 if (rex & REX_R)
52b15da3 5729 add = 8;
d708bcba 5730 if (intel_syntax)
7967e09e 5731 sprintf (scratchbuf, "db%d", modrm.reg + add);
d708bcba 5732 else
7967e09e 5733 sprintf (scratchbuf, "%%db%d", modrm.reg + add);
252b5132
RH		 5734 oappend (scratchbuf);
5735}
5736
252b5132 5737static void
26ca5450 5738OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 5739{
7967e09e 5740 sprintf (scratchbuf, "%%tr%d", modrm.reg);
d708bcba 5741 oappend (scratchbuf + intel_syntax);
252b5132
RH		 5742}
5743
5744static void
6f74c397 5745OP_R (int bytemode, int sizeflag)
252b5132 5746{
7967e09e 5747 if (modrm.mod == 3)
2da11e11
AM		 5748 OP_E (bytemode, sizeflag);
5749 else
6608db57 5750 BadOp ();
252b5132
RH		 5751}
5752
5753static void
26ca5450 5754OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 5755{
041bd2e0
JH		 5756 used_prefixes |= (prefixes & PREFIX_DATA);
5757 if (prefixes & PREFIX_DATA)
20f0a1fc
NC		 5758 {
5759 int add = 0;
161a04f6
L		 5760 USED_REX (REX_R);
5761 if (rex & REX_R)
20f0a1fc 5762 add = 8;
7967e09e 5763 sprintf (scratchbuf, "%%xmm%d", modrm.reg + add);
20f0a1fc 5764 }
041bd2e0 5765 else
7967e09e 5766 sprintf (scratchbuf, "%%mm%d", modrm.reg);
d708bcba 5767 oappend (scratchbuf + intel_syntax);
252b5132
RH		 5768}
5769
c608c12e 5770static void
26ca5450 5771OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
c608c12e 5772{
041bd2e0 5773 int add = 0;
161a04f6
L		 5774 USED_REX (REX_R);
5775 if (rex & REX_R)
041bd2e0 5776 add = 8;
7967e09e 5777 sprintf (scratchbuf, "%%xmm%d", modrm.reg + add);
d708bcba 5778 oappend (scratchbuf + intel_syntax);
c608c12e
AM		 5779}
5780
252b5132 5781static void
26ca5450 5782OP_EM (int bytemode, int sizeflag)
252b5132 5783{
7967e09e 5784 if (modrm.mod != 3)
252b5132 5785 {
9306ca4a
JB		 5786 if (intel_syntax && bytemode == v_mode)
5787 {
5788 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
5789 used_prefixes |= (prefixes & PREFIX_DATA);
5790 }
252b5132
RH		 5791 OP_E (bytemode, sizeflag);
5792 return;
5793 }
5794
6608db57 5795 /* Skip mod/rm byte. */
4bba6815 5796 MODRM_CHECK;
252b5132 5797 codep++;
041bd2e0
JH		 5798 used_prefixes |= (prefixes & PREFIX_DATA);
5799 if (prefixes & PREFIX_DATA)
20f0a1fc
NC		 5800 {
5801 int add = 0;
5802
161a04f6
L		 5803 USED_REX (REX_B);
5804 if (rex & REX_B)
20f0a1fc 5805 add = 8;
7967e09e 5806 sprintf (scratchbuf, "%%xmm%d", modrm.rm + add);
20f0a1fc 5807 }
041bd2e0 5808 else
7967e09e 5809 sprintf (scratchbuf, "%%mm%d", modrm.rm);
d708bcba 5810 oappend (scratchbuf + intel_syntax);
252b5132
RH		 5811}
5812
246c51aa
L		 5813/* cvt* are the only instructions in sse2 which have
5814 both SSE and MMX operands and also have 0x66 prefix
5815 in their opcode. 0x66 was originally used to differentiate
5816 between SSE and MMX instruction(operands). So we have to handle the
4d9567e0
MM		 5817 cvt* separately using OP_EMC and OP_MXC */
5818static void
5819OP_EMC (int bytemode, int sizeflag)
5820{
7967e09e 5821 if (modrm.mod != 3)
4d9567e0
MM		 5822 {
5823 if (intel_syntax && bytemode == v_mode)
5824 {
5825 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
5826 used_prefixes |= (prefixes & PREFIX_DATA);
5827 }
5828 OP_E (bytemode, sizeflag);
5829 return;
5830 }
246c51aa 5831
4d9567e0
MM		 5832 /* Skip mod/rm byte. */
5833 MODRM_CHECK;
5834 codep++;
5835 used_prefixes |= (prefixes & PREFIX_DATA);
7967e09e 5836 sprintf (scratchbuf, "%%mm%d", modrm.rm);
4d9567e0
MM		 5837 oappend (scratchbuf + intel_syntax);
5838}
5839
5840static void
5841OP_MXC (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5842{
5843 used_prefixes |= (prefixes & PREFIX_DATA);
7967e09e 5844 sprintf (scratchbuf, "%%mm%d", modrm.reg);
4d9567e0
MM		 5845 oappend (scratchbuf + intel_syntax);
5846}
5847
c608c12e 5848static void
26ca5450 5849OP_EX (int bytemode, int sizeflag)
c608c12e 5850{
041bd2e0 5851 int add = 0;
7967e09e 5852 if (modrm.mod != 3)
c608c12e
AM		 5853 {
5854 OP_E (bytemode, sizeflag);
5855 return;
5856 }
161a04f6
L		 5857 USED_REX (REX_B);
5858 if (rex & REX_B)
041bd2e0 5859 add = 8;
c608c12e 5860
6608db57 5861 /* Skip mod/rm byte. */
4bba6815 5862 MODRM_CHECK;
c608c12e 5863 codep++;
7967e09e 5864 sprintf (scratchbuf, "%%xmm%d", modrm.rm + add);
d708bcba 5865 oappend (scratchbuf + intel_syntax);
c608c12e
AM		 5866}
5867
252b5132 5868static void
26ca5450 5869OP_MS (int bytemode, int sizeflag)
252b5132 5870{
7967e09e 5871 if (modrm.mod == 3)
2da11e11
AM		 5872 OP_EM (bytemode, sizeflag);
5873 else
6608db57 5874 BadOp ();
252b5132
RH		 5875}
5876
992aaec9 5877static void
26ca5450 5878OP_XS (int bytemode, int sizeflag)
992aaec9 5879{
7967e09e 5880 if (modrm.mod == 3)
992aaec9
AM		 5881 OP_EX (bytemode, sizeflag);
5882 else
6608db57 5883 BadOp ();
992aaec9
AM		 5884}
5885
cc0ec051
AM		 5886static void
5887OP_M (int bytemode, int sizeflag)
5888{
7967e09e 5889 if (modrm.mod == 3)
75413a22
L		 5890 /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */
5891 BadOp ();
cc0ec051
AM		 5892 else
5893 OP_E (bytemode, sizeflag);
5894}
5895
5896static void
5897OP_0f07 (int bytemode, int sizeflag)
5898{
7967e09e 5899 if (modrm.mod != 3 || modrm.rm != 0)
cc0ec051
AM		 5900 BadOp ();
5901 else
5902 OP_E (bytemode, sizeflag);
5903}
5904
5905static void
5906OP_0fae (int bytemode, int sizeflag)
5907{
7967e09e 5908 if (modrm.mod == 3)
cc0ec051 5909 {
7967e09e 5910 if (modrm.reg == 7)
cc0ec051
AM		 5911 strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence");
5912
7967e09e 5913 if (modrm.reg < 5 || modrm.rm != 0)
cc0ec051
AM		 5914 {
5915 BadOp (); /* bad sfence, mfence, or lfence */
5916 return;
5917 }
5918 }
7967e09e 5919 else if (modrm.reg != 7)
cc0ec051
AM		 5920 {
5921 BadOp (); /* bad clflush */
5922 return;
5923 }
5924
5925 OP_E (bytemode, sizeflag);
5926}
5927
46e883c5 5928/* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
246c51aa 5929 32bit mode and "xchg %rax,%rax" in 64bit mode. */
46e883c5 5930
cc0ec051 5931static void
46e883c5 5932NOP_Fixup1 (int bytemode, int sizeflag)
cc0ec051 5933{
8b38ad71
L		 5934 if ((prefixes & PREFIX_DATA) != 0
5935 || (rex != 0
5936 && rex != 0x48
5937 && address_mode == mode_64bit))
46e883c5
L		 5938 OP_REG (bytemode, sizeflag);
5939 else
5940 strcpy (obuf, "nop");
5941}
5942
5943static void
5944NOP_Fixup2 (int bytemode, int sizeflag)
5945{
8b38ad71
L		 5946 if ((prefixes & PREFIX_DATA) != 0
5947 || (rex != 0
5948 && rex != 0x48
5949 && address_mode == mode_64bit))
46e883c5 5950 OP_IMREG (bytemode, sizeflag);
cc0ec051
AM		 5951}
5952
84037f8c 5953static const char *const Suffix3DNow[] = {
252b5132
RH		 5954/* 00 */ NULL, NULL, NULL, NULL,
5955/* 04 */ NULL, NULL, NULL, NULL,
5956/* 08 */ NULL, NULL, NULL, NULL,
9e525108 5957/* 0C */ "pi2fw", "pi2fd", NULL, NULL,
252b5132
RH		 5958/* 10 */ NULL, NULL, NULL, NULL,
5959/* 14 */ NULL, NULL, NULL, NULL,
5960/* 18 */ NULL, NULL, NULL, NULL,
9e525108 5961/* 1C */ "pf2iw", "pf2id", NULL, NULL,
252b5132
RH		 5962/* 20 */ NULL, NULL, NULL, NULL,
5963/* 24 */ NULL, NULL, NULL, NULL,
5964/* 28 */ NULL, NULL, NULL, NULL,
5965/* 2C */ NULL, NULL, NULL, NULL,
5966/* 30 */ NULL, NULL, NULL, NULL,
5967/* 34 */ NULL, NULL, NULL, NULL,
5968/* 38 */ NULL, NULL, NULL, NULL,
5969/* 3C */ NULL, NULL, NULL, NULL,
5970/* 40 */ NULL, NULL, NULL, NULL,
5971/* 44 */ NULL, NULL, NULL, NULL,
5972/* 48 */ NULL, NULL, NULL, NULL,
5973/* 4C */ NULL, NULL, NULL, NULL,
5974/* 50 */ NULL, NULL, NULL, NULL,
5975/* 54 */ NULL, NULL, NULL, NULL,
5976/* 58 */ NULL, NULL, NULL, NULL,
5977/* 5C */ NULL, NULL, NULL, NULL,
5978/* 60 */ NULL, NULL, NULL, NULL,
5979/* 64 */ NULL, NULL, NULL, NULL,
5980/* 68 */ NULL, NULL, NULL, NULL,
5981/* 6C */ NULL, NULL, NULL, NULL,
5982/* 70 */ NULL, NULL, NULL, NULL,
5983/* 74 */ NULL, NULL, NULL, NULL,
5984/* 78 */ NULL, NULL, NULL, NULL,
5985/* 7C */ NULL, NULL, NULL, NULL,
5986/* 80 */ NULL, NULL, NULL, NULL,
5987/* 84 */ NULL, NULL, NULL, NULL,
9e525108
AM		 5988/* 88 */ NULL, NULL, "pfnacc", NULL,
5989/* 8C */ NULL, NULL, "pfpnacc", NULL,
252b5132
RH		 5990/* 90 */ "pfcmpge", NULL, NULL, NULL,
5991/* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
5992/* 98 */ NULL, NULL, "pfsub", NULL,
5993/* 9C */ NULL, NULL, "pfadd", NULL,
5994/* A0 */ "pfcmpgt", NULL, NULL, NULL,
5995/* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
5996/* A8 */ NULL, NULL, "pfsubr", NULL,
5997/* AC */ NULL, NULL, "pfacc", NULL,
5998/* B0 */ "pfcmpeq", NULL, NULL, NULL,
9beff690 5999/* B4 */ "pfmul", NULL, "pfrcpit2", "pmulhrw",
9e525108 6000/* B8 */ NULL, NULL, NULL, "pswapd",
252b5132
RH		 6001/* BC */ NULL, NULL, NULL, "pavgusb",
6002/* C0 */ NULL, NULL, NULL, NULL,
6003/* C4 */ NULL, NULL, NULL, NULL,
6004/* C8 */ NULL, NULL, NULL, NULL,
6005/* CC */ NULL, NULL, NULL, NULL,
6006/* D0 */ NULL, NULL, NULL, NULL,
6007/* D4 */ NULL, NULL, NULL, NULL,
6008/* D8 */ NULL, NULL, NULL, NULL,
6009/* DC */ NULL, NULL, NULL, NULL,
6010/* E0 */ NULL, NULL, NULL, NULL,
6011/* E4 */ NULL, NULL, NULL, NULL,
6012/* E8 */ NULL, NULL, NULL, NULL,
6013/* EC */ NULL, NULL, NULL, NULL,
6014/* F0 */ NULL, NULL, NULL, NULL,
6015/* F4 */ NULL, NULL, NULL, NULL,
6016/* F8 */ NULL, NULL, NULL, NULL,
6017/* FC */ NULL, NULL, NULL, NULL,
6018};
6019
6020static void
26ca5450 6021OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132
RH		 6022{
6023 const char *mnemonic;
6024
6025 FETCH_DATA (the_info, codep + 1);
6026 /* AMD 3DNow! instructions are specified by an opcode suffix in the
6027 place where an 8-bit immediate would normally go. ie. the last
6028 byte of the instruction. */
6608db57 6029 obufp = obuf + strlen (obuf);
c608c12e 6030 mnemonic = Suffix3DNow[*codep++ & 0xff];
252b5132 6031 if (mnemonic)
2da11e11 6032 oappend (mnemonic);
252b5132
RH		 6033 else
6034 {
6035 /* Since a variable sized modrm/sib chunk is between the start
6036 of the opcode (0x0f0f) and the opcode suffix, we need to do
6037 all the modrm processing first, and don't know until now that
6038 we have a bad opcode. This necessitates some cleaning up. */
ce518a5f
L		 6039 op_out[0][0] = '\0';
6040 op_out[1][0] = '\0';
6608db57 6041 BadOp ();
252b5132
RH		 6042 }
6043}
c608c12e 6044
6608db57 6045static const char *simd_cmp_op[] = {
c608c12e
AM		 6046 "eq",
6047 "lt",
6048 "le",
6049 "unord",
6050 "neq",
6051 "nlt",
6052 "nle",
6053 "ord"
6054};
6055
6056static void
26ca5450 6057OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
c608c12e
AM		 6058{
6059 unsigned int cmp_type;
6060
6061 FETCH_DATA (the_info, codep + 1);
6608db57 6062 obufp = obuf + strlen (obuf);
c608c12e
AM		 6063 cmp_type = *codep++ & 0xff;
6064 if (cmp_type < 8)
6065 {
041bd2e0
JH		 6066 char suffix1 = 'p', suffix2 = 's';
6067 used_prefixes |= (prefixes & PREFIX_REPZ);
6068 if (prefixes & PREFIX_REPZ)
6069 suffix1 = 's';
6070 else
6071 {
6072 used_prefixes |= (prefixes & PREFIX_DATA);
6073 if (prefixes & PREFIX_DATA)
6074 suffix2 = 'd';
6075 else
6076 {
6077 used_prefixes |= (prefixes & PREFIX_REPNZ);
6078 if (prefixes & PREFIX_REPNZ)
6079 suffix1 = 's', suffix2 = 'd';
6080 }
6081 }
6082 sprintf (scratchbuf, "cmp%s%c%c",
6083 simd_cmp_op[cmp_type], suffix1, suffix2);
7d421014 6084 used_prefixes |= (prefixes & PREFIX_REPZ);
2da11e11 6085 oappend (scratchbuf);
c608c12e
AM		 6086 }
6087 else
6088 {
6089 /* We have a bad extension byte. Clean up. */
ce518a5f
L		 6090 op_out[0][0] = '\0';
6091 op_out[1][0] = '\0';
6608db57 6092 BadOp ();
c608c12e
AM		 6093 }
6094}
6095
6096static void
26ca5450 6097SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED)
c608c12e
AM		 6098{
6099 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
6100 forms of these instructions. */
7967e09e 6101 if (modrm.mod == 3)
c608c12e 6102 {
6608db57
KH		 6103 char *p = obuf + strlen (obuf);
6104 *(p + 1) = '\0';
6105 *p = *(p - 1);
6106 *(p - 1) = *(p - 2);
6107 *(p - 2) = *(p - 3);
6108 *(p - 3) = extrachar;
c608c12e
AM		 6109 }
6110}
2da11e11 6111
ca164297 6112static void
4fd61dcb 6113PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
ca164297 6114{
7967e09e 6115 if (modrm.mod == 3 && modrm.reg == 1 && modrm.rm <= 1)
ca164297 6116 {
ca164297 6117 /* Override "sidt". */
cb712a9e
L		 6118 size_t olen = strlen (obuf);
6119 char *p = obuf + olen - 4;
6120 const char **names = (address_mode == mode_64bit
6121 ? names64 : names32);
1d9f512f 6122
22cbf2e7 6123 /* We might have a suffix when disassembling with -Msuffix. */
1d9f512f
AM		 6124 if (*p == 'i')
6125 --p;
6126
cb712a9e
L		 6127 /* Remove "addr16/addr32" if we aren't in Intel mode. */
6128 if (!intel_syntax
6129 && (prefixes & PREFIX_ADDR)
6130 && olen >= (4 + 7)
6131 && *(p - 1) == ' '
0112cd26
NC		 6132 && CONST_STRNEQ (p - 7, "addr")
6133 && (CONST_STRNEQ (p - 3, "16")
6134 || CONST_STRNEQ (p - 3, "32")))
cb712a9e
L		 6135 p -= 7;
6136
7967e09e 6137 if (modrm.rm)
ca164297
L		 6138 {
6139 /* mwait %eax,%ecx */
1d9f512f 6140 strcpy (p, "mwait");
6128c599 6141 if (!intel_syntax)
ce518a5f 6142 strcpy (op_out[0], names[0]);
ca164297
L		 6143 }
6144 else
6145 {
6146 /* monitor %eax,%ecx,%edx" */
1d9f512f 6147 strcpy (p, "monitor");
6128c599
JB		 6148 if (!intel_syntax)
6149 {
cb712a9e
L		 6150 const char **op1_names;
6151 if (!(prefixes & PREFIX_ADDR))
6152 op1_names = (address_mode == mode_16bit
6153 ? names16 : names);
6128c599
JB		 6154 else
6155 {
cb712a9e
L		 6156 op1_names = (address_mode != mode_32bit
6157 ? names32 : names16);
6128c599
JB		 6158 used_prefixes |= PREFIX_ADDR;
6159 }
ce518a5f
L		 6160 strcpy (op_out[0], op1_names[0]);
6161 strcpy (op_out[2], names[2]);
6128c599
JB		 6162 }
6163 }
6164 if (!intel_syntax)
6165 {
ce518a5f 6166 strcpy (op_out[1], names[1]);
6128c599 6167 two_source_ops = 1;
ca164297
L		 6168 }
6169
6170 codep++;
6171 }
6172 else
30123838
JB		 6173 OP_M (0, sizeflag);
6174}
6175
6176static void
6177SVME_Fixup (int bytemode, int sizeflag)
6178{
6179 const char *alt;
6180 char *p;
6181
6182 switch (*codep)
6183 {
6184 case 0xd8:
6185 alt = "vmrun";
6186 break;
6187 case 0xd9:
6188 alt = "vmmcall";
6189 break;
6190 case 0xda:
6191 alt = "vmload";
6192 break;
6193 case 0xdb:
6194 alt = "vmsave";
6195 break;
6196 case 0xdc:
6197 alt = "stgi";
6198 break;
6199 case 0xdd:
6200 alt = "clgi";
6201 break;
6202 case 0xde:
6203 alt = "skinit";
6204 break;
6205 case 0xdf:
6206 alt = "invlpga";
6207 break;
6208 default:
6209 OP_M (bytemode, sizeflag);
6210 return;
6211 }
6212 /* Override "lidt". */
6213 p = obuf + strlen (obuf) - 4;
6214 /* We might have a suffix. */
6215 if (*p == 'i')
6216 --p;
6217 strcpy (p, alt);
6218 if (!(prefixes & PREFIX_ADDR))
6219 {
6220 ++codep;
6221 return;
6222 }
6223 used_prefixes |= PREFIX_ADDR;
6224 switch (*codep++)
6225 {
6226 case 0xdf:
ce518a5f 6227 strcpy (op_out[1], names32[1]);
30123838
JB		 6228 two_source_ops = 1;
6229 /* Fall through. */
6230 case 0xd8:
6231 case 0xda:
6232 case 0xdb:
6233 *obufp++ = open_char;
cb712a9e 6234 if (address_mode == mode_64bit || (sizeflag & AFLAG))
30123838
JB		 6235 alt = names32[0];
6236 else
6237 alt = names16[0];
6238 strcpy (obufp, alt);
6239 obufp += strlen (alt);
6240 *obufp++ = close_char;
6241 *obufp = '\0';
6242 break;
6243 }
ca164297
L		 6244}
6245
4fd61dcb
JJ		 6246static void
6247INVLPG_Fixup (int bytemode, int sizeflag)
6248{
373ff435 6249 const char *alt;
4fd61dcb 6250
373ff435
JB		 6251 switch (*codep)
6252 {
6253 case 0xf8:
6254 alt = "swapgs";
6255 break;
6256 case 0xf9:
6257 alt = "rdtscp";
6258 break;
6259 default:
30123838 6260 OP_M (bytemode, sizeflag);
373ff435 6261 return;
4fd61dcb 6262 }
373ff435
JB		 6263 /* Override "invlpg". */
6264 strcpy (obuf + strlen (obuf) - 6, alt);
6265 codep++;
4fd61dcb
JJ		 6266}
6267
6608db57
KH		 6268static void
6269BadOp (void)
2da11e11 6270{
6608db57
KH		 6271 /* Throw away prefixes and 1st. opcode byte. */
6272 codep = insn_codep + 1;
2da11e11
AM		 6273 oappend ("(bad)");
6274}
4cc91dba 6275
90700ea2
L		 6276static void
6277VMX_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
6278{
7967e09e
L		 6279 if (modrm.mod == 3
6280 && modrm.reg == 0
6281 && modrm.rm >=1
6282 && modrm.rm <= 4)
90700ea2
L		 6283 {
6284 /* Override "sgdt". */
6285 char *p = obuf + strlen (obuf) - 4;
6286
22cbf2e7
L		 6287 /* We might have a suffix when disassembling with -Msuffix. */
6288 if (*p == 'g')
90700ea2
L		 6289 --p;
6290
7967e09e 6291 switch (modrm.rm)
90700ea2
L		 6292 {
6293 case 1:
6294 strcpy (p, "vmcall");
6295 break;
6296 case 2:
6297 strcpy (p, "vmlaunch");
6298 break;
6299 case 3:
6300 strcpy (p, "vmresume");
6301 break;
6302 case 4:
6303 strcpy (p, "vmxoff");
6304 break;
6305 }
6306
6307 codep++;
6308 }
6309 else
6310 OP_E (0, sizeflag);
6311}
6312
6313static void
6314OP_VMX (int bytemode, int sizeflag)
6315{
6316 used_prefixes |= (prefixes & (PREFIX_DATA | PREFIX_REPZ));
6317 if (prefixes & PREFIX_DATA)
6318 strcpy (obuf, "vmclear");
6319 else if (prefixes & PREFIX_REPZ)
6320 strcpy (obuf, "vmxon");
6321 else
6322 strcpy (obuf, "vmptrld");
6323 OP_E (bytemode, sizeflag);
6324}
35c52694
L		 6325
6326static void
6327REP_Fixup (int bytemode, int sizeflag)
6328{
6329 /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
6330 lods and stos. */
6331 size_t ilen = 0;
6332
6333 if (prefixes & PREFIX_REPZ)
246c51aa 6334 switch (*insn_codep)
35c52694
L		 6335 {
6336 case 0x6e: /* outsb */
6337 case 0x6f: /* outsw/outsl */
6338 case 0xa4: /* movsb */
6339 case 0xa5: /* movsw/movsl/movsq */
6340 if (!intel_syntax)
6341 ilen = 5;
6342 else
6343 ilen = 4;
6344 break;
6345 case 0xaa: /* stosb */
6346 case 0xab: /* stosw/stosl/stosq */
6347 case 0xac: /* lodsb */
6348 case 0xad: /* lodsw/lodsl/lodsq */
6349 if (!intel_syntax && (sizeflag & SUFFIX_ALWAYS))
6350 ilen = 5;
6351 else
6352 ilen = 4;
6353 break;
6354 case 0x6c: /* insb */
6355 case 0x6d: /* insl/insw */
6356 if (!intel_syntax)
6357 ilen = 4;
6358 else
6359 ilen = 3;
6360 break;
6361 default:
6362 abort ();
6363 break;
6364 }
6365
6366 if (ilen != 0)
6367 {
6368 size_t olen;
6369 char *p;
6370
6371 olen = strlen (obuf);
6372 p = obuf + olen - ilen - 1 - 4;
6373 /* Handle "repz [addr16|addr32]". */
6374 if ((prefixes & PREFIX_ADDR))
6375 p -= 1 + 6;
6376
6377 memmove (p + 3, p + 4, olen - (p + 3 - obuf));
6378 }
6379
6380 switch (bytemode)
6381 {
6382 case al_reg:
6383 case eAX_reg:
6384 case indir_dx_reg:
6385 OP_IMREG (bytemode, sizeflag);
6386 break;
6387 case eDI_reg:
6388 OP_ESreg (bytemode, sizeflag);
6389 break;
6390 case eSI_reg:
6391 OP_DSreg (bytemode, sizeflag);
6392 break;
6393 default:
6394 abort ();
6395 break;
6396 }
6397}
f5804c90
L		 6398
6399static void
6400CMPXCHG8B_Fixup (int bytemode, int sizeflag)
6401{
161a04f6
L		 6402 USED_REX (REX_W);
6403 if (rex & REX_W)
f5804c90
L		 6404 {
6405 /* Change cmpxchg8b to cmpxchg16b. */
6406 char *p = obuf + strlen (obuf) - 2;
6407 strcpy (p, "16b");
fb9c77c7 6408 bytemode = o_mode;
f5804c90
L		 6409 }
6410 OP_M (bytemode, sizeflag);
6411}
42903f7f
L		 6412
6413static void
6414XMM_Fixup (int reg, int sizeflag ATTRIBUTE_UNUSED)
6415{
6416 sprintf (scratchbuf, "%%xmm%d", reg);
6417 oappend (scratchbuf + intel_syntax);
6418}
381d071f
L		 6419
6420static void
6421CRC32_Fixup (int bytemode, int sizeflag)
6422{
6423 /* Add proper suffix to "crc32". */
6424 char *p = obuf + strlen (obuf);
6425
6426 switch (bytemode)
6427 {
6428 case b_mode:
20592a94
L		 6429 if (intel_syntax)
6430 break;
6431
381d071f
L		 6432 *p++ = 'b';
6433 break;
6434 case v_mode:
20592a94
L		 6435 if (intel_syntax)
6436 break;
6437
381d071f
L		 6438 USED_REX (REX_W);
6439 if (rex & REX_W)
6440 *p++ = 'q';
9344ff29 6441 else if (sizeflag & DFLAG)
20592a94 6442 *p++ = 'l';
381d071f 6443 else
9344ff29
L		 6444 *p++ = 'w';
6445 used_prefixes |= (prefixes & PREFIX_DATA);
381d071f
L		 6446 break;
6447 default:
6448 oappend (INTERNAL_DISASSEMBLER_ERROR);
6449 break;
6450 }
6451 *p = '\0';
6452
6453 if (modrm.mod == 3)
6454 {
6455 int add;
6456
6457 /* Skip mod/rm byte. */
6458 MODRM_CHECK;
6459 codep++;
6460
6461 USED_REX (REX_B);
6462 add = (rex & REX_B) ? 8 : 0;
6463 if (bytemode == b_mode)
6464 {
6465 USED_REX (0);
6466 if (rex)
6467 oappend (names8rex[modrm.rm + add]);
6468 else
6469 oappend (names8[modrm.rm + add]);
6470 }
6471 else
6472 {
6473 USED_REX (REX_W);
6474 if (rex & REX_W)
6475 oappend (names64[modrm.rm + add]);
6476 else if ((prefixes & PREFIX_DATA))
6477 oappend (names16[modrm.rm + add]);
6478 else
6479 oappend (names32[modrm.rm + add]);
6480 }
6481 }
6482 else
9344ff29 6483 OP_E (bytemode, sizeflag);
381d071f 6484}
GDB Binutils - Deliverables
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