Commit | Line | Data |
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6aa8b732 AK |
1 | /* |
2 | * Kernel-based Virtual Machine driver for Linux | |
3 | * | |
4 | * This module enables machines with Intel VT-x extensions to run virtual | |
5 | * machines without emulation or binary translation. | |
6 | * | |
7 | * MMU support | |
8 | * | |
9 | * Copyright (C) 2006 Qumranet, Inc. | |
10 | * | |
11 | * Authors: | |
12 | * Yaniv Kamay <yaniv@qumranet.com> | |
13 | * Avi Kivity <avi@qumranet.com> | |
14 | * | |
15 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
16 | * the COPYING file in the top-level directory. | |
17 | * | |
18 | */ | |
e495606d | 19 | |
1d737c8a | 20 | #include "mmu.h" |
6de4f3ad | 21 | #include "kvm_cache_regs.h" |
e495606d | 22 | |
edf88417 | 23 | #include <linux/kvm_host.h> |
6aa8b732 AK |
24 | #include <linux/types.h> |
25 | #include <linux/string.h> | |
6aa8b732 AK |
26 | #include <linux/mm.h> |
27 | #include <linux/highmem.h> | |
28 | #include <linux/module.h> | |
448353ca | 29 | #include <linux/swap.h> |
05da4558 | 30 | #include <linux/hugetlb.h> |
2f333bcb | 31 | #include <linux/compiler.h> |
bc6678a3 | 32 | #include <linux/srcu.h> |
6aa8b732 | 33 | |
e495606d AK |
34 | #include <asm/page.h> |
35 | #include <asm/cmpxchg.h> | |
4e542370 | 36 | #include <asm/io.h> |
13673a90 | 37 | #include <asm/vmx.h> |
6aa8b732 | 38 | |
18552672 JR |
39 | /* |
40 | * When setting this variable to true it enables Two-Dimensional-Paging | |
41 | * where the hardware walks 2 page tables: | |
42 | * 1. the guest-virtual to guest-physical | |
43 | * 2. while doing 1. it walks guest-physical to host-physical | |
44 | * If the hardware supports that we don't need to do shadow paging. | |
45 | */ | |
2f333bcb | 46 | bool tdp_enabled = false; |
18552672 | 47 | |
37a7d8b0 AK |
48 | #undef MMU_DEBUG |
49 | ||
50 | #undef AUDIT | |
51 | ||
52 | #ifdef AUDIT | |
53 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg); | |
54 | #else | |
55 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {} | |
56 | #endif | |
57 | ||
58 | #ifdef MMU_DEBUG | |
59 | ||
60 | #define pgprintk(x...) do { if (dbg) printk(x); } while (0) | |
61 | #define rmap_printk(x...) do { if (dbg) printk(x); } while (0) | |
62 | ||
63 | #else | |
64 | ||
65 | #define pgprintk(x...) do { } while (0) | |
66 | #define rmap_printk(x...) do { } while (0) | |
67 | ||
68 | #endif | |
69 | ||
70 | #if defined(MMU_DEBUG) || defined(AUDIT) | |
6ada8cca AK |
71 | static int dbg = 0; |
72 | module_param(dbg, bool, 0644); | |
37a7d8b0 | 73 | #endif |
6aa8b732 | 74 | |
582801a9 MT |
75 | static int oos_shadow = 1; |
76 | module_param(oos_shadow, bool, 0644); | |
77 | ||
d6c69ee9 YD |
78 | #ifndef MMU_DEBUG |
79 | #define ASSERT(x) do { } while (0) | |
80 | #else | |
6aa8b732 AK |
81 | #define ASSERT(x) \ |
82 | if (!(x)) { \ | |
83 | printk(KERN_WARNING "assertion failed %s:%d: %s\n", \ | |
84 | __FILE__, __LINE__, #x); \ | |
85 | } | |
d6c69ee9 | 86 | #endif |
6aa8b732 | 87 | |
6aa8b732 AK |
88 | #define PT_FIRST_AVAIL_BITS_SHIFT 9 |
89 | #define PT64_SECOND_AVAIL_BITS_SHIFT 52 | |
90 | ||
6aa8b732 AK |
91 | #define VALID_PAGE(x) ((x) != INVALID_PAGE) |
92 | ||
93 | #define PT64_LEVEL_BITS 9 | |
94 | ||
95 | #define PT64_LEVEL_SHIFT(level) \ | |
d77c26fc | 96 | (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS) |
6aa8b732 AK |
97 | |
98 | #define PT64_LEVEL_MASK(level) \ | |
99 | (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level)) | |
100 | ||
101 | #define PT64_INDEX(address, level)\ | |
102 | (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1)) | |
103 | ||
104 | ||
105 | #define PT32_LEVEL_BITS 10 | |
106 | ||
107 | #define PT32_LEVEL_SHIFT(level) \ | |
d77c26fc | 108 | (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS) |
6aa8b732 AK |
109 | |
110 | #define PT32_LEVEL_MASK(level) \ | |
111 | (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level)) | |
e04da980 JR |
112 | #define PT32_LVL_OFFSET_MASK(level) \ |
113 | (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \ | |
114 | * PT32_LEVEL_BITS))) - 1)) | |
6aa8b732 AK |
115 | |
116 | #define PT32_INDEX(address, level)\ | |
117 | (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1)) | |
118 | ||
119 | ||
27aba766 | 120 | #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1)) |
6aa8b732 AK |
121 | #define PT64_DIR_BASE_ADDR_MASK \ |
122 | (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1)) | |
e04da980 JR |
123 | #define PT64_LVL_ADDR_MASK(level) \ |
124 | (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \ | |
125 | * PT64_LEVEL_BITS))) - 1)) | |
126 | #define PT64_LVL_OFFSET_MASK(level) \ | |
127 | (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \ | |
128 | * PT64_LEVEL_BITS))) - 1)) | |
6aa8b732 AK |
129 | |
130 | #define PT32_BASE_ADDR_MASK PAGE_MASK | |
131 | #define PT32_DIR_BASE_ADDR_MASK \ | |
132 | (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1)) | |
e04da980 JR |
133 | #define PT32_LVL_ADDR_MASK(level) \ |
134 | (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \ | |
135 | * PT32_LEVEL_BITS))) - 1)) | |
6aa8b732 | 136 | |
79539cec AK |
137 | #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \ |
138 | | PT64_NX_MASK) | |
6aa8b732 AK |
139 | |
140 | #define PFERR_PRESENT_MASK (1U << 0) | |
141 | #define PFERR_WRITE_MASK (1U << 1) | |
142 | #define PFERR_USER_MASK (1U << 2) | |
82725b20 | 143 | #define PFERR_RSVD_MASK (1U << 3) |
73b1087e | 144 | #define PFERR_FETCH_MASK (1U << 4) |
6aa8b732 | 145 | |
cd4a4e53 AK |
146 | #define RMAP_EXT 4 |
147 | ||
fe135d2c AK |
148 | #define ACC_EXEC_MASK 1 |
149 | #define ACC_WRITE_MASK PT_WRITABLE_MASK | |
150 | #define ACC_USER_MASK PT_USER_MASK | |
151 | #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK) | |
152 | ||
07420171 AK |
153 | #define CREATE_TRACE_POINTS |
154 | #include "mmutrace.h" | |
155 | ||
1403283a IE |
156 | #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT) |
157 | ||
135f8c2b AK |
158 | #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level) |
159 | ||
cd4a4e53 | 160 | struct kvm_rmap_desc { |
d555c333 | 161 | u64 *sptes[RMAP_EXT]; |
cd4a4e53 AK |
162 | struct kvm_rmap_desc *more; |
163 | }; | |
164 | ||
2d11123a AK |
165 | struct kvm_shadow_walk_iterator { |
166 | u64 addr; | |
167 | hpa_t shadow_addr; | |
168 | int level; | |
169 | u64 *sptep; | |
170 | unsigned index; | |
171 | }; | |
172 | ||
173 | #define for_each_shadow_entry(_vcpu, _addr, _walker) \ | |
174 | for (shadow_walk_init(&(_walker), _vcpu, _addr); \ | |
175 | shadow_walk_okay(&(_walker)); \ | |
176 | shadow_walk_next(&(_walker))) | |
177 | ||
178 | ||
4731d4c7 MT |
179 | struct kvm_unsync_walk { |
180 | int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk); | |
181 | }; | |
182 | ||
ad8cfbe3 MT |
183 | typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp); |
184 | ||
b5a33a75 AK |
185 | static struct kmem_cache *pte_chain_cache; |
186 | static struct kmem_cache *rmap_desc_cache; | |
d3d25b04 | 187 | static struct kmem_cache *mmu_page_header_cache; |
b5a33a75 | 188 | |
c7addb90 AK |
189 | static u64 __read_mostly shadow_trap_nonpresent_pte; |
190 | static u64 __read_mostly shadow_notrap_nonpresent_pte; | |
7b52345e SY |
191 | static u64 __read_mostly shadow_base_present_pte; |
192 | static u64 __read_mostly shadow_nx_mask; | |
193 | static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */ | |
194 | static u64 __read_mostly shadow_user_mask; | |
195 | static u64 __read_mostly shadow_accessed_mask; | |
196 | static u64 __read_mostly shadow_dirty_mask; | |
c7addb90 | 197 | |
82725b20 DE |
198 | static inline u64 rsvd_bits(int s, int e) |
199 | { | |
200 | return ((1ULL << (e - s + 1)) - 1) << s; | |
201 | } | |
202 | ||
c7addb90 AK |
203 | void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte) |
204 | { | |
205 | shadow_trap_nonpresent_pte = trap_pte; | |
206 | shadow_notrap_nonpresent_pte = notrap_pte; | |
207 | } | |
208 | EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes); | |
209 | ||
7b52345e SY |
210 | void kvm_mmu_set_base_ptes(u64 base_pte) |
211 | { | |
212 | shadow_base_present_pte = base_pte; | |
213 | } | |
214 | EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes); | |
215 | ||
216 | void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, | |
4b12f0de | 217 | u64 dirty_mask, u64 nx_mask, u64 x_mask) |
7b52345e SY |
218 | { |
219 | shadow_user_mask = user_mask; | |
220 | shadow_accessed_mask = accessed_mask; | |
221 | shadow_dirty_mask = dirty_mask; | |
222 | shadow_nx_mask = nx_mask; | |
223 | shadow_x_mask = x_mask; | |
224 | } | |
225 | EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes); | |
226 | ||
6aa8b732 AK |
227 | static int is_write_protection(struct kvm_vcpu *vcpu) |
228 | { | |
4d4ec087 | 229 | return kvm_read_cr0_bits(vcpu, X86_CR0_WP); |
6aa8b732 AK |
230 | } |
231 | ||
232 | static int is_cpuid_PSE36(void) | |
233 | { | |
234 | return 1; | |
235 | } | |
236 | ||
73b1087e AK |
237 | static int is_nx(struct kvm_vcpu *vcpu) |
238 | { | |
ad312c7c | 239 | return vcpu->arch.shadow_efer & EFER_NX; |
73b1087e AK |
240 | } |
241 | ||
c7addb90 AK |
242 | static int is_shadow_present_pte(u64 pte) |
243 | { | |
c7addb90 AK |
244 | return pte != shadow_trap_nonpresent_pte |
245 | && pte != shadow_notrap_nonpresent_pte; | |
246 | } | |
247 | ||
05da4558 MT |
248 | static int is_large_pte(u64 pte) |
249 | { | |
250 | return pte & PT_PAGE_SIZE_MASK; | |
251 | } | |
252 | ||
8dae4445 | 253 | static int is_writable_pte(unsigned long pte) |
6aa8b732 AK |
254 | { |
255 | return pte & PT_WRITABLE_MASK; | |
256 | } | |
257 | ||
43a3795a | 258 | static int is_dirty_gpte(unsigned long pte) |
e3c5e7ec | 259 | { |
439e218a | 260 | return pte & PT_DIRTY_MASK; |
e3c5e7ec AK |
261 | } |
262 | ||
43a3795a | 263 | static int is_rmap_spte(u64 pte) |
cd4a4e53 | 264 | { |
4b1a80fa | 265 | return is_shadow_present_pte(pte); |
cd4a4e53 AK |
266 | } |
267 | ||
776e6633 MT |
268 | static int is_last_spte(u64 pte, int level) |
269 | { | |
270 | if (level == PT_PAGE_TABLE_LEVEL) | |
271 | return 1; | |
852e3c19 | 272 | if (is_large_pte(pte)) |
776e6633 MT |
273 | return 1; |
274 | return 0; | |
275 | } | |
276 | ||
35149e21 | 277 | static pfn_t spte_to_pfn(u64 pte) |
0b49ea86 | 278 | { |
35149e21 | 279 | return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT; |
0b49ea86 AK |
280 | } |
281 | ||
da928521 AK |
282 | static gfn_t pse36_gfn_delta(u32 gpte) |
283 | { | |
284 | int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT; | |
285 | ||
286 | return (gpte & PT32_DIR_PSE36_MASK) << shift; | |
287 | } | |
288 | ||
d555c333 | 289 | static void __set_spte(u64 *sptep, u64 spte) |
e663ee64 AK |
290 | { |
291 | #ifdef CONFIG_X86_64 | |
292 | set_64bit((unsigned long *)sptep, spte); | |
293 | #else | |
294 | set_64bit((unsigned long long *)sptep, spte); | |
295 | #endif | |
296 | } | |
297 | ||
e2dec939 | 298 | static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache, |
2e3e5882 | 299 | struct kmem_cache *base_cache, int min) |
714b93da AK |
300 | { |
301 | void *obj; | |
302 | ||
303 | if (cache->nobjs >= min) | |
e2dec939 | 304 | return 0; |
714b93da | 305 | while (cache->nobjs < ARRAY_SIZE(cache->objects)) { |
2e3e5882 | 306 | obj = kmem_cache_zalloc(base_cache, GFP_KERNEL); |
714b93da | 307 | if (!obj) |
e2dec939 | 308 | return -ENOMEM; |
714b93da AK |
309 | cache->objects[cache->nobjs++] = obj; |
310 | } | |
e2dec939 | 311 | return 0; |
714b93da AK |
312 | } |
313 | ||
314 | static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc) | |
315 | { | |
316 | while (mc->nobjs) | |
317 | kfree(mc->objects[--mc->nobjs]); | |
318 | } | |
319 | ||
c1158e63 | 320 | static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache, |
2e3e5882 | 321 | int min) |
c1158e63 AK |
322 | { |
323 | struct page *page; | |
324 | ||
325 | if (cache->nobjs >= min) | |
326 | return 0; | |
327 | while (cache->nobjs < ARRAY_SIZE(cache->objects)) { | |
2e3e5882 | 328 | page = alloc_page(GFP_KERNEL); |
c1158e63 AK |
329 | if (!page) |
330 | return -ENOMEM; | |
331 | set_page_private(page, 0); | |
332 | cache->objects[cache->nobjs++] = page_address(page); | |
333 | } | |
334 | return 0; | |
335 | } | |
336 | ||
337 | static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc) | |
338 | { | |
339 | while (mc->nobjs) | |
c4d198d5 | 340 | free_page((unsigned long)mc->objects[--mc->nobjs]); |
c1158e63 AK |
341 | } |
342 | ||
2e3e5882 | 343 | static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu) |
714b93da | 344 | { |
e2dec939 AK |
345 | int r; |
346 | ||
ad312c7c | 347 | r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache, |
2e3e5882 | 348 | pte_chain_cache, 4); |
e2dec939 AK |
349 | if (r) |
350 | goto out; | |
ad312c7c | 351 | r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache, |
c41ef344 | 352 | rmap_desc_cache, 4); |
d3d25b04 AK |
353 | if (r) |
354 | goto out; | |
ad312c7c | 355 | r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8); |
d3d25b04 AK |
356 | if (r) |
357 | goto out; | |
ad312c7c | 358 | r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache, |
2e3e5882 | 359 | mmu_page_header_cache, 4); |
e2dec939 AK |
360 | out: |
361 | return r; | |
714b93da AK |
362 | } |
363 | ||
364 | static void mmu_free_memory_caches(struct kvm_vcpu *vcpu) | |
365 | { | |
ad312c7c ZX |
366 | mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache); |
367 | mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache); | |
368 | mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache); | |
369 | mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache); | |
714b93da AK |
370 | } |
371 | ||
372 | static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc, | |
373 | size_t size) | |
374 | { | |
375 | void *p; | |
376 | ||
377 | BUG_ON(!mc->nobjs); | |
378 | p = mc->objects[--mc->nobjs]; | |
714b93da AK |
379 | return p; |
380 | } | |
381 | ||
714b93da AK |
382 | static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu) |
383 | { | |
ad312c7c | 384 | return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache, |
714b93da AK |
385 | sizeof(struct kvm_pte_chain)); |
386 | } | |
387 | ||
90cb0529 | 388 | static void mmu_free_pte_chain(struct kvm_pte_chain *pc) |
714b93da | 389 | { |
90cb0529 | 390 | kfree(pc); |
714b93da AK |
391 | } |
392 | ||
393 | static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu) | |
394 | { | |
ad312c7c | 395 | return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache, |
714b93da AK |
396 | sizeof(struct kvm_rmap_desc)); |
397 | } | |
398 | ||
90cb0529 | 399 | static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd) |
714b93da | 400 | { |
90cb0529 | 401 | kfree(rd); |
714b93da AK |
402 | } |
403 | ||
05da4558 MT |
404 | /* |
405 | * Return the pointer to the largepage write count for a given | |
406 | * gfn, handling slots that are not large page aligned. | |
407 | */ | |
d25797b2 JR |
408 | static int *slot_largepage_idx(gfn_t gfn, |
409 | struct kvm_memory_slot *slot, | |
410 | int level) | |
05da4558 MT |
411 | { |
412 | unsigned long idx; | |
413 | ||
d25797b2 JR |
414 | idx = (gfn / KVM_PAGES_PER_HPAGE(level)) - |
415 | (slot->base_gfn / KVM_PAGES_PER_HPAGE(level)); | |
416 | return &slot->lpage_info[level - 2][idx].write_count; | |
05da4558 MT |
417 | } |
418 | ||
419 | static void account_shadowed(struct kvm *kvm, gfn_t gfn) | |
420 | { | |
d25797b2 | 421 | struct kvm_memory_slot *slot; |
05da4558 | 422 | int *write_count; |
d25797b2 | 423 | int i; |
05da4558 | 424 | |
2843099f | 425 | gfn = unalias_gfn(kvm, gfn); |
d25797b2 JR |
426 | |
427 | slot = gfn_to_memslot_unaliased(kvm, gfn); | |
428 | for (i = PT_DIRECTORY_LEVEL; | |
429 | i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) { | |
430 | write_count = slot_largepage_idx(gfn, slot, i); | |
431 | *write_count += 1; | |
432 | } | |
05da4558 MT |
433 | } |
434 | ||
435 | static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn) | |
436 | { | |
d25797b2 | 437 | struct kvm_memory_slot *slot; |
05da4558 | 438 | int *write_count; |
d25797b2 | 439 | int i; |
05da4558 | 440 | |
2843099f | 441 | gfn = unalias_gfn(kvm, gfn); |
d25797b2 JR |
442 | for (i = PT_DIRECTORY_LEVEL; |
443 | i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) { | |
444 | slot = gfn_to_memslot_unaliased(kvm, gfn); | |
445 | write_count = slot_largepage_idx(gfn, slot, i); | |
446 | *write_count -= 1; | |
447 | WARN_ON(*write_count < 0); | |
448 | } | |
05da4558 MT |
449 | } |
450 | ||
d25797b2 JR |
451 | static int has_wrprotected_page(struct kvm *kvm, |
452 | gfn_t gfn, | |
453 | int level) | |
05da4558 | 454 | { |
2843099f | 455 | struct kvm_memory_slot *slot; |
05da4558 MT |
456 | int *largepage_idx; |
457 | ||
2843099f IE |
458 | gfn = unalias_gfn(kvm, gfn); |
459 | slot = gfn_to_memslot_unaliased(kvm, gfn); | |
05da4558 | 460 | if (slot) { |
d25797b2 | 461 | largepage_idx = slot_largepage_idx(gfn, slot, level); |
05da4558 MT |
462 | return *largepage_idx; |
463 | } | |
464 | ||
465 | return 1; | |
466 | } | |
467 | ||
d25797b2 | 468 | static int host_mapping_level(struct kvm *kvm, gfn_t gfn) |
05da4558 | 469 | { |
d25797b2 | 470 | unsigned long page_size = PAGE_SIZE; |
05da4558 MT |
471 | struct vm_area_struct *vma; |
472 | unsigned long addr; | |
d25797b2 | 473 | int i, ret = 0; |
05da4558 MT |
474 | |
475 | addr = gfn_to_hva(kvm, gfn); | |
476 | if (kvm_is_error_hva(addr)) | |
82b7005f | 477 | return PT_PAGE_TABLE_LEVEL; |
05da4558 | 478 | |
4c2155ce | 479 | down_read(¤t->mm->mmap_sem); |
05da4558 | 480 | vma = find_vma(current->mm, addr); |
d25797b2 JR |
481 | if (!vma) |
482 | goto out; | |
483 | ||
484 | page_size = vma_kernel_pagesize(vma); | |
485 | ||
486 | out: | |
4c2155ce | 487 | up_read(¤t->mm->mmap_sem); |
05da4558 | 488 | |
d25797b2 JR |
489 | for (i = PT_PAGE_TABLE_LEVEL; |
490 | i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) { | |
491 | if (page_size >= KVM_HPAGE_SIZE(i)) | |
492 | ret = i; | |
493 | else | |
494 | break; | |
495 | } | |
496 | ||
4c2155ce | 497 | return ret; |
05da4558 MT |
498 | } |
499 | ||
d25797b2 | 500 | static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn) |
05da4558 MT |
501 | { |
502 | struct kvm_memory_slot *slot; | |
878403b7 | 503 | int host_level, level, max_level; |
05da4558 MT |
504 | |
505 | slot = gfn_to_memslot(vcpu->kvm, large_gfn); | |
506 | if (slot && slot->dirty_bitmap) | |
d25797b2 | 507 | return PT_PAGE_TABLE_LEVEL; |
05da4558 | 508 | |
d25797b2 JR |
509 | host_level = host_mapping_level(vcpu->kvm, large_gfn); |
510 | ||
511 | if (host_level == PT_PAGE_TABLE_LEVEL) | |
512 | return host_level; | |
513 | ||
878403b7 SY |
514 | max_level = kvm_x86_ops->get_lpage_level() < host_level ? |
515 | kvm_x86_ops->get_lpage_level() : host_level; | |
516 | ||
517 | for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level) | |
d25797b2 JR |
518 | if (has_wrprotected_page(vcpu->kvm, large_gfn, level)) |
519 | break; | |
d25797b2 JR |
520 | |
521 | return level - 1; | |
05da4558 MT |
522 | } |
523 | ||
290fc38d IE |
524 | /* |
525 | * Take gfn and return the reverse mapping to it. | |
526 | * Note: gfn must be unaliased before this function get called | |
527 | */ | |
528 | ||
44ad9944 | 529 | static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level) |
290fc38d IE |
530 | { |
531 | struct kvm_memory_slot *slot; | |
05da4558 | 532 | unsigned long idx; |
290fc38d IE |
533 | |
534 | slot = gfn_to_memslot(kvm, gfn); | |
44ad9944 | 535 | if (likely(level == PT_PAGE_TABLE_LEVEL)) |
05da4558 MT |
536 | return &slot->rmap[gfn - slot->base_gfn]; |
537 | ||
44ad9944 JR |
538 | idx = (gfn / KVM_PAGES_PER_HPAGE(level)) - |
539 | (slot->base_gfn / KVM_PAGES_PER_HPAGE(level)); | |
05da4558 | 540 | |
44ad9944 | 541 | return &slot->lpage_info[level - 2][idx].rmap_pde; |
290fc38d IE |
542 | } |
543 | ||
cd4a4e53 AK |
544 | /* |
545 | * Reverse mapping data structures: | |
546 | * | |
290fc38d IE |
547 | * If rmapp bit zero is zero, then rmapp point to the shadw page table entry |
548 | * that points to page_address(page). | |
cd4a4e53 | 549 | * |
290fc38d IE |
550 | * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc |
551 | * containing more mappings. | |
53a27b39 MT |
552 | * |
553 | * Returns the number of rmap entries before the spte was added or zero if | |
554 | * the spte was not added. | |
555 | * | |
cd4a4e53 | 556 | */ |
44ad9944 | 557 | static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn) |
cd4a4e53 | 558 | { |
4db35314 | 559 | struct kvm_mmu_page *sp; |
cd4a4e53 | 560 | struct kvm_rmap_desc *desc; |
290fc38d | 561 | unsigned long *rmapp; |
53a27b39 | 562 | int i, count = 0; |
cd4a4e53 | 563 | |
43a3795a | 564 | if (!is_rmap_spte(*spte)) |
53a27b39 | 565 | return count; |
290fc38d | 566 | gfn = unalias_gfn(vcpu->kvm, gfn); |
4db35314 AK |
567 | sp = page_header(__pa(spte)); |
568 | sp->gfns[spte - sp->spt] = gfn; | |
44ad9944 | 569 | rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level); |
290fc38d | 570 | if (!*rmapp) { |
cd4a4e53 | 571 | rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte); |
290fc38d IE |
572 | *rmapp = (unsigned long)spte; |
573 | } else if (!(*rmapp & 1)) { | |
cd4a4e53 | 574 | rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte); |
714b93da | 575 | desc = mmu_alloc_rmap_desc(vcpu); |
d555c333 AK |
576 | desc->sptes[0] = (u64 *)*rmapp; |
577 | desc->sptes[1] = spte; | |
290fc38d | 578 | *rmapp = (unsigned long)desc | 1; |
cd4a4e53 AK |
579 | } else { |
580 | rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte); | |
290fc38d | 581 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
d555c333 | 582 | while (desc->sptes[RMAP_EXT-1] && desc->more) { |
cd4a4e53 | 583 | desc = desc->more; |
53a27b39 MT |
584 | count += RMAP_EXT; |
585 | } | |
d555c333 | 586 | if (desc->sptes[RMAP_EXT-1]) { |
714b93da | 587 | desc->more = mmu_alloc_rmap_desc(vcpu); |
cd4a4e53 AK |
588 | desc = desc->more; |
589 | } | |
d555c333 | 590 | for (i = 0; desc->sptes[i]; ++i) |
cd4a4e53 | 591 | ; |
d555c333 | 592 | desc->sptes[i] = spte; |
cd4a4e53 | 593 | } |
53a27b39 | 594 | return count; |
cd4a4e53 AK |
595 | } |
596 | ||
290fc38d | 597 | static void rmap_desc_remove_entry(unsigned long *rmapp, |
cd4a4e53 AK |
598 | struct kvm_rmap_desc *desc, |
599 | int i, | |
600 | struct kvm_rmap_desc *prev_desc) | |
601 | { | |
602 | int j; | |
603 | ||
d555c333 | 604 | for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j) |
cd4a4e53 | 605 | ; |
d555c333 AK |
606 | desc->sptes[i] = desc->sptes[j]; |
607 | desc->sptes[j] = NULL; | |
cd4a4e53 AK |
608 | if (j != 0) |
609 | return; | |
610 | if (!prev_desc && !desc->more) | |
d555c333 | 611 | *rmapp = (unsigned long)desc->sptes[0]; |
cd4a4e53 AK |
612 | else |
613 | if (prev_desc) | |
614 | prev_desc->more = desc->more; | |
615 | else | |
290fc38d | 616 | *rmapp = (unsigned long)desc->more | 1; |
90cb0529 | 617 | mmu_free_rmap_desc(desc); |
cd4a4e53 AK |
618 | } |
619 | ||
290fc38d | 620 | static void rmap_remove(struct kvm *kvm, u64 *spte) |
cd4a4e53 | 621 | { |
cd4a4e53 AK |
622 | struct kvm_rmap_desc *desc; |
623 | struct kvm_rmap_desc *prev_desc; | |
4db35314 | 624 | struct kvm_mmu_page *sp; |
35149e21 | 625 | pfn_t pfn; |
290fc38d | 626 | unsigned long *rmapp; |
cd4a4e53 AK |
627 | int i; |
628 | ||
43a3795a | 629 | if (!is_rmap_spte(*spte)) |
cd4a4e53 | 630 | return; |
4db35314 | 631 | sp = page_header(__pa(spte)); |
35149e21 | 632 | pfn = spte_to_pfn(*spte); |
7b52345e | 633 | if (*spte & shadow_accessed_mask) |
35149e21 | 634 | kvm_set_pfn_accessed(pfn); |
8dae4445 | 635 | if (is_writable_pte(*spte)) |
acb66dd0 | 636 | kvm_set_pfn_dirty(pfn); |
44ad9944 | 637 | rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level); |
290fc38d | 638 | if (!*rmapp) { |
cd4a4e53 AK |
639 | printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte); |
640 | BUG(); | |
290fc38d | 641 | } else if (!(*rmapp & 1)) { |
cd4a4e53 | 642 | rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte); |
290fc38d | 643 | if ((u64 *)*rmapp != spte) { |
cd4a4e53 AK |
644 | printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n", |
645 | spte, *spte); | |
646 | BUG(); | |
647 | } | |
290fc38d | 648 | *rmapp = 0; |
cd4a4e53 AK |
649 | } else { |
650 | rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte); | |
290fc38d | 651 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
cd4a4e53 AK |
652 | prev_desc = NULL; |
653 | while (desc) { | |
d555c333 AK |
654 | for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) |
655 | if (desc->sptes[i] == spte) { | |
290fc38d | 656 | rmap_desc_remove_entry(rmapp, |
714b93da | 657 | desc, i, |
cd4a4e53 AK |
658 | prev_desc); |
659 | return; | |
660 | } | |
661 | prev_desc = desc; | |
662 | desc = desc->more; | |
663 | } | |
186a3e52 | 664 | pr_err("rmap_remove: %p %llx many->many\n", spte, *spte); |
cd4a4e53 AK |
665 | BUG(); |
666 | } | |
667 | } | |
668 | ||
98348e95 | 669 | static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte) |
374cbac0 | 670 | { |
374cbac0 | 671 | struct kvm_rmap_desc *desc; |
98348e95 IE |
672 | struct kvm_rmap_desc *prev_desc; |
673 | u64 *prev_spte; | |
674 | int i; | |
675 | ||
676 | if (!*rmapp) | |
677 | return NULL; | |
678 | else if (!(*rmapp & 1)) { | |
679 | if (!spte) | |
680 | return (u64 *)*rmapp; | |
681 | return NULL; | |
682 | } | |
683 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); | |
684 | prev_desc = NULL; | |
685 | prev_spte = NULL; | |
686 | while (desc) { | |
d555c333 | 687 | for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) { |
98348e95 | 688 | if (prev_spte == spte) |
d555c333 AK |
689 | return desc->sptes[i]; |
690 | prev_spte = desc->sptes[i]; | |
98348e95 IE |
691 | } |
692 | desc = desc->more; | |
693 | } | |
694 | return NULL; | |
695 | } | |
696 | ||
b1a36821 | 697 | static int rmap_write_protect(struct kvm *kvm, u64 gfn) |
98348e95 | 698 | { |
290fc38d | 699 | unsigned long *rmapp; |
374cbac0 | 700 | u64 *spte; |
44ad9944 | 701 | int i, write_protected = 0; |
374cbac0 | 702 | |
4a4c9924 | 703 | gfn = unalias_gfn(kvm, gfn); |
44ad9944 | 704 | rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL); |
374cbac0 | 705 | |
98348e95 IE |
706 | spte = rmap_next(kvm, rmapp, NULL); |
707 | while (spte) { | |
374cbac0 | 708 | BUG_ON(!spte); |
374cbac0 | 709 | BUG_ON(!(*spte & PT_PRESENT_MASK)); |
374cbac0 | 710 | rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte); |
8dae4445 | 711 | if (is_writable_pte(*spte)) { |
d555c333 | 712 | __set_spte(spte, *spte & ~PT_WRITABLE_MASK); |
caa5b8a5 ED |
713 | write_protected = 1; |
714 | } | |
9647c14c | 715 | spte = rmap_next(kvm, rmapp, spte); |
374cbac0 | 716 | } |
855149aa | 717 | if (write_protected) { |
35149e21 | 718 | pfn_t pfn; |
855149aa IE |
719 | |
720 | spte = rmap_next(kvm, rmapp, NULL); | |
35149e21 AL |
721 | pfn = spte_to_pfn(*spte); |
722 | kvm_set_pfn_dirty(pfn); | |
855149aa IE |
723 | } |
724 | ||
05da4558 | 725 | /* check for huge page mappings */ |
44ad9944 JR |
726 | for (i = PT_DIRECTORY_LEVEL; |
727 | i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) { | |
728 | rmapp = gfn_to_rmap(kvm, gfn, i); | |
729 | spte = rmap_next(kvm, rmapp, NULL); | |
730 | while (spte) { | |
731 | BUG_ON(!spte); | |
732 | BUG_ON(!(*spte & PT_PRESENT_MASK)); | |
733 | BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)); | |
734 | pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn); | |
8dae4445 | 735 | if (is_writable_pte(*spte)) { |
44ad9944 JR |
736 | rmap_remove(kvm, spte); |
737 | --kvm->stat.lpages; | |
738 | __set_spte(spte, shadow_trap_nonpresent_pte); | |
739 | spte = NULL; | |
740 | write_protected = 1; | |
741 | } | |
742 | spte = rmap_next(kvm, rmapp, spte); | |
05da4558 | 743 | } |
05da4558 MT |
744 | } |
745 | ||
b1a36821 | 746 | return write_protected; |
374cbac0 AK |
747 | } |
748 | ||
8a8365c5 FD |
749 | static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp, |
750 | unsigned long data) | |
e930bffe AA |
751 | { |
752 | u64 *spte; | |
753 | int need_tlb_flush = 0; | |
754 | ||
755 | while ((spte = rmap_next(kvm, rmapp, NULL))) { | |
756 | BUG_ON(!(*spte & PT_PRESENT_MASK)); | |
757 | rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte); | |
758 | rmap_remove(kvm, spte); | |
d555c333 | 759 | __set_spte(spte, shadow_trap_nonpresent_pte); |
e930bffe AA |
760 | need_tlb_flush = 1; |
761 | } | |
762 | return need_tlb_flush; | |
763 | } | |
764 | ||
8a8365c5 FD |
765 | static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp, |
766 | unsigned long data) | |
3da0dd43 IE |
767 | { |
768 | int need_flush = 0; | |
769 | u64 *spte, new_spte; | |
770 | pte_t *ptep = (pte_t *)data; | |
771 | pfn_t new_pfn; | |
772 | ||
773 | WARN_ON(pte_huge(*ptep)); | |
774 | new_pfn = pte_pfn(*ptep); | |
775 | spte = rmap_next(kvm, rmapp, NULL); | |
776 | while (spte) { | |
777 | BUG_ON(!is_shadow_present_pte(*spte)); | |
778 | rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte); | |
779 | need_flush = 1; | |
780 | if (pte_write(*ptep)) { | |
781 | rmap_remove(kvm, spte); | |
782 | __set_spte(spte, shadow_trap_nonpresent_pte); | |
783 | spte = rmap_next(kvm, rmapp, NULL); | |
784 | } else { | |
785 | new_spte = *spte &~ (PT64_BASE_ADDR_MASK); | |
786 | new_spte |= (u64)new_pfn << PAGE_SHIFT; | |
787 | ||
788 | new_spte &= ~PT_WRITABLE_MASK; | |
789 | new_spte &= ~SPTE_HOST_WRITEABLE; | |
8dae4445 | 790 | if (is_writable_pte(*spte)) |
3da0dd43 IE |
791 | kvm_set_pfn_dirty(spte_to_pfn(*spte)); |
792 | __set_spte(spte, new_spte); | |
793 | spte = rmap_next(kvm, rmapp, spte); | |
794 | } | |
795 | } | |
796 | if (need_flush) | |
797 | kvm_flush_remote_tlbs(kvm); | |
798 | ||
799 | return 0; | |
800 | } | |
801 | ||
8a8365c5 FD |
802 | static int kvm_handle_hva(struct kvm *kvm, unsigned long hva, |
803 | unsigned long data, | |
3da0dd43 | 804 | int (*handler)(struct kvm *kvm, unsigned long *rmapp, |
8a8365c5 | 805 | unsigned long data)) |
e930bffe | 806 | { |
852e3c19 | 807 | int i, j; |
e930bffe | 808 | int retval = 0; |
bc6678a3 MT |
809 | struct kvm_memslots *slots; |
810 | ||
811 | slots = rcu_dereference(kvm->memslots); | |
e930bffe | 812 | |
46a26bf5 MT |
813 | for (i = 0; i < slots->nmemslots; i++) { |
814 | struct kvm_memory_slot *memslot = &slots->memslots[i]; | |
e930bffe AA |
815 | unsigned long start = memslot->userspace_addr; |
816 | unsigned long end; | |
817 | ||
e930bffe AA |
818 | end = start + (memslot->npages << PAGE_SHIFT); |
819 | if (hva >= start && hva < end) { | |
820 | gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT; | |
852e3c19 | 821 | |
3da0dd43 IE |
822 | retval |= handler(kvm, &memslot->rmap[gfn_offset], |
823 | data); | |
852e3c19 JR |
824 | |
825 | for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) { | |
826 | int idx = gfn_offset; | |
827 | idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j); | |
828 | retval |= handler(kvm, | |
3da0dd43 IE |
829 | &memslot->lpage_info[j][idx].rmap_pde, |
830 | data); | |
852e3c19 | 831 | } |
e930bffe AA |
832 | } |
833 | } | |
834 | ||
835 | return retval; | |
836 | } | |
837 | ||
838 | int kvm_unmap_hva(struct kvm *kvm, unsigned long hva) | |
839 | { | |
3da0dd43 IE |
840 | return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp); |
841 | } | |
842 | ||
843 | void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte) | |
844 | { | |
8a8365c5 | 845 | kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp); |
e930bffe AA |
846 | } |
847 | ||
8a8365c5 FD |
848 | static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp, |
849 | unsigned long data) | |
e930bffe AA |
850 | { |
851 | u64 *spte; | |
852 | int young = 0; | |
853 | ||
534e38b4 SY |
854 | /* always return old for EPT */ |
855 | if (!shadow_accessed_mask) | |
856 | return 0; | |
857 | ||
e930bffe AA |
858 | spte = rmap_next(kvm, rmapp, NULL); |
859 | while (spte) { | |
860 | int _young; | |
861 | u64 _spte = *spte; | |
862 | BUG_ON(!(_spte & PT_PRESENT_MASK)); | |
863 | _young = _spte & PT_ACCESSED_MASK; | |
864 | if (_young) { | |
865 | young = 1; | |
866 | clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte); | |
867 | } | |
868 | spte = rmap_next(kvm, rmapp, spte); | |
869 | } | |
870 | return young; | |
871 | } | |
872 | ||
53a27b39 MT |
873 | #define RMAP_RECYCLE_THRESHOLD 1000 |
874 | ||
852e3c19 | 875 | static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn) |
53a27b39 MT |
876 | { |
877 | unsigned long *rmapp; | |
852e3c19 JR |
878 | struct kvm_mmu_page *sp; |
879 | ||
880 | sp = page_header(__pa(spte)); | |
53a27b39 MT |
881 | |
882 | gfn = unalias_gfn(vcpu->kvm, gfn); | |
852e3c19 | 883 | rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level); |
53a27b39 | 884 | |
3da0dd43 | 885 | kvm_unmap_rmapp(vcpu->kvm, rmapp, 0); |
53a27b39 MT |
886 | kvm_flush_remote_tlbs(vcpu->kvm); |
887 | } | |
888 | ||
e930bffe AA |
889 | int kvm_age_hva(struct kvm *kvm, unsigned long hva) |
890 | { | |
3da0dd43 | 891 | return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp); |
e930bffe AA |
892 | } |
893 | ||
d6c69ee9 | 894 | #ifdef MMU_DEBUG |
47ad8e68 | 895 | static int is_empty_shadow_page(u64 *spt) |
6aa8b732 | 896 | { |
139bdb2d AK |
897 | u64 *pos; |
898 | u64 *end; | |
899 | ||
47ad8e68 | 900 | for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++) |
3c915510 | 901 | if (is_shadow_present_pte(*pos)) { |
b8688d51 | 902 | printk(KERN_ERR "%s: %p %llx\n", __func__, |
139bdb2d | 903 | pos, *pos); |
6aa8b732 | 904 | return 0; |
139bdb2d | 905 | } |
6aa8b732 AK |
906 | return 1; |
907 | } | |
d6c69ee9 | 908 | #endif |
6aa8b732 | 909 | |
4db35314 | 910 | static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp) |
260746c0 | 911 | { |
4db35314 AK |
912 | ASSERT(is_empty_shadow_page(sp->spt)); |
913 | list_del(&sp->link); | |
914 | __free_page(virt_to_page(sp->spt)); | |
915 | __free_page(virt_to_page(sp->gfns)); | |
916 | kfree(sp); | |
f05e70ac | 917 | ++kvm->arch.n_free_mmu_pages; |
260746c0 AK |
918 | } |
919 | ||
cea0f0e7 AK |
920 | static unsigned kvm_page_table_hashfn(gfn_t gfn) |
921 | { | |
1ae0a13d | 922 | return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1); |
cea0f0e7 AK |
923 | } |
924 | ||
25c0de2c AK |
925 | static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu, |
926 | u64 *parent_pte) | |
6aa8b732 | 927 | { |
4db35314 | 928 | struct kvm_mmu_page *sp; |
6aa8b732 | 929 | |
ad312c7c ZX |
930 | sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp); |
931 | sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE); | |
932 | sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE); | |
4db35314 | 933 | set_page_private(virt_to_page(sp->spt), (unsigned long)sp); |
f05e70ac | 934 | list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages); |
6cffe8ca | 935 | INIT_LIST_HEAD(&sp->oos_link); |
291f26bc | 936 | bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS); |
4db35314 AK |
937 | sp->multimapped = 0; |
938 | sp->parent_pte = parent_pte; | |
f05e70ac | 939 | --vcpu->kvm->arch.n_free_mmu_pages; |
4db35314 | 940 | return sp; |
6aa8b732 AK |
941 | } |
942 | ||
714b93da | 943 | static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu, |
4db35314 | 944 | struct kvm_mmu_page *sp, u64 *parent_pte) |
cea0f0e7 AK |
945 | { |
946 | struct kvm_pte_chain *pte_chain; | |
947 | struct hlist_node *node; | |
948 | int i; | |
949 | ||
950 | if (!parent_pte) | |
951 | return; | |
4db35314 AK |
952 | if (!sp->multimapped) { |
953 | u64 *old = sp->parent_pte; | |
cea0f0e7 AK |
954 | |
955 | if (!old) { | |
4db35314 | 956 | sp->parent_pte = parent_pte; |
cea0f0e7 AK |
957 | return; |
958 | } | |
4db35314 | 959 | sp->multimapped = 1; |
714b93da | 960 | pte_chain = mmu_alloc_pte_chain(vcpu); |
4db35314 AK |
961 | INIT_HLIST_HEAD(&sp->parent_ptes); |
962 | hlist_add_head(&pte_chain->link, &sp->parent_ptes); | |
cea0f0e7 AK |
963 | pte_chain->parent_ptes[0] = old; |
964 | } | |
4db35314 | 965 | hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) { |
cea0f0e7 AK |
966 | if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1]) |
967 | continue; | |
968 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) | |
969 | if (!pte_chain->parent_ptes[i]) { | |
970 | pte_chain->parent_ptes[i] = parent_pte; | |
971 | return; | |
972 | } | |
973 | } | |
714b93da | 974 | pte_chain = mmu_alloc_pte_chain(vcpu); |
cea0f0e7 | 975 | BUG_ON(!pte_chain); |
4db35314 | 976 | hlist_add_head(&pte_chain->link, &sp->parent_ptes); |
cea0f0e7 AK |
977 | pte_chain->parent_ptes[0] = parent_pte; |
978 | } | |
979 | ||
4db35314 | 980 | static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp, |
cea0f0e7 AK |
981 | u64 *parent_pte) |
982 | { | |
983 | struct kvm_pte_chain *pte_chain; | |
984 | struct hlist_node *node; | |
985 | int i; | |
986 | ||
4db35314 AK |
987 | if (!sp->multimapped) { |
988 | BUG_ON(sp->parent_pte != parent_pte); | |
989 | sp->parent_pte = NULL; | |
cea0f0e7 AK |
990 | return; |
991 | } | |
4db35314 | 992 | hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) |
cea0f0e7 AK |
993 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) { |
994 | if (!pte_chain->parent_ptes[i]) | |
995 | break; | |
996 | if (pte_chain->parent_ptes[i] != parent_pte) | |
997 | continue; | |
697fe2e2 AK |
998 | while (i + 1 < NR_PTE_CHAIN_ENTRIES |
999 | && pte_chain->parent_ptes[i + 1]) { | |
cea0f0e7 AK |
1000 | pte_chain->parent_ptes[i] |
1001 | = pte_chain->parent_ptes[i + 1]; | |
1002 | ++i; | |
1003 | } | |
1004 | pte_chain->parent_ptes[i] = NULL; | |
697fe2e2 AK |
1005 | if (i == 0) { |
1006 | hlist_del(&pte_chain->link); | |
90cb0529 | 1007 | mmu_free_pte_chain(pte_chain); |
4db35314 AK |
1008 | if (hlist_empty(&sp->parent_ptes)) { |
1009 | sp->multimapped = 0; | |
1010 | sp->parent_pte = NULL; | |
697fe2e2 AK |
1011 | } |
1012 | } | |
cea0f0e7 AK |
1013 | return; |
1014 | } | |
1015 | BUG(); | |
1016 | } | |
1017 | ||
ad8cfbe3 MT |
1018 | |
1019 | static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, | |
1020 | mmu_parent_walk_fn fn) | |
1021 | { | |
1022 | struct kvm_pte_chain *pte_chain; | |
1023 | struct hlist_node *node; | |
1024 | struct kvm_mmu_page *parent_sp; | |
1025 | int i; | |
1026 | ||
1027 | if (!sp->multimapped && sp->parent_pte) { | |
1028 | parent_sp = page_header(__pa(sp->parent_pte)); | |
1029 | fn(vcpu, parent_sp); | |
1030 | mmu_parent_walk(vcpu, parent_sp, fn); | |
1031 | return; | |
1032 | } | |
1033 | hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) | |
1034 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) { | |
1035 | if (!pte_chain->parent_ptes[i]) | |
1036 | break; | |
1037 | parent_sp = page_header(__pa(pte_chain->parent_ptes[i])); | |
1038 | fn(vcpu, parent_sp); | |
1039 | mmu_parent_walk(vcpu, parent_sp, fn); | |
1040 | } | |
1041 | } | |
1042 | ||
0074ff63 MT |
1043 | static void kvm_mmu_update_unsync_bitmap(u64 *spte) |
1044 | { | |
1045 | unsigned int index; | |
1046 | struct kvm_mmu_page *sp = page_header(__pa(spte)); | |
1047 | ||
1048 | index = spte - sp->spt; | |
60c8aec6 MT |
1049 | if (!__test_and_set_bit(index, sp->unsync_child_bitmap)) |
1050 | sp->unsync_children++; | |
1051 | WARN_ON(!sp->unsync_children); | |
0074ff63 MT |
1052 | } |
1053 | ||
1054 | static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp) | |
1055 | { | |
1056 | struct kvm_pte_chain *pte_chain; | |
1057 | struct hlist_node *node; | |
1058 | int i; | |
1059 | ||
1060 | if (!sp->parent_pte) | |
1061 | return; | |
1062 | ||
1063 | if (!sp->multimapped) { | |
1064 | kvm_mmu_update_unsync_bitmap(sp->parent_pte); | |
1065 | return; | |
1066 | } | |
1067 | ||
1068 | hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) | |
1069 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) { | |
1070 | if (!pte_chain->parent_ptes[i]) | |
1071 | break; | |
1072 | kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]); | |
1073 | } | |
1074 | } | |
1075 | ||
1076 | static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp) | |
1077 | { | |
0074ff63 MT |
1078 | kvm_mmu_update_parents_unsync(sp); |
1079 | return 1; | |
1080 | } | |
1081 | ||
1082 | static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu, | |
1083 | struct kvm_mmu_page *sp) | |
1084 | { | |
1085 | mmu_parent_walk(vcpu, sp, unsync_walk_fn); | |
1086 | kvm_mmu_update_parents_unsync(sp); | |
1087 | } | |
1088 | ||
d761a501 AK |
1089 | static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu, |
1090 | struct kvm_mmu_page *sp) | |
1091 | { | |
1092 | int i; | |
1093 | ||
1094 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) | |
1095 | sp->spt[i] = shadow_trap_nonpresent_pte; | |
1096 | } | |
1097 | ||
e8bc217a MT |
1098 | static int nonpaging_sync_page(struct kvm_vcpu *vcpu, |
1099 | struct kvm_mmu_page *sp) | |
1100 | { | |
1101 | return 1; | |
1102 | } | |
1103 | ||
a7052897 MT |
1104 | static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva) |
1105 | { | |
1106 | } | |
1107 | ||
60c8aec6 MT |
1108 | #define KVM_PAGE_ARRAY_NR 16 |
1109 | ||
1110 | struct kvm_mmu_pages { | |
1111 | struct mmu_page_and_offset { | |
1112 | struct kvm_mmu_page *sp; | |
1113 | unsigned int idx; | |
1114 | } page[KVM_PAGE_ARRAY_NR]; | |
1115 | unsigned int nr; | |
1116 | }; | |
1117 | ||
0074ff63 MT |
1118 | #define for_each_unsync_children(bitmap, idx) \ |
1119 | for (idx = find_first_bit(bitmap, 512); \ | |
1120 | idx < 512; \ | |
1121 | idx = find_next_bit(bitmap, 512, idx+1)) | |
1122 | ||
cded19f3 HE |
1123 | static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp, |
1124 | int idx) | |
4731d4c7 | 1125 | { |
60c8aec6 | 1126 | int i; |
4731d4c7 | 1127 | |
60c8aec6 MT |
1128 | if (sp->unsync) |
1129 | for (i=0; i < pvec->nr; i++) | |
1130 | if (pvec->page[i].sp == sp) | |
1131 | return 0; | |
1132 | ||
1133 | pvec->page[pvec->nr].sp = sp; | |
1134 | pvec->page[pvec->nr].idx = idx; | |
1135 | pvec->nr++; | |
1136 | return (pvec->nr == KVM_PAGE_ARRAY_NR); | |
1137 | } | |
1138 | ||
1139 | static int __mmu_unsync_walk(struct kvm_mmu_page *sp, | |
1140 | struct kvm_mmu_pages *pvec) | |
1141 | { | |
1142 | int i, ret, nr_unsync_leaf = 0; | |
4731d4c7 | 1143 | |
0074ff63 | 1144 | for_each_unsync_children(sp->unsync_child_bitmap, i) { |
4731d4c7 MT |
1145 | u64 ent = sp->spt[i]; |
1146 | ||
87917239 | 1147 | if (is_shadow_present_pte(ent) && !is_large_pte(ent)) { |
4731d4c7 MT |
1148 | struct kvm_mmu_page *child; |
1149 | child = page_header(ent & PT64_BASE_ADDR_MASK); | |
1150 | ||
1151 | if (child->unsync_children) { | |
60c8aec6 MT |
1152 | if (mmu_pages_add(pvec, child, i)) |
1153 | return -ENOSPC; | |
1154 | ||
1155 | ret = __mmu_unsync_walk(child, pvec); | |
1156 | if (!ret) | |
1157 | __clear_bit(i, sp->unsync_child_bitmap); | |
1158 | else if (ret > 0) | |
1159 | nr_unsync_leaf += ret; | |
1160 | else | |
4731d4c7 MT |
1161 | return ret; |
1162 | } | |
1163 | ||
1164 | if (child->unsync) { | |
60c8aec6 MT |
1165 | nr_unsync_leaf++; |
1166 | if (mmu_pages_add(pvec, child, i)) | |
1167 | return -ENOSPC; | |
4731d4c7 MT |
1168 | } |
1169 | } | |
1170 | } | |
1171 | ||
0074ff63 | 1172 | if (find_first_bit(sp->unsync_child_bitmap, 512) == 512) |
4731d4c7 MT |
1173 | sp->unsync_children = 0; |
1174 | ||
60c8aec6 MT |
1175 | return nr_unsync_leaf; |
1176 | } | |
1177 | ||
1178 | static int mmu_unsync_walk(struct kvm_mmu_page *sp, | |
1179 | struct kvm_mmu_pages *pvec) | |
1180 | { | |
1181 | if (!sp->unsync_children) | |
1182 | return 0; | |
1183 | ||
1184 | mmu_pages_add(pvec, sp, 0); | |
1185 | return __mmu_unsync_walk(sp, pvec); | |
4731d4c7 MT |
1186 | } |
1187 | ||
4db35314 | 1188 | static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn) |
cea0f0e7 AK |
1189 | { |
1190 | unsigned index; | |
1191 | struct hlist_head *bucket; | |
4db35314 | 1192 | struct kvm_mmu_page *sp; |
cea0f0e7 AK |
1193 | struct hlist_node *node; |
1194 | ||
b8688d51 | 1195 | pgprintk("%s: looking for gfn %lx\n", __func__, gfn); |
1ae0a13d | 1196 | index = kvm_page_table_hashfn(gfn); |
f05e70ac | 1197 | bucket = &kvm->arch.mmu_page_hash[index]; |
4db35314 | 1198 | hlist_for_each_entry(sp, node, bucket, hash_link) |
f6e2c02b | 1199 | if (sp->gfn == gfn && !sp->role.direct |
2e53d63a | 1200 | && !sp->role.invalid) { |
cea0f0e7 | 1201 | pgprintk("%s: found role %x\n", |
b8688d51 | 1202 | __func__, sp->role.word); |
4db35314 | 1203 | return sp; |
cea0f0e7 AK |
1204 | } |
1205 | return NULL; | |
1206 | } | |
1207 | ||
4731d4c7 MT |
1208 | static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp) |
1209 | { | |
1210 | WARN_ON(!sp->unsync); | |
1211 | sp->unsync = 0; | |
1212 | --kvm->stat.mmu_unsync; | |
1213 | } | |
1214 | ||
1215 | static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp); | |
1216 | ||
1217 | static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp) | |
1218 | { | |
1219 | if (sp->role.glevels != vcpu->arch.mmu.root_level) { | |
1220 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
1221 | return 1; | |
1222 | } | |
1223 | ||
f691fe1d | 1224 | trace_kvm_mmu_sync_page(sp); |
b1a36821 MT |
1225 | if (rmap_write_protect(vcpu->kvm, sp->gfn)) |
1226 | kvm_flush_remote_tlbs(vcpu->kvm); | |
0c0f40bd | 1227 | kvm_unlink_unsync_page(vcpu->kvm, sp); |
4731d4c7 MT |
1228 | if (vcpu->arch.mmu.sync_page(vcpu, sp)) { |
1229 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
1230 | return 1; | |
1231 | } | |
1232 | ||
1233 | kvm_mmu_flush_tlb(vcpu); | |
4731d4c7 MT |
1234 | return 0; |
1235 | } | |
1236 | ||
60c8aec6 MT |
1237 | struct mmu_page_path { |
1238 | struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1]; | |
1239 | unsigned int idx[PT64_ROOT_LEVEL-1]; | |
4731d4c7 MT |
1240 | }; |
1241 | ||
60c8aec6 MT |
1242 | #define for_each_sp(pvec, sp, parents, i) \ |
1243 | for (i = mmu_pages_next(&pvec, &parents, -1), \ | |
1244 | sp = pvec.page[i].sp; \ | |
1245 | i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \ | |
1246 | i = mmu_pages_next(&pvec, &parents, i)) | |
1247 | ||
cded19f3 HE |
1248 | static int mmu_pages_next(struct kvm_mmu_pages *pvec, |
1249 | struct mmu_page_path *parents, | |
1250 | int i) | |
60c8aec6 MT |
1251 | { |
1252 | int n; | |
1253 | ||
1254 | for (n = i+1; n < pvec->nr; n++) { | |
1255 | struct kvm_mmu_page *sp = pvec->page[n].sp; | |
1256 | ||
1257 | if (sp->role.level == PT_PAGE_TABLE_LEVEL) { | |
1258 | parents->idx[0] = pvec->page[n].idx; | |
1259 | return n; | |
1260 | } | |
1261 | ||
1262 | parents->parent[sp->role.level-2] = sp; | |
1263 | parents->idx[sp->role.level-1] = pvec->page[n].idx; | |
1264 | } | |
1265 | ||
1266 | return n; | |
1267 | } | |
1268 | ||
cded19f3 | 1269 | static void mmu_pages_clear_parents(struct mmu_page_path *parents) |
4731d4c7 | 1270 | { |
60c8aec6 MT |
1271 | struct kvm_mmu_page *sp; |
1272 | unsigned int level = 0; | |
1273 | ||
1274 | do { | |
1275 | unsigned int idx = parents->idx[level]; | |
4731d4c7 | 1276 | |
60c8aec6 MT |
1277 | sp = parents->parent[level]; |
1278 | if (!sp) | |
1279 | return; | |
1280 | ||
1281 | --sp->unsync_children; | |
1282 | WARN_ON((int)sp->unsync_children < 0); | |
1283 | __clear_bit(idx, sp->unsync_child_bitmap); | |
1284 | level++; | |
1285 | } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children); | |
4731d4c7 MT |
1286 | } |
1287 | ||
60c8aec6 MT |
1288 | static void kvm_mmu_pages_init(struct kvm_mmu_page *parent, |
1289 | struct mmu_page_path *parents, | |
1290 | struct kvm_mmu_pages *pvec) | |
4731d4c7 | 1291 | { |
60c8aec6 MT |
1292 | parents->parent[parent->role.level-1] = NULL; |
1293 | pvec->nr = 0; | |
1294 | } | |
4731d4c7 | 1295 | |
60c8aec6 MT |
1296 | static void mmu_sync_children(struct kvm_vcpu *vcpu, |
1297 | struct kvm_mmu_page *parent) | |
1298 | { | |
1299 | int i; | |
1300 | struct kvm_mmu_page *sp; | |
1301 | struct mmu_page_path parents; | |
1302 | struct kvm_mmu_pages pages; | |
1303 | ||
1304 | kvm_mmu_pages_init(parent, &parents, &pages); | |
1305 | while (mmu_unsync_walk(parent, &pages)) { | |
b1a36821 MT |
1306 | int protected = 0; |
1307 | ||
1308 | for_each_sp(pages, sp, parents, i) | |
1309 | protected |= rmap_write_protect(vcpu->kvm, sp->gfn); | |
1310 | ||
1311 | if (protected) | |
1312 | kvm_flush_remote_tlbs(vcpu->kvm); | |
1313 | ||
60c8aec6 MT |
1314 | for_each_sp(pages, sp, parents, i) { |
1315 | kvm_sync_page(vcpu, sp); | |
1316 | mmu_pages_clear_parents(&parents); | |
1317 | } | |
4731d4c7 | 1318 | cond_resched_lock(&vcpu->kvm->mmu_lock); |
60c8aec6 MT |
1319 | kvm_mmu_pages_init(parent, &parents, &pages); |
1320 | } | |
4731d4c7 MT |
1321 | } |
1322 | ||
cea0f0e7 AK |
1323 | static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu, |
1324 | gfn_t gfn, | |
1325 | gva_t gaddr, | |
1326 | unsigned level, | |
f6e2c02b | 1327 | int direct, |
41074d07 | 1328 | unsigned access, |
f7d9c7b7 | 1329 | u64 *parent_pte) |
cea0f0e7 AK |
1330 | { |
1331 | union kvm_mmu_page_role role; | |
1332 | unsigned index; | |
1333 | unsigned quadrant; | |
1334 | struct hlist_head *bucket; | |
4db35314 | 1335 | struct kvm_mmu_page *sp; |
4731d4c7 | 1336 | struct hlist_node *node, *tmp; |
cea0f0e7 | 1337 | |
a770f6f2 | 1338 | role = vcpu->arch.mmu.base_role; |
cea0f0e7 | 1339 | role.level = level; |
f6e2c02b | 1340 | role.direct = direct; |
41074d07 | 1341 | role.access = access; |
ad312c7c | 1342 | if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) { |
cea0f0e7 AK |
1343 | quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level)); |
1344 | quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1; | |
1345 | role.quadrant = quadrant; | |
1346 | } | |
1ae0a13d | 1347 | index = kvm_page_table_hashfn(gfn); |
f05e70ac | 1348 | bucket = &vcpu->kvm->arch.mmu_page_hash[index]; |
4731d4c7 MT |
1349 | hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link) |
1350 | if (sp->gfn == gfn) { | |
1351 | if (sp->unsync) | |
1352 | if (kvm_sync_page(vcpu, sp)) | |
1353 | continue; | |
1354 | ||
1355 | if (sp->role.word != role.word) | |
1356 | continue; | |
1357 | ||
4db35314 | 1358 | mmu_page_add_parent_pte(vcpu, sp, parent_pte); |
0074ff63 MT |
1359 | if (sp->unsync_children) { |
1360 | set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests); | |
1361 | kvm_mmu_mark_parents_unsync(vcpu, sp); | |
1362 | } | |
f691fe1d | 1363 | trace_kvm_mmu_get_page(sp, false); |
4db35314 | 1364 | return sp; |
cea0f0e7 | 1365 | } |
dfc5aa00 | 1366 | ++vcpu->kvm->stat.mmu_cache_miss; |
4db35314 AK |
1367 | sp = kvm_mmu_alloc_page(vcpu, parent_pte); |
1368 | if (!sp) | |
1369 | return sp; | |
4db35314 AK |
1370 | sp->gfn = gfn; |
1371 | sp->role = role; | |
1372 | hlist_add_head(&sp->hash_link, bucket); | |
f6e2c02b | 1373 | if (!direct) { |
b1a36821 MT |
1374 | if (rmap_write_protect(vcpu->kvm, gfn)) |
1375 | kvm_flush_remote_tlbs(vcpu->kvm); | |
4731d4c7 MT |
1376 | account_shadowed(vcpu->kvm, gfn); |
1377 | } | |
131d8279 AK |
1378 | if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte) |
1379 | vcpu->arch.mmu.prefetch_page(vcpu, sp); | |
1380 | else | |
1381 | nonpaging_prefetch_page(vcpu, sp); | |
f691fe1d | 1382 | trace_kvm_mmu_get_page(sp, true); |
4db35314 | 1383 | return sp; |
cea0f0e7 AK |
1384 | } |
1385 | ||
2d11123a AK |
1386 | static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator, |
1387 | struct kvm_vcpu *vcpu, u64 addr) | |
1388 | { | |
1389 | iterator->addr = addr; | |
1390 | iterator->shadow_addr = vcpu->arch.mmu.root_hpa; | |
1391 | iterator->level = vcpu->arch.mmu.shadow_root_level; | |
1392 | if (iterator->level == PT32E_ROOT_LEVEL) { | |
1393 | iterator->shadow_addr | |
1394 | = vcpu->arch.mmu.pae_root[(addr >> 30) & 3]; | |
1395 | iterator->shadow_addr &= PT64_BASE_ADDR_MASK; | |
1396 | --iterator->level; | |
1397 | if (!iterator->shadow_addr) | |
1398 | iterator->level = 0; | |
1399 | } | |
1400 | } | |
1401 | ||
1402 | static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator) | |
1403 | { | |
1404 | if (iterator->level < PT_PAGE_TABLE_LEVEL) | |
1405 | return false; | |
4d88954d MT |
1406 | |
1407 | if (iterator->level == PT_PAGE_TABLE_LEVEL) | |
1408 | if (is_large_pte(*iterator->sptep)) | |
1409 | return false; | |
1410 | ||
2d11123a AK |
1411 | iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level); |
1412 | iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index; | |
1413 | return true; | |
1414 | } | |
1415 | ||
1416 | static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator) | |
1417 | { | |
1418 | iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK; | |
1419 | --iterator->level; | |
1420 | } | |
1421 | ||
90cb0529 | 1422 | static void kvm_mmu_page_unlink_children(struct kvm *kvm, |
4db35314 | 1423 | struct kvm_mmu_page *sp) |
a436036b | 1424 | { |
697fe2e2 AK |
1425 | unsigned i; |
1426 | u64 *pt; | |
1427 | u64 ent; | |
1428 | ||
4db35314 | 1429 | pt = sp->spt; |
697fe2e2 | 1430 | |
697fe2e2 AK |
1431 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { |
1432 | ent = pt[i]; | |
1433 | ||
05da4558 | 1434 | if (is_shadow_present_pte(ent)) { |
776e6633 | 1435 | if (!is_last_spte(ent, sp->role.level)) { |
05da4558 MT |
1436 | ent &= PT64_BASE_ADDR_MASK; |
1437 | mmu_page_remove_parent_pte(page_header(ent), | |
1438 | &pt[i]); | |
1439 | } else { | |
776e6633 MT |
1440 | if (is_large_pte(ent)) |
1441 | --kvm->stat.lpages; | |
05da4558 MT |
1442 | rmap_remove(kvm, &pt[i]); |
1443 | } | |
1444 | } | |
c7addb90 | 1445 | pt[i] = shadow_trap_nonpresent_pte; |
697fe2e2 | 1446 | } |
a436036b AK |
1447 | } |
1448 | ||
4db35314 | 1449 | static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte) |
cea0f0e7 | 1450 | { |
4db35314 | 1451 | mmu_page_remove_parent_pte(sp, parent_pte); |
a436036b AK |
1452 | } |
1453 | ||
12b7d28f AK |
1454 | static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm) |
1455 | { | |
1456 | int i; | |
988a2cae | 1457 | struct kvm_vcpu *vcpu; |
12b7d28f | 1458 | |
988a2cae GN |
1459 | kvm_for_each_vcpu(i, vcpu, kvm) |
1460 | vcpu->arch.last_pte_updated = NULL; | |
12b7d28f AK |
1461 | } |
1462 | ||
31aa2b44 | 1463 | static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp) |
a436036b AK |
1464 | { |
1465 | u64 *parent_pte; | |
1466 | ||
4db35314 AK |
1467 | while (sp->multimapped || sp->parent_pte) { |
1468 | if (!sp->multimapped) | |
1469 | parent_pte = sp->parent_pte; | |
a436036b AK |
1470 | else { |
1471 | struct kvm_pte_chain *chain; | |
1472 | ||
4db35314 | 1473 | chain = container_of(sp->parent_ptes.first, |
a436036b AK |
1474 | struct kvm_pte_chain, link); |
1475 | parent_pte = chain->parent_ptes[0]; | |
1476 | } | |
697fe2e2 | 1477 | BUG_ON(!parent_pte); |
4db35314 | 1478 | kvm_mmu_put_page(sp, parent_pte); |
d555c333 | 1479 | __set_spte(parent_pte, shadow_trap_nonpresent_pte); |
a436036b | 1480 | } |
31aa2b44 AK |
1481 | } |
1482 | ||
60c8aec6 MT |
1483 | static int mmu_zap_unsync_children(struct kvm *kvm, |
1484 | struct kvm_mmu_page *parent) | |
4731d4c7 | 1485 | { |
60c8aec6 MT |
1486 | int i, zapped = 0; |
1487 | struct mmu_page_path parents; | |
1488 | struct kvm_mmu_pages pages; | |
4731d4c7 | 1489 | |
60c8aec6 | 1490 | if (parent->role.level == PT_PAGE_TABLE_LEVEL) |
4731d4c7 | 1491 | return 0; |
60c8aec6 MT |
1492 | |
1493 | kvm_mmu_pages_init(parent, &parents, &pages); | |
1494 | while (mmu_unsync_walk(parent, &pages)) { | |
1495 | struct kvm_mmu_page *sp; | |
1496 | ||
1497 | for_each_sp(pages, sp, parents, i) { | |
1498 | kvm_mmu_zap_page(kvm, sp); | |
1499 | mmu_pages_clear_parents(&parents); | |
1500 | } | |
1501 | zapped += pages.nr; | |
1502 | kvm_mmu_pages_init(parent, &parents, &pages); | |
1503 | } | |
1504 | ||
1505 | return zapped; | |
4731d4c7 MT |
1506 | } |
1507 | ||
07385413 | 1508 | static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp) |
31aa2b44 | 1509 | { |
4731d4c7 | 1510 | int ret; |
f691fe1d AK |
1511 | |
1512 | trace_kvm_mmu_zap_page(sp); | |
31aa2b44 | 1513 | ++kvm->stat.mmu_shadow_zapped; |
4731d4c7 | 1514 | ret = mmu_zap_unsync_children(kvm, sp); |
4db35314 | 1515 | kvm_mmu_page_unlink_children(kvm, sp); |
31aa2b44 | 1516 | kvm_mmu_unlink_parents(kvm, sp); |
5b5c6a5a | 1517 | kvm_flush_remote_tlbs(kvm); |
f6e2c02b | 1518 | if (!sp->role.invalid && !sp->role.direct) |
5b5c6a5a | 1519 | unaccount_shadowed(kvm, sp->gfn); |
4731d4c7 MT |
1520 | if (sp->unsync) |
1521 | kvm_unlink_unsync_page(kvm, sp); | |
4db35314 AK |
1522 | if (!sp->root_count) { |
1523 | hlist_del(&sp->hash_link); | |
1524 | kvm_mmu_free_page(kvm, sp); | |
2e53d63a | 1525 | } else { |
2e53d63a | 1526 | sp->role.invalid = 1; |
5b5c6a5a | 1527 | list_move(&sp->link, &kvm->arch.active_mmu_pages); |
2e53d63a MT |
1528 | kvm_reload_remote_mmus(kvm); |
1529 | } | |
12b7d28f | 1530 | kvm_mmu_reset_last_pte_updated(kvm); |
4731d4c7 | 1531 | return ret; |
a436036b AK |
1532 | } |
1533 | ||
82ce2c96 IE |
1534 | /* |
1535 | * Changing the number of mmu pages allocated to the vm | |
1536 | * Note: if kvm_nr_mmu_pages is too small, you will get dead lock | |
1537 | */ | |
1538 | void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages) | |
1539 | { | |
025dbbf3 MT |
1540 | int used_pages; |
1541 | ||
1542 | used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages; | |
1543 | used_pages = max(0, used_pages); | |
1544 | ||
82ce2c96 IE |
1545 | /* |
1546 | * If we set the number of mmu pages to be smaller be than the | |
1547 | * number of actived pages , we must to free some mmu pages before we | |
1548 | * change the value | |
1549 | */ | |
1550 | ||
025dbbf3 MT |
1551 | if (used_pages > kvm_nr_mmu_pages) { |
1552 | while (used_pages > kvm_nr_mmu_pages) { | |
82ce2c96 IE |
1553 | struct kvm_mmu_page *page; |
1554 | ||
f05e70ac | 1555 | page = container_of(kvm->arch.active_mmu_pages.prev, |
82ce2c96 IE |
1556 | struct kvm_mmu_page, link); |
1557 | kvm_mmu_zap_page(kvm, page); | |
025dbbf3 | 1558 | used_pages--; |
82ce2c96 | 1559 | } |
f05e70ac | 1560 | kvm->arch.n_free_mmu_pages = 0; |
82ce2c96 IE |
1561 | } |
1562 | else | |
f05e70ac ZX |
1563 | kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages |
1564 | - kvm->arch.n_alloc_mmu_pages; | |
82ce2c96 | 1565 | |
f05e70ac | 1566 | kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages; |
82ce2c96 IE |
1567 | } |
1568 | ||
f67a46f4 | 1569 | static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn) |
a436036b AK |
1570 | { |
1571 | unsigned index; | |
1572 | struct hlist_head *bucket; | |
4db35314 | 1573 | struct kvm_mmu_page *sp; |
a436036b AK |
1574 | struct hlist_node *node, *n; |
1575 | int r; | |
1576 | ||
b8688d51 | 1577 | pgprintk("%s: looking for gfn %lx\n", __func__, gfn); |
a436036b | 1578 | r = 0; |
1ae0a13d | 1579 | index = kvm_page_table_hashfn(gfn); |
f05e70ac | 1580 | bucket = &kvm->arch.mmu_page_hash[index]; |
4db35314 | 1581 | hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) |
f6e2c02b | 1582 | if (sp->gfn == gfn && !sp->role.direct) { |
b8688d51 | 1583 | pgprintk("%s: gfn %lx role %x\n", __func__, gfn, |
4db35314 | 1584 | sp->role.word); |
a436036b | 1585 | r = 1; |
07385413 MT |
1586 | if (kvm_mmu_zap_page(kvm, sp)) |
1587 | n = bucket->first; | |
a436036b AK |
1588 | } |
1589 | return r; | |
cea0f0e7 AK |
1590 | } |
1591 | ||
f67a46f4 | 1592 | static void mmu_unshadow(struct kvm *kvm, gfn_t gfn) |
97a0a01e | 1593 | { |
4677a3b6 AK |
1594 | unsigned index; |
1595 | struct hlist_head *bucket; | |
4db35314 | 1596 | struct kvm_mmu_page *sp; |
4677a3b6 | 1597 | struct hlist_node *node, *nn; |
97a0a01e | 1598 | |
4677a3b6 AK |
1599 | index = kvm_page_table_hashfn(gfn); |
1600 | bucket = &kvm->arch.mmu_page_hash[index]; | |
1601 | hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) { | |
f6e2c02b | 1602 | if (sp->gfn == gfn && !sp->role.direct |
4677a3b6 AK |
1603 | && !sp->role.invalid) { |
1604 | pgprintk("%s: zap %lx %x\n", | |
1605 | __func__, gfn, sp->role.word); | |
1606 | kvm_mmu_zap_page(kvm, sp); | |
1607 | } | |
97a0a01e AK |
1608 | } |
1609 | } | |
1610 | ||
38c335f1 | 1611 | static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn) |
6aa8b732 | 1612 | { |
bc6678a3 | 1613 | int slot = memslot_id(kvm, gfn); |
4db35314 | 1614 | struct kvm_mmu_page *sp = page_header(__pa(pte)); |
6aa8b732 | 1615 | |
291f26bc | 1616 | __set_bit(slot, sp->slot_bitmap); |
6aa8b732 AK |
1617 | } |
1618 | ||
6844dec6 MT |
1619 | static void mmu_convert_notrap(struct kvm_mmu_page *sp) |
1620 | { | |
1621 | int i; | |
1622 | u64 *pt = sp->spt; | |
1623 | ||
1624 | if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte) | |
1625 | return; | |
1626 | ||
1627 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
1628 | if (pt[i] == shadow_notrap_nonpresent_pte) | |
d555c333 | 1629 | __set_spte(&pt[i], shadow_trap_nonpresent_pte); |
6844dec6 MT |
1630 | } |
1631 | } | |
1632 | ||
039576c0 AK |
1633 | struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva) |
1634 | { | |
72dc67a6 IE |
1635 | struct page *page; |
1636 | ||
ad312c7c | 1637 | gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva); |
039576c0 AK |
1638 | |
1639 | if (gpa == UNMAPPED_GVA) | |
1640 | return NULL; | |
72dc67a6 | 1641 | |
72dc67a6 | 1642 | page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT); |
72dc67a6 IE |
1643 | |
1644 | return page; | |
039576c0 AK |
1645 | } |
1646 | ||
74be52e3 SY |
1647 | /* |
1648 | * The function is based on mtrr_type_lookup() in | |
1649 | * arch/x86/kernel/cpu/mtrr/generic.c | |
1650 | */ | |
1651 | static int get_mtrr_type(struct mtrr_state_type *mtrr_state, | |
1652 | u64 start, u64 end) | |
1653 | { | |
1654 | int i; | |
1655 | u64 base, mask; | |
1656 | u8 prev_match, curr_match; | |
1657 | int num_var_ranges = KVM_NR_VAR_MTRR; | |
1658 | ||
1659 | if (!mtrr_state->enabled) | |
1660 | return 0xFF; | |
1661 | ||
1662 | /* Make end inclusive end, instead of exclusive */ | |
1663 | end--; | |
1664 | ||
1665 | /* Look in fixed ranges. Just return the type as per start */ | |
1666 | if (mtrr_state->have_fixed && (start < 0x100000)) { | |
1667 | int idx; | |
1668 | ||
1669 | if (start < 0x80000) { | |
1670 | idx = 0; | |
1671 | idx += (start >> 16); | |
1672 | return mtrr_state->fixed_ranges[idx]; | |
1673 | } else if (start < 0xC0000) { | |
1674 | idx = 1 * 8; | |
1675 | idx += ((start - 0x80000) >> 14); | |
1676 | return mtrr_state->fixed_ranges[idx]; | |
1677 | } else if (start < 0x1000000) { | |
1678 | idx = 3 * 8; | |
1679 | idx += ((start - 0xC0000) >> 12); | |
1680 | return mtrr_state->fixed_ranges[idx]; | |
1681 | } | |
1682 | } | |
1683 | ||
1684 | /* | |
1685 | * Look in variable ranges | |
1686 | * Look of multiple ranges matching this address and pick type | |
1687 | * as per MTRR precedence | |
1688 | */ | |
1689 | if (!(mtrr_state->enabled & 2)) | |
1690 | return mtrr_state->def_type; | |
1691 | ||
1692 | prev_match = 0xFF; | |
1693 | for (i = 0; i < num_var_ranges; ++i) { | |
1694 | unsigned short start_state, end_state; | |
1695 | ||
1696 | if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11))) | |
1697 | continue; | |
1698 | ||
1699 | base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) + | |
1700 | (mtrr_state->var_ranges[i].base_lo & PAGE_MASK); | |
1701 | mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) + | |
1702 | (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK); | |
1703 | ||
1704 | start_state = ((start & mask) == (base & mask)); | |
1705 | end_state = ((end & mask) == (base & mask)); | |
1706 | if (start_state != end_state) | |
1707 | return 0xFE; | |
1708 | ||
1709 | if ((start & mask) != (base & mask)) | |
1710 | continue; | |
1711 | ||
1712 | curr_match = mtrr_state->var_ranges[i].base_lo & 0xff; | |
1713 | if (prev_match == 0xFF) { | |
1714 | prev_match = curr_match; | |
1715 | continue; | |
1716 | } | |
1717 | ||
1718 | if (prev_match == MTRR_TYPE_UNCACHABLE || | |
1719 | curr_match == MTRR_TYPE_UNCACHABLE) | |
1720 | return MTRR_TYPE_UNCACHABLE; | |
1721 | ||
1722 | if ((prev_match == MTRR_TYPE_WRBACK && | |
1723 | curr_match == MTRR_TYPE_WRTHROUGH) || | |
1724 | (prev_match == MTRR_TYPE_WRTHROUGH && | |
1725 | curr_match == MTRR_TYPE_WRBACK)) { | |
1726 | prev_match = MTRR_TYPE_WRTHROUGH; | |
1727 | curr_match = MTRR_TYPE_WRTHROUGH; | |
1728 | } | |
1729 | ||
1730 | if (prev_match != curr_match) | |
1731 | return MTRR_TYPE_UNCACHABLE; | |
1732 | } | |
1733 | ||
1734 | if (prev_match != 0xFF) | |
1735 | return prev_match; | |
1736 | ||
1737 | return mtrr_state->def_type; | |
1738 | } | |
1739 | ||
4b12f0de | 1740 | u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn) |
74be52e3 SY |
1741 | { |
1742 | u8 mtrr; | |
1743 | ||
1744 | mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT, | |
1745 | (gfn << PAGE_SHIFT) + PAGE_SIZE); | |
1746 | if (mtrr == 0xfe || mtrr == 0xff) | |
1747 | mtrr = MTRR_TYPE_WRBACK; | |
1748 | return mtrr; | |
1749 | } | |
4b12f0de | 1750 | EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type); |
74be52e3 | 1751 | |
4731d4c7 MT |
1752 | static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp) |
1753 | { | |
1754 | unsigned index; | |
1755 | struct hlist_head *bucket; | |
1756 | struct kvm_mmu_page *s; | |
1757 | struct hlist_node *node, *n; | |
1758 | ||
f691fe1d | 1759 | trace_kvm_mmu_unsync_page(sp); |
4731d4c7 MT |
1760 | index = kvm_page_table_hashfn(sp->gfn); |
1761 | bucket = &vcpu->kvm->arch.mmu_page_hash[index]; | |
1762 | /* don't unsync if pagetable is shadowed with multiple roles */ | |
1763 | hlist_for_each_entry_safe(s, node, n, bucket, hash_link) { | |
f6e2c02b | 1764 | if (s->gfn != sp->gfn || s->role.direct) |
4731d4c7 MT |
1765 | continue; |
1766 | if (s->role.word != sp->role.word) | |
1767 | return 1; | |
1768 | } | |
4731d4c7 MT |
1769 | ++vcpu->kvm->stat.mmu_unsync; |
1770 | sp->unsync = 1; | |
6cffe8ca | 1771 | |
c2d0ee46 | 1772 | kvm_mmu_mark_parents_unsync(vcpu, sp); |
6cffe8ca | 1773 | |
4731d4c7 MT |
1774 | mmu_convert_notrap(sp); |
1775 | return 0; | |
1776 | } | |
1777 | ||
1778 | static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn, | |
1779 | bool can_unsync) | |
1780 | { | |
1781 | struct kvm_mmu_page *shadow; | |
1782 | ||
1783 | shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn); | |
1784 | if (shadow) { | |
1785 | if (shadow->role.level != PT_PAGE_TABLE_LEVEL) | |
1786 | return 1; | |
1787 | if (shadow->unsync) | |
1788 | return 0; | |
582801a9 | 1789 | if (can_unsync && oos_shadow) |
4731d4c7 MT |
1790 | return kvm_unsync_page(vcpu, shadow); |
1791 | return 1; | |
1792 | } | |
1793 | return 0; | |
1794 | } | |
1795 | ||
d555c333 | 1796 | static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep, |
1e73f9dd | 1797 | unsigned pte_access, int user_fault, |
852e3c19 | 1798 | int write_fault, int dirty, int level, |
c2d0ee46 | 1799 | gfn_t gfn, pfn_t pfn, bool speculative, |
1403283a | 1800 | bool can_unsync, bool reset_host_protection) |
1c4f1fd6 AK |
1801 | { |
1802 | u64 spte; | |
1e73f9dd | 1803 | int ret = 0; |
64d4d521 | 1804 | |
1c4f1fd6 AK |
1805 | /* |
1806 | * We don't set the accessed bit, since we sometimes want to see | |
1807 | * whether the guest actually used the pte (in order to detect | |
1808 | * demand paging). | |
1809 | */ | |
7b52345e | 1810 | spte = shadow_base_present_pte | shadow_dirty_mask; |
947da538 | 1811 | if (!speculative) |
3201b5d9 | 1812 | spte |= shadow_accessed_mask; |
1c4f1fd6 AK |
1813 | if (!dirty) |
1814 | pte_access &= ~ACC_WRITE_MASK; | |
7b52345e SY |
1815 | if (pte_access & ACC_EXEC_MASK) |
1816 | spte |= shadow_x_mask; | |
1817 | else | |
1818 | spte |= shadow_nx_mask; | |
1c4f1fd6 | 1819 | if (pte_access & ACC_USER_MASK) |
7b52345e | 1820 | spte |= shadow_user_mask; |
852e3c19 | 1821 | if (level > PT_PAGE_TABLE_LEVEL) |
05da4558 | 1822 | spte |= PT_PAGE_SIZE_MASK; |
4b12f0de SY |
1823 | if (tdp_enabled) |
1824 | spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn, | |
1825 | kvm_is_mmio_pfn(pfn)); | |
1c4f1fd6 | 1826 | |
1403283a IE |
1827 | if (reset_host_protection) |
1828 | spte |= SPTE_HOST_WRITEABLE; | |
1829 | ||
35149e21 | 1830 | spte |= (u64)pfn << PAGE_SHIFT; |
1c4f1fd6 AK |
1831 | |
1832 | if ((pte_access & ACC_WRITE_MASK) | |
1833 | || (write_fault && !is_write_protection(vcpu) && !user_fault)) { | |
1c4f1fd6 | 1834 | |
852e3c19 JR |
1835 | if (level > PT_PAGE_TABLE_LEVEL && |
1836 | has_wrprotected_page(vcpu->kvm, gfn, level)) { | |
38187c83 MT |
1837 | ret = 1; |
1838 | spte = shadow_trap_nonpresent_pte; | |
1839 | goto set_pte; | |
1840 | } | |
1841 | ||
1c4f1fd6 | 1842 | spte |= PT_WRITABLE_MASK; |
1c4f1fd6 | 1843 | |
ecc5589f MT |
1844 | /* |
1845 | * Optimization: for pte sync, if spte was writable the hash | |
1846 | * lookup is unnecessary (and expensive). Write protection | |
1847 | * is responsibility of mmu_get_page / kvm_sync_page. | |
1848 | * Same reasoning can be applied to dirty page accounting. | |
1849 | */ | |
8dae4445 | 1850 | if (!can_unsync && is_writable_pte(*sptep)) |
ecc5589f MT |
1851 | goto set_pte; |
1852 | ||
4731d4c7 | 1853 | if (mmu_need_write_protect(vcpu, gfn, can_unsync)) { |
1c4f1fd6 | 1854 | pgprintk("%s: found shadow page for %lx, marking ro\n", |
b8688d51 | 1855 | __func__, gfn); |
1e73f9dd | 1856 | ret = 1; |
1c4f1fd6 | 1857 | pte_access &= ~ACC_WRITE_MASK; |
8dae4445 | 1858 | if (is_writable_pte(spte)) |
1c4f1fd6 | 1859 | spte &= ~PT_WRITABLE_MASK; |
1c4f1fd6 AK |
1860 | } |
1861 | } | |
1862 | ||
1c4f1fd6 AK |
1863 | if (pte_access & ACC_WRITE_MASK) |
1864 | mark_page_dirty(vcpu->kvm, gfn); | |
1865 | ||
38187c83 | 1866 | set_pte: |
d555c333 | 1867 | __set_spte(sptep, spte); |
1e73f9dd MT |
1868 | return ret; |
1869 | } | |
1870 | ||
d555c333 | 1871 | static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep, |
1e73f9dd MT |
1872 | unsigned pt_access, unsigned pte_access, |
1873 | int user_fault, int write_fault, int dirty, | |
852e3c19 | 1874 | int *ptwrite, int level, gfn_t gfn, |
1403283a IE |
1875 | pfn_t pfn, bool speculative, |
1876 | bool reset_host_protection) | |
1e73f9dd MT |
1877 | { |
1878 | int was_rmapped = 0; | |
8dae4445 | 1879 | int was_writable = is_writable_pte(*sptep); |
53a27b39 | 1880 | int rmap_count; |
1e73f9dd MT |
1881 | |
1882 | pgprintk("%s: spte %llx access %x write_fault %d" | |
1883 | " user_fault %d gfn %lx\n", | |
d555c333 | 1884 | __func__, *sptep, pt_access, |
1e73f9dd MT |
1885 | write_fault, user_fault, gfn); |
1886 | ||
d555c333 | 1887 | if (is_rmap_spte(*sptep)) { |
1e73f9dd MT |
1888 | /* |
1889 | * If we overwrite a PTE page pointer with a 2MB PMD, unlink | |
1890 | * the parent of the now unreachable PTE. | |
1891 | */ | |
852e3c19 JR |
1892 | if (level > PT_PAGE_TABLE_LEVEL && |
1893 | !is_large_pte(*sptep)) { | |
1e73f9dd | 1894 | struct kvm_mmu_page *child; |
d555c333 | 1895 | u64 pte = *sptep; |
1e73f9dd MT |
1896 | |
1897 | child = page_header(pte & PT64_BASE_ADDR_MASK); | |
d555c333 AK |
1898 | mmu_page_remove_parent_pte(child, sptep); |
1899 | } else if (pfn != spte_to_pfn(*sptep)) { | |
1e73f9dd | 1900 | pgprintk("hfn old %lx new %lx\n", |
d555c333 AK |
1901 | spte_to_pfn(*sptep), pfn); |
1902 | rmap_remove(vcpu->kvm, sptep); | |
6bed6b9e JR |
1903 | } else |
1904 | was_rmapped = 1; | |
1e73f9dd | 1905 | } |
852e3c19 | 1906 | |
d555c333 | 1907 | if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault, |
1403283a IE |
1908 | dirty, level, gfn, pfn, speculative, true, |
1909 | reset_host_protection)) { | |
1e73f9dd MT |
1910 | if (write_fault) |
1911 | *ptwrite = 1; | |
a378b4e6 MT |
1912 | kvm_x86_ops->tlb_flush(vcpu); |
1913 | } | |
1e73f9dd | 1914 | |
d555c333 | 1915 | pgprintk("%s: setting spte %llx\n", __func__, *sptep); |
1e73f9dd | 1916 | pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n", |
d555c333 | 1917 | is_large_pte(*sptep)? "2MB" : "4kB", |
a205bc19 JR |
1918 | *sptep & PT_PRESENT_MASK ?"RW":"R", gfn, |
1919 | *sptep, sptep); | |
d555c333 | 1920 | if (!was_rmapped && is_large_pte(*sptep)) |
05da4558 MT |
1921 | ++vcpu->kvm->stat.lpages; |
1922 | ||
d555c333 | 1923 | page_header_update_slot(vcpu->kvm, sptep, gfn); |
1c4f1fd6 | 1924 | if (!was_rmapped) { |
44ad9944 | 1925 | rmap_count = rmap_add(vcpu, sptep, gfn); |
acb66dd0 | 1926 | kvm_release_pfn_clean(pfn); |
53a27b39 | 1927 | if (rmap_count > RMAP_RECYCLE_THRESHOLD) |
852e3c19 | 1928 | rmap_recycle(vcpu, sptep, gfn); |
75e68e60 | 1929 | } else { |
8dae4445 | 1930 | if (was_writable) |
35149e21 | 1931 | kvm_release_pfn_dirty(pfn); |
75e68e60 | 1932 | else |
35149e21 | 1933 | kvm_release_pfn_clean(pfn); |
1c4f1fd6 | 1934 | } |
1b7fcd32 | 1935 | if (speculative) { |
d555c333 | 1936 | vcpu->arch.last_pte_updated = sptep; |
1b7fcd32 AK |
1937 | vcpu->arch.last_pte_gfn = gfn; |
1938 | } | |
1c4f1fd6 AK |
1939 | } |
1940 | ||
6aa8b732 AK |
1941 | static void nonpaging_new_cr3(struct kvm_vcpu *vcpu) |
1942 | { | |
1943 | } | |
1944 | ||
9f652d21 | 1945 | static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write, |
852e3c19 | 1946 | int level, gfn_t gfn, pfn_t pfn) |
140754bc | 1947 | { |
9f652d21 | 1948 | struct kvm_shadow_walk_iterator iterator; |
140754bc | 1949 | struct kvm_mmu_page *sp; |
9f652d21 | 1950 | int pt_write = 0; |
140754bc | 1951 | gfn_t pseudo_gfn; |
6aa8b732 | 1952 | |
9f652d21 | 1953 | for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) { |
852e3c19 | 1954 | if (iterator.level == level) { |
9f652d21 AK |
1955 | mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL, |
1956 | 0, write, 1, &pt_write, | |
1403283a | 1957 | level, gfn, pfn, false, true); |
9f652d21 AK |
1958 | ++vcpu->stat.pf_fixed; |
1959 | break; | |
6aa8b732 AK |
1960 | } |
1961 | ||
9f652d21 AK |
1962 | if (*iterator.sptep == shadow_trap_nonpresent_pte) { |
1963 | pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT; | |
1964 | sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr, | |
1965 | iterator.level - 1, | |
1966 | 1, ACC_ALL, iterator.sptep); | |
1967 | if (!sp) { | |
1968 | pgprintk("nonpaging_map: ENOMEM\n"); | |
1969 | kvm_release_pfn_clean(pfn); | |
1970 | return -ENOMEM; | |
1971 | } | |
140754bc | 1972 | |
d555c333 AK |
1973 | __set_spte(iterator.sptep, |
1974 | __pa(sp->spt) | |
1975 | | PT_PRESENT_MASK | PT_WRITABLE_MASK | |
1976 | | shadow_user_mask | shadow_x_mask); | |
9f652d21 AK |
1977 | } |
1978 | } | |
1979 | return pt_write; | |
6aa8b732 AK |
1980 | } |
1981 | ||
10589a46 MT |
1982 | static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn) |
1983 | { | |
1984 | int r; | |
852e3c19 | 1985 | int level; |
35149e21 | 1986 | pfn_t pfn; |
e930bffe | 1987 | unsigned long mmu_seq; |
aaee2c94 | 1988 | |
852e3c19 JR |
1989 | level = mapping_level(vcpu, gfn); |
1990 | ||
1991 | /* | |
1992 | * This path builds a PAE pagetable - so we can map 2mb pages at | |
1993 | * maximum. Therefore check if the level is larger than that. | |
1994 | */ | |
1995 | if (level > PT_DIRECTORY_LEVEL) | |
1996 | level = PT_DIRECTORY_LEVEL; | |
1997 | ||
1998 | gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1); | |
05da4558 | 1999 | |
e930bffe | 2000 | mmu_seq = vcpu->kvm->mmu_notifier_seq; |
4c2155ce | 2001 | smp_rmb(); |
35149e21 | 2002 | pfn = gfn_to_pfn(vcpu->kvm, gfn); |
aaee2c94 | 2003 | |
d196e343 | 2004 | /* mmio */ |
35149e21 AL |
2005 | if (is_error_pfn(pfn)) { |
2006 | kvm_release_pfn_clean(pfn); | |
d196e343 AK |
2007 | return 1; |
2008 | } | |
2009 | ||
aaee2c94 | 2010 | spin_lock(&vcpu->kvm->mmu_lock); |
e930bffe AA |
2011 | if (mmu_notifier_retry(vcpu, mmu_seq)) |
2012 | goto out_unlock; | |
eb787d10 | 2013 | kvm_mmu_free_some_pages(vcpu); |
852e3c19 | 2014 | r = __direct_map(vcpu, v, write, level, gfn, pfn); |
aaee2c94 MT |
2015 | spin_unlock(&vcpu->kvm->mmu_lock); |
2016 | ||
aaee2c94 | 2017 | |
10589a46 | 2018 | return r; |
e930bffe AA |
2019 | |
2020 | out_unlock: | |
2021 | spin_unlock(&vcpu->kvm->mmu_lock); | |
2022 | kvm_release_pfn_clean(pfn); | |
2023 | return 0; | |
10589a46 MT |
2024 | } |
2025 | ||
2026 | ||
17ac10ad AK |
2027 | static void mmu_free_roots(struct kvm_vcpu *vcpu) |
2028 | { | |
2029 | int i; | |
4db35314 | 2030 | struct kvm_mmu_page *sp; |
17ac10ad | 2031 | |
ad312c7c | 2032 | if (!VALID_PAGE(vcpu->arch.mmu.root_hpa)) |
7b53aa56 | 2033 | return; |
aaee2c94 | 2034 | spin_lock(&vcpu->kvm->mmu_lock); |
ad312c7c ZX |
2035 | if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) { |
2036 | hpa_t root = vcpu->arch.mmu.root_hpa; | |
17ac10ad | 2037 | |
4db35314 AK |
2038 | sp = page_header(root); |
2039 | --sp->root_count; | |
2e53d63a MT |
2040 | if (!sp->root_count && sp->role.invalid) |
2041 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
ad312c7c | 2042 | vcpu->arch.mmu.root_hpa = INVALID_PAGE; |
aaee2c94 | 2043 | spin_unlock(&vcpu->kvm->mmu_lock); |
17ac10ad AK |
2044 | return; |
2045 | } | |
17ac10ad | 2046 | for (i = 0; i < 4; ++i) { |
ad312c7c | 2047 | hpa_t root = vcpu->arch.mmu.pae_root[i]; |
17ac10ad | 2048 | |
417726a3 | 2049 | if (root) { |
417726a3 | 2050 | root &= PT64_BASE_ADDR_MASK; |
4db35314 AK |
2051 | sp = page_header(root); |
2052 | --sp->root_count; | |
2e53d63a MT |
2053 | if (!sp->root_count && sp->role.invalid) |
2054 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
417726a3 | 2055 | } |
ad312c7c | 2056 | vcpu->arch.mmu.pae_root[i] = INVALID_PAGE; |
17ac10ad | 2057 | } |
aaee2c94 | 2058 | spin_unlock(&vcpu->kvm->mmu_lock); |
ad312c7c | 2059 | vcpu->arch.mmu.root_hpa = INVALID_PAGE; |
17ac10ad AK |
2060 | } |
2061 | ||
8986ecc0 MT |
2062 | static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn) |
2063 | { | |
2064 | int ret = 0; | |
2065 | ||
2066 | if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) { | |
2067 | set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests); | |
2068 | ret = 1; | |
2069 | } | |
2070 | ||
2071 | return ret; | |
2072 | } | |
2073 | ||
2074 | static int mmu_alloc_roots(struct kvm_vcpu *vcpu) | |
17ac10ad AK |
2075 | { |
2076 | int i; | |
cea0f0e7 | 2077 | gfn_t root_gfn; |
4db35314 | 2078 | struct kvm_mmu_page *sp; |
f6e2c02b | 2079 | int direct = 0; |
6de4f3ad | 2080 | u64 pdptr; |
3bb65a22 | 2081 | |
ad312c7c | 2082 | root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT; |
17ac10ad | 2083 | |
ad312c7c ZX |
2084 | if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) { |
2085 | hpa_t root = vcpu->arch.mmu.root_hpa; | |
17ac10ad AK |
2086 | |
2087 | ASSERT(!VALID_PAGE(root)); | |
fb72d167 | 2088 | if (tdp_enabled) |
f6e2c02b | 2089 | direct = 1; |
8986ecc0 MT |
2090 | if (mmu_check_root(vcpu, root_gfn)) |
2091 | return 1; | |
4db35314 | 2092 | sp = kvm_mmu_get_page(vcpu, root_gfn, 0, |
f6e2c02b | 2093 | PT64_ROOT_LEVEL, direct, |
fb72d167 | 2094 | ACC_ALL, NULL); |
4db35314 AK |
2095 | root = __pa(sp->spt); |
2096 | ++sp->root_count; | |
ad312c7c | 2097 | vcpu->arch.mmu.root_hpa = root; |
8986ecc0 | 2098 | return 0; |
17ac10ad | 2099 | } |
f6e2c02b | 2100 | direct = !is_paging(vcpu); |
fb72d167 | 2101 | if (tdp_enabled) |
f6e2c02b | 2102 | direct = 1; |
17ac10ad | 2103 | for (i = 0; i < 4; ++i) { |
ad312c7c | 2104 | hpa_t root = vcpu->arch.mmu.pae_root[i]; |
17ac10ad AK |
2105 | |
2106 | ASSERT(!VALID_PAGE(root)); | |
ad312c7c | 2107 | if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) { |
6de4f3ad | 2108 | pdptr = kvm_pdptr_read(vcpu, i); |
43a3795a | 2109 | if (!is_present_gpte(pdptr)) { |
ad312c7c | 2110 | vcpu->arch.mmu.pae_root[i] = 0; |
417726a3 AK |
2111 | continue; |
2112 | } | |
6de4f3ad | 2113 | root_gfn = pdptr >> PAGE_SHIFT; |
ad312c7c | 2114 | } else if (vcpu->arch.mmu.root_level == 0) |
cea0f0e7 | 2115 | root_gfn = 0; |
8986ecc0 MT |
2116 | if (mmu_check_root(vcpu, root_gfn)) |
2117 | return 1; | |
4db35314 | 2118 | sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30, |
f6e2c02b | 2119 | PT32_ROOT_LEVEL, direct, |
f7d9c7b7 | 2120 | ACC_ALL, NULL); |
4db35314 AK |
2121 | root = __pa(sp->spt); |
2122 | ++sp->root_count; | |
ad312c7c | 2123 | vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK; |
17ac10ad | 2124 | } |
ad312c7c | 2125 | vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root); |
8986ecc0 | 2126 | return 0; |
17ac10ad AK |
2127 | } |
2128 | ||
0ba73cda MT |
2129 | static void mmu_sync_roots(struct kvm_vcpu *vcpu) |
2130 | { | |
2131 | int i; | |
2132 | struct kvm_mmu_page *sp; | |
2133 | ||
2134 | if (!VALID_PAGE(vcpu->arch.mmu.root_hpa)) | |
2135 | return; | |
2136 | if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) { | |
2137 | hpa_t root = vcpu->arch.mmu.root_hpa; | |
2138 | sp = page_header(root); | |
2139 | mmu_sync_children(vcpu, sp); | |
2140 | return; | |
2141 | } | |
2142 | for (i = 0; i < 4; ++i) { | |
2143 | hpa_t root = vcpu->arch.mmu.pae_root[i]; | |
2144 | ||
8986ecc0 | 2145 | if (root && VALID_PAGE(root)) { |
0ba73cda MT |
2146 | root &= PT64_BASE_ADDR_MASK; |
2147 | sp = page_header(root); | |
2148 | mmu_sync_children(vcpu, sp); | |
2149 | } | |
2150 | } | |
2151 | } | |
2152 | ||
2153 | void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu) | |
2154 | { | |
2155 | spin_lock(&vcpu->kvm->mmu_lock); | |
2156 | mmu_sync_roots(vcpu); | |
6cffe8ca | 2157 | spin_unlock(&vcpu->kvm->mmu_lock); |
0ba73cda MT |
2158 | } |
2159 | ||
6aa8b732 AK |
2160 | static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr) |
2161 | { | |
2162 | return vaddr; | |
2163 | } | |
2164 | ||
2165 | static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva, | |
3f3e7124 | 2166 | u32 error_code) |
6aa8b732 | 2167 | { |
e833240f | 2168 | gfn_t gfn; |
e2dec939 | 2169 | int r; |
6aa8b732 | 2170 | |
b8688d51 | 2171 | pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code); |
e2dec939 AK |
2172 | r = mmu_topup_memory_caches(vcpu); |
2173 | if (r) | |
2174 | return r; | |
714b93da | 2175 | |
6aa8b732 | 2176 | ASSERT(vcpu); |
ad312c7c | 2177 | ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
6aa8b732 | 2178 | |
e833240f | 2179 | gfn = gva >> PAGE_SHIFT; |
6aa8b732 | 2180 | |
e833240f AK |
2181 | return nonpaging_map(vcpu, gva & PAGE_MASK, |
2182 | error_code & PFERR_WRITE_MASK, gfn); | |
6aa8b732 AK |
2183 | } |
2184 | ||
fb72d167 JR |
2185 | static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa, |
2186 | u32 error_code) | |
2187 | { | |
35149e21 | 2188 | pfn_t pfn; |
fb72d167 | 2189 | int r; |
852e3c19 | 2190 | int level; |
05da4558 | 2191 | gfn_t gfn = gpa >> PAGE_SHIFT; |
e930bffe | 2192 | unsigned long mmu_seq; |
fb72d167 JR |
2193 | |
2194 | ASSERT(vcpu); | |
2195 | ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa)); | |
2196 | ||
2197 | r = mmu_topup_memory_caches(vcpu); | |
2198 | if (r) | |
2199 | return r; | |
2200 | ||
852e3c19 JR |
2201 | level = mapping_level(vcpu, gfn); |
2202 | ||
2203 | gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1); | |
2204 | ||
e930bffe | 2205 | mmu_seq = vcpu->kvm->mmu_notifier_seq; |
4c2155ce | 2206 | smp_rmb(); |
35149e21 | 2207 | pfn = gfn_to_pfn(vcpu->kvm, gfn); |
35149e21 AL |
2208 | if (is_error_pfn(pfn)) { |
2209 | kvm_release_pfn_clean(pfn); | |
fb72d167 JR |
2210 | return 1; |
2211 | } | |
2212 | spin_lock(&vcpu->kvm->mmu_lock); | |
e930bffe AA |
2213 | if (mmu_notifier_retry(vcpu, mmu_seq)) |
2214 | goto out_unlock; | |
fb72d167 JR |
2215 | kvm_mmu_free_some_pages(vcpu); |
2216 | r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK, | |
852e3c19 | 2217 | level, gfn, pfn); |
fb72d167 | 2218 | spin_unlock(&vcpu->kvm->mmu_lock); |
fb72d167 JR |
2219 | |
2220 | return r; | |
e930bffe AA |
2221 | |
2222 | out_unlock: | |
2223 | spin_unlock(&vcpu->kvm->mmu_lock); | |
2224 | kvm_release_pfn_clean(pfn); | |
2225 | return 0; | |
fb72d167 JR |
2226 | } |
2227 | ||
6aa8b732 AK |
2228 | static void nonpaging_free(struct kvm_vcpu *vcpu) |
2229 | { | |
17ac10ad | 2230 | mmu_free_roots(vcpu); |
6aa8b732 AK |
2231 | } |
2232 | ||
2233 | static int nonpaging_init_context(struct kvm_vcpu *vcpu) | |
2234 | { | |
ad312c7c | 2235 | struct kvm_mmu *context = &vcpu->arch.mmu; |
6aa8b732 AK |
2236 | |
2237 | context->new_cr3 = nonpaging_new_cr3; | |
2238 | context->page_fault = nonpaging_page_fault; | |
6aa8b732 AK |
2239 | context->gva_to_gpa = nonpaging_gva_to_gpa; |
2240 | context->free = nonpaging_free; | |
c7addb90 | 2241 | context->prefetch_page = nonpaging_prefetch_page; |
e8bc217a | 2242 | context->sync_page = nonpaging_sync_page; |
a7052897 | 2243 | context->invlpg = nonpaging_invlpg; |
cea0f0e7 | 2244 | context->root_level = 0; |
6aa8b732 | 2245 | context->shadow_root_level = PT32E_ROOT_LEVEL; |
17c3ba9d | 2246 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
2247 | return 0; |
2248 | } | |
2249 | ||
d835dfec | 2250 | void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu) |
6aa8b732 | 2251 | { |
1165f5fe | 2252 | ++vcpu->stat.tlb_flush; |
cbdd1bea | 2253 | kvm_x86_ops->tlb_flush(vcpu); |
6aa8b732 AK |
2254 | } |
2255 | ||
2256 | static void paging_new_cr3(struct kvm_vcpu *vcpu) | |
2257 | { | |
b8688d51 | 2258 | pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3); |
cea0f0e7 | 2259 | mmu_free_roots(vcpu); |
6aa8b732 AK |
2260 | } |
2261 | ||
6aa8b732 AK |
2262 | static void inject_page_fault(struct kvm_vcpu *vcpu, |
2263 | u64 addr, | |
2264 | u32 err_code) | |
2265 | { | |
c3c91fee | 2266 | kvm_inject_page_fault(vcpu, addr, err_code); |
6aa8b732 AK |
2267 | } |
2268 | ||
6aa8b732 AK |
2269 | static void paging_free(struct kvm_vcpu *vcpu) |
2270 | { | |
2271 | nonpaging_free(vcpu); | |
2272 | } | |
2273 | ||
82725b20 DE |
2274 | static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level) |
2275 | { | |
2276 | int bit7; | |
2277 | ||
2278 | bit7 = (gpte >> 7) & 1; | |
2279 | return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0; | |
2280 | } | |
2281 | ||
6aa8b732 AK |
2282 | #define PTTYPE 64 |
2283 | #include "paging_tmpl.h" | |
2284 | #undef PTTYPE | |
2285 | ||
2286 | #define PTTYPE 32 | |
2287 | #include "paging_tmpl.h" | |
2288 | #undef PTTYPE | |
2289 | ||
82725b20 DE |
2290 | static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level) |
2291 | { | |
2292 | struct kvm_mmu *context = &vcpu->arch.mmu; | |
2293 | int maxphyaddr = cpuid_maxphyaddr(vcpu); | |
2294 | u64 exb_bit_rsvd = 0; | |
2295 | ||
2296 | if (!is_nx(vcpu)) | |
2297 | exb_bit_rsvd = rsvd_bits(63, 63); | |
2298 | switch (level) { | |
2299 | case PT32_ROOT_LEVEL: | |
2300 | /* no rsvd bits for 2 level 4K page table entries */ | |
2301 | context->rsvd_bits_mask[0][1] = 0; | |
2302 | context->rsvd_bits_mask[0][0] = 0; | |
2303 | if (is_cpuid_PSE36()) | |
2304 | /* 36bits PSE 4MB page */ | |
2305 | context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21); | |
2306 | else | |
2307 | /* 32 bits PSE 4MB page */ | |
2308 | context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21); | |
29a4b933 | 2309 | context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0]; |
82725b20 DE |
2310 | break; |
2311 | case PT32E_ROOT_LEVEL: | |
20c466b5 DE |
2312 | context->rsvd_bits_mask[0][2] = |
2313 | rsvd_bits(maxphyaddr, 63) | | |
2314 | rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */ | |
82725b20 | 2315 | context->rsvd_bits_mask[0][1] = exb_bit_rsvd | |
4c26b4cd | 2316 | rsvd_bits(maxphyaddr, 62); /* PDE */ |
82725b20 DE |
2317 | context->rsvd_bits_mask[0][0] = exb_bit_rsvd | |
2318 | rsvd_bits(maxphyaddr, 62); /* PTE */ | |
2319 | context->rsvd_bits_mask[1][1] = exb_bit_rsvd | | |
2320 | rsvd_bits(maxphyaddr, 62) | | |
2321 | rsvd_bits(13, 20); /* large page */ | |
29a4b933 | 2322 | context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0]; |
82725b20 DE |
2323 | break; |
2324 | case PT64_ROOT_LEVEL: | |
2325 | context->rsvd_bits_mask[0][3] = exb_bit_rsvd | | |
2326 | rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8); | |
2327 | context->rsvd_bits_mask[0][2] = exb_bit_rsvd | | |
2328 | rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8); | |
2329 | context->rsvd_bits_mask[0][1] = exb_bit_rsvd | | |
4c26b4cd | 2330 | rsvd_bits(maxphyaddr, 51); |
82725b20 DE |
2331 | context->rsvd_bits_mask[0][0] = exb_bit_rsvd | |
2332 | rsvd_bits(maxphyaddr, 51); | |
2333 | context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3]; | |
e04da980 JR |
2334 | context->rsvd_bits_mask[1][2] = exb_bit_rsvd | |
2335 | rsvd_bits(maxphyaddr, 51) | | |
2336 | rsvd_bits(13, 29); | |
82725b20 | 2337 | context->rsvd_bits_mask[1][1] = exb_bit_rsvd | |
4c26b4cd SY |
2338 | rsvd_bits(maxphyaddr, 51) | |
2339 | rsvd_bits(13, 20); /* large page */ | |
29a4b933 | 2340 | context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0]; |
82725b20 DE |
2341 | break; |
2342 | } | |
2343 | } | |
2344 | ||
17ac10ad | 2345 | static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level) |
6aa8b732 | 2346 | { |
ad312c7c | 2347 | struct kvm_mmu *context = &vcpu->arch.mmu; |
6aa8b732 AK |
2348 | |
2349 | ASSERT(is_pae(vcpu)); | |
2350 | context->new_cr3 = paging_new_cr3; | |
2351 | context->page_fault = paging64_page_fault; | |
6aa8b732 | 2352 | context->gva_to_gpa = paging64_gva_to_gpa; |
c7addb90 | 2353 | context->prefetch_page = paging64_prefetch_page; |
e8bc217a | 2354 | context->sync_page = paging64_sync_page; |
a7052897 | 2355 | context->invlpg = paging64_invlpg; |
6aa8b732 | 2356 | context->free = paging_free; |
17ac10ad AK |
2357 | context->root_level = level; |
2358 | context->shadow_root_level = level; | |
17c3ba9d | 2359 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
2360 | return 0; |
2361 | } | |
2362 | ||
17ac10ad AK |
2363 | static int paging64_init_context(struct kvm_vcpu *vcpu) |
2364 | { | |
82725b20 | 2365 | reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL); |
17ac10ad AK |
2366 | return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL); |
2367 | } | |
2368 | ||
6aa8b732 AK |
2369 | static int paging32_init_context(struct kvm_vcpu *vcpu) |
2370 | { | |
ad312c7c | 2371 | struct kvm_mmu *context = &vcpu->arch.mmu; |
6aa8b732 | 2372 | |
82725b20 | 2373 | reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL); |
6aa8b732 AK |
2374 | context->new_cr3 = paging_new_cr3; |
2375 | context->page_fault = paging32_page_fault; | |
6aa8b732 AK |
2376 | context->gva_to_gpa = paging32_gva_to_gpa; |
2377 | context->free = paging_free; | |
c7addb90 | 2378 | context->prefetch_page = paging32_prefetch_page; |
e8bc217a | 2379 | context->sync_page = paging32_sync_page; |
a7052897 | 2380 | context->invlpg = paging32_invlpg; |
6aa8b732 AK |
2381 | context->root_level = PT32_ROOT_LEVEL; |
2382 | context->shadow_root_level = PT32E_ROOT_LEVEL; | |
17c3ba9d | 2383 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
2384 | return 0; |
2385 | } | |
2386 | ||
2387 | static int paging32E_init_context(struct kvm_vcpu *vcpu) | |
2388 | { | |
82725b20 | 2389 | reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL); |
17ac10ad | 2390 | return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL); |
6aa8b732 AK |
2391 | } |
2392 | ||
fb72d167 JR |
2393 | static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu) |
2394 | { | |
2395 | struct kvm_mmu *context = &vcpu->arch.mmu; | |
2396 | ||
2397 | context->new_cr3 = nonpaging_new_cr3; | |
2398 | context->page_fault = tdp_page_fault; | |
2399 | context->free = nonpaging_free; | |
2400 | context->prefetch_page = nonpaging_prefetch_page; | |
e8bc217a | 2401 | context->sync_page = nonpaging_sync_page; |
a7052897 | 2402 | context->invlpg = nonpaging_invlpg; |
67253af5 | 2403 | context->shadow_root_level = kvm_x86_ops->get_tdp_level(); |
fb72d167 JR |
2404 | context->root_hpa = INVALID_PAGE; |
2405 | ||
2406 | if (!is_paging(vcpu)) { | |
2407 | context->gva_to_gpa = nonpaging_gva_to_gpa; | |
2408 | context->root_level = 0; | |
2409 | } else if (is_long_mode(vcpu)) { | |
82725b20 | 2410 | reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL); |
fb72d167 JR |
2411 | context->gva_to_gpa = paging64_gva_to_gpa; |
2412 | context->root_level = PT64_ROOT_LEVEL; | |
2413 | } else if (is_pae(vcpu)) { | |
82725b20 | 2414 | reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL); |
fb72d167 JR |
2415 | context->gva_to_gpa = paging64_gva_to_gpa; |
2416 | context->root_level = PT32E_ROOT_LEVEL; | |
2417 | } else { | |
82725b20 | 2418 | reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL); |
fb72d167 JR |
2419 | context->gva_to_gpa = paging32_gva_to_gpa; |
2420 | context->root_level = PT32_ROOT_LEVEL; | |
2421 | } | |
2422 | ||
2423 | return 0; | |
2424 | } | |
2425 | ||
2426 | static int init_kvm_softmmu(struct kvm_vcpu *vcpu) | |
6aa8b732 | 2427 | { |
a770f6f2 AK |
2428 | int r; |
2429 | ||
6aa8b732 | 2430 | ASSERT(vcpu); |
ad312c7c | 2431 | ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
6aa8b732 AK |
2432 | |
2433 | if (!is_paging(vcpu)) | |
a770f6f2 | 2434 | r = nonpaging_init_context(vcpu); |
a9058ecd | 2435 | else if (is_long_mode(vcpu)) |
a770f6f2 | 2436 | r = paging64_init_context(vcpu); |
6aa8b732 | 2437 | else if (is_pae(vcpu)) |
a770f6f2 | 2438 | r = paging32E_init_context(vcpu); |
6aa8b732 | 2439 | else |
a770f6f2 AK |
2440 | r = paging32_init_context(vcpu); |
2441 | ||
2442 | vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level; | |
2443 | ||
2444 | return r; | |
6aa8b732 AK |
2445 | } |
2446 | ||
fb72d167 JR |
2447 | static int init_kvm_mmu(struct kvm_vcpu *vcpu) |
2448 | { | |
35149e21 AL |
2449 | vcpu->arch.update_pte.pfn = bad_pfn; |
2450 | ||
fb72d167 JR |
2451 | if (tdp_enabled) |
2452 | return init_kvm_tdp_mmu(vcpu); | |
2453 | else | |
2454 | return init_kvm_softmmu(vcpu); | |
2455 | } | |
2456 | ||
6aa8b732 AK |
2457 | static void destroy_kvm_mmu(struct kvm_vcpu *vcpu) |
2458 | { | |
2459 | ASSERT(vcpu); | |
ad312c7c ZX |
2460 | if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) { |
2461 | vcpu->arch.mmu.free(vcpu); | |
2462 | vcpu->arch.mmu.root_hpa = INVALID_PAGE; | |
6aa8b732 AK |
2463 | } |
2464 | } | |
2465 | ||
2466 | int kvm_mmu_reset_context(struct kvm_vcpu *vcpu) | |
17c3ba9d AK |
2467 | { |
2468 | destroy_kvm_mmu(vcpu); | |
2469 | return init_kvm_mmu(vcpu); | |
2470 | } | |
8668a3c4 | 2471 | EXPORT_SYMBOL_GPL(kvm_mmu_reset_context); |
17c3ba9d AK |
2472 | |
2473 | int kvm_mmu_load(struct kvm_vcpu *vcpu) | |
6aa8b732 | 2474 | { |
714b93da AK |
2475 | int r; |
2476 | ||
e2dec939 | 2477 | r = mmu_topup_memory_caches(vcpu); |
17c3ba9d AK |
2478 | if (r) |
2479 | goto out; | |
aaee2c94 | 2480 | spin_lock(&vcpu->kvm->mmu_lock); |
eb787d10 | 2481 | kvm_mmu_free_some_pages(vcpu); |
8986ecc0 | 2482 | r = mmu_alloc_roots(vcpu); |
0ba73cda | 2483 | mmu_sync_roots(vcpu); |
aaee2c94 | 2484 | spin_unlock(&vcpu->kvm->mmu_lock); |
8986ecc0 MT |
2485 | if (r) |
2486 | goto out; | |
3662cb1c | 2487 | /* set_cr3() should ensure TLB has been flushed */ |
ad312c7c | 2488 | kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa); |
714b93da AK |
2489 | out: |
2490 | return r; | |
6aa8b732 | 2491 | } |
17c3ba9d AK |
2492 | EXPORT_SYMBOL_GPL(kvm_mmu_load); |
2493 | ||
2494 | void kvm_mmu_unload(struct kvm_vcpu *vcpu) | |
2495 | { | |
2496 | mmu_free_roots(vcpu); | |
2497 | } | |
6aa8b732 | 2498 | |
09072daf | 2499 | static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu, |
4db35314 | 2500 | struct kvm_mmu_page *sp, |
ac1b714e AK |
2501 | u64 *spte) |
2502 | { | |
2503 | u64 pte; | |
2504 | struct kvm_mmu_page *child; | |
2505 | ||
2506 | pte = *spte; | |
c7addb90 | 2507 | if (is_shadow_present_pte(pte)) { |
776e6633 | 2508 | if (is_last_spte(pte, sp->role.level)) |
290fc38d | 2509 | rmap_remove(vcpu->kvm, spte); |
ac1b714e AK |
2510 | else { |
2511 | child = page_header(pte & PT64_BASE_ADDR_MASK); | |
90cb0529 | 2512 | mmu_page_remove_parent_pte(child, spte); |
ac1b714e AK |
2513 | } |
2514 | } | |
d555c333 | 2515 | __set_spte(spte, shadow_trap_nonpresent_pte); |
05da4558 MT |
2516 | if (is_large_pte(pte)) |
2517 | --vcpu->kvm->stat.lpages; | |
ac1b714e AK |
2518 | } |
2519 | ||
0028425f | 2520 | static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu, |
4db35314 | 2521 | struct kvm_mmu_page *sp, |
0028425f | 2522 | u64 *spte, |
489f1d65 | 2523 | const void *new) |
0028425f | 2524 | { |
30945387 | 2525 | if (sp->role.level != PT_PAGE_TABLE_LEVEL) { |
7e4e4056 JR |
2526 | ++vcpu->kvm->stat.mmu_pde_zapped; |
2527 | return; | |
30945387 | 2528 | } |
0028425f | 2529 | |
4cee5764 | 2530 | ++vcpu->kvm->stat.mmu_pte_updated; |
4db35314 | 2531 | if (sp->role.glevels == PT32_ROOT_LEVEL) |
489f1d65 | 2532 | paging32_update_pte(vcpu, sp, spte, new); |
0028425f | 2533 | else |
489f1d65 | 2534 | paging64_update_pte(vcpu, sp, spte, new); |
0028425f AK |
2535 | } |
2536 | ||
79539cec AK |
2537 | static bool need_remote_flush(u64 old, u64 new) |
2538 | { | |
2539 | if (!is_shadow_present_pte(old)) | |
2540 | return false; | |
2541 | if (!is_shadow_present_pte(new)) | |
2542 | return true; | |
2543 | if ((old ^ new) & PT64_BASE_ADDR_MASK) | |
2544 | return true; | |
2545 | old ^= PT64_NX_MASK; | |
2546 | new ^= PT64_NX_MASK; | |
2547 | return (old & ~new & PT64_PERM_MASK) != 0; | |
2548 | } | |
2549 | ||
2550 | static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new) | |
2551 | { | |
2552 | if (need_remote_flush(old, new)) | |
2553 | kvm_flush_remote_tlbs(vcpu->kvm); | |
2554 | else | |
2555 | kvm_mmu_flush_tlb(vcpu); | |
2556 | } | |
2557 | ||
12b7d28f AK |
2558 | static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu) |
2559 | { | |
ad312c7c | 2560 | u64 *spte = vcpu->arch.last_pte_updated; |
12b7d28f | 2561 | |
7b52345e | 2562 | return !!(spte && (*spte & shadow_accessed_mask)); |
12b7d28f AK |
2563 | } |
2564 | ||
d7824fff AK |
2565 | static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
2566 | const u8 *new, int bytes) | |
2567 | { | |
2568 | gfn_t gfn; | |
2569 | int r; | |
2570 | u64 gpte = 0; | |
35149e21 | 2571 | pfn_t pfn; |
d7824fff AK |
2572 | |
2573 | if (bytes != 4 && bytes != 8) | |
2574 | return; | |
2575 | ||
2576 | /* | |
2577 | * Assume that the pte write on a page table of the same type | |
2578 | * as the current vcpu paging mode. This is nearly always true | |
2579 | * (might be false while changing modes). Note it is verified later | |
2580 | * by update_pte(). | |
2581 | */ | |
2582 | if (is_pae(vcpu)) { | |
2583 | /* Handle a 32-bit guest writing two halves of a 64-bit gpte */ | |
2584 | if ((bytes == 4) && (gpa % 4 == 0)) { | |
2585 | r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8); | |
2586 | if (r) | |
2587 | return; | |
2588 | memcpy((void *)&gpte + (gpa % 8), new, 4); | |
2589 | } else if ((bytes == 8) && (gpa % 8 == 0)) { | |
2590 | memcpy((void *)&gpte, new, 8); | |
2591 | } | |
2592 | } else { | |
2593 | if ((bytes == 4) && (gpa % 4 == 0)) | |
2594 | memcpy((void *)&gpte, new, 4); | |
2595 | } | |
43a3795a | 2596 | if (!is_present_gpte(gpte)) |
d7824fff AK |
2597 | return; |
2598 | gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT; | |
72dc67a6 | 2599 | |
e930bffe | 2600 | vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq; |
4c2155ce | 2601 | smp_rmb(); |
35149e21 | 2602 | pfn = gfn_to_pfn(vcpu->kvm, gfn); |
72dc67a6 | 2603 | |
35149e21 AL |
2604 | if (is_error_pfn(pfn)) { |
2605 | kvm_release_pfn_clean(pfn); | |
d196e343 AK |
2606 | return; |
2607 | } | |
d7824fff | 2608 | vcpu->arch.update_pte.gfn = gfn; |
35149e21 | 2609 | vcpu->arch.update_pte.pfn = pfn; |
d7824fff AK |
2610 | } |
2611 | ||
1b7fcd32 AK |
2612 | static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn) |
2613 | { | |
2614 | u64 *spte = vcpu->arch.last_pte_updated; | |
2615 | ||
2616 | if (spte | |
2617 | && vcpu->arch.last_pte_gfn == gfn | |
2618 | && shadow_accessed_mask | |
2619 | && !(*spte & shadow_accessed_mask) | |
2620 | && is_shadow_present_pte(*spte)) | |
2621 | set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte); | |
2622 | } | |
2623 | ||
09072daf | 2624 | void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
ad218f85 MT |
2625 | const u8 *new, int bytes, |
2626 | bool guest_initiated) | |
da4a00f0 | 2627 | { |
9b7a0325 | 2628 | gfn_t gfn = gpa >> PAGE_SHIFT; |
4db35314 | 2629 | struct kvm_mmu_page *sp; |
0e7bc4b9 | 2630 | struct hlist_node *node, *n; |
9b7a0325 AK |
2631 | struct hlist_head *bucket; |
2632 | unsigned index; | |
489f1d65 | 2633 | u64 entry, gentry; |
9b7a0325 | 2634 | u64 *spte; |
9b7a0325 | 2635 | unsigned offset = offset_in_page(gpa); |
0e7bc4b9 | 2636 | unsigned pte_size; |
9b7a0325 | 2637 | unsigned page_offset; |
0e7bc4b9 | 2638 | unsigned misaligned; |
fce0657f | 2639 | unsigned quadrant; |
9b7a0325 | 2640 | int level; |
86a5ba02 | 2641 | int flooded = 0; |
ac1b714e | 2642 | int npte; |
489f1d65 | 2643 | int r; |
9b7a0325 | 2644 | |
b8688d51 | 2645 | pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes); |
d7824fff | 2646 | mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes); |
aaee2c94 | 2647 | spin_lock(&vcpu->kvm->mmu_lock); |
1b7fcd32 | 2648 | kvm_mmu_access_page(vcpu, gfn); |
eb787d10 | 2649 | kvm_mmu_free_some_pages(vcpu); |
4cee5764 | 2650 | ++vcpu->kvm->stat.mmu_pte_write; |
c7addb90 | 2651 | kvm_mmu_audit(vcpu, "pre pte write"); |
ad218f85 MT |
2652 | if (guest_initiated) { |
2653 | if (gfn == vcpu->arch.last_pt_write_gfn | |
2654 | && !last_updated_pte_accessed(vcpu)) { | |
2655 | ++vcpu->arch.last_pt_write_count; | |
2656 | if (vcpu->arch.last_pt_write_count >= 3) | |
2657 | flooded = 1; | |
2658 | } else { | |
2659 | vcpu->arch.last_pt_write_gfn = gfn; | |
2660 | vcpu->arch.last_pt_write_count = 1; | |
2661 | vcpu->arch.last_pte_updated = NULL; | |
2662 | } | |
86a5ba02 | 2663 | } |
1ae0a13d | 2664 | index = kvm_page_table_hashfn(gfn); |
f05e70ac | 2665 | bucket = &vcpu->kvm->arch.mmu_page_hash[index]; |
4db35314 | 2666 | hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) { |
f6e2c02b | 2667 | if (sp->gfn != gfn || sp->role.direct || sp->role.invalid) |
9b7a0325 | 2668 | continue; |
4db35314 | 2669 | pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8; |
0e7bc4b9 | 2670 | misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1); |
e925c5ba | 2671 | misaligned |= bytes < 4; |
86a5ba02 | 2672 | if (misaligned || flooded) { |
0e7bc4b9 AK |
2673 | /* |
2674 | * Misaligned accesses are too much trouble to fix | |
2675 | * up; also, they usually indicate a page is not used | |
2676 | * as a page table. | |
86a5ba02 AK |
2677 | * |
2678 | * If we're seeing too many writes to a page, | |
2679 | * it may no longer be a page table, or we may be | |
2680 | * forking, in which case it is better to unmap the | |
2681 | * page. | |
0e7bc4b9 AK |
2682 | */ |
2683 | pgprintk("misaligned: gpa %llx bytes %d role %x\n", | |
4db35314 | 2684 | gpa, bytes, sp->role.word); |
07385413 MT |
2685 | if (kvm_mmu_zap_page(vcpu->kvm, sp)) |
2686 | n = bucket->first; | |
4cee5764 | 2687 | ++vcpu->kvm->stat.mmu_flooded; |
0e7bc4b9 AK |
2688 | continue; |
2689 | } | |
9b7a0325 | 2690 | page_offset = offset; |
4db35314 | 2691 | level = sp->role.level; |
ac1b714e | 2692 | npte = 1; |
4db35314 | 2693 | if (sp->role.glevels == PT32_ROOT_LEVEL) { |
ac1b714e AK |
2694 | page_offset <<= 1; /* 32->64 */ |
2695 | /* | |
2696 | * A 32-bit pde maps 4MB while the shadow pdes map | |
2697 | * only 2MB. So we need to double the offset again | |
2698 | * and zap two pdes instead of one. | |
2699 | */ | |
2700 | if (level == PT32_ROOT_LEVEL) { | |
6b8d0f9b | 2701 | page_offset &= ~7; /* kill rounding error */ |
ac1b714e AK |
2702 | page_offset <<= 1; |
2703 | npte = 2; | |
2704 | } | |
fce0657f | 2705 | quadrant = page_offset >> PAGE_SHIFT; |
9b7a0325 | 2706 | page_offset &= ~PAGE_MASK; |
4db35314 | 2707 | if (quadrant != sp->role.quadrant) |
fce0657f | 2708 | continue; |
9b7a0325 | 2709 | } |
4db35314 | 2710 | spte = &sp->spt[page_offset / sizeof(*spte)]; |
489f1d65 DE |
2711 | if ((gpa & (pte_size - 1)) || (bytes < pte_size)) { |
2712 | gentry = 0; | |
2713 | r = kvm_read_guest_atomic(vcpu->kvm, | |
2714 | gpa & ~(u64)(pte_size - 1), | |
2715 | &gentry, pte_size); | |
2716 | new = (const void *)&gentry; | |
2717 | if (r < 0) | |
2718 | new = NULL; | |
2719 | } | |
ac1b714e | 2720 | while (npte--) { |
79539cec | 2721 | entry = *spte; |
4db35314 | 2722 | mmu_pte_write_zap_pte(vcpu, sp, spte); |
489f1d65 DE |
2723 | if (new) |
2724 | mmu_pte_write_new_pte(vcpu, sp, spte, new); | |
79539cec | 2725 | mmu_pte_write_flush_tlb(vcpu, entry, *spte); |
ac1b714e | 2726 | ++spte; |
9b7a0325 | 2727 | } |
9b7a0325 | 2728 | } |
c7addb90 | 2729 | kvm_mmu_audit(vcpu, "post pte write"); |
aaee2c94 | 2730 | spin_unlock(&vcpu->kvm->mmu_lock); |
35149e21 AL |
2731 | if (!is_error_pfn(vcpu->arch.update_pte.pfn)) { |
2732 | kvm_release_pfn_clean(vcpu->arch.update_pte.pfn); | |
2733 | vcpu->arch.update_pte.pfn = bad_pfn; | |
d7824fff | 2734 | } |
da4a00f0 AK |
2735 | } |
2736 | ||
a436036b AK |
2737 | int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva) |
2738 | { | |
10589a46 MT |
2739 | gpa_t gpa; |
2740 | int r; | |
a436036b | 2741 | |
60f24784 AK |
2742 | if (tdp_enabled) |
2743 | return 0; | |
2744 | ||
10589a46 | 2745 | gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva); |
10589a46 | 2746 | |
aaee2c94 | 2747 | spin_lock(&vcpu->kvm->mmu_lock); |
10589a46 | 2748 | r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT); |
aaee2c94 | 2749 | spin_unlock(&vcpu->kvm->mmu_lock); |
10589a46 | 2750 | return r; |
a436036b | 2751 | } |
577bdc49 | 2752 | EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt); |
a436036b | 2753 | |
22d95b12 | 2754 | void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu) |
ebeace86 | 2755 | { |
3b80fffe IE |
2756 | while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES && |
2757 | !list_empty(&vcpu->kvm->arch.active_mmu_pages)) { | |
4db35314 | 2758 | struct kvm_mmu_page *sp; |
ebeace86 | 2759 | |
f05e70ac | 2760 | sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev, |
4db35314 AK |
2761 | struct kvm_mmu_page, link); |
2762 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
4cee5764 | 2763 | ++vcpu->kvm->stat.mmu_recycled; |
ebeace86 AK |
2764 | } |
2765 | } | |
ebeace86 | 2766 | |
3067714c AK |
2767 | int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code) |
2768 | { | |
2769 | int r; | |
2770 | enum emulation_result er; | |
2771 | ||
ad312c7c | 2772 | r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code); |
3067714c AK |
2773 | if (r < 0) |
2774 | goto out; | |
2775 | ||
2776 | if (!r) { | |
2777 | r = 1; | |
2778 | goto out; | |
2779 | } | |
2780 | ||
b733bfb5 AK |
2781 | r = mmu_topup_memory_caches(vcpu); |
2782 | if (r) | |
2783 | goto out; | |
2784 | ||
851ba692 | 2785 | er = emulate_instruction(vcpu, cr2, error_code, 0); |
3067714c AK |
2786 | |
2787 | switch (er) { | |
2788 | case EMULATE_DONE: | |
2789 | return 1; | |
2790 | case EMULATE_DO_MMIO: | |
2791 | ++vcpu->stat.mmio_exits; | |
2792 | return 0; | |
2793 | case EMULATE_FAIL: | |
3f5d18a9 AK |
2794 | vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR; |
2795 | vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION; | |
a9c7399d | 2796 | vcpu->run->internal.ndata = 0; |
3f5d18a9 | 2797 | return 0; |
3067714c AK |
2798 | default: |
2799 | BUG(); | |
2800 | } | |
2801 | out: | |
3067714c AK |
2802 | return r; |
2803 | } | |
2804 | EXPORT_SYMBOL_GPL(kvm_mmu_page_fault); | |
2805 | ||
a7052897 MT |
2806 | void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva) |
2807 | { | |
a7052897 | 2808 | vcpu->arch.mmu.invlpg(vcpu, gva); |
a7052897 MT |
2809 | kvm_mmu_flush_tlb(vcpu); |
2810 | ++vcpu->stat.invlpg; | |
2811 | } | |
2812 | EXPORT_SYMBOL_GPL(kvm_mmu_invlpg); | |
2813 | ||
18552672 JR |
2814 | void kvm_enable_tdp(void) |
2815 | { | |
2816 | tdp_enabled = true; | |
2817 | } | |
2818 | EXPORT_SYMBOL_GPL(kvm_enable_tdp); | |
2819 | ||
5f4cb662 JR |
2820 | void kvm_disable_tdp(void) |
2821 | { | |
2822 | tdp_enabled = false; | |
2823 | } | |
2824 | EXPORT_SYMBOL_GPL(kvm_disable_tdp); | |
2825 | ||
6aa8b732 AK |
2826 | static void free_mmu_pages(struct kvm_vcpu *vcpu) |
2827 | { | |
ad312c7c | 2828 | free_page((unsigned long)vcpu->arch.mmu.pae_root); |
6aa8b732 AK |
2829 | } |
2830 | ||
2831 | static int alloc_mmu_pages(struct kvm_vcpu *vcpu) | |
2832 | { | |
17ac10ad | 2833 | struct page *page; |
6aa8b732 AK |
2834 | int i; |
2835 | ||
2836 | ASSERT(vcpu); | |
2837 | ||
17ac10ad AK |
2838 | /* |
2839 | * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64. | |
2840 | * Therefore we need to allocate shadow page tables in the first | |
2841 | * 4GB of memory, which happens to fit the DMA32 zone. | |
2842 | */ | |
2843 | page = alloc_page(GFP_KERNEL | __GFP_DMA32); | |
2844 | if (!page) | |
2845 | goto error_1; | |
ad312c7c | 2846 | vcpu->arch.mmu.pae_root = page_address(page); |
17ac10ad | 2847 | for (i = 0; i < 4; ++i) |
ad312c7c | 2848 | vcpu->arch.mmu.pae_root[i] = INVALID_PAGE; |
17ac10ad | 2849 | |
6aa8b732 AK |
2850 | return 0; |
2851 | ||
2852 | error_1: | |
2853 | free_mmu_pages(vcpu); | |
2854 | return -ENOMEM; | |
2855 | } | |
2856 | ||
8018c27b | 2857 | int kvm_mmu_create(struct kvm_vcpu *vcpu) |
6aa8b732 | 2858 | { |
6aa8b732 | 2859 | ASSERT(vcpu); |
ad312c7c | 2860 | ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
6aa8b732 | 2861 | |
8018c27b IM |
2862 | return alloc_mmu_pages(vcpu); |
2863 | } | |
6aa8b732 | 2864 | |
8018c27b IM |
2865 | int kvm_mmu_setup(struct kvm_vcpu *vcpu) |
2866 | { | |
2867 | ASSERT(vcpu); | |
ad312c7c | 2868 | ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
2c264957 | 2869 | |
8018c27b | 2870 | return init_kvm_mmu(vcpu); |
6aa8b732 AK |
2871 | } |
2872 | ||
2873 | void kvm_mmu_destroy(struct kvm_vcpu *vcpu) | |
2874 | { | |
2875 | ASSERT(vcpu); | |
2876 | ||
2877 | destroy_kvm_mmu(vcpu); | |
2878 | free_mmu_pages(vcpu); | |
714b93da | 2879 | mmu_free_memory_caches(vcpu); |
6aa8b732 AK |
2880 | } |
2881 | ||
90cb0529 | 2882 | void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot) |
6aa8b732 | 2883 | { |
4db35314 | 2884 | struct kvm_mmu_page *sp; |
6aa8b732 | 2885 | |
f05e70ac | 2886 | list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) { |
6aa8b732 AK |
2887 | int i; |
2888 | u64 *pt; | |
2889 | ||
291f26bc | 2890 | if (!test_bit(slot, sp->slot_bitmap)) |
6aa8b732 AK |
2891 | continue; |
2892 | ||
4db35314 | 2893 | pt = sp->spt; |
6aa8b732 AK |
2894 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) |
2895 | /* avoid RMW */ | |
9647c14c | 2896 | if (pt[i] & PT_WRITABLE_MASK) |
6aa8b732 | 2897 | pt[i] &= ~PT_WRITABLE_MASK; |
6aa8b732 | 2898 | } |
171d595d | 2899 | kvm_flush_remote_tlbs(kvm); |
6aa8b732 | 2900 | } |
37a7d8b0 | 2901 | |
90cb0529 | 2902 | void kvm_mmu_zap_all(struct kvm *kvm) |
e0fa826f | 2903 | { |
4db35314 | 2904 | struct kvm_mmu_page *sp, *node; |
e0fa826f | 2905 | |
aaee2c94 | 2906 | spin_lock(&kvm->mmu_lock); |
f05e70ac | 2907 | list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link) |
07385413 MT |
2908 | if (kvm_mmu_zap_page(kvm, sp)) |
2909 | node = container_of(kvm->arch.active_mmu_pages.next, | |
2910 | struct kvm_mmu_page, link); | |
aaee2c94 | 2911 | spin_unlock(&kvm->mmu_lock); |
e0fa826f | 2912 | |
90cb0529 | 2913 | kvm_flush_remote_tlbs(kvm); |
e0fa826f DL |
2914 | } |
2915 | ||
8b2cf73c | 2916 | static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm) |
3ee16c81 IE |
2917 | { |
2918 | struct kvm_mmu_page *page; | |
2919 | ||
2920 | page = container_of(kvm->arch.active_mmu_pages.prev, | |
2921 | struct kvm_mmu_page, link); | |
2922 | kvm_mmu_zap_page(kvm, page); | |
2923 | } | |
2924 | ||
2925 | static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask) | |
2926 | { | |
2927 | struct kvm *kvm; | |
2928 | struct kvm *kvm_freed = NULL; | |
2929 | int cache_count = 0; | |
2930 | ||
2931 | spin_lock(&kvm_lock); | |
2932 | ||
2933 | list_for_each_entry(kvm, &vm_list, vm_list) { | |
f656ce01 | 2934 | int npages, idx; |
3ee16c81 | 2935 | |
f656ce01 | 2936 | idx = srcu_read_lock(&kvm->srcu); |
3ee16c81 IE |
2937 | spin_lock(&kvm->mmu_lock); |
2938 | npages = kvm->arch.n_alloc_mmu_pages - | |
2939 | kvm->arch.n_free_mmu_pages; | |
2940 | cache_count += npages; | |
2941 | if (!kvm_freed && nr_to_scan > 0 && npages > 0) { | |
2942 | kvm_mmu_remove_one_alloc_mmu_page(kvm); | |
2943 | cache_count--; | |
2944 | kvm_freed = kvm; | |
2945 | } | |
2946 | nr_to_scan--; | |
2947 | ||
2948 | spin_unlock(&kvm->mmu_lock); | |
f656ce01 | 2949 | srcu_read_unlock(&kvm->srcu, idx); |
3ee16c81 IE |
2950 | } |
2951 | if (kvm_freed) | |
2952 | list_move_tail(&kvm_freed->vm_list, &vm_list); | |
2953 | ||
2954 | spin_unlock(&kvm_lock); | |
2955 | ||
2956 | return cache_count; | |
2957 | } | |
2958 | ||
2959 | static struct shrinker mmu_shrinker = { | |
2960 | .shrink = mmu_shrink, | |
2961 | .seeks = DEFAULT_SEEKS * 10, | |
2962 | }; | |
2963 | ||
2ddfd20e | 2964 | static void mmu_destroy_caches(void) |
b5a33a75 AK |
2965 | { |
2966 | if (pte_chain_cache) | |
2967 | kmem_cache_destroy(pte_chain_cache); | |
2968 | if (rmap_desc_cache) | |
2969 | kmem_cache_destroy(rmap_desc_cache); | |
d3d25b04 AK |
2970 | if (mmu_page_header_cache) |
2971 | kmem_cache_destroy(mmu_page_header_cache); | |
b5a33a75 AK |
2972 | } |
2973 | ||
3ee16c81 IE |
2974 | void kvm_mmu_module_exit(void) |
2975 | { | |
2976 | mmu_destroy_caches(); | |
2977 | unregister_shrinker(&mmu_shrinker); | |
2978 | } | |
2979 | ||
b5a33a75 AK |
2980 | int kvm_mmu_module_init(void) |
2981 | { | |
2982 | pte_chain_cache = kmem_cache_create("kvm_pte_chain", | |
2983 | sizeof(struct kvm_pte_chain), | |
20c2df83 | 2984 | 0, 0, NULL); |
b5a33a75 AK |
2985 | if (!pte_chain_cache) |
2986 | goto nomem; | |
2987 | rmap_desc_cache = kmem_cache_create("kvm_rmap_desc", | |
2988 | sizeof(struct kvm_rmap_desc), | |
20c2df83 | 2989 | 0, 0, NULL); |
b5a33a75 AK |
2990 | if (!rmap_desc_cache) |
2991 | goto nomem; | |
2992 | ||
d3d25b04 AK |
2993 | mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header", |
2994 | sizeof(struct kvm_mmu_page), | |
20c2df83 | 2995 | 0, 0, NULL); |
d3d25b04 AK |
2996 | if (!mmu_page_header_cache) |
2997 | goto nomem; | |
2998 | ||
3ee16c81 IE |
2999 | register_shrinker(&mmu_shrinker); |
3000 | ||
b5a33a75 AK |
3001 | return 0; |
3002 | ||
3003 | nomem: | |
3ee16c81 | 3004 | mmu_destroy_caches(); |
b5a33a75 AK |
3005 | return -ENOMEM; |
3006 | } | |
3007 | ||
3ad82a7e ZX |
3008 | /* |
3009 | * Caculate mmu pages needed for kvm. | |
3010 | */ | |
3011 | unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm) | |
3012 | { | |
3013 | int i; | |
3014 | unsigned int nr_mmu_pages; | |
3015 | unsigned int nr_pages = 0; | |
bc6678a3 | 3016 | struct kvm_memslots *slots; |
3ad82a7e | 3017 | |
bc6678a3 MT |
3018 | slots = rcu_dereference(kvm->memslots); |
3019 | for (i = 0; i < slots->nmemslots; i++) | |
3020 | nr_pages += slots->memslots[i].npages; | |
3ad82a7e ZX |
3021 | |
3022 | nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000; | |
3023 | nr_mmu_pages = max(nr_mmu_pages, | |
3024 | (unsigned int) KVM_MIN_ALLOC_MMU_PAGES); | |
3025 | ||
3026 | return nr_mmu_pages; | |
3027 | } | |
3028 | ||
2f333bcb MT |
3029 | static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer, |
3030 | unsigned len) | |
3031 | { | |
3032 | if (len > buffer->len) | |
3033 | return NULL; | |
3034 | return buffer->ptr; | |
3035 | } | |
3036 | ||
3037 | static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer, | |
3038 | unsigned len) | |
3039 | { | |
3040 | void *ret; | |
3041 | ||
3042 | ret = pv_mmu_peek_buffer(buffer, len); | |
3043 | if (!ret) | |
3044 | return ret; | |
3045 | buffer->ptr += len; | |
3046 | buffer->len -= len; | |
3047 | buffer->processed += len; | |
3048 | return ret; | |
3049 | } | |
3050 | ||
3051 | static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu, | |
3052 | gpa_t addr, gpa_t value) | |
3053 | { | |
3054 | int bytes = 8; | |
3055 | int r; | |
3056 | ||
3057 | if (!is_long_mode(vcpu) && !is_pae(vcpu)) | |
3058 | bytes = 4; | |
3059 | ||
3060 | r = mmu_topup_memory_caches(vcpu); | |
3061 | if (r) | |
3062 | return r; | |
3063 | ||
3200f405 | 3064 | if (!emulator_write_phys(vcpu, addr, &value, bytes)) |
2f333bcb MT |
3065 | return -EFAULT; |
3066 | ||
3067 | return 1; | |
3068 | } | |
3069 | ||
3070 | static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu) | |
3071 | { | |
a8cd0244 | 3072 | kvm_set_cr3(vcpu, vcpu->arch.cr3); |
2f333bcb MT |
3073 | return 1; |
3074 | } | |
3075 | ||
3076 | static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr) | |
3077 | { | |
3078 | spin_lock(&vcpu->kvm->mmu_lock); | |
3079 | mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT); | |
3080 | spin_unlock(&vcpu->kvm->mmu_lock); | |
3081 | return 1; | |
3082 | } | |
3083 | ||
3084 | static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu, | |
3085 | struct kvm_pv_mmu_op_buffer *buffer) | |
3086 | { | |
3087 | struct kvm_mmu_op_header *header; | |
3088 | ||
3089 | header = pv_mmu_peek_buffer(buffer, sizeof *header); | |
3090 | if (!header) | |
3091 | return 0; | |
3092 | switch (header->op) { | |
3093 | case KVM_MMU_OP_WRITE_PTE: { | |
3094 | struct kvm_mmu_op_write_pte *wpte; | |
3095 | ||
3096 | wpte = pv_mmu_read_buffer(buffer, sizeof *wpte); | |
3097 | if (!wpte) | |
3098 | return 0; | |
3099 | return kvm_pv_mmu_write(vcpu, wpte->pte_phys, | |
3100 | wpte->pte_val); | |
3101 | } | |
3102 | case KVM_MMU_OP_FLUSH_TLB: { | |
3103 | struct kvm_mmu_op_flush_tlb *ftlb; | |
3104 | ||
3105 | ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb); | |
3106 | if (!ftlb) | |
3107 | return 0; | |
3108 | return kvm_pv_mmu_flush_tlb(vcpu); | |
3109 | } | |
3110 | case KVM_MMU_OP_RELEASE_PT: { | |
3111 | struct kvm_mmu_op_release_pt *rpt; | |
3112 | ||
3113 | rpt = pv_mmu_read_buffer(buffer, sizeof *rpt); | |
3114 | if (!rpt) | |
3115 | return 0; | |
3116 | return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys); | |
3117 | } | |
3118 | default: return 0; | |
3119 | } | |
3120 | } | |
3121 | ||
3122 | int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes, | |
3123 | gpa_t addr, unsigned long *ret) | |
3124 | { | |
3125 | int r; | |
6ad18fba | 3126 | struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer; |
2f333bcb | 3127 | |
6ad18fba DH |
3128 | buffer->ptr = buffer->buf; |
3129 | buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf); | |
3130 | buffer->processed = 0; | |
2f333bcb | 3131 | |
6ad18fba | 3132 | r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len); |
2f333bcb MT |
3133 | if (r) |
3134 | goto out; | |
3135 | ||
6ad18fba DH |
3136 | while (buffer->len) { |
3137 | r = kvm_pv_mmu_op_one(vcpu, buffer); | |
2f333bcb MT |
3138 | if (r < 0) |
3139 | goto out; | |
3140 | if (r == 0) | |
3141 | break; | |
3142 | } | |
3143 | ||
3144 | r = 1; | |
3145 | out: | |
6ad18fba | 3146 | *ret = buffer->processed; |
2f333bcb MT |
3147 | return r; |
3148 | } | |
3149 | ||
94d8b056 MT |
3150 | int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4]) |
3151 | { | |
3152 | struct kvm_shadow_walk_iterator iterator; | |
3153 | int nr_sptes = 0; | |
3154 | ||
3155 | spin_lock(&vcpu->kvm->mmu_lock); | |
3156 | for_each_shadow_entry(vcpu, addr, iterator) { | |
3157 | sptes[iterator.level-1] = *iterator.sptep; | |
3158 | nr_sptes++; | |
3159 | if (!is_shadow_present_pte(*iterator.sptep)) | |
3160 | break; | |
3161 | } | |
3162 | spin_unlock(&vcpu->kvm->mmu_lock); | |
3163 | ||
3164 | return nr_sptes; | |
3165 | } | |
3166 | EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy); | |
3167 | ||
37a7d8b0 AK |
3168 | #ifdef AUDIT |
3169 | ||
3170 | static const char *audit_msg; | |
3171 | ||
3172 | static gva_t canonicalize(gva_t gva) | |
3173 | { | |
3174 | #ifdef CONFIG_X86_64 | |
3175 | gva = (long long)(gva << 16) >> 16; | |
3176 | #endif | |
3177 | return gva; | |
3178 | } | |
3179 | ||
08a3732b MT |
3180 | |
3181 | typedef void (*inspect_spte_fn) (struct kvm *kvm, struct kvm_mmu_page *sp, | |
3182 | u64 *sptep); | |
3183 | ||
3184 | static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp, | |
3185 | inspect_spte_fn fn) | |
3186 | { | |
3187 | int i; | |
3188 | ||
3189 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
3190 | u64 ent = sp->spt[i]; | |
3191 | ||
3192 | if (is_shadow_present_pte(ent)) { | |
2920d728 | 3193 | if (!is_last_spte(ent, sp->role.level)) { |
08a3732b MT |
3194 | struct kvm_mmu_page *child; |
3195 | child = page_header(ent & PT64_BASE_ADDR_MASK); | |
3196 | __mmu_spte_walk(kvm, child, fn); | |
2920d728 | 3197 | } else |
08a3732b MT |
3198 | fn(kvm, sp, &sp->spt[i]); |
3199 | } | |
3200 | } | |
3201 | } | |
3202 | ||
3203 | static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn) | |
3204 | { | |
3205 | int i; | |
3206 | struct kvm_mmu_page *sp; | |
3207 | ||
3208 | if (!VALID_PAGE(vcpu->arch.mmu.root_hpa)) | |
3209 | return; | |
3210 | if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) { | |
3211 | hpa_t root = vcpu->arch.mmu.root_hpa; | |
3212 | sp = page_header(root); | |
3213 | __mmu_spte_walk(vcpu->kvm, sp, fn); | |
3214 | return; | |
3215 | } | |
3216 | for (i = 0; i < 4; ++i) { | |
3217 | hpa_t root = vcpu->arch.mmu.pae_root[i]; | |
3218 | ||
3219 | if (root && VALID_PAGE(root)) { | |
3220 | root &= PT64_BASE_ADDR_MASK; | |
3221 | sp = page_header(root); | |
3222 | __mmu_spte_walk(vcpu->kvm, sp, fn); | |
3223 | } | |
3224 | } | |
3225 | return; | |
3226 | } | |
3227 | ||
37a7d8b0 AK |
3228 | static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte, |
3229 | gva_t va, int level) | |
3230 | { | |
3231 | u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK); | |
3232 | int i; | |
3233 | gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1)); | |
3234 | ||
3235 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) { | |
3236 | u64 ent = pt[i]; | |
3237 | ||
c7addb90 | 3238 | if (ent == shadow_trap_nonpresent_pte) |
37a7d8b0 AK |
3239 | continue; |
3240 | ||
3241 | va = canonicalize(va); | |
2920d728 MT |
3242 | if (is_shadow_present_pte(ent) && !is_last_spte(ent, level)) |
3243 | audit_mappings_page(vcpu, ent, va, level - 1); | |
3244 | else { | |
ad312c7c | 3245 | gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va); |
34382539 JK |
3246 | gfn_t gfn = gpa >> PAGE_SHIFT; |
3247 | pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn); | |
3248 | hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT; | |
37a7d8b0 | 3249 | |
2aaf65e8 MT |
3250 | if (is_error_pfn(pfn)) { |
3251 | kvm_release_pfn_clean(pfn); | |
3252 | continue; | |
3253 | } | |
3254 | ||
c7addb90 | 3255 | if (is_shadow_present_pte(ent) |
37a7d8b0 | 3256 | && (ent & PT64_BASE_ADDR_MASK) != hpa) |
c7addb90 AK |
3257 | printk(KERN_ERR "xx audit error: (%s) levels %d" |
3258 | " gva %lx gpa %llx hpa %llx ent %llx %d\n", | |
ad312c7c | 3259 | audit_msg, vcpu->arch.mmu.root_level, |
d77c26fc MD |
3260 | va, gpa, hpa, ent, |
3261 | is_shadow_present_pte(ent)); | |
c7addb90 AK |
3262 | else if (ent == shadow_notrap_nonpresent_pte |
3263 | && !is_error_hpa(hpa)) | |
3264 | printk(KERN_ERR "audit: (%s) notrap shadow," | |
3265 | " valid guest gva %lx\n", audit_msg, va); | |
35149e21 | 3266 | kvm_release_pfn_clean(pfn); |
c7addb90 | 3267 | |
37a7d8b0 AK |
3268 | } |
3269 | } | |
3270 | } | |
3271 | ||
3272 | static void audit_mappings(struct kvm_vcpu *vcpu) | |
3273 | { | |
1ea252af | 3274 | unsigned i; |
37a7d8b0 | 3275 | |
ad312c7c ZX |
3276 | if (vcpu->arch.mmu.root_level == 4) |
3277 | audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4); | |
37a7d8b0 AK |
3278 | else |
3279 | for (i = 0; i < 4; ++i) | |
ad312c7c | 3280 | if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK) |
37a7d8b0 | 3281 | audit_mappings_page(vcpu, |
ad312c7c | 3282 | vcpu->arch.mmu.pae_root[i], |
37a7d8b0 AK |
3283 | i << 30, |
3284 | 2); | |
3285 | } | |
3286 | ||
3287 | static int count_rmaps(struct kvm_vcpu *vcpu) | |
3288 | { | |
3289 | int nmaps = 0; | |
bc6678a3 | 3290 | int i, j, k, idx; |
37a7d8b0 | 3291 | |
bc6678a3 MT |
3292 | idx = srcu_read_lock(&kvm->srcu); |
3293 | slots = rcu_dereference(kvm->memslots); | |
37a7d8b0 | 3294 | for (i = 0; i < KVM_MEMORY_SLOTS; ++i) { |
bc6678a3 | 3295 | struct kvm_memory_slot *m = &slots->memslots[i]; |
37a7d8b0 AK |
3296 | struct kvm_rmap_desc *d; |
3297 | ||
3298 | for (j = 0; j < m->npages; ++j) { | |
290fc38d | 3299 | unsigned long *rmapp = &m->rmap[j]; |
37a7d8b0 | 3300 | |
290fc38d | 3301 | if (!*rmapp) |
37a7d8b0 | 3302 | continue; |
290fc38d | 3303 | if (!(*rmapp & 1)) { |
37a7d8b0 AK |
3304 | ++nmaps; |
3305 | continue; | |
3306 | } | |
290fc38d | 3307 | d = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
37a7d8b0 AK |
3308 | while (d) { |
3309 | for (k = 0; k < RMAP_EXT; ++k) | |
d555c333 | 3310 | if (d->sptes[k]) |
37a7d8b0 AK |
3311 | ++nmaps; |
3312 | else | |
3313 | break; | |
3314 | d = d->more; | |
3315 | } | |
3316 | } | |
3317 | } | |
bc6678a3 | 3318 | srcu_read_unlock(&kvm->srcu, idx); |
37a7d8b0 AK |
3319 | return nmaps; |
3320 | } | |
3321 | ||
08a3732b MT |
3322 | void inspect_spte_has_rmap(struct kvm *kvm, struct kvm_mmu_page *sp, u64 *sptep) |
3323 | { | |
3324 | unsigned long *rmapp; | |
3325 | struct kvm_mmu_page *rev_sp; | |
3326 | gfn_t gfn; | |
3327 | ||
3328 | if (*sptep & PT_WRITABLE_MASK) { | |
3329 | rev_sp = page_header(__pa(sptep)); | |
3330 | gfn = rev_sp->gfns[sptep - rev_sp->spt]; | |
3331 | ||
3332 | if (!gfn_to_memslot(kvm, gfn)) { | |
3333 | if (!printk_ratelimit()) | |
3334 | return; | |
3335 | printk(KERN_ERR "%s: no memslot for gfn %ld\n", | |
3336 | audit_msg, gfn); | |
3337 | printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n", | |
3338 | audit_msg, sptep - rev_sp->spt, | |
3339 | rev_sp->gfn); | |
3340 | dump_stack(); | |
3341 | return; | |
3342 | } | |
3343 | ||
2920d728 MT |
3344 | rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt], |
3345 | is_large_pte(*sptep)); | |
08a3732b MT |
3346 | if (!*rmapp) { |
3347 | if (!printk_ratelimit()) | |
3348 | return; | |
3349 | printk(KERN_ERR "%s: no rmap for writable spte %llx\n", | |
3350 | audit_msg, *sptep); | |
3351 | dump_stack(); | |
3352 | } | |
3353 | } | |
3354 | ||
3355 | } | |
3356 | ||
3357 | void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu) | |
3358 | { | |
3359 | mmu_spte_walk(vcpu, inspect_spte_has_rmap); | |
3360 | } | |
3361 | ||
3362 | static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu) | |
37a7d8b0 | 3363 | { |
4db35314 | 3364 | struct kvm_mmu_page *sp; |
37a7d8b0 AK |
3365 | int i; |
3366 | ||
f05e70ac | 3367 | list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) { |
4db35314 | 3368 | u64 *pt = sp->spt; |
37a7d8b0 | 3369 | |
4db35314 | 3370 | if (sp->role.level != PT_PAGE_TABLE_LEVEL) |
37a7d8b0 AK |
3371 | continue; |
3372 | ||
3373 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
3374 | u64 ent = pt[i]; | |
3375 | ||
3376 | if (!(ent & PT_PRESENT_MASK)) | |
3377 | continue; | |
3378 | if (!(ent & PT_WRITABLE_MASK)) | |
3379 | continue; | |
08a3732b | 3380 | inspect_spte_has_rmap(vcpu->kvm, sp, &pt[i]); |
37a7d8b0 AK |
3381 | } |
3382 | } | |
08a3732b | 3383 | return; |
37a7d8b0 AK |
3384 | } |
3385 | ||
3386 | static void audit_rmap(struct kvm_vcpu *vcpu) | |
3387 | { | |
08a3732b MT |
3388 | check_writable_mappings_rmap(vcpu); |
3389 | count_rmaps(vcpu); | |
37a7d8b0 AK |
3390 | } |
3391 | ||
3392 | static void audit_write_protection(struct kvm_vcpu *vcpu) | |
3393 | { | |
4db35314 | 3394 | struct kvm_mmu_page *sp; |
290fc38d IE |
3395 | struct kvm_memory_slot *slot; |
3396 | unsigned long *rmapp; | |
e58b0f9e | 3397 | u64 *spte; |
290fc38d | 3398 | gfn_t gfn; |
37a7d8b0 | 3399 | |
f05e70ac | 3400 | list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) { |
f6e2c02b | 3401 | if (sp->role.direct) |
37a7d8b0 | 3402 | continue; |
e58b0f9e MT |
3403 | if (sp->unsync) |
3404 | continue; | |
37a7d8b0 | 3405 | |
4db35314 | 3406 | gfn = unalias_gfn(vcpu->kvm, sp->gfn); |
2843099f | 3407 | slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn); |
290fc38d | 3408 | rmapp = &slot->rmap[gfn - slot->base_gfn]; |
e58b0f9e MT |
3409 | |
3410 | spte = rmap_next(vcpu->kvm, rmapp, NULL); | |
3411 | while (spte) { | |
3412 | if (*spte & PT_WRITABLE_MASK) | |
3413 | printk(KERN_ERR "%s: (%s) shadow page has " | |
3414 | "writable mappings: gfn %lx role %x\n", | |
b8688d51 | 3415 | __func__, audit_msg, sp->gfn, |
4db35314 | 3416 | sp->role.word); |
e58b0f9e MT |
3417 | spte = rmap_next(vcpu->kvm, rmapp, spte); |
3418 | } | |
37a7d8b0 AK |
3419 | } |
3420 | } | |
3421 | ||
3422 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) | |
3423 | { | |
3424 | int olddbg = dbg; | |
3425 | ||
3426 | dbg = 0; | |
3427 | audit_msg = msg; | |
3428 | audit_rmap(vcpu); | |
3429 | audit_write_protection(vcpu); | |
2aaf65e8 MT |
3430 | if (strcmp("pre pte write", audit_msg) != 0) |
3431 | audit_mappings(vcpu); | |
08a3732b | 3432 | audit_writable_sptes_have_rmaps(vcpu); |
37a7d8b0 AK |
3433 | dbg = olddbg; |
3434 | } | |
3435 | ||
3436 | #endif |