gdb: defer commit resume until all available events are consumed
[deliverable/binutils-gdb.git] / opcodes /
2020-07-08  Jan Beulichx86: various XOP insns lack L and/or W bit decoding
2020-07-08  Jan Beulichx86: FMA4 scalar insns ignore VEX.L
2020-07-08  Jan Beulichx86: re-work operand swapping for XOP shift/rotate...
2020-07-08  Jan Beulichx86: re-work operand handling for 5-operand XOP insns
2020-07-08  Jan Beulichx86: re-work operand swapping for FMA4 and 4-operand...
2020-07-07  Claudiu Zissulescuarc: Update vector instructions.
2020-07-07  Jan Beulichx86: introduce %BW to avoid going through vex_w_table[]
2020-07-06  Jan Beulichx86: adjust/correct VFRCZ{P,S}{S,D} decoding
2020-07-06  Jan Beulichx86: use %LW / %XW instead of going through vex_w_table[]
2020-07-06  Jan Beulichx86: most VBROADCAST{F,I}{32,64}x* only accept memory...
2020-07-06  Jan Beulichx86: adjust/correct V*{F,I}{32x8,64x4}
2020-07-06  Jan Beulichx86: drop EVEX table entries that can be made served...
2020-07-06  Jan Beulichx86: AVX512 VPERM{D,Q,PS,PD} insns need to honor EVEX.L'L
2020-07-06  Jan Beulichx86: AVX512 extract/insert insns need to honor EVEX.L'L
2020-07-06  Jan Beulichx86: honor VEX.W for VCVT{PH2PS,PS2PH}
2020-07-06  Jan Beulichx86: drop EVEX table entries that can be served by...
2020-07-06  Jan Beulichx86: replace EXqScalarS by EXqVexScalarS
2020-07-06  Jan Beulichx86: replace EX{d,q}Scalar by EXxmm_m{d,q}
2020-07-06  Nick CliftonFix spelling mistakes in some of the binutils sub-direc...
2020-07-06  Nick CliftonUpdated translations for various binutils sub-directories
2020-07-04  Nick CliftonUpdate version to 2.35.50 and regenerate files
2020-07-04  Nick CliftonAdd markers for binutils 2.35 branch
2020-07-02  H.J. Lux86: Add SwapSources
2020-06-30  Nelson ChuRISC-V: Support debug and float CSR as the unprivileged...
2020-06-29  Alan ModraC++ comments
2020-06-26  H.J. Lui386-opc.tbl: Add a blank line
2020-06-26  H.J. Lux86: Correct VexSIB128 to VecSIB128
2020-06-26  H.J. Lux86: Rename VecSIB to SIB for Intel AMX
2020-06-26  Jan Beulichx86: make I disassembler macro available for new use
2020-06-26  Jan Beulichx86: fix processing of -M disassembler option
2020-06-25  Jan Beulichx86: make J disassembler macro available for new use
2020-06-25  Jan Beulichx86: drop left-over 4-way alternative disassembler...
2020-06-25  Jan Beulichx86: fix SYSRET disassembly, improve {,V}CVTSI2S{S...
2020-06-22  Nelson ChuRISC-V: Report warning when linking the objects with...
2020-06-18  Jan Beulichx86: also test alternative VMGEXIT encoding
2020-06-17  Cui,Lilix86: Delete incorrect vmgexit entry in prefix_table
2020-06-14  H.J. Lux86: Correct xsusldtrk mnemonic
2020-06-12  Nelson ChuRISC-V: Drop the privileged spec v1.9 support.
2020-06-11  Alex Coplan[PATCH]: aarch64: Refactor representation of system...
2020-06-09  H.J. Lui386-dis.c: Fix a typo in comments
2020-06-09  Jan Beulichx86: consistently print prefixes explicitly which are...
2020-06-09  Jan Beulichx86: fix {,V}MOV{L,H}PD disassembly
2020-06-09  Jan Beulichx86: utilize X macro in EVEX decoding
2020-06-09  Jan Beulichx86: correct decoding of packed-FP-only AVX encodings
2020-06-09  Jan Beulichx86: correct mis-named MOD_0F51 enumerator
2020-06-08  Alex Coplan[PATCH] arm: Add DFB instruction for ARMv8-R
2020-06-08  Jan Beulichx86: restrict use of register aliases
2020-06-06  Alan ModraPower10 tidies
2020-06-05  Alan Modrabpf stack smashing detected
2020-06-04  Jose E. Marchesicpu,gas,opcodes: remove no longer needed workaround...
2020-06-04  Jose E. Marchesiopcodes: discriminate endianness and insn-endianness...
2020-06-04  Jose E. Marchesiopcodes: support insn endianness in cgen_cpu_open
2020-06-03  Nick CliftonUpdated Serbian translation for the opcodes sub-directory
2020-06-03  Nelson ChuRISC-V: Fix the error when building RISC-V linux native...
2020-06-01  Alan ModraRegen opcodes/bpf-desc.c
2020-05-28  Jose E. Marchesicpu,opcodes: add instruction semantics to bpf.cpu and...
2020-05-28  Alan Modraubsan: nios2: undefined shift
2020-05-28  Alan Modraasan: ns32k: use of uninitialized value
2020-05-28  Nick CliftonFix a potential use of an uninitialised value in the...
2020-05-27  Sandra LoosemoreFix extraction of signed constants in nios2 disassemble...
2020-05-26  Stefan Schulze Fri... ChangeLog entries for f687f5f563
2020-05-26  Stefan Schulze Fri... S/390: z13: Accept vector alignment hints
2020-05-21  Alan ModraReplace "if (x) free (x)" with "free (x)", opcodes
2020-05-20  Nelson Chu[PATCH v2 0/9] RISC-V: Support version controling for...
2020-05-19  Peter BergnerPower10 dcbf, sync, and wait extensions.
2020-05-19  Stafford Horneor1k: Regenerate opcodes after removing 32-bit support
2020-05-11  Alan ModraPower10 VSX scalar min-max-compare quad precision opera...
2020-05-11  Alan ModraPower10 VSX load/store rightmost element operations
2020-05-11  Alan ModraPower10 test lsb by byte operation
2020-05-11  Alan ModraPower10 string operations
2020-05-11  Peter BergnerPower10 Set boolean extension
2020-05-11  Alan ModraPower10 bit manipulation operations
2020-05-11  Alan ModraPower10 VSX PCV generate operations
2020-05-11  Alan ModraPower10 VSX Mask Manipulation Operations
2020-05-11  Alan ModraPower10 Reduced precision outer product operations
2020-05-11  Alan ModraPower10 SIMD permute class operations
2020-05-11  Alan ModraPower10 128-bit binary integer operations
2020-05-11  Alan ModraPower10 VSX 32-byte storage access
2020-05-11  Alan ModraPower10 vector integer multiply, divide, modulo insns
2020-05-11  Peter BergnerPower10 byte reverse instructions
2020-05-11  Peter BergnerPower10 Copy/Paste Extensions
2020-05-11  Peter BergnerPower10 Add new L operand to the slbiag instruction
2020-05-11  Alan ModraPowerPC Default disassembler to -Mpower10
2020-05-11  Alan ModraPowerPC Rename powerxx to power10
2020-05-11  Nick CliftonUpdated French translation for the ld sub-directory...
2020-04-30  Alex CoplanAArch64: add GAS support for UDF instruction
2020-04-29  Nick CliftonAlso use unsigned 8-bit immediate values for the LDRC...
2020-04-29  Nick CliftonUpdated Serbian translation for the binutils sub-direct...
2020-04-29  Nick CliftonFix the disassmbly of SH instructions which have an...
2020-04-21  Andreas SchwabDisallow PC relative for CMPI on MC68000/10
2020-04-20  Sudakshina Das[AArch64, Binutils] Add missing TSB instruction
2020-04-20  Sudakshina Das[AArch64, Binutils] Make hint space instructions valid...
2020-04-17  Fredrik Strupe[PATCH v2] binutils: arm: Fix disassembly of conditiona...
2020-04-16  David Faustcpu,gas,opcodes: support for eBPF JMP32 instruction...
2020-04-07  Cui,LiliAdd support for intel TSXLDTRK instructions$
2020-04-02  LiliCuiAdd support for intel SERIALIZE instruction
2020-03-26  Alan ModraRe: H8300 use of uninitialised value
2020-03-26  Alan ModraRe: ARC: Use of uninitialised value
2020-03-24  Alan ModraUninitialised memory read in z80-dis.c
2020-03-22  Alan ModraH8300 use of uninitialised value
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